pxa.c 22 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Based on drivers/serial/8250.c by Russell King.
  4. *
  5. * Author: Nicolas Pitre
  6. * Created: Feb 20, 2003
  7. * Copyright: (C) 2003 Monta Vista Software, Inc.
  8. *
  9. * Note 1: This driver is made separate from the already too overloaded
  10. * 8250.c because it needs some kirks of its own and that'll make it
  11. * easier to add DMA support.
  12. *
  13. * Note 2: I'm too sick of device allocation policies for serial ports.
  14. * If someone else wants to request an "official" allocation of major/minor
  15. * for this driver please be my guest. And don't forget that new hardware
  16. * to come from Intel might have more than 3 or 4 of those UARTs. Let's
  17. * hope for a better port registration and dynamic device allocation scheme
  18. * with the serial core maintainer satisfaction to appear soon.
  19. */
  20. #if defined(CONFIG_SERIAL_PXA_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  21. #define SUPPORT_SYSRQ
  22. #endif
  23. #include <linux/ioport.h>
  24. #include <linux/init.h>
  25. #include <linux/console.h>
  26. #include <linux/sysrq.h>
  27. #include <linux/serial_reg.h>
  28. #include <linux/circ_buf.h>
  29. #include <linux/delay.h>
  30. #include <linux/interrupt.h>
  31. #include <linux/of.h>
  32. #include <linux/platform_device.h>
  33. #include <linux/tty.h>
  34. #include <linux/tty_flip.h>
  35. #include <linux/serial_core.h>
  36. #include <linux/clk.h>
  37. #include <linux/io.h>
  38. #include <linux/slab.h>
  39. #define PXA_NAME_LEN 8
  40. struct uart_pxa_port {
  41. struct uart_port port;
  42. unsigned char ier;
  43. unsigned char lcr;
  44. unsigned char mcr;
  45. unsigned int lsr_break_flag;
  46. struct clk *clk;
  47. char name[PXA_NAME_LEN];
  48. };
  49. static inline unsigned int serial_in(struct uart_pxa_port *up, int offset)
  50. {
  51. offset <<= 2;
  52. return readl(up->port.membase + offset);
  53. }
  54. static inline void serial_out(struct uart_pxa_port *up, int offset, int value)
  55. {
  56. offset <<= 2;
  57. writel(value, up->port.membase + offset);
  58. }
  59. static void serial_pxa_enable_ms(struct uart_port *port)
  60. {
  61. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  62. up->ier |= UART_IER_MSI;
  63. serial_out(up, UART_IER, up->ier);
  64. }
  65. static void serial_pxa_stop_tx(struct uart_port *port)
  66. {
  67. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  68. if (up->ier & UART_IER_THRI) {
  69. up->ier &= ~UART_IER_THRI;
  70. serial_out(up, UART_IER, up->ier);
  71. }
  72. }
  73. static void serial_pxa_stop_rx(struct uart_port *port)
  74. {
  75. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  76. up->ier &= ~UART_IER_RLSI;
  77. up->port.read_status_mask &= ~UART_LSR_DR;
  78. serial_out(up, UART_IER, up->ier);
  79. }
  80. static inline void receive_chars(struct uart_pxa_port *up, int *status)
  81. {
  82. unsigned int ch, flag;
  83. int max_count = 256;
  84. do {
  85. /* work around Errata #20 according to
  86. * Intel(R) PXA27x Processor Family
  87. * Specification Update (May 2005)
  88. *
  89. * Step 2
  90. * Disable the Reciever Time Out Interrupt via IER[RTOEI]
  91. */
  92. up->ier &= ~UART_IER_RTOIE;
  93. serial_out(up, UART_IER, up->ier);
  94. ch = serial_in(up, UART_RX);
  95. flag = TTY_NORMAL;
  96. up->port.icount.rx++;
  97. if (unlikely(*status & (UART_LSR_BI | UART_LSR_PE |
  98. UART_LSR_FE | UART_LSR_OE))) {
  99. /*
  100. * For statistics only
  101. */
  102. if (*status & UART_LSR_BI) {
  103. *status &= ~(UART_LSR_FE | UART_LSR_PE);
  104. up->port.icount.brk++;
  105. /*
  106. * We do the SysRQ and SAK checking
  107. * here because otherwise the break
  108. * may get masked by ignore_status_mask
  109. * or read_status_mask.
  110. */
  111. if (uart_handle_break(&up->port))
  112. goto ignore_char;
  113. } else if (*status & UART_LSR_PE)
  114. up->port.icount.parity++;
  115. else if (*status & UART_LSR_FE)
  116. up->port.icount.frame++;
  117. if (*status & UART_LSR_OE)
  118. up->port.icount.overrun++;
  119. /*
  120. * Mask off conditions which should be ignored.
  121. */
  122. *status &= up->port.read_status_mask;
  123. #ifdef CONFIG_SERIAL_PXA_CONSOLE
  124. if (up->port.line == up->port.cons->index) {
  125. /* Recover the break flag from console xmit */
  126. *status |= up->lsr_break_flag;
  127. up->lsr_break_flag = 0;
  128. }
  129. #endif
  130. if (*status & UART_LSR_BI) {
  131. flag = TTY_BREAK;
  132. } else if (*status & UART_LSR_PE)
  133. flag = TTY_PARITY;
  134. else if (*status & UART_LSR_FE)
  135. flag = TTY_FRAME;
  136. }
  137. if (uart_handle_sysrq_char(&up->port, ch))
  138. goto ignore_char;
  139. uart_insert_char(&up->port, *status, UART_LSR_OE, ch, flag);
  140. ignore_char:
  141. *status = serial_in(up, UART_LSR);
  142. } while ((*status & UART_LSR_DR) && (max_count-- > 0));
  143. tty_flip_buffer_push(&up->port.state->port);
  144. /* work around Errata #20 according to
  145. * Intel(R) PXA27x Processor Family
  146. * Specification Update (May 2005)
  147. *
  148. * Step 6:
  149. * No more data in FIFO: Re-enable RTO interrupt via IER[RTOIE]
  150. */
  151. up->ier |= UART_IER_RTOIE;
  152. serial_out(up, UART_IER, up->ier);
  153. }
  154. static void transmit_chars(struct uart_pxa_port *up)
  155. {
  156. struct circ_buf *xmit = &up->port.state->xmit;
  157. int count;
  158. if (up->port.x_char) {
  159. serial_out(up, UART_TX, up->port.x_char);
  160. up->port.icount.tx++;
  161. up->port.x_char = 0;
  162. return;
  163. }
  164. if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) {
  165. serial_pxa_stop_tx(&up->port);
  166. return;
  167. }
  168. count = up->port.fifosize / 2;
  169. do {
  170. serial_out(up, UART_TX, xmit->buf[xmit->tail]);
  171. xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
  172. up->port.icount.tx++;
  173. if (uart_circ_empty(xmit))
  174. break;
  175. } while (--count > 0);
  176. if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
  177. uart_write_wakeup(&up->port);
  178. if (uart_circ_empty(xmit))
  179. serial_pxa_stop_tx(&up->port);
  180. }
  181. static void serial_pxa_start_tx(struct uart_port *port)
  182. {
  183. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  184. if (!(up->ier & UART_IER_THRI)) {
  185. up->ier |= UART_IER_THRI;
  186. serial_out(up, UART_IER, up->ier);
  187. }
  188. }
  189. /* should hold up->port.lock */
  190. static inline void check_modem_status(struct uart_pxa_port *up)
  191. {
  192. int status;
  193. status = serial_in(up, UART_MSR);
  194. if ((status & UART_MSR_ANY_DELTA) == 0)
  195. return;
  196. if (status & UART_MSR_TERI)
  197. up->port.icount.rng++;
  198. if (status & UART_MSR_DDSR)
  199. up->port.icount.dsr++;
  200. if (status & UART_MSR_DDCD)
  201. uart_handle_dcd_change(&up->port, status & UART_MSR_DCD);
  202. if (status & UART_MSR_DCTS)
  203. uart_handle_cts_change(&up->port, status & UART_MSR_CTS);
  204. wake_up_interruptible(&up->port.state->port.delta_msr_wait);
  205. }
  206. /*
  207. * This handles the interrupt from one port.
  208. */
  209. static inline irqreturn_t serial_pxa_irq(int irq, void *dev_id)
  210. {
  211. struct uart_pxa_port *up = dev_id;
  212. unsigned int iir, lsr;
  213. iir = serial_in(up, UART_IIR);
  214. if (iir & UART_IIR_NO_INT)
  215. return IRQ_NONE;
  216. spin_lock(&up->port.lock);
  217. lsr = serial_in(up, UART_LSR);
  218. if (lsr & UART_LSR_DR)
  219. receive_chars(up, &lsr);
  220. check_modem_status(up);
  221. if (lsr & UART_LSR_THRE)
  222. transmit_chars(up);
  223. spin_unlock(&up->port.lock);
  224. return IRQ_HANDLED;
  225. }
  226. static unsigned int serial_pxa_tx_empty(struct uart_port *port)
  227. {
  228. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  229. unsigned long flags;
  230. unsigned int ret;
  231. spin_lock_irqsave(&up->port.lock, flags);
  232. ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0;
  233. spin_unlock_irqrestore(&up->port.lock, flags);
  234. return ret;
  235. }
  236. static unsigned int serial_pxa_get_mctrl(struct uart_port *port)
  237. {
  238. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  239. unsigned char status;
  240. unsigned int ret;
  241. status = serial_in(up, UART_MSR);
  242. ret = 0;
  243. if (status & UART_MSR_DCD)
  244. ret |= TIOCM_CAR;
  245. if (status & UART_MSR_RI)
  246. ret |= TIOCM_RNG;
  247. if (status & UART_MSR_DSR)
  248. ret |= TIOCM_DSR;
  249. if (status & UART_MSR_CTS)
  250. ret |= TIOCM_CTS;
  251. return ret;
  252. }
  253. static void serial_pxa_set_mctrl(struct uart_port *port, unsigned int mctrl)
  254. {
  255. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  256. unsigned char mcr = 0;
  257. if (mctrl & TIOCM_RTS)
  258. mcr |= UART_MCR_RTS;
  259. if (mctrl & TIOCM_DTR)
  260. mcr |= UART_MCR_DTR;
  261. if (mctrl & TIOCM_OUT1)
  262. mcr |= UART_MCR_OUT1;
  263. if (mctrl & TIOCM_OUT2)
  264. mcr |= UART_MCR_OUT2;
  265. if (mctrl & TIOCM_LOOP)
  266. mcr |= UART_MCR_LOOP;
  267. mcr |= up->mcr;
  268. serial_out(up, UART_MCR, mcr);
  269. }
  270. static void serial_pxa_break_ctl(struct uart_port *port, int break_state)
  271. {
  272. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  273. unsigned long flags;
  274. spin_lock_irqsave(&up->port.lock, flags);
  275. if (break_state == -1)
  276. up->lcr |= UART_LCR_SBC;
  277. else
  278. up->lcr &= ~UART_LCR_SBC;
  279. serial_out(up, UART_LCR, up->lcr);
  280. spin_unlock_irqrestore(&up->port.lock, flags);
  281. }
  282. static int serial_pxa_startup(struct uart_port *port)
  283. {
  284. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  285. unsigned long flags;
  286. int retval;
  287. if (port->line == 3) /* HWUART */
  288. up->mcr |= UART_MCR_AFE;
  289. else
  290. up->mcr = 0;
  291. up->port.uartclk = clk_get_rate(up->clk);
  292. /*
  293. * Allocate the IRQ
  294. */
  295. retval = request_irq(up->port.irq, serial_pxa_irq, 0, up->name, up);
  296. if (retval)
  297. return retval;
  298. /*
  299. * Clear the FIFO buffers and disable them.
  300. * (they will be reenabled in set_termios())
  301. */
  302. serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO);
  303. serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO |
  304. UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
  305. serial_out(up, UART_FCR, 0);
  306. /*
  307. * Clear the interrupt registers.
  308. */
  309. (void) serial_in(up, UART_LSR);
  310. (void) serial_in(up, UART_RX);
  311. (void) serial_in(up, UART_IIR);
  312. (void) serial_in(up, UART_MSR);
  313. /*
  314. * Now, initialize the UART
  315. */
  316. serial_out(up, UART_LCR, UART_LCR_WLEN8);
  317. spin_lock_irqsave(&up->port.lock, flags);
  318. up->port.mctrl |= TIOCM_OUT2;
  319. serial_pxa_set_mctrl(&up->port, up->port.mctrl);
  320. spin_unlock_irqrestore(&up->port.lock, flags);
  321. /*
  322. * Finally, enable interrupts. Note: Modem status interrupts
  323. * are set via set_termios(), which will be occurring imminently
  324. * anyway, so we don't enable them here.
  325. */
  326. up->ier = UART_IER_RLSI | UART_IER_RDI | UART_IER_RTOIE | UART_IER_UUE;
  327. serial_out(up, UART_IER, up->ier);
  328. /*
  329. * And clear the interrupt registers again for luck.
  330. */
  331. (void) serial_in(up, UART_LSR);
  332. (void) serial_in(up, UART_RX);
  333. (void) serial_in(up, UART_IIR);
  334. (void) serial_in(up, UART_MSR);
  335. return 0;
  336. }
  337. static void serial_pxa_shutdown(struct uart_port *port)
  338. {
  339. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  340. unsigned long flags;
  341. free_irq(up->port.irq, up);
  342. /*
  343. * Disable interrupts from this port
  344. */
  345. up->ier = 0;
  346. serial_out(up, UART_IER, 0);
  347. spin_lock_irqsave(&up->port.lock, flags);
  348. up->port.mctrl &= ~TIOCM_OUT2;
  349. serial_pxa_set_mctrl(&up->port, up->port.mctrl);
  350. spin_unlock_irqrestore(&up->port.lock, flags);
  351. /*
  352. * Disable break condition and FIFOs
  353. */
  354. serial_out(up, UART_LCR, serial_in(up, UART_LCR) & ~UART_LCR_SBC);
  355. serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO |
  356. UART_FCR_CLEAR_RCVR |
  357. UART_FCR_CLEAR_XMIT);
  358. serial_out(up, UART_FCR, 0);
  359. }
  360. static void
  361. serial_pxa_set_termios(struct uart_port *port, struct ktermios *termios,
  362. struct ktermios *old)
  363. {
  364. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  365. unsigned char cval, fcr = 0;
  366. unsigned long flags;
  367. unsigned int baud, quot;
  368. unsigned int dll;
  369. switch (termios->c_cflag & CSIZE) {
  370. case CS5:
  371. cval = UART_LCR_WLEN5;
  372. break;
  373. case CS6:
  374. cval = UART_LCR_WLEN6;
  375. break;
  376. case CS7:
  377. cval = UART_LCR_WLEN7;
  378. break;
  379. default:
  380. case CS8:
  381. cval = UART_LCR_WLEN8;
  382. break;
  383. }
  384. if (termios->c_cflag & CSTOPB)
  385. cval |= UART_LCR_STOP;
  386. if (termios->c_cflag & PARENB)
  387. cval |= UART_LCR_PARITY;
  388. if (!(termios->c_cflag & PARODD))
  389. cval |= UART_LCR_EPAR;
  390. /*
  391. * Ask the core to calculate the divisor for us.
  392. */
  393. baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
  394. quot = uart_get_divisor(port, baud);
  395. if ((up->port.uartclk / quot) < (2400 * 16))
  396. fcr = UART_FCR_ENABLE_FIFO | UART_FCR_PXAR1;
  397. else if ((up->port.uartclk / quot) < (230400 * 16))
  398. fcr = UART_FCR_ENABLE_FIFO | UART_FCR_PXAR8;
  399. else
  400. fcr = UART_FCR_ENABLE_FIFO | UART_FCR_PXAR32;
  401. /*
  402. * Ok, we're now changing the port state. Do it with
  403. * interrupts disabled.
  404. */
  405. spin_lock_irqsave(&up->port.lock, flags);
  406. /*
  407. * Ensure the port will be enabled.
  408. * This is required especially for serial console.
  409. */
  410. up->ier |= UART_IER_UUE;
  411. /*
  412. * Update the per-port timeout.
  413. */
  414. uart_update_timeout(port, termios->c_cflag, baud);
  415. up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
  416. if (termios->c_iflag & INPCK)
  417. up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE;
  418. if (termios->c_iflag & (IGNBRK | BRKINT | PARMRK))
  419. up->port.read_status_mask |= UART_LSR_BI;
  420. /*
  421. * Characters to ignore
  422. */
  423. up->port.ignore_status_mask = 0;
  424. if (termios->c_iflag & IGNPAR)
  425. up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;
  426. if (termios->c_iflag & IGNBRK) {
  427. up->port.ignore_status_mask |= UART_LSR_BI;
  428. /*
  429. * If we're ignoring parity and break indicators,
  430. * ignore overruns too (for real raw support).
  431. */
  432. if (termios->c_iflag & IGNPAR)
  433. up->port.ignore_status_mask |= UART_LSR_OE;
  434. }
  435. /*
  436. * ignore all characters if CREAD is not set
  437. */
  438. if ((termios->c_cflag & CREAD) == 0)
  439. up->port.ignore_status_mask |= UART_LSR_DR;
  440. /*
  441. * CTS flow control flag and modem status interrupts
  442. */
  443. up->ier &= ~UART_IER_MSI;
  444. if (UART_ENABLE_MS(&up->port, termios->c_cflag))
  445. up->ier |= UART_IER_MSI;
  446. serial_out(up, UART_IER, up->ier);
  447. if (termios->c_cflag & CRTSCTS)
  448. up->mcr |= UART_MCR_AFE;
  449. else
  450. up->mcr &= ~UART_MCR_AFE;
  451. serial_out(up, UART_LCR, cval | UART_LCR_DLAB); /* set DLAB */
  452. serial_out(up, UART_DLL, quot & 0xff); /* LS of divisor */
  453. /*
  454. * work around Errata #75 according to Intel(R) PXA27x Processor Family
  455. * Specification Update (Nov 2005)
  456. */
  457. dll = serial_in(up, UART_DLL);
  458. WARN_ON(dll != (quot & 0xff));
  459. serial_out(up, UART_DLM, quot >> 8); /* MS of divisor */
  460. serial_out(up, UART_LCR, cval); /* reset DLAB */
  461. up->lcr = cval; /* Save LCR */
  462. serial_pxa_set_mctrl(&up->port, up->port.mctrl);
  463. serial_out(up, UART_FCR, fcr);
  464. spin_unlock_irqrestore(&up->port.lock, flags);
  465. }
  466. static void
  467. serial_pxa_pm(struct uart_port *port, unsigned int state,
  468. unsigned int oldstate)
  469. {
  470. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  471. if (!state)
  472. clk_prepare_enable(up->clk);
  473. else
  474. clk_disable_unprepare(up->clk);
  475. }
  476. static void serial_pxa_release_port(struct uart_port *port)
  477. {
  478. }
  479. static int serial_pxa_request_port(struct uart_port *port)
  480. {
  481. return 0;
  482. }
  483. static void serial_pxa_config_port(struct uart_port *port, int flags)
  484. {
  485. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  486. up->port.type = PORT_PXA;
  487. }
  488. static int
  489. serial_pxa_verify_port(struct uart_port *port, struct serial_struct *ser)
  490. {
  491. /* we don't want the core code to modify any port params */
  492. return -EINVAL;
  493. }
  494. static const char *
  495. serial_pxa_type(struct uart_port *port)
  496. {
  497. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  498. return up->name;
  499. }
  500. static struct uart_pxa_port *serial_pxa_ports[4];
  501. static struct uart_driver serial_pxa_reg;
  502. #ifdef CONFIG_SERIAL_PXA_CONSOLE
  503. #define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
  504. /*
  505. * Wait for transmitter & holding register to empty
  506. */
  507. static void wait_for_xmitr(struct uart_pxa_port *up)
  508. {
  509. unsigned int status, tmout = 10000;
  510. /* Wait up to 10ms for the character(s) to be sent. */
  511. do {
  512. status = serial_in(up, UART_LSR);
  513. if (status & UART_LSR_BI)
  514. up->lsr_break_flag = UART_LSR_BI;
  515. if (--tmout == 0)
  516. break;
  517. udelay(1);
  518. } while ((status & BOTH_EMPTY) != BOTH_EMPTY);
  519. /* Wait up to 1s for flow control if necessary */
  520. if (up->port.flags & UPF_CONS_FLOW) {
  521. tmout = 1000000;
  522. while (--tmout &&
  523. ((serial_in(up, UART_MSR) & UART_MSR_CTS) == 0))
  524. udelay(1);
  525. }
  526. }
  527. static void serial_pxa_console_putchar(struct uart_port *port, int ch)
  528. {
  529. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  530. wait_for_xmitr(up);
  531. serial_out(up, UART_TX, ch);
  532. }
  533. /*
  534. * Print a string to the serial port trying not to disturb
  535. * any possible real use of the port...
  536. *
  537. * The console_lock must be held when we get here.
  538. */
  539. static void
  540. serial_pxa_console_write(struct console *co, const char *s, unsigned int count)
  541. {
  542. struct uart_pxa_port *up = serial_pxa_ports[co->index];
  543. unsigned int ier;
  544. unsigned long flags;
  545. int locked = 1;
  546. clk_enable(up->clk);
  547. local_irq_save(flags);
  548. if (up->port.sysrq)
  549. locked = 0;
  550. else if (oops_in_progress)
  551. locked = spin_trylock(&up->port.lock);
  552. else
  553. spin_lock(&up->port.lock);
  554. /*
  555. * First save the IER then disable the interrupts
  556. */
  557. ier = serial_in(up, UART_IER);
  558. serial_out(up, UART_IER, UART_IER_UUE);
  559. uart_console_write(&up->port, s, count, serial_pxa_console_putchar);
  560. /*
  561. * Finally, wait for transmitter to become empty
  562. * and restore the IER
  563. */
  564. wait_for_xmitr(up);
  565. serial_out(up, UART_IER, ier);
  566. if (locked)
  567. spin_unlock(&up->port.lock);
  568. local_irq_restore(flags);
  569. clk_disable(up->clk);
  570. }
  571. #ifdef CONFIG_CONSOLE_POLL
  572. /*
  573. * Console polling routines for writing and reading from the uart while
  574. * in an interrupt or debug context.
  575. */
  576. static int serial_pxa_get_poll_char(struct uart_port *port)
  577. {
  578. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  579. unsigned char lsr = serial_in(up, UART_LSR);
  580. while (!(lsr & UART_LSR_DR))
  581. lsr = serial_in(up, UART_LSR);
  582. return serial_in(up, UART_RX);
  583. }
  584. static void serial_pxa_put_poll_char(struct uart_port *port,
  585. unsigned char c)
  586. {
  587. unsigned int ier;
  588. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  589. /*
  590. * First save the IER then disable the interrupts
  591. */
  592. ier = serial_in(up, UART_IER);
  593. serial_out(up, UART_IER, UART_IER_UUE);
  594. wait_for_xmitr(up);
  595. /*
  596. * Send the character out.
  597. */
  598. serial_out(up, UART_TX, c);
  599. /*
  600. * Finally, wait for transmitter to become empty
  601. * and restore the IER
  602. */
  603. wait_for_xmitr(up);
  604. serial_out(up, UART_IER, ier);
  605. }
  606. #endif /* CONFIG_CONSOLE_POLL */
  607. static int __init
  608. serial_pxa_console_setup(struct console *co, char *options)
  609. {
  610. struct uart_pxa_port *up;
  611. int baud = 9600;
  612. int bits = 8;
  613. int parity = 'n';
  614. int flow = 'n';
  615. if (co->index == -1 || co->index >= serial_pxa_reg.nr)
  616. co->index = 0;
  617. up = serial_pxa_ports[co->index];
  618. if (!up)
  619. return -ENODEV;
  620. if (options)
  621. uart_parse_options(options, &baud, &parity, &bits, &flow);
  622. return uart_set_options(&up->port, co, baud, parity, bits, flow);
  623. }
  624. static struct console serial_pxa_console = {
  625. .name = "ttyS",
  626. .write = serial_pxa_console_write,
  627. .device = uart_console_device,
  628. .setup = serial_pxa_console_setup,
  629. .flags = CON_PRINTBUFFER,
  630. .index = -1,
  631. .data = &serial_pxa_reg,
  632. };
  633. #define PXA_CONSOLE &serial_pxa_console
  634. #else
  635. #define PXA_CONSOLE NULL
  636. #endif
  637. static const struct uart_ops serial_pxa_pops = {
  638. .tx_empty = serial_pxa_tx_empty,
  639. .set_mctrl = serial_pxa_set_mctrl,
  640. .get_mctrl = serial_pxa_get_mctrl,
  641. .stop_tx = serial_pxa_stop_tx,
  642. .start_tx = serial_pxa_start_tx,
  643. .stop_rx = serial_pxa_stop_rx,
  644. .enable_ms = serial_pxa_enable_ms,
  645. .break_ctl = serial_pxa_break_ctl,
  646. .startup = serial_pxa_startup,
  647. .shutdown = serial_pxa_shutdown,
  648. .set_termios = serial_pxa_set_termios,
  649. .pm = serial_pxa_pm,
  650. .type = serial_pxa_type,
  651. .release_port = serial_pxa_release_port,
  652. .request_port = serial_pxa_request_port,
  653. .config_port = serial_pxa_config_port,
  654. .verify_port = serial_pxa_verify_port,
  655. #if defined(CONFIG_CONSOLE_POLL) && defined(CONFIG_SERIAL_PXA_CONSOLE)
  656. .poll_get_char = serial_pxa_get_poll_char,
  657. .poll_put_char = serial_pxa_put_poll_char,
  658. #endif
  659. };
  660. static struct uart_driver serial_pxa_reg = {
  661. .owner = THIS_MODULE,
  662. .driver_name = "PXA serial",
  663. .dev_name = "ttyS",
  664. .major = TTY_MAJOR,
  665. .minor = 64,
  666. .nr = 4,
  667. .cons = PXA_CONSOLE,
  668. };
  669. #ifdef CONFIG_PM
  670. static int serial_pxa_suspend(struct device *dev)
  671. {
  672. struct uart_pxa_port *sport = dev_get_drvdata(dev);
  673. if (sport)
  674. uart_suspend_port(&serial_pxa_reg, &sport->port);
  675. return 0;
  676. }
  677. static int serial_pxa_resume(struct device *dev)
  678. {
  679. struct uart_pxa_port *sport = dev_get_drvdata(dev);
  680. if (sport)
  681. uart_resume_port(&serial_pxa_reg, &sport->port);
  682. return 0;
  683. }
  684. static const struct dev_pm_ops serial_pxa_pm_ops = {
  685. .suspend = serial_pxa_suspend,
  686. .resume = serial_pxa_resume,
  687. };
  688. #endif
  689. static const struct of_device_id serial_pxa_dt_ids[] = {
  690. { .compatible = "mrvl,pxa-uart", },
  691. { .compatible = "mrvl,mmp-uart", },
  692. {}
  693. };
  694. static int serial_pxa_probe_dt(struct platform_device *pdev,
  695. struct uart_pxa_port *sport)
  696. {
  697. struct device_node *np = pdev->dev.of_node;
  698. int ret;
  699. if (!np)
  700. return 1;
  701. ret = of_alias_get_id(np, "serial");
  702. if (ret < 0) {
  703. dev_err(&pdev->dev, "failed to get alias id, errno %d\n", ret);
  704. return ret;
  705. }
  706. sport->port.line = ret;
  707. return 0;
  708. }
  709. static int serial_pxa_probe(struct platform_device *dev)
  710. {
  711. struct uart_pxa_port *sport;
  712. struct resource *mmres, *irqres;
  713. int ret;
  714. mmres = platform_get_resource(dev, IORESOURCE_MEM, 0);
  715. irqres = platform_get_resource(dev, IORESOURCE_IRQ, 0);
  716. if (!mmres || !irqres)
  717. return -ENODEV;
  718. sport = kzalloc(sizeof(struct uart_pxa_port), GFP_KERNEL);
  719. if (!sport)
  720. return -ENOMEM;
  721. sport->clk = clk_get(&dev->dev, NULL);
  722. if (IS_ERR(sport->clk)) {
  723. ret = PTR_ERR(sport->clk);
  724. goto err_free;
  725. }
  726. ret = clk_prepare(sport->clk);
  727. if (ret) {
  728. clk_put(sport->clk);
  729. goto err_free;
  730. }
  731. sport->port.type = PORT_PXA;
  732. sport->port.iotype = UPIO_MEM;
  733. sport->port.mapbase = mmres->start;
  734. sport->port.irq = irqres->start;
  735. sport->port.fifosize = 64;
  736. sport->port.ops = &serial_pxa_pops;
  737. sport->port.dev = &dev->dev;
  738. sport->port.flags = UPF_IOREMAP | UPF_BOOT_AUTOCONF;
  739. sport->port.uartclk = clk_get_rate(sport->clk);
  740. ret = serial_pxa_probe_dt(dev, sport);
  741. if (ret > 0)
  742. sport->port.line = dev->id;
  743. else if (ret < 0)
  744. goto err_clk;
  745. if (sport->port.line >= ARRAY_SIZE(serial_pxa_ports)) {
  746. dev_err(&dev->dev, "serial%d out of range\n", sport->port.line);
  747. ret = -EINVAL;
  748. goto err_clk;
  749. }
  750. snprintf(sport->name, PXA_NAME_LEN - 1, "UART%d", sport->port.line + 1);
  751. sport->port.membase = ioremap(mmres->start, resource_size(mmres));
  752. if (!sport->port.membase) {
  753. ret = -ENOMEM;
  754. goto err_clk;
  755. }
  756. serial_pxa_ports[sport->port.line] = sport;
  757. uart_add_one_port(&serial_pxa_reg, &sport->port);
  758. platform_set_drvdata(dev, sport);
  759. return 0;
  760. err_clk:
  761. clk_unprepare(sport->clk);
  762. clk_put(sport->clk);
  763. err_free:
  764. kfree(sport);
  765. return ret;
  766. }
  767. static struct platform_driver serial_pxa_driver = {
  768. .probe = serial_pxa_probe,
  769. .driver = {
  770. .name = "pxa2xx-uart",
  771. #ifdef CONFIG_PM
  772. .pm = &serial_pxa_pm_ops,
  773. #endif
  774. .suppress_bind_attrs = true,
  775. .of_match_table = serial_pxa_dt_ids,
  776. },
  777. };
  778. /* 8250 driver for PXA serial ports should be used */
  779. static int __init serial_pxa_init(void)
  780. {
  781. int ret;
  782. ret = uart_register_driver(&serial_pxa_reg);
  783. if (ret != 0)
  784. return ret;
  785. ret = platform_driver_register(&serial_pxa_driver);
  786. if (ret != 0)
  787. uart_unregister_driver(&serial_pxa_reg);
  788. return ret;
  789. }
  790. device_initcall(serial_pxa_init);