dz.c 22 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * dz.c: Serial port driver for DECstations equipped
  4. * with the DZ chipset.
  5. *
  6. * Copyright (C) 1998 Olivier A. D. Lebaillif
  7. *
  8. * Email: olivier.lebaillif@ifrsys.com
  9. *
  10. * Copyright (C) 2004, 2006, 2007 Maciej W. Rozycki
  11. *
  12. * [31-AUG-98] triemer
  13. * Changed IRQ to use Harald's dec internals interrupts.h
  14. * removed base_addr code - moving address assignment to setup.c
  15. * Changed name of dz_init to rs_init to be consistent with tc code
  16. * [13-NOV-98] triemer fixed code to receive characters
  17. * after patches by harald to irq code.
  18. * [09-JAN-99] triemer minor fix for schedule - due to removal of timeout
  19. * field from "current" - somewhere between 2.1.121 and 2.1.131
  20. Qua Jun 27 15:02:26 BRT 2001
  21. * [27-JUN-2001] Arnaldo Carvalho de Melo <acme@conectiva.com.br> - cleanups
  22. *
  23. * Parts (C) 1999 David Airlie, airlied@linux.ie
  24. * [07-SEP-99] Bugfixes
  25. *
  26. * [06-Jan-2002] Russell King <rmk@arm.linux.org.uk>
  27. * Converted to new serial core
  28. */
  29. #undef DEBUG_DZ
  30. #if defined(CONFIG_SERIAL_DZ_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  31. #define SUPPORT_SYSRQ
  32. #endif
  33. #include <linux/bitops.h>
  34. #include <linux/compiler.h>
  35. #include <linux/console.h>
  36. #include <linux/delay.h>
  37. #include <linux/errno.h>
  38. #include <linux/init.h>
  39. #include <linux/interrupt.h>
  40. #include <linux/ioport.h>
  41. #include <linux/kernel.h>
  42. #include <linux/major.h>
  43. #include <linux/module.h>
  44. #include <linux/serial.h>
  45. #include <linux/serial_core.h>
  46. #include <linux/sysrq.h>
  47. #include <linux/tty.h>
  48. #include <linux/tty_flip.h>
  49. #include <linux/atomic.h>
  50. #include <asm/bootinfo.h>
  51. #include <asm/io.h>
  52. #include <asm/dec/interrupts.h>
  53. #include <asm/dec/kn01.h>
  54. #include <asm/dec/kn02.h>
  55. #include <asm/dec/machtype.h>
  56. #include <asm/dec/prom.h>
  57. #include <asm/dec/system.h>
  58. #include "dz.h"
  59. MODULE_DESCRIPTION("DECstation DZ serial driver");
  60. MODULE_LICENSE("GPL");
  61. static char dz_name[] __initdata = "DECstation DZ serial driver version ";
  62. static char dz_version[] __initdata = "1.04";
  63. struct dz_port {
  64. struct dz_mux *mux;
  65. struct uart_port port;
  66. unsigned int cflag;
  67. };
  68. struct dz_mux {
  69. struct dz_port dport[DZ_NB_PORT];
  70. atomic_t map_guard;
  71. atomic_t irq_guard;
  72. int initialised;
  73. };
  74. static struct dz_mux dz_mux;
  75. static inline struct dz_port *to_dport(struct uart_port *uport)
  76. {
  77. return container_of(uport, struct dz_port, port);
  78. }
  79. /*
  80. * ------------------------------------------------------------
  81. * dz_in () and dz_out ()
  82. *
  83. * These routines are used to access the registers of the DZ
  84. * chip, hiding relocation differences between implementation.
  85. * ------------------------------------------------------------
  86. */
  87. static u16 dz_in(struct dz_port *dport, unsigned offset)
  88. {
  89. void __iomem *addr = dport->port.membase + offset;
  90. return readw(addr);
  91. }
  92. static void dz_out(struct dz_port *dport, unsigned offset, u16 value)
  93. {
  94. void __iomem *addr = dport->port.membase + offset;
  95. writew(value, addr);
  96. }
  97. /*
  98. * ------------------------------------------------------------
  99. * rs_stop () and rs_start ()
  100. *
  101. * These routines are called before setting or resetting
  102. * tty->stopped. They enable or disable transmitter interrupts,
  103. * as necessary.
  104. * ------------------------------------------------------------
  105. */
  106. static void dz_stop_tx(struct uart_port *uport)
  107. {
  108. struct dz_port *dport = to_dport(uport);
  109. u16 tmp, mask = 1 << dport->port.line;
  110. tmp = dz_in(dport, DZ_TCR); /* read the TX flag */
  111. tmp &= ~mask; /* clear the TX flag */
  112. dz_out(dport, DZ_TCR, tmp);
  113. }
  114. static void dz_start_tx(struct uart_port *uport)
  115. {
  116. struct dz_port *dport = to_dport(uport);
  117. u16 tmp, mask = 1 << dport->port.line;
  118. tmp = dz_in(dport, DZ_TCR); /* read the TX flag */
  119. tmp |= mask; /* set the TX flag */
  120. dz_out(dport, DZ_TCR, tmp);
  121. }
  122. static void dz_stop_rx(struct uart_port *uport)
  123. {
  124. struct dz_port *dport = to_dport(uport);
  125. dport->cflag &= ~DZ_RXENAB;
  126. dz_out(dport, DZ_LPR, dport->cflag);
  127. }
  128. /*
  129. * ------------------------------------------------------------
  130. *
  131. * Here start the interrupt handling routines. All of the following
  132. * subroutines are declared as inline and are folded into
  133. * dz_interrupt. They were separated out for readability's sake.
  134. *
  135. * Note: dz_interrupt() is a "fast" interrupt, which means that it
  136. * runs with interrupts turned off. People who may want to modify
  137. * dz_interrupt() should try to keep the interrupt handler as fast as
  138. * possible. After you are done making modifications, it is not a bad
  139. * idea to do:
  140. *
  141. * make drivers/serial/dz.s
  142. *
  143. * and look at the resulting assemble code in dz.s.
  144. *
  145. * ------------------------------------------------------------
  146. */
  147. /*
  148. * ------------------------------------------------------------
  149. * receive_char ()
  150. *
  151. * This routine deals with inputs from any lines.
  152. * ------------------------------------------------------------
  153. */
  154. static inline void dz_receive_chars(struct dz_mux *mux)
  155. {
  156. struct uart_port *uport;
  157. struct dz_port *dport = &mux->dport[0];
  158. struct uart_icount *icount;
  159. int lines_rx[DZ_NB_PORT] = { [0 ... DZ_NB_PORT - 1] = 0 };
  160. unsigned char ch, flag;
  161. u16 status;
  162. int i;
  163. while ((status = dz_in(dport, DZ_RBUF)) & DZ_DVAL) {
  164. dport = &mux->dport[LINE(status)];
  165. uport = &dport->port;
  166. ch = UCHAR(status); /* grab the char */
  167. flag = TTY_NORMAL;
  168. icount = &uport->icount;
  169. icount->rx++;
  170. if (unlikely(status & (DZ_OERR | DZ_FERR | DZ_PERR))) {
  171. /*
  172. * There is no separate BREAK status bit, so treat
  173. * null characters with framing errors as BREAKs;
  174. * normally, otherwise. For this move the Framing
  175. * Error bit to a simulated BREAK bit.
  176. */
  177. if (!ch) {
  178. status |= (status & DZ_FERR) >>
  179. (ffs(DZ_FERR) - ffs(DZ_BREAK));
  180. status &= ~DZ_FERR;
  181. }
  182. /* Handle SysRq/SAK & keep track of the statistics. */
  183. if (status & DZ_BREAK) {
  184. icount->brk++;
  185. if (uart_handle_break(uport))
  186. continue;
  187. } else if (status & DZ_FERR)
  188. icount->frame++;
  189. else if (status & DZ_PERR)
  190. icount->parity++;
  191. if (status & DZ_OERR)
  192. icount->overrun++;
  193. status &= uport->read_status_mask;
  194. if (status & DZ_BREAK)
  195. flag = TTY_BREAK;
  196. else if (status & DZ_FERR)
  197. flag = TTY_FRAME;
  198. else if (status & DZ_PERR)
  199. flag = TTY_PARITY;
  200. }
  201. if (uart_handle_sysrq_char(uport, ch))
  202. continue;
  203. uart_insert_char(uport, status, DZ_OERR, ch, flag);
  204. lines_rx[LINE(status)] = 1;
  205. }
  206. for (i = 0; i < DZ_NB_PORT; i++)
  207. if (lines_rx[i])
  208. tty_flip_buffer_push(&mux->dport[i].port.state->port);
  209. }
  210. /*
  211. * ------------------------------------------------------------
  212. * transmit_char ()
  213. *
  214. * This routine deals with outputs to any lines.
  215. * ------------------------------------------------------------
  216. */
  217. static inline void dz_transmit_chars(struct dz_mux *mux)
  218. {
  219. struct dz_port *dport = &mux->dport[0];
  220. struct circ_buf *xmit;
  221. unsigned char tmp;
  222. u16 status;
  223. status = dz_in(dport, DZ_CSR);
  224. dport = &mux->dport[LINE(status)];
  225. xmit = &dport->port.state->xmit;
  226. if (dport->port.x_char) { /* XON/XOFF chars */
  227. dz_out(dport, DZ_TDR, dport->port.x_char);
  228. dport->port.icount.tx++;
  229. dport->port.x_char = 0;
  230. return;
  231. }
  232. /* If nothing to do or stopped or hardware stopped. */
  233. if (uart_circ_empty(xmit) || uart_tx_stopped(&dport->port)) {
  234. spin_lock(&dport->port.lock);
  235. dz_stop_tx(&dport->port);
  236. spin_unlock(&dport->port.lock);
  237. return;
  238. }
  239. /*
  240. * If something to do... (remember the dz has no output fifo,
  241. * so we go one char at a time) :-<
  242. */
  243. tmp = xmit->buf[xmit->tail];
  244. xmit->tail = (xmit->tail + 1) & (DZ_XMIT_SIZE - 1);
  245. dz_out(dport, DZ_TDR, tmp);
  246. dport->port.icount.tx++;
  247. if (uart_circ_chars_pending(xmit) < DZ_WAKEUP_CHARS)
  248. uart_write_wakeup(&dport->port);
  249. /* Are we are done. */
  250. if (uart_circ_empty(xmit)) {
  251. spin_lock(&dport->port.lock);
  252. dz_stop_tx(&dport->port);
  253. spin_unlock(&dport->port.lock);
  254. }
  255. }
  256. /*
  257. * ------------------------------------------------------------
  258. * check_modem_status()
  259. *
  260. * DS 3100 & 5100: Only valid for the MODEM line, duh!
  261. * DS 5000/200: Valid for the MODEM and PRINTER line.
  262. * ------------------------------------------------------------
  263. */
  264. static inline void check_modem_status(struct dz_port *dport)
  265. {
  266. /*
  267. * FIXME:
  268. * 1. No status change interrupt; use a timer.
  269. * 2. Handle the 3100/5000 as appropriate. --macro
  270. */
  271. u16 status;
  272. /* If not the modem line just return. */
  273. if (dport->port.line != DZ_MODEM)
  274. return;
  275. status = dz_in(dport, DZ_MSR);
  276. /* it's easy, since DSR2 is the only bit in the register */
  277. if (status)
  278. dport->port.icount.dsr++;
  279. }
  280. /*
  281. * ------------------------------------------------------------
  282. * dz_interrupt ()
  283. *
  284. * this is the main interrupt routine for the DZ chip.
  285. * It deals with the multiple ports.
  286. * ------------------------------------------------------------
  287. */
  288. static irqreturn_t dz_interrupt(int irq, void *dev_id)
  289. {
  290. struct dz_mux *mux = dev_id;
  291. struct dz_port *dport = &mux->dport[0];
  292. u16 status;
  293. /* get the reason why we just got an irq */
  294. status = dz_in(dport, DZ_CSR);
  295. if ((status & (DZ_RDONE | DZ_RIE)) == (DZ_RDONE | DZ_RIE))
  296. dz_receive_chars(mux);
  297. if ((status & (DZ_TRDY | DZ_TIE)) == (DZ_TRDY | DZ_TIE))
  298. dz_transmit_chars(mux);
  299. return IRQ_HANDLED;
  300. }
  301. /*
  302. * -------------------------------------------------------------------
  303. * Here ends the DZ interrupt routines.
  304. * -------------------------------------------------------------------
  305. */
  306. static unsigned int dz_get_mctrl(struct uart_port *uport)
  307. {
  308. /*
  309. * FIXME: Handle the 3100/5000 as appropriate. --macro
  310. */
  311. struct dz_port *dport = to_dport(uport);
  312. unsigned int mctrl = TIOCM_CAR | TIOCM_DSR | TIOCM_CTS;
  313. if (dport->port.line == DZ_MODEM) {
  314. if (dz_in(dport, DZ_MSR) & DZ_MODEM_DSR)
  315. mctrl &= ~TIOCM_DSR;
  316. }
  317. return mctrl;
  318. }
  319. static void dz_set_mctrl(struct uart_port *uport, unsigned int mctrl)
  320. {
  321. /*
  322. * FIXME: Handle the 3100/5000 as appropriate. --macro
  323. */
  324. struct dz_port *dport = to_dport(uport);
  325. u16 tmp;
  326. if (dport->port.line == DZ_MODEM) {
  327. tmp = dz_in(dport, DZ_TCR);
  328. if (mctrl & TIOCM_DTR)
  329. tmp &= ~DZ_MODEM_DTR;
  330. else
  331. tmp |= DZ_MODEM_DTR;
  332. dz_out(dport, DZ_TCR, tmp);
  333. }
  334. }
  335. /*
  336. * -------------------------------------------------------------------
  337. * startup ()
  338. *
  339. * various initialization tasks
  340. * -------------------------------------------------------------------
  341. */
  342. static int dz_startup(struct uart_port *uport)
  343. {
  344. struct dz_port *dport = to_dport(uport);
  345. struct dz_mux *mux = dport->mux;
  346. unsigned long flags;
  347. int irq_guard;
  348. int ret;
  349. u16 tmp;
  350. irq_guard = atomic_add_return(1, &mux->irq_guard);
  351. if (irq_guard != 1)
  352. return 0;
  353. ret = request_irq(dport->port.irq, dz_interrupt,
  354. IRQF_SHARED, "dz", mux);
  355. if (ret) {
  356. atomic_add(-1, &mux->irq_guard);
  357. printk(KERN_ERR "dz: Cannot get IRQ %d!\n", dport->port.irq);
  358. return ret;
  359. }
  360. spin_lock_irqsave(&dport->port.lock, flags);
  361. /* Enable interrupts. */
  362. tmp = dz_in(dport, DZ_CSR);
  363. tmp |= DZ_RIE | DZ_TIE;
  364. dz_out(dport, DZ_CSR, tmp);
  365. spin_unlock_irqrestore(&dport->port.lock, flags);
  366. return 0;
  367. }
  368. /*
  369. * -------------------------------------------------------------------
  370. * shutdown ()
  371. *
  372. * This routine will shutdown a serial port; interrupts are disabled, and
  373. * DTR is dropped if the hangup on close termio flag is on.
  374. * -------------------------------------------------------------------
  375. */
  376. static void dz_shutdown(struct uart_port *uport)
  377. {
  378. struct dz_port *dport = to_dport(uport);
  379. struct dz_mux *mux = dport->mux;
  380. unsigned long flags;
  381. int irq_guard;
  382. u16 tmp;
  383. spin_lock_irqsave(&dport->port.lock, flags);
  384. dz_stop_tx(&dport->port);
  385. spin_unlock_irqrestore(&dport->port.lock, flags);
  386. irq_guard = atomic_add_return(-1, &mux->irq_guard);
  387. if (!irq_guard) {
  388. /* Disable interrupts. */
  389. tmp = dz_in(dport, DZ_CSR);
  390. tmp &= ~(DZ_RIE | DZ_TIE);
  391. dz_out(dport, DZ_CSR, tmp);
  392. free_irq(dport->port.irq, mux);
  393. }
  394. }
  395. /*
  396. * -------------------------------------------------------------------
  397. * dz_tx_empty() -- get the transmitter empty status
  398. *
  399. * Purpose: Let user call ioctl() to get info when the UART physically
  400. * is emptied. On bus types like RS485, the transmitter must
  401. * release the bus after transmitting. This must be done when
  402. * the transmit shift register is empty, not be done when the
  403. * transmit holding register is empty. This functionality
  404. * allows an RS485 driver to be written in user space.
  405. * -------------------------------------------------------------------
  406. */
  407. static unsigned int dz_tx_empty(struct uart_port *uport)
  408. {
  409. struct dz_port *dport = to_dport(uport);
  410. unsigned short tmp, mask = 1 << dport->port.line;
  411. tmp = dz_in(dport, DZ_TCR);
  412. tmp &= mask;
  413. return tmp ? 0 : TIOCSER_TEMT;
  414. }
  415. static void dz_break_ctl(struct uart_port *uport, int break_state)
  416. {
  417. /*
  418. * FIXME: Can't access BREAK bits in TDR easily;
  419. * reuse the code for polled TX. --macro
  420. */
  421. struct dz_port *dport = to_dport(uport);
  422. unsigned long flags;
  423. unsigned short tmp, mask = 1 << dport->port.line;
  424. spin_lock_irqsave(&uport->lock, flags);
  425. tmp = dz_in(dport, DZ_TCR);
  426. if (break_state)
  427. tmp |= mask;
  428. else
  429. tmp &= ~mask;
  430. dz_out(dport, DZ_TCR, tmp);
  431. spin_unlock_irqrestore(&uport->lock, flags);
  432. }
  433. static int dz_encode_baud_rate(unsigned int baud)
  434. {
  435. switch (baud) {
  436. case 50:
  437. return DZ_B50;
  438. case 75:
  439. return DZ_B75;
  440. case 110:
  441. return DZ_B110;
  442. case 134:
  443. return DZ_B134;
  444. case 150:
  445. return DZ_B150;
  446. case 300:
  447. return DZ_B300;
  448. case 600:
  449. return DZ_B600;
  450. case 1200:
  451. return DZ_B1200;
  452. case 1800:
  453. return DZ_B1800;
  454. case 2000:
  455. return DZ_B2000;
  456. case 2400:
  457. return DZ_B2400;
  458. case 3600:
  459. return DZ_B3600;
  460. case 4800:
  461. return DZ_B4800;
  462. case 7200:
  463. return DZ_B7200;
  464. case 9600:
  465. return DZ_B9600;
  466. default:
  467. return -1;
  468. }
  469. }
  470. static void dz_reset(struct dz_port *dport)
  471. {
  472. struct dz_mux *mux = dport->mux;
  473. if (mux->initialised)
  474. return;
  475. dz_out(dport, DZ_CSR, DZ_CLR);
  476. while (dz_in(dport, DZ_CSR) & DZ_CLR);
  477. iob();
  478. /* Enable scanning. */
  479. dz_out(dport, DZ_CSR, DZ_MSE);
  480. mux->initialised = 1;
  481. }
  482. static void dz_set_termios(struct uart_port *uport, struct ktermios *termios,
  483. struct ktermios *old_termios)
  484. {
  485. struct dz_port *dport = to_dport(uport);
  486. unsigned long flags;
  487. unsigned int cflag, baud;
  488. int bflag;
  489. cflag = dport->port.line;
  490. switch (termios->c_cflag & CSIZE) {
  491. case CS5:
  492. cflag |= DZ_CS5;
  493. break;
  494. case CS6:
  495. cflag |= DZ_CS6;
  496. break;
  497. case CS7:
  498. cflag |= DZ_CS7;
  499. break;
  500. case CS8:
  501. default:
  502. cflag |= DZ_CS8;
  503. }
  504. if (termios->c_cflag & CSTOPB)
  505. cflag |= DZ_CSTOPB;
  506. if (termios->c_cflag & PARENB)
  507. cflag |= DZ_PARENB;
  508. if (termios->c_cflag & PARODD)
  509. cflag |= DZ_PARODD;
  510. baud = uart_get_baud_rate(uport, termios, old_termios, 50, 9600);
  511. bflag = dz_encode_baud_rate(baud);
  512. if (bflag < 0) { /* Try to keep unchanged. */
  513. baud = uart_get_baud_rate(uport, old_termios, NULL, 50, 9600);
  514. bflag = dz_encode_baud_rate(baud);
  515. if (bflag < 0) { /* Resort to 9600. */
  516. baud = 9600;
  517. bflag = DZ_B9600;
  518. }
  519. tty_termios_encode_baud_rate(termios, baud, baud);
  520. }
  521. cflag |= bflag;
  522. if (termios->c_cflag & CREAD)
  523. cflag |= DZ_RXENAB;
  524. spin_lock_irqsave(&dport->port.lock, flags);
  525. uart_update_timeout(uport, termios->c_cflag, baud);
  526. dz_out(dport, DZ_LPR, cflag);
  527. dport->cflag = cflag;
  528. /* setup accept flag */
  529. dport->port.read_status_mask = DZ_OERR;
  530. if (termios->c_iflag & INPCK)
  531. dport->port.read_status_mask |= DZ_FERR | DZ_PERR;
  532. if (termios->c_iflag & (IGNBRK | BRKINT | PARMRK))
  533. dport->port.read_status_mask |= DZ_BREAK;
  534. /* characters to ignore */
  535. uport->ignore_status_mask = 0;
  536. if ((termios->c_iflag & (IGNPAR | IGNBRK)) == (IGNPAR | IGNBRK))
  537. dport->port.ignore_status_mask |= DZ_OERR;
  538. if (termios->c_iflag & IGNPAR)
  539. dport->port.ignore_status_mask |= DZ_FERR | DZ_PERR;
  540. if (termios->c_iflag & IGNBRK)
  541. dport->port.ignore_status_mask |= DZ_BREAK;
  542. spin_unlock_irqrestore(&dport->port.lock, flags);
  543. }
  544. /*
  545. * Hack alert!
  546. * Required solely so that the initial PROM-based console
  547. * works undisturbed in parallel with this one.
  548. */
  549. static void dz_pm(struct uart_port *uport, unsigned int state,
  550. unsigned int oldstate)
  551. {
  552. struct dz_port *dport = to_dport(uport);
  553. unsigned long flags;
  554. spin_lock_irqsave(&dport->port.lock, flags);
  555. if (state < 3)
  556. dz_start_tx(&dport->port);
  557. else
  558. dz_stop_tx(&dport->port);
  559. spin_unlock_irqrestore(&dport->port.lock, flags);
  560. }
  561. static const char *dz_type(struct uart_port *uport)
  562. {
  563. return "DZ";
  564. }
  565. static void dz_release_port(struct uart_port *uport)
  566. {
  567. struct dz_mux *mux = to_dport(uport)->mux;
  568. int map_guard;
  569. iounmap(uport->membase);
  570. uport->membase = NULL;
  571. map_guard = atomic_add_return(-1, &mux->map_guard);
  572. if (!map_guard)
  573. release_mem_region(uport->mapbase, dec_kn_slot_size);
  574. }
  575. static int dz_map_port(struct uart_port *uport)
  576. {
  577. if (!uport->membase)
  578. uport->membase = ioremap_nocache(uport->mapbase,
  579. dec_kn_slot_size);
  580. if (!uport->membase) {
  581. printk(KERN_ERR "dz: Cannot map MMIO\n");
  582. return -ENOMEM;
  583. }
  584. return 0;
  585. }
  586. static int dz_request_port(struct uart_port *uport)
  587. {
  588. struct dz_mux *mux = to_dport(uport)->mux;
  589. int map_guard;
  590. int ret;
  591. map_guard = atomic_add_return(1, &mux->map_guard);
  592. if (map_guard == 1) {
  593. if (!request_mem_region(uport->mapbase, dec_kn_slot_size,
  594. "dz")) {
  595. atomic_add(-1, &mux->map_guard);
  596. printk(KERN_ERR
  597. "dz: Unable to reserve MMIO resource\n");
  598. return -EBUSY;
  599. }
  600. }
  601. ret = dz_map_port(uport);
  602. if (ret) {
  603. map_guard = atomic_add_return(-1, &mux->map_guard);
  604. if (!map_guard)
  605. release_mem_region(uport->mapbase, dec_kn_slot_size);
  606. return ret;
  607. }
  608. return 0;
  609. }
  610. static void dz_config_port(struct uart_port *uport, int flags)
  611. {
  612. struct dz_port *dport = to_dport(uport);
  613. if (flags & UART_CONFIG_TYPE) {
  614. if (dz_request_port(uport))
  615. return;
  616. uport->type = PORT_DZ;
  617. dz_reset(dport);
  618. }
  619. }
  620. /*
  621. * Verify the new serial_struct (for TIOCSSERIAL).
  622. */
  623. static int dz_verify_port(struct uart_port *uport, struct serial_struct *ser)
  624. {
  625. int ret = 0;
  626. if (ser->type != PORT_UNKNOWN && ser->type != PORT_DZ)
  627. ret = -EINVAL;
  628. if (ser->irq != uport->irq)
  629. ret = -EINVAL;
  630. return ret;
  631. }
  632. static const struct uart_ops dz_ops = {
  633. .tx_empty = dz_tx_empty,
  634. .get_mctrl = dz_get_mctrl,
  635. .set_mctrl = dz_set_mctrl,
  636. .stop_tx = dz_stop_tx,
  637. .start_tx = dz_start_tx,
  638. .stop_rx = dz_stop_rx,
  639. .break_ctl = dz_break_ctl,
  640. .startup = dz_startup,
  641. .shutdown = dz_shutdown,
  642. .set_termios = dz_set_termios,
  643. .pm = dz_pm,
  644. .type = dz_type,
  645. .release_port = dz_release_port,
  646. .request_port = dz_request_port,
  647. .config_port = dz_config_port,
  648. .verify_port = dz_verify_port,
  649. };
  650. static void __init dz_init_ports(void)
  651. {
  652. static int first = 1;
  653. unsigned long base;
  654. int line;
  655. if (!first)
  656. return;
  657. first = 0;
  658. if (mips_machtype == MACH_DS23100 || mips_machtype == MACH_DS5100)
  659. base = dec_kn_slot_base + KN01_DZ11;
  660. else
  661. base = dec_kn_slot_base + KN02_DZ11;
  662. for (line = 0; line < DZ_NB_PORT; line++) {
  663. struct dz_port *dport = &dz_mux.dport[line];
  664. struct uart_port *uport = &dport->port;
  665. dport->mux = &dz_mux;
  666. uport->irq = dec_interrupt[DEC_IRQ_DZ11];
  667. uport->fifosize = 1;
  668. uport->iotype = UPIO_MEM;
  669. uport->flags = UPF_BOOT_AUTOCONF;
  670. uport->ops = &dz_ops;
  671. uport->line = line;
  672. uport->mapbase = base;
  673. }
  674. }
  675. #ifdef CONFIG_SERIAL_DZ_CONSOLE
  676. /*
  677. * -------------------------------------------------------------------
  678. * dz_console_putchar() -- transmit a character
  679. *
  680. * Polled transmission. This is tricky. We need to mask transmit
  681. * interrupts so that they do not interfere, enable the transmitter
  682. * for the line requested and then wait till the transmit scanner
  683. * requests data for this line. But it may request data for another
  684. * line first, in which case we have to disable its transmitter and
  685. * repeat waiting till our line pops up. Only then the character may
  686. * be transmitted. Finally, the state of the transmitter mask is
  687. * restored. Welcome to the world of PDP-11!
  688. * -------------------------------------------------------------------
  689. */
  690. static void dz_console_putchar(struct uart_port *uport, int ch)
  691. {
  692. struct dz_port *dport = to_dport(uport);
  693. unsigned long flags;
  694. unsigned short csr, tcr, trdy, mask;
  695. int loops = 10000;
  696. spin_lock_irqsave(&dport->port.lock, flags);
  697. csr = dz_in(dport, DZ_CSR);
  698. dz_out(dport, DZ_CSR, csr & ~DZ_TIE);
  699. tcr = dz_in(dport, DZ_TCR);
  700. tcr |= 1 << dport->port.line;
  701. mask = tcr;
  702. dz_out(dport, DZ_TCR, mask);
  703. iob();
  704. spin_unlock_irqrestore(&dport->port.lock, flags);
  705. do {
  706. trdy = dz_in(dport, DZ_CSR);
  707. if (!(trdy & DZ_TRDY))
  708. continue;
  709. trdy = (trdy & DZ_TLINE) >> 8;
  710. if (trdy == dport->port.line)
  711. break;
  712. mask &= ~(1 << trdy);
  713. dz_out(dport, DZ_TCR, mask);
  714. iob();
  715. udelay(2);
  716. } while (--loops);
  717. if (loops) /* Cannot send otherwise. */
  718. dz_out(dport, DZ_TDR, ch);
  719. dz_out(dport, DZ_TCR, tcr);
  720. dz_out(dport, DZ_CSR, csr);
  721. }
  722. /*
  723. * -------------------------------------------------------------------
  724. * dz_console_print ()
  725. *
  726. * dz_console_print is registered for printk.
  727. * The console must be locked when we get here.
  728. * -------------------------------------------------------------------
  729. */
  730. static void dz_console_print(struct console *co,
  731. const char *str,
  732. unsigned int count)
  733. {
  734. struct dz_port *dport = &dz_mux.dport[co->index];
  735. #ifdef DEBUG_DZ
  736. prom_printf((char *) str);
  737. #endif
  738. uart_console_write(&dport->port, str, count, dz_console_putchar);
  739. }
  740. static int __init dz_console_setup(struct console *co, char *options)
  741. {
  742. struct dz_port *dport = &dz_mux.dport[co->index];
  743. struct uart_port *uport = &dport->port;
  744. int baud = 9600;
  745. int bits = 8;
  746. int parity = 'n';
  747. int flow = 'n';
  748. int ret;
  749. ret = dz_map_port(uport);
  750. if (ret)
  751. return ret;
  752. spin_lock_init(&dport->port.lock); /* For dz_pm(). */
  753. dz_reset(dport);
  754. dz_pm(uport, 0, -1);
  755. if (options)
  756. uart_parse_options(options, &baud, &parity, &bits, &flow);
  757. return uart_set_options(&dport->port, co, baud, parity, bits, flow);
  758. }
  759. static struct uart_driver dz_reg;
  760. static struct console dz_console = {
  761. .name = "ttyS",
  762. .write = dz_console_print,
  763. .device = uart_console_device,
  764. .setup = dz_console_setup,
  765. .flags = CON_PRINTBUFFER,
  766. .index = -1,
  767. .data = &dz_reg,
  768. };
  769. static int __init dz_serial_console_init(void)
  770. {
  771. if (!IOASIC) {
  772. dz_init_ports();
  773. register_console(&dz_console);
  774. return 0;
  775. } else
  776. return -ENXIO;
  777. }
  778. console_initcall(dz_serial_console_init);
  779. #define SERIAL_DZ_CONSOLE &dz_console
  780. #else
  781. #define SERIAL_DZ_CONSOLE NULL
  782. #endif /* CONFIG_SERIAL_DZ_CONSOLE */
  783. static struct uart_driver dz_reg = {
  784. .owner = THIS_MODULE,
  785. .driver_name = "serial",
  786. .dev_name = "ttyS",
  787. .major = TTY_MAJOR,
  788. .minor = 64,
  789. .nr = DZ_NB_PORT,
  790. .cons = SERIAL_DZ_CONSOLE,
  791. };
  792. static int __init dz_init(void)
  793. {
  794. int ret, i;
  795. if (IOASIC)
  796. return -ENXIO;
  797. printk("%s%s\n", dz_name, dz_version);
  798. dz_init_ports();
  799. ret = uart_register_driver(&dz_reg);
  800. if (ret)
  801. return ret;
  802. for (i = 0; i < DZ_NB_PORT; i++)
  803. uart_add_one_port(&dz_reg, &dz_mux.dport[i].port);
  804. return 0;
  805. }
  806. module_init(dz_init);