owl-sps.c 6.4 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Actions Semi Owl Smart Power System (SPS)
  4. *
  5. * Copyright 2012 Actions Semi Inc.
  6. * Author: Actions Semi, Inc.
  7. *
  8. * Copyright (c) 2017 Andreas Färber
  9. */
  10. #include <linux/of_address.h>
  11. #include <linux/of_platform.h>
  12. #include <linux/pm_domain.h>
  13. #include <linux/soc/actions/owl-sps.h>
  14. #include <dt-bindings/power/owl-s500-powergate.h>
  15. #include <dt-bindings/power/owl-s700-powergate.h>
  16. #include <dt-bindings/power/owl-s900-powergate.h>
  17. struct owl_sps_domain_info {
  18. const char *name;
  19. int pwr_bit;
  20. int ack_bit;
  21. unsigned int genpd_flags;
  22. };
  23. struct owl_sps_info {
  24. unsigned num_domains;
  25. const struct owl_sps_domain_info *domains;
  26. };
  27. struct owl_sps {
  28. struct device *dev;
  29. const struct owl_sps_info *info;
  30. void __iomem *base;
  31. struct genpd_onecell_data genpd_data;
  32. struct generic_pm_domain *domains[];
  33. };
  34. #define to_owl_pd(gpd) container_of(gpd, struct owl_sps_domain, genpd)
  35. struct owl_sps_domain {
  36. struct generic_pm_domain genpd;
  37. const struct owl_sps_domain_info *info;
  38. struct owl_sps *sps;
  39. };
  40. static int owl_sps_set_power(struct owl_sps_domain *pd, bool enable)
  41. {
  42. u32 pwr_mask, ack_mask;
  43. ack_mask = BIT(pd->info->ack_bit);
  44. pwr_mask = BIT(pd->info->pwr_bit);
  45. return owl_sps_set_pg(pd->sps->base, pwr_mask, ack_mask, enable);
  46. }
  47. static int owl_sps_power_on(struct generic_pm_domain *domain)
  48. {
  49. struct owl_sps_domain *pd = to_owl_pd(domain);
  50. dev_dbg(pd->sps->dev, "%s power on", pd->info->name);
  51. return owl_sps_set_power(pd, true);
  52. }
  53. static int owl_sps_power_off(struct generic_pm_domain *domain)
  54. {
  55. struct owl_sps_domain *pd = to_owl_pd(domain);
  56. dev_dbg(pd->sps->dev, "%s power off", pd->info->name);
  57. return owl_sps_set_power(pd, false);
  58. }
  59. static int owl_sps_init_domain(struct owl_sps *sps, int index)
  60. {
  61. struct owl_sps_domain *pd;
  62. pd = devm_kzalloc(sps->dev, sizeof(*pd), GFP_KERNEL);
  63. if (!pd)
  64. return -ENOMEM;
  65. pd->info = &sps->info->domains[index];
  66. pd->sps = sps;
  67. pd->genpd.name = pd->info->name;
  68. pd->genpd.power_on = owl_sps_power_on;
  69. pd->genpd.power_off = owl_sps_power_off;
  70. pd->genpd.flags = pd->info->genpd_flags;
  71. pm_genpd_init(&pd->genpd, NULL, false);
  72. sps->genpd_data.domains[index] = &pd->genpd;
  73. return 0;
  74. }
  75. static int owl_sps_probe(struct platform_device *pdev)
  76. {
  77. const struct of_device_id *match;
  78. const struct owl_sps_info *sps_info;
  79. struct owl_sps *sps;
  80. int i, ret;
  81. if (!pdev->dev.of_node) {
  82. dev_err(&pdev->dev, "no device node\n");
  83. return -ENODEV;
  84. }
  85. match = of_match_device(pdev->dev.driver->of_match_table, &pdev->dev);
  86. if (!match || !match->data) {
  87. dev_err(&pdev->dev, "unknown compatible or missing data\n");
  88. return -EINVAL;
  89. }
  90. sps_info = match->data;
  91. sps = devm_kzalloc(&pdev->dev,
  92. struct_size(sps, domains, sps_info->num_domains),
  93. GFP_KERNEL);
  94. if (!sps)
  95. return -ENOMEM;
  96. sps->base = of_io_request_and_map(pdev->dev.of_node, 0, "owl-sps");
  97. if (IS_ERR(sps->base)) {
  98. dev_err(&pdev->dev, "failed to map sps registers\n");
  99. return PTR_ERR(sps->base);
  100. }
  101. sps->dev = &pdev->dev;
  102. sps->info = sps_info;
  103. sps->genpd_data.domains = sps->domains;
  104. sps->genpd_data.num_domains = sps_info->num_domains;
  105. for (i = 0; i < sps_info->num_domains; i++) {
  106. ret = owl_sps_init_domain(sps, i);
  107. if (ret)
  108. return ret;
  109. }
  110. ret = of_genpd_add_provider_onecell(pdev->dev.of_node, &sps->genpd_data);
  111. if (ret) {
  112. dev_err(&pdev->dev, "failed to add provider (%d)", ret);
  113. return ret;
  114. }
  115. return 0;
  116. }
  117. static const struct owl_sps_domain_info s500_sps_domains[] = {
  118. [S500_PD_VDE] = {
  119. .name = "VDE",
  120. .pwr_bit = 0,
  121. .ack_bit = 16,
  122. },
  123. [S500_PD_VCE_SI] = {
  124. .name = "VCE_SI",
  125. .pwr_bit = 1,
  126. .ack_bit = 17,
  127. },
  128. [S500_PD_USB2_1] = {
  129. .name = "USB2_1",
  130. .pwr_bit = 2,
  131. .ack_bit = 18,
  132. },
  133. [S500_PD_CPU2] = {
  134. .name = "CPU2",
  135. .pwr_bit = 5,
  136. .ack_bit = 21,
  137. .genpd_flags = GENPD_FLAG_ALWAYS_ON,
  138. },
  139. [S500_PD_CPU3] = {
  140. .name = "CPU3",
  141. .pwr_bit = 6,
  142. .ack_bit = 22,
  143. .genpd_flags = GENPD_FLAG_ALWAYS_ON,
  144. },
  145. [S500_PD_DMA] = {
  146. .name = "DMA",
  147. .pwr_bit = 8,
  148. .ack_bit = 12,
  149. },
  150. [S500_PD_DS] = {
  151. .name = "DS",
  152. .pwr_bit = 9,
  153. .ack_bit = 13,
  154. },
  155. [S500_PD_USB3] = {
  156. .name = "USB3",
  157. .pwr_bit = 10,
  158. .ack_bit = 14,
  159. },
  160. [S500_PD_USB2_0] = {
  161. .name = "USB2_0",
  162. .pwr_bit = 11,
  163. .ack_bit = 15,
  164. },
  165. };
  166. static const struct owl_sps_info s500_sps_info = {
  167. .num_domains = ARRAY_SIZE(s500_sps_domains),
  168. .domains = s500_sps_domains,
  169. };
  170. static const struct owl_sps_domain_info s700_sps_domains[] = {
  171. [S700_PD_VDE] = {
  172. .name = "VDE",
  173. .pwr_bit = 0,
  174. },
  175. [S700_PD_VCE_SI] = {
  176. .name = "VCE_SI",
  177. .pwr_bit = 1,
  178. },
  179. [S700_PD_USB2_1] = {
  180. .name = "USB2_1",
  181. .pwr_bit = 2,
  182. },
  183. [S700_PD_HDE] = {
  184. .name = "HDE",
  185. .pwr_bit = 7,
  186. },
  187. [S700_PD_DMA] = {
  188. .name = "DMA",
  189. .pwr_bit = 8,
  190. },
  191. [S700_PD_DS] = {
  192. .name = "DS",
  193. .pwr_bit = 9,
  194. },
  195. [S700_PD_USB3] = {
  196. .name = "USB3",
  197. .pwr_bit = 10,
  198. },
  199. [S700_PD_USB2_0] = {
  200. .name = "USB2_0",
  201. .pwr_bit = 11,
  202. },
  203. };
  204. static const struct owl_sps_info s700_sps_info = {
  205. .num_domains = ARRAY_SIZE(s700_sps_domains),
  206. .domains = s700_sps_domains,
  207. };
  208. static const struct owl_sps_domain_info s900_sps_domains[] = {
  209. [S900_PD_GPU_B] = {
  210. .name = "GPU_B",
  211. .pwr_bit = 3,
  212. },
  213. [S900_PD_VCE] = {
  214. .name = "VCE",
  215. .pwr_bit = 4,
  216. },
  217. [S900_PD_SENSOR] = {
  218. .name = "SENSOR",
  219. .pwr_bit = 5,
  220. },
  221. [S900_PD_VDE] = {
  222. .name = "VDE",
  223. .pwr_bit = 6,
  224. },
  225. [S900_PD_HDE] = {
  226. .name = "HDE",
  227. .pwr_bit = 7,
  228. },
  229. [S900_PD_USB3] = {
  230. .name = "USB3",
  231. .pwr_bit = 8,
  232. },
  233. [S900_PD_DDR0] = {
  234. .name = "DDR0",
  235. .pwr_bit = 9,
  236. },
  237. [S900_PD_DDR1] = {
  238. .name = "DDR1",
  239. .pwr_bit = 10,
  240. },
  241. [S900_PD_DE] = {
  242. .name = "DE",
  243. .pwr_bit = 13,
  244. },
  245. [S900_PD_NAND] = {
  246. .name = "NAND",
  247. .pwr_bit = 14,
  248. },
  249. [S900_PD_USB2_H0] = {
  250. .name = "USB2_H0",
  251. .pwr_bit = 15,
  252. },
  253. [S900_PD_USB2_H1] = {
  254. .name = "USB2_H1",
  255. .pwr_bit = 16,
  256. },
  257. };
  258. static const struct owl_sps_info s900_sps_info = {
  259. .num_domains = ARRAY_SIZE(s900_sps_domains),
  260. .domains = s900_sps_domains,
  261. };
  262. static const struct of_device_id owl_sps_of_matches[] = {
  263. { .compatible = "actions,s500-sps", .data = &s500_sps_info },
  264. { .compatible = "actions,s700-sps", .data = &s700_sps_info },
  265. { .compatible = "actions,s900-sps", .data = &s900_sps_info },
  266. { }
  267. };
  268. static struct platform_driver owl_sps_platform_driver = {
  269. .probe = owl_sps_probe,
  270. .driver = {
  271. .name = "owl-sps",
  272. .of_match_table = owl_sps_of_matches,
  273. .suppress_bind_attrs = true,
  274. },
  275. };
  276. static int __init owl_sps_init(void)
  277. {
  278. return platform_driver_register(&owl_sps_platform_driver);
  279. }
  280. postcore_initcall(owl_sps_init);