wm831x-dcdc.c 22 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. //
  3. // wm831x-dcdc.c -- DC-DC buck converter driver for the WM831x series
  4. //
  5. // Copyright 2009 Wolfson Microelectronics PLC.
  6. //
  7. // Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
  8. #include <linux/module.h>
  9. #include <linux/moduleparam.h>
  10. #include <linux/init.h>
  11. #include <linux/bitops.h>
  12. #include <linux/err.h>
  13. #include <linux/i2c.h>
  14. #include <linux/platform_device.h>
  15. #include <linux/regulator/driver.h>
  16. #include <linux/regulator/machine.h>
  17. #include <linux/gpio/consumer.h>
  18. #include <linux/slab.h>
  19. #include <linux/mfd/wm831x/core.h>
  20. #include <linux/mfd/wm831x/regulator.h>
  21. #include <linux/mfd/wm831x/pdata.h>
  22. #define WM831X_BUCKV_MAX_SELECTOR 0x68
  23. #define WM831X_BUCKP_MAX_SELECTOR 0x66
  24. #define WM831X_DCDC_MODE_FAST 0
  25. #define WM831X_DCDC_MODE_NORMAL 1
  26. #define WM831X_DCDC_MODE_IDLE 2
  27. #define WM831X_DCDC_MODE_STANDBY 3
  28. #define WM831X_DCDC_MAX_NAME 9
  29. /* Register offsets in control block */
  30. #define WM831X_DCDC_CONTROL_1 0
  31. #define WM831X_DCDC_CONTROL_2 1
  32. #define WM831X_DCDC_ON_CONFIG 2
  33. #define WM831X_DCDC_SLEEP_CONTROL 3
  34. #define WM831X_DCDC_DVS_CONTROL 4
  35. /*
  36. * Shared
  37. */
  38. struct wm831x_dcdc {
  39. char name[WM831X_DCDC_MAX_NAME];
  40. char supply_name[WM831X_DCDC_MAX_NAME];
  41. struct regulator_desc desc;
  42. int base;
  43. struct wm831x *wm831x;
  44. struct regulator_dev *regulator;
  45. struct gpio_desc *dvs_gpiod;
  46. int dvs_gpio_state;
  47. int on_vsel;
  48. int dvs_vsel;
  49. };
  50. static unsigned int wm831x_dcdc_get_mode(struct regulator_dev *rdev)
  51. {
  52. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  53. struct wm831x *wm831x = dcdc->wm831x;
  54. u16 reg = dcdc->base + WM831X_DCDC_ON_CONFIG;
  55. int val;
  56. val = wm831x_reg_read(wm831x, reg);
  57. if (val < 0)
  58. return val;
  59. val = (val & WM831X_DC1_ON_MODE_MASK) >> WM831X_DC1_ON_MODE_SHIFT;
  60. switch (val) {
  61. case WM831X_DCDC_MODE_FAST:
  62. return REGULATOR_MODE_FAST;
  63. case WM831X_DCDC_MODE_NORMAL:
  64. return REGULATOR_MODE_NORMAL;
  65. case WM831X_DCDC_MODE_STANDBY:
  66. return REGULATOR_MODE_STANDBY;
  67. case WM831X_DCDC_MODE_IDLE:
  68. return REGULATOR_MODE_IDLE;
  69. default:
  70. BUG();
  71. return -EINVAL;
  72. }
  73. }
  74. static int wm831x_dcdc_set_mode_int(struct wm831x *wm831x, int reg,
  75. unsigned int mode)
  76. {
  77. int val;
  78. switch (mode) {
  79. case REGULATOR_MODE_FAST:
  80. val = WM831X_DCDC_MODE_FAST;
  81. break;
  82. case REGULATOR_MODE_NORMAL:
  83. val = WM831X_DCDC_MODE_NORMAL;
  84. break;
  85. case REGULATOR_MODE_STANDBY:
  86. val = WM831X_DCDC_MODE_STANDBY;
  87. break;
  88. case REGULATOR_MODE_IDLE:
  89. val = WM831X_DCDC_MODE_IDLE;
  90. break;
  91. default:
  92. return -EINVAL;
  93. }
  94. return wm831x_set_bits(wm831x, reg, WM831X_DC1_ON_MODE_MASK,
  95. val << WM831X_DC1_ON_MODE_SHIFT);
  96. }
  97. static int wm831x_dcdc_set_mode(struct regulator_dev *rdev, unsigned int mode)
  98. {
  99. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  100. struct wm831x *wm831x = dcdc->wm831x;
  101. u16 reg = dcdc->base + WM831X_DCDC_ON_CONFIG;
  102. return wm831x_dcdc_set_mode_int(wm831x, reg, mode);
  103. }
  104. static int wm831x_dcdc_set_suspend_mode(struct regulator_dev *rdev,
  105. unsigned int mode)
  106. {
  107. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  108. struct wm831x *wm831x = dcdc->wm831x;
  109. u16 reg = dcdc->base + WM831X_DCDC_SLEEP_CONTROL;
  110. return wm831x_dcdc_set_mode_int(wm831x, reg, mode);
  111. }
  112. static int wm831x_dcdc_get_status(struct regulator_dev *rdev)
  113. {
  114. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  115. struct wm831x *wm831x = dcdc->wm831x;
  116. int ret;
  117. /* First, check for errors */
  118. ret = wm831x_reg_read(wm831x, WM831X_DCDC_UV_STATUS);
  119. if (ret < 0)
  120. return ret;
  121. if (ret & (1 << rdev_get_id(rdev))) {
  122. dev_dbg(wm831x->dev, "DCDC%d under voltage\n",
  123. rdev_get_id(rdev) + 1);
  124. return REGULATOR_STATUS_ERROR;
  125. }
  126. /* DCDC1 and DCDC2 can additionally detect high voltage/current */
  127. if (rdev_get_id(rdev) < 2) {
  128. if (ret & (WM831X_DC1_OV_STS << rdev_get_id(rdev))) {
  129. dev_dbg(wm831x->dev, "DCDC%d over voltage\n",
  130. rdev_get_id(rdev) + 1);
  131. return REGULATOR_STATUS_ERROR;
  132. }
  133. if (ret & (WM831X_DC1_HC_STS << rdev_get_id(rdev))) {
  134. dev_dbg(wm831x->dev, "DCDC%d over current\n",
  135. rdev_get_id(rdev) + 1);
  136. return REGULATOR_STATUS_ERROR;
  137. }
  138. }
  139. /* Is the regulator on? */
  140. ret = wm831x_reg_read(wm831x, WM831X_DCDC_STATUS);
  141. if (ret < 0)
  142. return ret;
  143. if (!(ret & (1 << rdev_get_id(rdev))))
  144. return REGULATOR_STATUS_OFF;
  145. /* TODO: When we handle hardware control modes so we can report the
  146. * current mode. */
  147. return REGULATOR_STATUS_ON;
  148. }
  149. static irqreturn_t wm831x_dcdc_uv_irq(int irq, void *data)
  150. {
  151. struct wm831x_dcdc *dcdc = data;
  152. regulator_lock(dcdc->regulator);
  153. regulator_notifier_call_chain(dcdc->regulator,
  154. REGULATOR_EVENT_UNDER_VOLTAGE,
  155. NULL);
  156. regulator_unlock(dcdc->regulator);
  157. return IRQ_HANDLED;
  158. }
  159. static irqreturn_t wm831x_dcdc_oc_irq(int irq, void *data)
  160. {
  161. struct wm831x_dcdc *dcdc = data;
  162. regulator_lock(dcdc->regulator);
  163. regulator_notifier_call_chain(dcdc->regulator,
  164. REGULATOR_EVENT_OVER_CURRENT,
  165. NULL);
  166. regulator_unlock(dcdc->regulator);
  167. return IRQ_HANDLED;
  168. }
  169. /*
  170. * BUCKV specifics
  171. */
  172. static const struct regulator_linear_range wm831x_buckv_ranges[] = {
  173. REGULATOR_LINEAR_RANGE(600000, 0, 0x7, 0),
  174. REGULATOR_LINEAR_RANGE(600000, 0x8, 0x68, 12500),
  175. };
  176. static int wm831x_buckv_set_dvs(struct regulator_dev *rdev, int state)
  177. {
  178. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  179. if (state == dcdc->dvs_gpio_state)
  180. return 0;
  181. dcdc->dvs_gpio_state = state;
  182. gpiod_set_value(dcdc->dvs_gpiod, state);
  183. /* Should wait for DVS state change to be asserted if we have
  184. * a GPIO for it, for now assume the device is configured
  185. * for the fastest possible transition.
  186. */
  187. return 0;
  188. }
  189. static int wm831x_buckv_set_voltage_sel(struct regulator_dev *rdev,
  190. unsigned vsel)
  191. {
  192. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  193. struct wm831x *wm831x = dcdc->wm831x;
  194. int on_reg = dcdc->base + WM831X_DCDC_ON_CONFIG;
  195. int dvs_reg = dcdc->base + WM831X_DCDC_DVS_CONTROL;
  196. int ret;
  197. /* If this value is already set then do a GPIO update if we can */
  198. if (dcdc->dvs_gpiod && dcdc->on_vsel == vsel)
  199. return wm831x_buckv_set_dvs(rdev, 0);
  200. if (dcdc->dvs_gpiod && dcdc->dvs_vsel == vsel)
  201. return wm831x_buckv_set_dvs(rdev, 1);
  202. /* Always set the ON status to the minimum voltage */
  203. ret = wm831x_set_bits(wm831x, on_reg, WM831X_DC1_ON_VSEL_MASK, vsel);
  204. if (ret < 0)
  205. return ret;
  206. dcdc->on_vsel = vsel;
  207. if (!dcdc->dvs_gpiod)
  208. return ret;
  209. /* Kick the voltage transition now */
  210. ret = wm831x_buckv_set_dvs(rdev, 0);
  211. if (ret < 0)
  212. return ret;
  213. /*
  214. * If this VSEL is higher than the last one we've seen then
  215. * remember it as the DVS VSEL. This is optimised for CPUfreq
  216. * usage where we want to get to the highest voltage very
  217. * quickly.
  218. */
  219. if (vsel > dcdc->dvs_vsel) {
  220. ret = wm831x_set_bits(wm831x, dvs_reg,
  221. WM831X_DC1_DVS_VSEL_MASK,
  222. vsel);
  223. if (ret == 0)
  224. dcdc->dvs_vsel = vsel;
  225. else
  226. dev_warn(wm831x->dev,
  227. "Failed to set DCDC DVS VSEL: %d\n", ret);
  228. }
  229. return 0;
  230. }
  231. static int wm831x_buckv_set_suspend_voltage(struct regulator_dev *rdev,
  232. int uV)
  233. {
  234. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  235. struct wm831x *wm831x = dcdc->wm831x;
  236. u16 reg = dcdc->base + WM831X_DCDC_SLEEP_CONTROL;
  237. int vsel;
  238. vsel = regulator_map_voltage_linear_range(rdev, uV, uV);
  239. if (vsel < 0)
  240. return vsel;
  241. return wm831x_set_bits(wm831x, reg, WM831X_DC1_SLP_VSEL_MASK, vsel);
  242. }
  243. static int wm831x_buckv_get_voltage_sel(struct regulator_dev *rdev)
  244. {
  245. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  246. if (dcdc->dvs_gpiod && dcdc->dvs_gpio_state)
  247. return dcdc->dvs_vsel;
  248. else
  249. return dcdc->on_vsel;
  250. }
  251. /* Current limit options */
  252. static const unsigned int wm831x_dcdc_ilim[] = {
  253. 125000, 250000, 375000, 500000, 625000, 750000, 875000, 1000000
  254. };
  255. static const struct regulator_ops wm831x_buckv_ops = {
  256. .set_voltage_sel = wm831x_buckv_set_voltage_sel,
  257. .get_voltage_sel = wm831x_buckv_get_voltage_sel,
  258. .list_voltage = regulator_list_voltage_linear_range,
  259. .map_voltage = regulator_map_voltage_linear_range,
  260. .set_suspend_voltage = wm831x_buckv_set_suspend_voltage,
  261. .set_current_limit = regulator_set_current_limit_regmap,
  262. .get_current_limit = regulator_get_current_limit_regmap,
  263. .is_enabled = regulator_is_enabled_regmap,
  264. .enable = regulator_enable_regmap,
  265. .disable = regulator_disable_regmap,
  266. .get_status = wm831x_dcdc_get_status,
  267. .get_mode = wm831x_dcdc_get_mode,
  268. .set_mode = wm831x_dcdc_set_mode,
  269. .set_suspend_mode = wm831x_dcdc_set_suspend_mode,
  270. };
  271. /*
  272. * Set up DVS control. We just log errors since we can still run
  273. * (with reduced performance) if we fail.
  274. */
  275. static void wm831x_buckv_dvs_init(struct platform_device *pdev,
  276. struct wm831x_dcdc *dcdc,
  277. struct wm831x_buckv_pdata *pdata)
  278. {
  279. struct wm831x *wm831x = dcdc->wm831x;
  280. int ret;
  281. u16 ctrl;
  282. if (!pdata)
  283. return;
  284. /* gpiolib won't let us read the GPIO status so pick the higher
  285. * of the two existing voltages so we take it as platform data.
  286. */
  287. dcdc->dvs_gpio_state = pdata->dvs_init_state;
  288. dcdc->dvs_gpiod = devm_gpiod_get(&pdev->dev, "dvs",
  289. dcdc->dvs_gpio_state ? GPIOD_OUT_HIGH : GPIOD_OUT_LOW);
  290. if (IS_ERR(dcdc->dvs_gpiod)) {
  291. dev_err(wm831x->dev, "Failed to get %s DVS GPIO: %ld\n",
  292. dcdc->name, PTR_ERR(dcdc->dvs_gpiod));
  293. return;
  294. }
  295. switch (pdata->dvs_control_src) {
  296. case 1:
  297. ctrl = 2 << WM831X_DC1_DVS_SRC_SHIFT;
  298. break;
  299. case 2:
  300. ctrl = 3 << WM831X_DC1_DVS_SRC_SHIFT;
  301. break;
  302. default:
  303. dev_err(wm831x->dev, "Invalid DVS control source %d for %s\n",
  304. pdata->dvs_control_src, dcdc->name);
  305. return;
  306. }
  307. /* If DVS_VSEL is set to the minimum value then raise it to ON_VSEL
  308. * to make bootstrapping a bit smoother.
  309. */
  310. if (!dcdc->dvs_vsel) {
  311. ret = wm831x_set_bits(wm831x,
  312. dcdc->base + WM831X_DCDC_DVS_CONTROL,
  313. WM831X_DC1_DVS_VSEL_MASK, dcdc->on_vsel);
  314. if (ret == 0)
  315. dcdc->dvs_vsel = dcdc->on_vsel;
  316. else
  317. dev_warn(wm831x->dev, "Failed to set DVS_VSEL: %d\n",
  318. ret);
  319. }
  320. ret = wm831x_set_bits(wm831x, dcdc->base + WM831X_DCDC_DVS_CONTROL,
  321. WM831X_DC1_DVS_SRC_MASK, ctrl);
  322. if (ret < 0) {
  323. dev_err(wm831x->dev, "Failed to set %s DVS source: %d\n",
  324. dcdc->name, ret);
  325. }
  326. }
  327. static int wm831x_buckv_probe(struct platform_device *pdev)
  328. {
  329. struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent);
  330. struct wm831x_pdata *pdata = dev_get_platdata(wm831x->dev);
  331. struct regulator_config config = { };
  332. int id;
  333. struct wm831x_dcdc *dcdc;
  334. struct resource *res;
  335. int ret, irq;
  336. if (pdata && pdata->wm831x_num)
  337. id = (pdata->wm831x_num * 10) + 1;
  338. else
  339. id = 0;
  340. id = pdev->id - id;
  341. dev_dbg(&pdev->dev, "Probing DCDC%d\n", id + 1);
  342. dcdc = devm_kzalloc(&pdev->dev, sizeof(struct wm831x_dcdc),
  343. GFP_KERNEL);
  344. if (!dcdc)
  345. return -ENOMEM;
  346. dcdc->wm831x = wm831x;
  347. res = platform_get_resource(pdev, IORESOURCE_REG, 0);
  348. if (res == NULL) {
  349. dev_err(&pdev->dev, "No REG resource\n");
  350. ret = -EINVAL;
  351. goto err;
  352. }
  353. dcdc->base = res->start;
  354. snprintf(dcdc->name, sizeof(dcdc->name), "DCDC%d", id + 1);
  355. dcdc->desc.name = dcdc->name;
  356. snprintf(dcdc->supply_name, sizeof(dcdc->supply_name),
  357. "DC%dVDD", id + 1);
  358. dcdc->desc.supply_name = dcdc->supply_name;
  359. dcdc->desc.id = id;
  360. dcdc->desc.type = REGULATOR_VOLTAGE;
  361. dcdc->desc.n_voltages = WM831X_BUCKV_MAX_SELECTOR + 1;
  362. dcdc->desc.linear_ranges = wm831x_buckv_ranges;
  363. dcdc->desc.n_linear_ranges = ARRAY_SIZE(wm831x_buckv_ranges);
  364. dcdc->desc.ops = &wm831x_buckv_ops;
  365. dcdc->desc.owner = THIS_MODULE;
  366. dcdc->desc.enable_reg = WM831X_DCDC_ENABLE;
  367. dcdc->desc.enable_mask = 1 << id;
  368. dcdc->desc.csel_reg = dcdc->base + WM831X_DCDC_CONTROL_2;
  369. dcdc->desc.csel_mask = WM831X_DC1_HC_THR_MASK;
  370. dcdc->desc.n_current_limits = ARRAY_SIZE(wm831x_dcdc_ilim);
  371. dcdc->desc.curr_table = wm831x_dcdc_ilim;
  372. ret = wm831x_reg_read(wm831x, dcdc->base + WM831X_DCDC_ON_CONFIG);
  373. if (ret < 0) {
  374. dev_err(wm831x->dev, "Failed to read ON VSEL: %d\n", ret);
  375. goto err;
  376. }
  377. dcdc->on_vsel = ret & WM831X_DC1_ON_VSEL_MASK;
  378. ret = wm831x_reg_read(wm831x, dcdc->base + WM831X_DCDC_DVS_CONTROL);
  379. if (ret < 0) {
  380. dev_err(wm831x->dev, "Failed to read DVS VSEL: %d\n", ret);
  381. goto err;
  382. }
  383. dcdc->dvs_vsel = ret & WM831X_DC1_DVS_VSEL_MASK;
  384. if (pdata && pdata->dcdc[id])
  385. wm831x_buckv_dvs_init(pdev, dcdc,
  386. pdata->dcdc[id]->driver_data);
  387. config.dev = pdev->dev.parent;
  388. if (pdata)
  389. config.init_data = pdata->dcdc[id];
  390. config.driver_data = dcdc;
  391. config.regmap = wm831x->regmap;
  392. dcdc->regulator = devm_regulator_register(&pdev->dev, &dcdc->desc,
  393. &config);
  394. if (IS_ERR(dcdc->regulator)) {
  395. ret = PTR_ERR(dcdc->regulator);
  396. dev_err(wm831x->dev, "Failed to register DCDC%d: %d\n",
  397. id + 1, ret);
  398. goto err;
  399. }
  400. irq = wm831x_irq(wm831x, platform_get_irq_byname(pdev, "UV"));
  401. ret = devm_request_threaded_irq(&pdev->dev, irq, NULL,
  402. wm831x_dcdc_uv_irq,
  403. IRQF_TRIGGER_RISING | IRQF_ONESHOT,
  404. dcdc->name, dcdc);
  405. if (ret != 0) {
  406. dev_err(&pdev->dev, "Failed to request UV IRQ %d: %d\n",
  407. irq, ret);
  408. goto err;
  409. }
  410. irq = wm831x_irq(wm831x, platform_get_irq_byname(pdev, "HC"));
  411. ret = devm_request_threaded_irq(&pdev->dev, irq, NULL,
  412. wm831x_dcdc_oc_irq,
  413. IRQF_TRIGGER_RISING | IRQF_ONESHOT,
  414. dcdc->name, dcdc);
  415. if (ret != 0) {
  416. dev_err(&pdev->dev, "Failed to request HC IRQ %d: %d\n",
  417. irq, ret);
  418. goto err;
  419. }
  420. platform_set_drvdata(pdev, dcdc);
  421. return 0;
  422. err:
  423. return ret;
  424. }
  425. static struct platform_driver wm831x_buckv_driver = {
  426. .probe = wm831x_buckv_probe,
  427. .driver = {
  428. .name = "wm831x-buckv",
  429. },
  430. };
  431. /*
  432. * BUCKP specifics
  433. */
  434. static int wm831x_buckp_set_suspend_voltage(struct regulator_dev *rdev, int uV)
  435. {
  436. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  437. struct wm831x *wm831x = dcdc->wm831x;
  438. u16 reg = dcdc->base + WM831X_DCDC_SLEEP_CONTROL;
  439. int sel;
  440. sel = regulator_map_voltage_linear(rdev, uV, uV);
  441. if (sel < 0)
  442. return sel;
  443. return wm831x_set_bits(wm831x, reg, WM831X_DC3_ON_VSEL_MASK, sel);
  444. }
  445. static const struct regulator_ops wm831x_buckp_ops = {
  446. .set_voltage_sel = regulator_set_voltage_sel_regmap,
  447. .get_voltage_sel = regulator_get_voltage_sel_regmap,
  448. .list_voltage = regulator_list_voltage_linear,
  449. .map_voltage = regulator_map_voltage_linear,
  450. .set_suspend_voltage = wm831x_buckp_set_suspend_voltage,
  451. .is_enabled = regulator_is_enabled_regmap,
  452. .enable = regulator_enable_regmap,
  453. .disable = regulator_disable_regmap,
  454. .get_status = wm831x_dcdc_get_status,
  455. .get_mode = wm831x_dcdc_get_mode,
  456. .set_mode = wm831x_dcdc_set_mode,
  457. .set_suspend_mode = wm831x_dcdc_set_suspend_mode,
  458. };
  459. static int wm831x_buckp_probe(struct platform_device *pdev)
  460. {
  461. struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent);
  462. struct wm831x_pdata *pdata = dev_get_platdata(wm831x->dev);
  463. struct regulator_config config = { };
  464. int id;
  465. struct wm831x_dcdc *dcdc;
  466. struct resource *res;
  467. int ret, irq;
  468. if (pdata && pdata->wm831x_num)
  469. id = (pdata->wm831x_num * 10) + 1;
  470. else
  471. id = 0;
  472. id = pdev->id - id;
  473. dev_dbg(&pdev->dev, "Probing DCDC%d\n", id + 1);
  474. dcdc = devm_kzalloc(&pdev->dev, sizeof(struct wm831x_dcdc),
  475. GFP_KERNEL);
  476. if (!dcdc)
  477. return -ENOMEM;
  478. dcdc->wm831x = wm831x;
  479. res = platform_get_resource(pdev, IORESOURCE_REG, 0);
  480. if (res == NULL) {
  481. dev_err(&pdev->dev, "No REG resource\n");
  482. ret = -EINVAL;
  483. goto err;
  484. }
  485. dcdc->base = res->start;
  486. snprintf(dcdc->name, sizeof(dcdc->name), "DCDC%d", id + 1);
  487. dcdc->desc.name = dcdc->name;
  488. snprintf(dcdc->supply_name, sizeof(dcdc->supply_name),
  489. "DC%dVDD", id + 1);
  490. dcdc->desc.supply_name = dcdc->supply_name;
  491. dcdc->desc.id = id;
  492. dcdc->desc.type = REGULATOR_VOLTAGE;
  493. dcdc->desc.n_voltages = WM831X_BUCKP_MAX_SELECTOR + 1;
  494. dcdc->desc.ops = &wm831x_buckp_ops;
  495. dcdc->desc.owner = THIS_MODULE;
  496. dcdc->desc.vsel_reg = dcdc->base + WM831X_DCDC_ON_CONFIG;
  497. dcdc->desc.vsel_mask = WM831X_DC3_ON_VSEL_MASK;
  498. dcdc->desc.enable_reg = WM831X_DCDC_ENABLE;
  499. dcdc->desc.enable_mask = 1 << id;
  500. dcdc->desc.min_uV = 850000;
  501. dcdc->desc.uV_step = 25000;
  502. config.dev = pdev->dev.parent;
  503. if (pdata)
  504. config.init_data = pdata->dcdc[id];
  505. config.driver_data = dcdc;
  506. config.regmap = wm831x->regmap;
  507. dcdc->regulator = devm_regulator_register(&pdev->dev, &dcdc->desc,
  508. &config);
  509. if (IS_ERR(dcdc->regulator)) {
  510. ret = PTR_ERR(dcdc->regulator);
  511. dev_err(wm831x->dev, "Failed to register DCDC%d: %d\n",
  512. id + 1, ret);
  513. goto err;
  514. }
  515. irq = wm831x_irq(wm831x, platform_get_irq_byname(pdev, "UV"));
  516. ret = devm_request_threaded_irq(&pdev->dev, irq, NULL,
  517. wm831x_dcdc_uv_irq,
  518. IRQF_TRIGGER_RISING | IRQF_ONESHOT,
  519. dcdc->name, dcdc);
  520. if (ret != 0) {
  521. dev_err(&pdev->dev, "Failed to request UV IRQ %d: %d\n",
  522. irq, ret);
  523. goto err;
  524. }
  525. platform_set_drvdata(pdev, dcdc);
  526. return 0;
  527. err:
  528. return ret;
  529. }
  530. static struct platform_driver wm831x_buckp_driver = {
  531. .probe = wm831x_buckp_probe,
  532. .driver = {
  533. .name = "wm831x-buckp",
  534. },
  535. };
  536. /*
  537. * DCDC boost convertors
  538. */
  539. static int wm831x_boostp_get_status(struct regulator_dev *rdev)
  540. {
  541. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  542. struct wm831x *wm831x = dcdc->wm831x;
  543. int ret;
  544. /* First, check for errors */
  545. ret = wm831x_reg_read(wm831x, WM831X_DCDC_UV_STATUS);
  546. if (ret < 0)
  547. return ret;
  548. if (ret & (1 << rdev_get_id(rdev))) {
  549. dev_dbg(wm831x->dev, "DCDC%d under voltage\n",
  550. rdev_get_id(rdev) + 1);
  551. return REGULATOR_STATUS_ERROR;
  552. }
  553. /* Is the regulator on? */
  554. ret = wm831x_reg_read(wm831x, WM831X_DCDC_STATUS);
  555. if (ret < 0)
  556. return ret;
  557. if (ret & (1 << rdev_get_id(rdev)))
  558. return REGULATOR_STATUS_ON;
  559. else
  560. return REGULATOR_STATUS_OFF;
  561. }
  562. static const struct regulator_ops wm831x_boostp_ops = {
  563. .get_status = wm831x_boostp_get_status,
  564. .is_enabled = regulator_is_enabled_regmap,
  565. .enable = regulator_enable_regmap,
  566. .disable = regulator_disable_regmap,
  567. };
  568. static int wm831x_boostp_probe(struct platform_device *pdev)
  569. {
  570. struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent);
  571. struct wm831x_pdata *pdata = dev_get_platdata(wm831x->dev);
  572. struct regulator_config config = { };
  573. int id = pdev->id % ARRAY_SIZE(pdata->dcdc);
  574. struct wm831x_dcdc *dcdc;
  575. struct resource *res;
  576. int ret, irq;
  577. dev_dbg(&pdev->dev, "Probing DCDC%d\n", id + 1);
  578. if (pdata == NULL || pdata->dcdc[id] == NULL)
  579. return -ENODEV;
  580. dcdc = devm_kzalloc(&pdev->dev, sizeof(struct wm831x_dcdc), GFP_KERNEL);
  581. if (!dcdc)
  582. return -ENOMEM;
  583. dcdc->wm831x = wm831x;
  584. res = platform_get_resource(pdev, IORESOURCE_REG, 0);
  585. if (res == NULL) {
  586. dev_err(&pdev->dev, "No REG resource\n");
  587. return -EINVAL;
  588. }
  589. dcdc->base = res->start;
  590. snprintf(dcdc->name, sizeof(dcdc->name), "DCDC%d", id + 1);
  591. dcdc->desc.name = dcdc->name;
  592. dcdc->desc.id = id;
  593. dcdc->desc.type = REGULATOR_VOLTAGE;
  594. dcdc->desc.ops = &wm831x_boostp_ops;
  595. dcdc->desc.owner = THIS_MODULE;
  596. dcdc->desc.enable_reg = WM831X_DCDC_ENABLE;
  597. dcdc->desc.enable_mask = 1 << id;
  598. config.dev = pdev->dev.parent;
  599. if (pdata)
  600. config.init_data = pdata->dcdc[id];
  601. config.driver_data = dcdc;
  602. config.regmap = wm831x->regmap;
  603. dcdc->regulator = devm_regulator_register(&pdev->dev, &dcdc->desc,
  604. &config);
  605. if (IS_ERR(dcdc->regulator)) {
  606. ret = PTR_ERR(dcdc->regulator);
  607. dev_err(wm831x->dev, "Failed to register DCDC%d: %d\n",
  608. id + 1, ret);
  609. return ret;
  610. }
  611. irq = wm831x_irq(wm831x, platform_get_irq_byname(pdev, "UV"));
  612. ret = devm_request_threaded_irq(&pdev->dev, irq, NULL,
  613. wm831x_dcdc_uv_irq,
  614. IRQF_TRIGGER_RISING | IRQF_ONESHOT,
  615. dcdc->name,
  616. dcdc);
  617. if (ret != 0) {
  618. dev_err(&pdev->dev, "Failed to request UV IRQ %d: %d\n",
  619. irq, ret);
  620. return ret;
  621. }
  622. platform_set_drvdata(pdev, dcdc);
  623. return 0;
  624. }
  625. static struct platform_driver wm831x_boostp_driver = {
  626. .probe = wm831x_boostp_probe,
  627. .driver = {
  628. .name = "wm831x-boostp",
  629. },
  630. };
  631. /*
  632. * External Power Enable
  633. *
  634. * These aren't actually DCDCs but look like them in hardware so share
  635. * code.
  636. */
  637. #define WM831X_EPE_BASE 6
  638. static const struct regulator_ops wm831x_epe_ops = {
  639. .is_enabled = regulator_is_enabled_regmap,
  640. .enable = regulator_enable_regmap,
  641. .disable = regulator_disable_regmap,
  642. .get_status = wm831x_dcdc_get_status,
  643. };
  644. static int wm831x_epe_probe(struct platform_device *pdev)
  645. {
  646. struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent);
  647. struct wm831x_pdata *pdata = dev_get_platdata(wm831x->dev);
  648. struct regulator_config config = { };
  649. int id = pdev->id % ARRAY_SIZE(pdata->epe);
  650. struct wm831x_dcdc *dcdc;
  651. int ret;
  652. dev_dbg(&pdev->dev, "Probing EPE%d\n", id + 1);
  653. dcdc = devm_kzalloc(&pdev->dev, sizeof(struct wm831x_dcdc), GFP_KERNEL);
  654. if (!dcdc)
  655. return -ENOMEM;
  656. dcdc->wm831x = wm831x;
  657. /* For current parts this is correct; probably need to revisit
  658. * in future.
  659. */
  660. snprintf(dcdc->name, sizeof(dcdc->name), "EPE%d", id + 1);
  661. dcdc->desc.name = dcdc->name;
  662. dcdc->desc.id = id + WM831X_EPE_BASE; /* Offset in DCDC registers */
  663. dcdc->desc.ops = &wm831x_epe_ops;
  664. dcdc->desc.type = REGULATOR_VOLTAGE;
  665. dcdc->desc.owner = THIS_MODULE;
  666. dcdc->desc.enable_reg = WM831X_DCDC_ENABLE;
  667. dcdc->desc.enable_mask = 1 << dcdc->desc.id;
  668. config.dev = pdev->dev.parent;
  669. if (pdata)
  670. config.init_data = pdata->epe[id];
  671. config.driver_data = dcdc;
  672. config.regmap = wm831x->regmap;
  673. dcdc->regulator = devm_regulator_register(&pdev->dev, &dcdc->desc,
  674. &config);
  675. if (IS_ERR(dcdc->regulator)) {
  676. ret = PTR_ERR(dcdc->regulator);
  677. dev_err(wm831x->dev, "Failed to register EPE%d: %d\n",
  678. id + 1, ret);
  679. goto err;
  680. }
  681. platform_set_drvdata(pdev, dcdc);
  682. return 0;
  683. err:
  684. return ret;
  685. }
  686. static struct platform_driver wm831x_epe_driver = {
  687. .probe = wm831x_epe_probe,
  688. .driver = {
  689. .name = "wm831x-epe",
  690. },
  691. };
  692. static struct platform_driver * const drivers[] = {
  693. &wm831x_buckv_driver,
  694. &wm831x_buckp_driver,
  695. &wm831x_boostp_driver,
  696. &wm831x_epe_driver,
  697. };
  698. static int __init wm831x_dcdc_init(void)
  699. {
  700. return platform_register_drivers(drivers, ARRAY_SIZE(drivers));
  701. }
  702. subsys_initcall(wm831x_dcdc_init);
  703. static void __exit wm831x_dcdc_exit(void)
  704. {
  705. platform_unregister_drivers(drivers, ARRAY_SIZE(drivers));
  706. }
  707. module_exit(wm831x_dcdc_exit);
  708. /* Module information */
  709. MODULE_AUTHOR("Mark Brown");
  710. MODULE_DESCRIPTION("WM831x DC-DC convertor driver");
  711. MODULE_LICENSE("GPL");
  712. MODULE_ALIAS("platform:wm831x-buckv");
  713. MODULE_ALIAS("platform:wm831x-buckp");
  714. MODULE_ALIAS("platform:wm831x-boostp");
  715. MODULE_ALIAS("platform:wm831x-epe");