rsi_91x_hal.c 31 KB

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  1. /**
  2. * Copyright (c) 2014 Redpine Signals Inc.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. */
  16. #include <linux/firmware.h>
  17. #include <net/bluetooth/bluetooth.h>
  18. #include "rsi_mgmt.h"
  19. #include "rsi_hal.h"
  20. #include "rsi_sdio.h"
  21. #include "rsi_common.h"
  22. /* FLASH Firmware */
  23. static struct ta_metadata metadata_flash_content[] = {
  24. {"flash_content", 0x00010000},
  25. {"rsi/rs9113_wlan_qspi.rps", 0x00010000},
  26. {"rsi/rs9113_wlan_bt_dual_mode.rps", 0x00010000},
  27. {"flash_content", 0x00010000},
  28. {"rsi/rs9113_ap_bt_dual_mode.rps", 0x00010000},
  29. };
  30. static struct ta_metadata metadata[] = {{"pmemdata_dummy", 0x00000000},
  31. {"rsi/rs9116_wlan.rps", 0x00000000},
  32. {"rsi/rs9116_wlan_bt_classic.rps", 0x00000000},
  33. {"rsi/pmemdata_dummy", 0x00000000},
  34. {"rsi/rs9116_wlan_bt_classic.rps", 0x00000000}
  35. };
  36. int rsi_send_pkt_to_bus(struct rsi_common *common, struct sk_buff *skb)
  37. {
  38. struct rsi_hw *adapter = common->priv;
  39. int status;
  40. if (common->coex_mode > 1)
  41. mutex_lock(&common->tx_bus_mutex);
  42. status = adapter->host_intf_ops->write_pkt(common->priv,
  43. skb->data, skb->len);
  44. if (common->coex_mode > 1)
  45. mutex_unlock(&common->tx_bus_mutex);
  46. return status;
  47. }
  48. int rsi_prepare_mgmt_desc(struct rsi_common *common, struct sk_buff *skb)
  49. {
  50. struct rsi_hw *adapter = common->priv;
  51. struct ieee80211_hdr *wh = NULL;
  52. struct ieee80211_tx_info *info;
  53. struct ieee80211_conf *conf = &adapter->hw->conf;
  54. struct ieee80211_vif *vif;
  55. struct rsi_mgmt_desc *mgmt_desc;
  56. struct skb_info *tx_params;
  57. struct rsi_xtended_desc *xtend_desc = NULL;
  58. u8 header_size;
  59. u32 dword_align_bytes = 0;
  60. if (skb->len > MAX_MGMT_PKT_SIZE) {
  61. rsi_dbg(INFO_ZONE, "%s: Dropping mgmt pkt > 512\n", __func__);
  62. return -EINVAL;
  63. }
  64. info = IEEE80211_SKB_CB(skb);
  65. tx_params = (struct skb_info *)info->driver_data;
  66. vif = tx_params->vif;
  67. /* Update header size */
  68. header_size = FRAME_DESC_SZ + sizeof(struct rsi_xtended_desc);
  69. if (header_size > skb_headroom(skb)) {
  70. rsi_dbg(ERR_ZONE,
  71. "%s: Failed to add extended descriptor\n",
  72. __func__);
  73. return -ENOSPC;
  74. }
  75. skb_push(skb, header_size);
  76. dword_align_bytes = ((unsigned long)skb->data & 0x3f);
  77. if (dword_align_bytes > skb_headroom(skb)) {
  78. rsi_dbg(ERR_ZONE,
  79. "%s: Failed to add dword align\n", __func__);
  80. return -ENOSPC;
  81. }
  82. skb_push(skb, dword_align_bytes);
  83. header_size += dword_align_bytes;
  84. tx_params->internal_hdr_size = header_size;
  85. memset(&skb->data[0], 0, header_size);
  86. wh = (struct ieee80211_hdr *)&skb->data[header_size];
  87. mgmt_desc = (struct rsi_mgmt_desc *)skb->data;
  88. xtend_desc = (struct rsi_xtended_desc *)&skb->data[FRAME_DESC_SZ];
  89. rsi_set_len_qno(&mgmt_desc->len_qno, (skb->len - FRAME_DESC_SZ),
  90. RSI_WIFI_MGMT_Q);
  91. mgmt_desc->frame_type = TX_DOT11_MGMT;
  92. mgmt_desc->header_len = MIN_802_11_HDR_LEN;
  93. mgmt_desc->xtend_desc_size = header_size - FRAME_DESC_SZ;
  94. if (ieee80211_is_probe_req(wh->frame_control))
  95. mgmt_desc->frame_info = cpu_to_le16(RSI_INSERT_SEQ_IN_FW);
  96. mgmt_desc->frame_info |= cpu_to_le16(RATE_INFO_ENABLE);
  97. if (is_broadcast_ether_addr(wh->addr1))
  98. mgmt_desc->frame_info |= cpu_to_le16(RSI_BROADCAST_PKT);
  99. mgmt_desc->seq_ctrl =
  100. cpu_to_le16(IEEE80211_SEQ_TO_SN(le16_to_cpu(wh->seq_ctrl)));
  101. if ((common->band == NL80211_BAND_2GHZ) && !common->p2p_enabled)
  102. mgmt_desc->rate_info = cpu_to_le16(RSI_RATE_1);
  103. else
  104. mgmt_desc->rate_info = cpu_to_le16(RSI_RATE_6);
  105. if (conf_is_ht40(conf))
  106. mgmt_desc->bbp_info = cpu_to_le16(FULL40M_ENABLE);
  107. if (ieee80211_is_probe_resp(wh->frame_control)) {
  108. mgmt_desc->misc_flags |= (RSI_ADD_DELTA_TSF_VAP_ID |
  109. RSI_FETCH_RETRY_CNT_FRM_HST);
  110. #define PROBE_RESP_RETRY_CNT 3
  111. xtend_desc->retry_cnt = PROBE_RESP_RETRY_CNT;
  112. }
  113. if (((vif->type == NL80211_IFTYPE_AP) ||
  114. (vif->type == NL80211_IFTYPE_P2P_GO)) &&
  115. (ieee80211_is_action(wh->frame_control))) {
  116. struct rsi_sta *rsta = rsi_find_sta(common, wh->addr1);
  117. if (rsta)
  118. mgmt_desc->sta_id = tx_params->sta_id;
  119. else
  120. return -EINVAL;
  121. }
  122. mgmt_desc->rate_info |=
  123. cpu_to_le16((tx_params->vap_id << RSI_DESC_VAP_ID_OFST) &
  124. RSI_DESC_VAP_ID_MASK);
  125. return 0;
  126. }
  127. /* This function prepares descriptor for given data packet */
  128. int rsi_prepare_data_desc(struct rsi_common *common, struct sk_buff *skb)
  129. {
  130. struct rsi_hw *adapter = common->priv;
  131. struct ieee80211_vif *vif;
  132. struct ieee80211_hdr *wh = NULL;
  133. struct ieee80211_tx_info *info;
  134. struct skb_info *tx_params;
  135. struct rsi_data_desc *data_desc;
  136. struct rsi_xtended_desc *xtend_desc;
  137. u8 ieee80211_size = MIN_802_11_HDR_LEN;
  138. u8 header_size;
  139. u8 vap_id = 0;
  140. u8 dword_align_bytes;
  141. u16 seq_num;
  142. info = IEEE80211_SKB_CB(skb);
  143. vif = info->control.vif;
  144. tx_params = (struct skb_info *)info->driver_data;
  145. header_size = FRAME_DESC_SZ + sizeof(struct rsi_xtended_desc);
  146. if (header_size > skb_headroom(skb)) {
  147. rsi_dbg(ERR_ZONE, "%s: Unable to send pkt\n", __func__);
  148. return -ENOSPC;
  149. }
  150. skb_push(skb, header_size);
  151. dword_align_bytes = ((unsigned long)skb->data & 0x3f);
  152. if (header_size > skb_headroom(skb)) {
  153. rsi_dbg(ERR_ZONE, "%s: Not enough headroom\n", __func__);
  154. return -ENOSPC;
  155. }
  156. skb_push(skb, dword_align_bytes);
  157. header_size += dword_align_bytes;
  158. tx_params->internal_hdr_size = header_size;
  159. data_desc = (struct rsi_data_desc *)skb->data;
  160. memset(data_desc, 0, header_size);
  161. xtend_desc = (struct rsi_xtended_desc *)&skb->data[FRAME_DESC_SZ];
  162. wh = (struct ieee80211_hdr *)&skb->data[header_size];
  163. seq_num = IEEE80211_SEQ_TO_SN(le16_to_cpu(wh->seq_ctrl));
  164. data_desc->xtend_desc_size = header_size - FRAME_DESC_SZ;
  165. if (ieee80211_is_data_qos(wh->frame_control)) {
  166. ieee80211_size += 2;
  167. data_desc->mac_flags |= cpu_to_le16(RSI_QOS_ENABLE);
  168. }
  169. if (((vif->type == NL80211_IFTYPE_STATION) ||
  170. (vif->type == NL80211_IFTYPE_P2P_CLIENT)) &&
  171. (adapter->ps_state == PS_ENABLED))
  172. wh->frame_control |= cpu_to_le16(RSI_SET_PS_ENABLE);
  173. if ((!(info->flags & IEEE80211_TX_INTFL_DONT_ENCRYPT)) &&
  174. info->control.hw_key) {
  175. if (rsi_is_cipher_wep(common))
  176. ieee80211_size += 4;
  177. else
  178. ieee80211_size += 8;
  179. data_desc->mac_flags |= cpu_to_le16(RSI_ENCRYPT_PKT);
  180. }
  181. rsi_set_len_qno(&data_desc->len_qno, (skb->len - FRAME_DESC_SZ),
  182. RSI_WIFI_DATA_Q);
  183. data_desc->header_len = ieee80211_size;
  184. if (common->min_rate != RSI_RATE_AUTO) {
  185. /* Send fixed rate */
  186. data_desc->frame_info = cpu_to_le16(RATE_INFO_ENABLE);
  187. data_desc->rate_info = cpu_to_le16(common->min_rate);
  188. if (conf_is_ht40(&common->priv->hw->conf))
  189. data_desc->bbp_info = cpu_to_le16(FULL40M_ENABLE);
  190. if ((common->vif_info[0].sgi) && (common->min_rate & 0x100)) {
  191. /* Only MCS rates */
  192. data_desc->rate_info |=
  193. cpu_to_le16(ENABLE_SHORTGI_RATE);
  194. }
  195. }
  196. if (skb->protocol == cpu_to_be16(ETH_P_PAE)) {
  197. rsi_dbg(INFO_ZONE, "*** Tx EAPOL ***\n");
  198. data_desc->frame_info = cpu_to_le16(RATE_INFO_ENABLE);
  199. if (common->band == NL80211_BAND_5GHZ)
  200. data_desc->rate_info = cpu_to_le16(RSI_RATE_6);
  201. else
  202. data_desc->rate_info = cpu_to_le16(RSI_RATE_1);
  203. data_desc->mac_flags |= cpu_to_le16(RSI_REKEY_PURPOSE);
  204. data_desc->misc_flags |= RSI_FETCH_RETRY_CNT_FRM_HST;
  205. #define EAPOL_RETRY_CNT 15
  206. xtend_desc->retry_cnt = EAPOL_RETRY_CNT;
  207. if (common->eapol4_confirm)
  208. skb->priority = VO_Q;
  209. else
  210. rsi_set_len_qno(&data_desc->len_qno,
  211. (skb->len - FRAME_DESC_SZ),
  212. RSI_WIFI_MGMT_Q);
  213. if (((skb->len - header_size) == EAPOL4_PACKET_LEN) ||
  214. ((skb->len - header_size) == EAPOL4_PACKET_LEN - 2)) {
  215. data_desc->misc_flags |=
  216. RSI_DESC_REQUIRE_CFM_TO_HOST;
  217. xtend_desc->confirm_frame_type = EAPOL4_CONFIRM;
  218. }
  219. }
  220. data_desc->mac_flags |= cpu_to_le16(seq_num & 0xfff);
  221. data_desc->qid_tid = ((skb->priority & 0xf) |
  222. ((tx_params->tid & 0xf) << 4));
  223. data_desc->sta_id = tx_params->sta_id;
  224. if ((is_broadcast_ether_addr(wh->addr1)) ||
  225. (is_multicast_ether_addr(wh->addr1))) {
  226. data_desc->frame_info = cpu_to_le16(RATE_INFO_ENABLE);
  227. data_desc->frame_info |= cpu_to_le16(RSI_BROADCAST_PKT);
  228. data_desc->sta_id = vap_id;
  229. if ((vif->type == NL80211_IFTYPE_AP) ||
  230. (vif->type == NL80211_IFTYPE_P2P_GO)) {
  231. if (common->band == NL80211_BAND_5GHZ)
  232. data_desc->rate_info = cpu_to_le16(RSI_RATE_6);
  233. else
  234. data_desc->rate_info = cpu_to_le16(RSI_RATE_1);
  235. }
  236. }
  237. if (((vif->type == NL80211_IFTYPE_AP) ||
  238. (vif->type == NL80211_IFTYPE_P2P_GO)) &&
  239. (ieee80211_has_moredata(wh->frame_control)))
  240. data_desc->frame_info |= cpu_to_le16(MORE_DATA_PRESENT);
  241. data_desc->rate_info |=
  242. cpu_to_le16((tx_params->vap_id << RSI_DESC_VAP_ID_OFST) &
  243. RSI_DESC_VAP_ID_MASK);
  244. return 0;
  245. }
  246. /* This function sends received data packet from driver to device */
  247. int rsi_send_data_pkt(struct rsi_common *common, struct sk_buff *skb)
  248. {
  249. struct rsi_hw *adapter = common->priv;
  250. struct ieee80211_vif *vif;
  251. struct ieee80211_tx_info *info;
  252. struct ieee80211_bss_conf *bss;
  253. int status = -EINVAL;
  254. if (!skb)
  255. return 0;
  256. if (common->iface_down)
  257. goto err;
  258. info = IEEE80211_SKB_CB(skb);
  259. if (!info->control.vif)
  260. goto err;
  261. vif = info->control.vif;
  262. bss = &vif->bss_conf;
  263. if (((vif->type == NL80211_IFTYPE_STATION) ||
  264. (vif->type == NL80211_IFTYPE_P2P_CLIENT)) &&
  265. (!bss->assoc))
  266. goto err;
  267. status = rsi_send_pkt_to_bus(common, skb);
  268. if (status)
  269. rsi_dbg(ERR_ZONE, "%s: Failed to write pkt\n", __func__);
  270. err:
  271. ++common->tx_stats.total_tx_pkt_freed[skb->priority];
  272. rsi_indicate_tx_status(adapter, skb, status);
  273. return status;
  274. }
  275. /**
  276. * rsi_send_mgmt_pkt() - This functions sends the received management packet
  277. * from driver to device.
  278. * @common: Pointer to the driver private structure.
  279. * @skb: Pointer to the socket buffer structure.
  280. *
  281. * Return: status: 0 on success, -1 on failure.
  282. */
  283. int rsi_send_mgmt_pkt(struct rsi_common *common,
  284. struct sk_buff *skb)
  285. {
  286. struct rsi_hw *adapter = common->priv;
  287. struct ieee80211_bss_conf *bss;
  288. struct ieee80211_hdr *wh;
  289. struct ieee80211_tx_info *info;
  290. struct skb_info *tx_params;
  291. struct rsi_mgmt_desc *mgmt_desc;
  292. struct rsi_xtended_desc *xtend_desc;
  293. int status = -E2BIG;
  294. u8 header_size;
  295. info = IEEE80211_SKB_CB(skb);
  296. tx_params = (struct skb_info *)info->driver_data;
  297. header_size = tx_params->internal_hdr_size;
  298. if (tx_params->flags & INTERNAL_MGMT_PKT) {
  299. status = adapter->host_intf_ops->write_pkt(common->priv,
  300. (u8 *)skb->data,
  301. skb->len);
  302. if (status) {
  303. rsi_dbg(ERR_ZONE,
  304. "%s: Failed to write the packet\n", __func__);
  305. }
  306. dev_kfree_skb(skb);
  307. return status;
  308. }
  309. bss = &info->control.vif->bss_conf;
  310. wh = (struct ieee80211_hdr *)&skb->data[header_size];
  311. mgmt_desc = (struct rsi_mgmt_desc *)skb->data;
  312. xtend_desc = (struct rsi_xtended_desc *)&skb->data[FRAME_DESC_SZ];
  313. /* Indicate to firmware to give cfm for probe */
  314. if (ieee80211_is_probe_req(wh->frame_control) && !bss->assoc) {
  315. rsi_dbg(INFO_ZONE,
  316. "%s: blocking mgmt queue\n", __func__);
  317. mgmt_desc->misc_flags = RSI_DESC_REQUIRE_CFM_TO_HOST;
  318. xtend_desc->confirm_frame_type = PROBEREQ_CONFIRM;
  319. common->mgmt_q_block = true;
  320. rsi_dbg(INFO_ZONE, "Mgmt queue blocked\n");
  321. }
  322. status = rsi_send_pkt_to_bus(common, skb);
  323. if (status)
  324. rsi_dbg(ERR_ZONE, "%s: Failed to write the packet\n", __func__);
  325. rsi_indicate_tx_status(common->priv, skb, status);
  326. return status;
  327. }
  328. int rsi_send_bt_pkt(struct rsi_common *common, struct sk_buff *skb)
  329. {
  330. int status = -EINVAL;
  331. u8 header_size = 0;
  332. struct rsi_bt_desc *bt_desc;
  333. u8 queueno = ((skb->data[1] >> 4) & 0xf);
  334. if (queueno == RSI_BT_MGMT_Q) {
  335. status = rsi_send_pkt_to_bus(common, skb);
  336. if (status)
  337. rsi_dbg(ERR_ZONE, "%s: Failed to write bt mgmt pkt\n",
  338. __func__);
  339. goto out;
  340. }
  341. header_size = FRAME_DESC_SZ;
  342. if (header_size > skb_headroom(skb)) {
  343. rsi_dbg(ERR_ZONE, "%s: Not enough headroom\n", __func__);
  344. status = -ENOSPC;
  345. goto out;
  346. }
  347. skb_push(skb, header_size);
  348. memset(skb->data, 0, header_size);
  349. bt_desc = (struct rsi_bt_desc *)skb->data;
  350. rsi_set_len_qno(&bt_desc->len_qno, (skb->len - FRAME_DESC_SZ),
  351. RSI_BT_DATA_Q);
  352. bt_desc->bt_pkt_type = cpu_to_le16(bt_cb(skb)->pkt_type);
  353. status = rsi_send_pkt_to_bus(common, skb);
  354. if (status)
  355. rsi_dbg(ERR_ZONE, "%s: Failed to write bt pkt\n", __func__);
  356. out:
  357. dev_kfree_skb(skb);
  358. return status;
  359. }
  360. int rsi_prepare_beacon(struct rsi_common *common, struct sk_buff *skb)
  361. {
  362. struct rsi_hw *adapter = (struct rsi_hw *)common->priv;
  363. struct rsi_data_desc *bcn_frm;
  364. struct ieee80211_hw *hw = common->priv->hw;
  365. struct ieee80211_conf *conf = &hw->conf;
  366. struct ieee80211_vif *vif;
  367. struct sk_buff *mac_bcn;
  368. u8 vap_id = 0, i;
  369. u16 tim_offset = 0;
  370. for (i = 0; i < RSI_MAX_VIFS; i++) {
  371. vif = adapter->vifs[i];
  372. if (!vif)
  373. continue;
  374. if ((vif->type == NL80211_IFTYPE_AP) ||
  375. (vif->type == NL80211_IFTYPE_P2P_GO))
  376. break;
  377. }
  378. if (!vif)
  379. return -EINVAL;
  380. mac_bcn = ieee80211_beacon_get_tim(adapter->hw,
  381. vif,
  382. &tim_offset, NULL);
  383. if (!mac_bcn) {
  384. rsi_dbg(ERR_ZONE, "Failed to get beacon from mac80211\n");
  385. return -EINVAL;
  386. }
  387. common->beacon_cnt++;
  388. bcn_frm = (struct rsi_data_desc *)skb->data;
  389. rsi_set_len_qno(&bcn_frm->len_qno, mac_bcn->len, RSI_WIFI_DATA_Q);
  390. bcn_frm->header_len = MIN_802_11_HDR_LEN;
  391. bcn_frm->frame_info = cpu_to_le16(RSI_DATA_DESC_MAC_BBP_INFO |
  392. RSI_DATA_DESC_NO_ACK_IND |
  393. RSI_DATA_DESC_BEACON_FRAME |
  394. RSI_DATA_DESC_INSERT_TSF |
  395. RSI_DATA_DESC_INSERT_SEQ_NO |
  396. RATE_INFO_ENABLE);
  397. bcn_frm->rate_info = cpu_to_le16(vap_id << 14);
  398. bcn_frm->qid_tid = BEACON_HW_Q;
  399. if (conf_is_ht40_plus(conf)) {
  400. bcn_frm->bbp_info = cpu_to_le16(LOWER_20_ENABLE);
  401. bcn_frm->bbp_info |= cpu_to_le16(LOWER_20_ENABLE >> 12);
  402. } else if (conf_is_ht40_minus(conf)) {
  403. bcn_frm->bbp_info = cpu_to_le16(UPPER_20_ENABLE);
  404. bcn_frm->bbp_info |= cpu_to_le16(UPPER_20_ENABLE >> 12);
  405. }
  406. if (common->band == NL80211_BAND_2GHZ)
  407. bcn_frm->rate_info |= cpu_to_le16(RSI_RATE_1);
  408. else
  409. bcn_frm->rate_info |= cpu_to_le16(RSI_RATE_6);
  410. if (mac_bcn->data[tim_offset + 2] == 0)
  411. bcn_frm->frame_info |= cpu_to_le16(RSI_DATA_DESC_DTIM_BEACON);
  412. memcpy(&skb->data[FRAME_DESC_SZ], mac_bcn->data, mac_bcn->len);
  413. skb_put(skb, mac_bcn->len + FRAME_DESC_SZ);
  414. dev_kfree_skb(mac_bcn);
  415. return 0;
  416. }
  417. static void bl_cmd_timeout(struct timer_list *t)
  418. {
  419. struct rsi_hw *adapter = from_timer(adapter, t, bl_cmd_timer);
  420. adapter->blcmd_timer_expired = true;
  421. del_timer(&adapter->bl_cmd_timer);
  422. }
  423. static int bl_start_cmd_timer(struct rsi_hw *adapter, u32 timeout)
  424. {
  425. timer_setup(&adapter->bl_cmd_timer, bl_cmd_timeout, 0);
  426. adapter->bl_cmd_timer.expires = (msecs_to_jiffies(timeout) + jiffies);
  427. adapter->blcmd_timer_expired = false;
  428. add_timer(&adapter->bl_cmd_timer);
  429. return 0;
  430. }
  431. static int bl_stop_cmd_timer(struct rsi_hw *adapter)
  432. {
  433. adapter->blcmd_timer_expired = false;
  434. if (timer_pending(&adapter->bl_cmd_timer))
  435. del_timer(&adapter->bl_cmd_timer);
  436. return 0;
  437. }
  438. static int bl_write_cmd(struct rsi_hw *adapter, u8 cmd, u8 exp_resp,
  439. u16 *cmd_resp)
  440. {
  441. struct rsi_host_intf_ops *hif_ops = adapter->host_intf_ops;
  442. u32 regin_val = 0, regout_val = 0;
  443. u32 regin_input = 0;
  444. u8 output = 0;
  445. int status;
  446. regin_input = (REGIN_INPUT | adapter->priv->coex_mode);
  447. while (!adapter->blcmd_timer_expired) {
  448. regin_val = 0;
  449. status = hif_ops->master_reg_read(adapter, SWBL_REGIN,
  450. &regin_val, 2);
  451. if (status < 0) {
  452. rsi_dbg(ERR_ZONE,
  453. "%s: Command %0x REGIN reading failed..\n",
  454. __func__, cmd);
  455. return status;
  456. }
  457. mdelay(1);
  458. if ((regin_val >> 12) != REGIN_VALID)
  459. break;
  460. }
  461. if (adapter->blcmd_timer_expired) {
  462. rsi_dbg(ERR_ZONE,
  463. "%s: Command %0x REGIN reading timed out..\n",
  464. __func__, cmd);
  465. return -ETIMEDOUT;
  466. }
  467. rsi_dbg(INFO_ZONE,
  468. "Issuing write to Regin val:%0x sending cmd:%0x\n",
  469. regin_val, (cmd | regin_input << 8));
  470. status = hif_ops->master_reg_write(adapter, SWBL_REGIN,
  471. (cmd | regin_input << 8), 2);
  472. if (status < 0)
  473. return status;
  474. mdelay(1);
  475. if (cmd == LOAD_HOSTED_FW || cmd == JUMP_TO_ZERO_PC) {
  476. /* JUMP_TO_ZERO_PC doesn't expect
  477. * any response. So return from here
  478. */
  479. return 0;
  480. }
  481. while (!adapter->blcmd_timer_expired) {
  482. regout_val = 0;
  483. status = hif_ops->master_reg_read(adapter, SWBL_REGOUT,
  484. &regout_val, 2);
  485. if (status < 0) {
  486. rsi_dbg(ERR_ZONE,
  487. "%s: Command %0x REGOUT reading failed..\n",
  488. __func__, cmd);
  489. return status;
  490. }
  491. mdelay(1);
  492. if ((regout_val >> 8) == REGOUT_VALID)
  493. break;
  494. }
  495. if (adapter->blcmd_timer_expired) {
  496. rsi_dbg(ERR_ZONE,
  497. "%s: Command %0x REGOUT reading timed out..\n",
  498. __func__, cmd);
  499. return status;
  500. }
  501. *cmd_resp = ((u16 *)&regout_val)[0] & 0xffff;
  502. output = ((u8 *)&regout_val)[0] & 0xff;
  503. status = hif_ops->master_reg_write(adapter, SWBL_REGOUT,
  504. (cmd | REGOUT_INVALID << 8), 2);
  505. if (status < 0) {
  506. rsi_dbg(ERR_ZONE,
  507. "%s: Command %0x REGOUT writing failed..\n",
  508. __func__, cmd);
  509. return status;
  510. }
  511. mdelay(1);
  512. if (output != exp_resp) {
  513. rsi_dbg(ERR_ZONE,
  514. "%s: Recvd resp %x for cmd %0x\n",
  515. __func__, output, cmd);
  516. return -EINVAL;
  517. }
  518. rsi_dbg(INFO_ZONE,
  519. "%s: Recvd Expected resp %x for cmd %0x\n",
  520. __func__, output, cmd);
  521. return 0;
  522. }
  523. static int bl_cmd(struct rsi_hw *adapter, u8 cmd, u8 exp_resp, char *str)
  524. {
  525. u16 regout_val = 0;
  526. u32 timeout;
  527. int status;
  528. if ((cmd == EOF_REACHED) || (cmd == PING_VALID) || (cmd == PONG_VALID))
  529. timeout = BL_BURN_TIMEOUT;
  530. else
  531. timeout = BL_CMD_TIMEOUT;
  532. bl_start_cmd_timer(adapter, timeout);
  533. status = bl_write_cmd(adapter, cmd, exp_resp, &regout_val);
  534. if (status < 0) {
  535. bl_stop_cmd_timer(adapter);
  536. rsi_dbg(ERR_ZONE,
  537. "%s: Command %s (%0x) writing failed..\n",
  538. __func__, str, cmd);
  539. return status;
  540. }
  541. bl_stop_cmd_timer(adapter);
  542. return 0;
  543. }
  544. #define CHECK_SUM_OFFSET 20
  545. #define LEN_OFFSET 8
  546. #define ADDR_OFFSET 16
  547. static int bl_write_header(struct rsi_hw *adapter, u8 *flash_content,
  548. u32 content_size)
  549. {
  550. struct rsi_host_intf_ops *hif_ops = adapter->host_intf_ops;
  551. struct bl_header *bl_hdr;
  552. u32 write_addr, write_len;
  553. int status;
  554. bl_hdr = kzalloc(sizeof(*bl_hdr), GFP_KERNEL);
  555. if (!bl_hdr)
  556. return -ENOMEM;
  557. bl_hdr->flags = 0;
  558. bl_hdr->image_no = cpu_to_le32(adapter->priv->coex_mode);
  559. bl_hdr->check_sum =
  560. cpu_to_le32(*(u32 *)&flash_content[CHECK_SUM_OFFSET]);
  561. bl_hdr->flash_start_address =
  562. cpu_to_le32(*(u32 *)&flash_content[ADDR_OFFSET]);
  563. bl_hdr->flash_len = cpu_to_le32(*(u32 *)&flash_content[LEN_OFFSET]);
  564. write_len = sizeof(struct bl_header);
  565. if (adapter->rsi_host_intf == RSI_HOST_INTF_USB) {
  566. write_addr = PING_BUFFER_ADDRESS;
  567. status = hif_ops->write_reg_multiple(adapter, write_addr,
  568. (u8 *)bl_hdr, write_len);
  569. if (status < 0) {
  570. rsi_dbg(ERR_ZONE,
  571. "%s: Failed to load Version/CRC structure\n",
  572. __func__);
  573. goto fail;
  574. }
  575. } else {
  576. write_addr = PING_BUFFER_ADDRESS >> 16;
  577. status = hif_ops->master_access_msword(adapter, write_addr);
  578. if (status < 0) {
  579. rsi_dbg(ERR_ZONE,
  580. "%s: Unable to set ms word to common reg\n",
  581. __func__);
  582. goto fail;
  583. }
  584. write_addr = RSI_SD_REQUEST_MASTER |
  585. (PING_BUFFER_ADDRESS & 0xFFFF);
  586. status = hif_ops->write_reg_multiple(adapter, write_addr,
  587. (u8 *)bl_hdr, write_len);
  588. if (status < 0) {
  589. rsi_dbg(ERR_ZONE,
  590. "%s: Failed to load Version/CRC structure\n",
  591. __func__);
  592. goto fail;
  593. }
  594. }
  595. status = 0;
  596. fail:
  597. kfree(bl_hdr);
  598. return status;
  599. }
  600. static u32 read_flash_capacity(struct rsi_hw *adapter)
  601. {
  602. u32 flash_sz = 0;
  603. if ((adapter->host_intf_ops->master_reg_read(adapter, FLASH_SIZE_ADDR,
  604. &flash_sz, 2)) < 0) {
  605. rsi_dbg(ERR_ZONE,
  606. "%s: Flash size reading failed..\n",
  607. __func__);
  608. return 0;
  609. }
  610. rsi_dbg(INIT_ZONE, "Flash capacity: %d KiloBytes\n", flash_sz);
  611. return (flash_sz * 1024); /* Return size in kbytes */
  612. }
  613. static int ping_pong_write(struct rsi_hw *adapter, u8 cmd, u8 *addr, u32 size)
  614. {
  615. struct rsi_host_intf_ops *hif_ops = adapter->host_intf_ops;
  616. u32 block_size = adapter->block_size;
  617. u32 cmd_addr;
  618. u16 cmd_resp, cmd_req;
  619. u8 *str;
  620. int status;
  621. if (cmd == PING_WRITE) {
  622. cmd_addr = PING_BUFFER_ADDRESS;
  623. cmd_resp = PONG_AVAIL;
  624. cmd_req = PING_VALID;
  625. str = "PING_VALID";
  626. } else {
  627. cmd_addr = PONG_BUFFER_ADDRESS;
  628. cmd_resp = PING_AVAIL;
  629. cmd_req = PONG_VALID;
  630. str = "PONG_VALID";
  631. }
  632. status = hif_ops->load_data_master_write(adapter, cmd_addr, size,
  633. block_size, addr);
  634. if (status) {
  635. rsi_dbg(ERR_ZONE, "%s: Unable to write blk at addr %0x\n",
  636. __func__, *addr);
  637. return status;
  638. }
  639. status = bl_cmd(adapter, cmd_req, cmd_resp, str);
  640. if (status)
  641. return status;
  642. return 0;
  643. }
  644. static int auto_fw_upgrade(struct rsi_hw *adapter, u8 *flash_content,
  645. u32 content_size)
  646. {
  647. u8 cmd;
  648. u32 temp_content_size, num_flash, index;
  649. u32 flash_start_address;
  650. int status;
  651. if (content_size > MAX_FLASH_FILE_SIZE) {
  652. rsi_dbg(ERR_ZONE,
  653. "%s: Flash Content size is more than 400K %u\n",
  654. __func__, MAX_FLASH_FILE_SIZE);
  655. return -EINVAL;
  656. }
  657. flash_start_address = *(u32 *)&flash_content[FLASH_START_ADDRESS];
  658. rsi_dbg(INFO_ZONE, "flash start address: %08x\n", flash_start_address);
  659. if (flash_start_address < FW_IMAGE_MIN_ADDRESS) {
  660. rsi_dbg(ERR_ZONE,
  661. "%s: Fw image Flash Start Address is less than 64K\n",
  662. __func__);
  663. return -EINVAL;
  664. }
  665. if (flash_start_address % FLASH_SECTOR_SIZE) {
  666. rsi_dbg(ERR_ZONE,
  667. "%s: Flash Start Address is not multiple of 4K\n",
  668. __func__);
  669. return -EINVAL;
  670. }
  671. if ((flash_start_address + content_size) > adapter->flash_capacity) {
  672. rsi_dbg(ERR_ZONE,
  673. "%s: Flash Content will cross max flash size\n",
  674. __func__);
  675. return -EINVAL;
  676. }
  677. temp_content_size = content_size;
  678. num_flash = content_size / FLASH_WRITE_CHUNK_SIZE;
  679. rsi_dbg(INFO_ZONE, "content_size: %d, num_flash: %d\n",
  680. content_size, num_flash);
  681. for (index = 0; index <= num_flash; index++) {
  682. rsi_dbg(INFO_ZONE, "flash index: %d\n", index);
  683. if (index != num_flash) {
  684. content_size = FLASH_WRITE_CHUNK_SIZE;
  685. rsi_dbg(INFO_ZONE, "QSPI content_size:%d\n",
  686. content_size);
  687. } else {
  688. content_size =
  689. temp_content_size % FLASH_WRITE_CHUNK_SIZE;
  690. rsi_dbg(INFO_ZONE,
  691. "Writing last sector content_size:%d\n",
  692. content_size);
  693. if (!content_size) {
  694. rsi_dbg(INFO_ZONE, "instruction size zero\n");
  695. break;
  696. }
  697. }
  698. if (index % 2)
  699. cmd = PING_WRITE;
  700. else
  701. cmd = PONG_WRITE;
  702. status = ping_pong_write(adapter, cmd, flash_content,
  703. content_size);
  704. if (status) {
  705. rsi_dbg(ERR_ZONE, "%s: Unable to load %d block\n",
  706. __func__, index);
  707. return status;
  708. }
  709. rsi_dbg(INFO_ZONE,
  710. "%s: Successfully loaded %d instructions\n",
  711. __func__, index);
  712. flash_content += content_size;
  713. }
  714. status = bl_cmd(adapter, EOF_REACHED, FW_LOADING_SUCCESSFUL,
  715. "EOF_REACHED");
  716. if (status)
  717. return status;
  718. rsi_dbg(INFO_ZONE, "FW loading is done and FW is running..\n");
  719. return 0;
  720. }
  721. static int rsi_hal_prepare_fwload(struct rsi_hw *adapter)
  722. {
  723. struct rsi_host_intf_ops *hif_ops = adapter->host_intf_ops;
  724. u32 regout_val = 0;
  725. int status;
  726. bl_start_cmd_timer(adapter, BL_CMD_TIMEOUT);
  727. while (!adapter->blcmd_timer_expired) {
  728. status = hif_ops->master_reg_read(adapter, SWBL_REGOUT,
  729. &regout_val,
  730. RSI_COMMON_REG_SIZE);
  731. if (status < 0) {
  732. bl_stop_cmd_timer(adapter);
  733. rsi_dbg(ERR_ZONE,
  734. "%s: REGOUT read failed\n", __func__);
  735. return status;
  736. }
  737. mdelay(1);
  738. if ((regout_val >> 8) == REGOUT_VALID)
  739. break;
  740. }
  741. if (adapter->blcmd_timer_expired) {
  742. rsi_dbg(ERR_ZONE, "%s: REGOUT read timedout\n", __func__);
  743. rsi_dbg(ERR_ZONE,
  744. "%s: Soft boot loader not present\n", __func__);
  745. return -ETIMEDOUT;
  746. }
  747. bl_stop_cmd_timer(adapter);
  748. rsi_dbg(INFO_ZONE, "Received Board Version Number: %x\n",
  749. (regout_val & 0xff));
  750. status = hif_ops->master_reg_write(adapter, SWBL_REGOUT,
  751. (REGOUT_INVALID |
  752. REGOUT_INVALID << 8),
  753. RSI_COMMON_REG_SIZE);
  754. if (status < 0)
  755. rsi_dbg(ERR_ZONE, "%s: REGOUT writing failed..\n", __func__);
  756. else
  757. rsi_dbg(INFO_ZONE,
  758. "===> Device is ready to load firmware <===\n");
  759. return status;
  760. }
  761. static int rsi_load_9113_firmware(struct rsi_hw *adapter)
  762. {
  763. struct rsi_common *common = adapter->priv;
  764. const struct firmware *fw_entry = NULL;
  765. u32 content_size;
  766. u16 tmp_regout_val = 0;
  767. struct ta_metadata *metadata_p;
  768. int status;
  769. status = bl_cmd(adapter, CONFIG_AUTO_READ_MODE, CMD_PASS,
  770. "AUTO_READ_CMD");
  771. if (status < 0)
  772. return status;
  773. adapter->flash_capacity = read_flash_capacity(adapter);
  774. if (adapter->flash_capacity <= 0) {
  775. rsi_dbg(ERR_ZONE,
  776. "%s: Unable to read flash size from EEPROM\n",
  777. __func__);
  778. return -EINVAL;
  779. }
  780. metadata_p = &metadata_flash_content[adapter->priv->coex_mode];
  781. rsi_dbg(INIT_ZONE, "%s: Loading file %s\n", __func__, metadata_p->name);
  782. adapter->fw_file_name = metadata_p->name;
  783. status = request_firmware(&fw_entry, metadata_p->name, adapter->device);
  784. if (status < 0) {
  785. rsi_dbg(ERR_ZONE, "%s: Failed to open file %s\n",
  786. __func__, metadata_p->name);
  787. return status;
  788. }
  789. content_size = fw_entry->size;
  790. rsi_dbg(INFO_ZONE, "FW Length = %d bytes\n", content_size);
  791. /* Get the firmware version */
  792. common->lmac_ver.ver.info.fw_ver[0] =
  793. fw_entry->data[LMAC_VER_OFFSET_9113] & 0xFF;
  794. common->lmac_ver.ver.info.fw_ver[1] =
  795. fw_entry->data[LMAC_VER_OFFSET_9113 + 1] & 0xFF;
  796. common->lmac_ver.major =
  797. fw_entry->data[LMAC_VER_OFFSET_9113 + 2] & 0xFF;
  798. common->lmac_ver.release_num =
  799. fw_entry->data[LMAC_VER_OFFSET_9113 + 3] & 0xFF;
  800. common->lmac_ver.minor =
  801. fw_entry->data[LMAC_VER_OFFSET_9113 + 4] & 0xFF;
  802. common->lmac_ver.patch_num = 0;
  803. rsi_print_version(common);
  804. status = bl_write_header(adapter, (u8 *)fw_entry->data, content_size);
  805. if (status) {
  806. rsi_dbg(ERR_ZONE,
  807. "%s: RPS Image header loading failed\n",
  808. __func__);
  809. goto fail;
  810. }
  811. bl_start_cmd_timer(adapter, BL_CMD_TIMEOUT);
  812. status = bl_write_cmd(adapter, CHECK_CRC, CMD_PASS, &tmp_regout_val);
  813. if (status) {
  814. bl_stop_cmd_timer(adapter);
  815. rsi_dbg(ERR_ZONE,
  816. "%s: CHECK_CRC Command writing failed..\n",
  817. __func__);
  818. if ((tmp_regout_val & 0xff) == CMD_FAIL) {
  819. rsi_dbg(ERR_ZONE,
  820. "CRC Fail.. Proceeding to Upgrade mode\n");
  821. goto fw_upgrade;
  822. }
  823. }
  824. bl_stop_cmd_timer(adapter);
  825. status = bl_cmd(adapter, POLLING_MODE, CMD_PASS, "POLLING_MODE");
  826. if (status)
  827. goto fail;
  828. load_image_cmd:
  829. status = bl_cmd(adapter, LOAD_HOSTED_FW, LOADING_INITIATED,
  830. "LOAD_HOSTED_FW");
  831. if (status)
  832. goto fail;
  833. rsi_dbg(INFO_ZONE, "Load Image command passed..\n");
  834. goto success;
  835. fw_upgrade:
  836. status = bl_cmd(adapter, BURN_HOSTED_FW, SEND_RPS_FILE, "FW_UPGRADE");
  837. if (status)
  838. goto fail;
  839. rsi_dbg(INFO_ZONE, "Burn Command Pass.. Upgrading the firmware\n");
  840. status = auto_fw_upgrade(adapter, (u8 *)fw_entry->data, content_size);
  841. if (status == 0) {
  842. rsi_dbg(ERR_ZONE, "Firmware upgradation Done\n");
  843. goto load_image_cmd;
  844. }
  845. rsi_dbg(ERR_ZONE, "Firmware upgrade failed\n");
  846. status = bl_cmd(adapter, CONFIG_AUTO_READ_MODE, CMD_PASS,
  847. "AUTO_READ_MODE");
  848. if (status)
  849. goto fail;
  850. success:
  851. rsi_dbg(ERR_ZONE, "***** Firmware Loading successful *****\n");
  852. release_firmware(fw_entry);
  853. return 0;
  854. fail:
  855. rsi_dbg(ERR_ZONE, "##### Firmware loading failed #####\n");
  856. release_firmware(fw_entry);
  857. return status;
  858. }
  859. static int rsi_load_9116_firmware(struct rsi_hw *adapter)
  860. {
  861. struct rsi_common *common = adapter->priv;
  862. struct rsi_host_intf_ops *hif_ops = adapter->host_intf_ops;
  863. const struct firmware *fw_entry;
  864. struct ta_metadata *metadata_p;
  865. u8 *ta_firmware, *fw_p;
  866. struct bootload_ds bootload_ds;
  867. u32 instructions_sz, base_address;
  868. u16 block_size = adapter->block_size;
  869. u32 dest, len;
  870. int status, cnt;
  871. rsi_dbg(INIT_ZONE, "***** Load 9116 TA Instructions *****\n");
  872. if (adapter->rsi_host_intf == RSI_HOST_INTF_USB) {
  873. status = bl_cmd(adapter, POLLING_MODE, CMD_PASS,
  874. "POLLING_MODE");
  875. if (status < 0)
  876. return status;
  877. }
  878. status = hif_ops->master_reg_write(adapter, MEM_ACCESS_CTRL_FROM_HOST,
  879. RAM_384K_ACCESS_FROM_TA,
  880. RSI_9116_REG_SIZE);
  881. if (status < 0) {
  882. rsi_dbg(ERR_ZONE, "%s: Unable to access full RAM memory\n",
  883. __func__);
  884. return status;
  885. }
  886. metadata_p = &metadata[adapter->priv->coex_mode];
  887. rsi_dbg(INIT_ZONE, "%s: loading file %s\n", __func__, metadata_p->name);
  888. status = request_firmware(&fw_entry, metadata_p->name, adapter->device);
  889. if (status < 0) {
  890. rsi_dbg(ERR_ZONE, "%s: Failed to open file %s\n",
  891. __func__, metadata_p->name);
  892. return status;
  893. }
  894. ta_firmware = kmemdup(fw_entry->data, fw_entry->size, GFP_KERNEL);
  895. if (!ta_firmware) {
  896. status = -ENOMEM;
  897. goto fail_release_fw;
  898. }
  899. fw_p = ta_firmware;
  900. instructions_sz = fw_entry->size;
  901. rsi_dbg(INFO_ZONE, "FW Length = %d bytes\n", instructions_sz);
  902. common->lmac_ver.major = ta_firmware[LMAC_VER_OFFSET_9116];
  903. common->lmac_ver.minor = ta_firmware[LMAC_VER_OFFSET_9116 + 1];
  904. common->lmac_ver.release_num = ta_firmware[LMAC_VER_OFFSET_9116 + 2];
  905. common->lmac_ver.patch_num = ta_firmware[LMAC_VER_OFFSET_9116 + 3];
  906. common->lmac_ver.ver.info.fw_ver[0] =
  907. ta_firmware[LMAC_VER_OFFSET_9116 + 4];
  908. if (instructions_sz % FW_ALIGN_SIZE)
  909. instructions_sz +=
  910. (FW_ALIGN_SIZE - (instructions_sz % FW_ALIGN_SIZE));
  911. rsi_dbg(INFO_ZONE, "instructions_sz : %d\n", instructions_sz);
  912. if (*(u16 *)fw_p == RSI_9116_FW_MAGIC_WORD) {
  913. memcpy(&bootload_ds, fw_p, sizeof(struct bootload_ds));
  914. fw_p += le16_to_cpu(bootload_ds.offset);
  915. rsi_dbg(INFO_ZONE, "FW start = %x\n", *(u32 *)fw_p);
  916. cnt = 0;
  917. do {
  918. rsi_dbg(ERR_ZONE, "%s: Loading chunk %d\n",
  919. __func__, cnt);
  920. dest = le32_to_cpu(bootload_ds.bl_entry[cnt].dst_addr);
  921. len = le32_to_cpu(bootload_ds.bl_entry[cnt].control) &
  922. RSI_BL_CTRL_LEN_MASK;
  923. rsi_dbg(INFO_ZONE, "length %d destination %x\n",
  924. len, dest);
  925. status = hif_ops->load_data_master_write(adapter, dest,
  926. len,
  927. block_size,
  928. fw_p);
  929. if (status < 0) {
  930. rsi_dbg(ERR_ZONE,
  931. "Failed to load chunk %d\n", cnt);
  932. break;
  933. }
  934. fw_p += len;
  935. if (le32_to_cpu(bootload_ds.bl_entry[cnt].control) &
  936. RSI_BL_CTRL_LAST_ENTRY)
  937. break;
  938. cnt++;
  939. } while (1);
  940. } else {
  941. base_address = metadata_p->address;
  942. status = hif_ops->load_data_master_write(adapter,
  943. base_address,
  944. instructions_sz,
  945. block_size,
  946. ta_firmware);
  947. }
  948. if (status) {
  949. rsi_dbg(ERR_ZONE,
  950. "%s: Unable to load %s blk\n",
  951. __func__, metadata_p->name);
  952. goto fail_free_fw;
  953. }
  954. rsi_dbg(INIT_ZONE, "%s: Successfully loaded %s instructions\n",
  955. __func__, metadata_p->name);
  956. if (adapter->rsi_host_intf == RSI_HOST_INTF_SDIO) {
  957. if (hif_ops->ta_reset(adapter))
  958. rsi_dbg(ERR_ZONE, "Unable to put ta in reset\n");
  959. } else {
  960. if (bl_cmd(adapter, JUMP_TO_ZERO_PC,
  961. CMD_PASS, "JUMP_TO_ZERO") < 0)
  962. rsi_dbg(INFO_ZONE, "Jump to zero command failed\n");
  963. else
  964. rsi_dbg(INFO_ZONE, "Jump to zero command successful\n");
  965. }
  966. fail_free_fw:
  967. kfree(ta_firmware);
  968. fail_release_fw:
  969. release_firmware(fw_entry);
  970. return status;
  971. }
  972. int rsi_hal_device_init(struct rsi_hw *adapter)
  973. {
  974. struct rsi_common *common = adapter->priv;
  975. int status;
  976. switch (adapter->device_model) {
  977. case RSI_DEV_9113:
  978. status = rsi_hal_prepare_fwload(adapter);
  979. if (status < 0)
  980. return status;
  981. if (rsi_load_9113_firmware(adapter)) {
  982. rsi_dbg(ERR_ZONE,
  983. "%s: Failed to load TA instructions\n",
  984. __func__);
  985. return -EINVAL;
  986. }
  987. break;
  988. case RSI_DEV_9116:
  989. status = rsi_hal_prepare_fwload(adapter);
  990. if (status < 0)
  991. return status;
  992. if (rsi_load_9116_firmware(adapter)) {
  993. rsi_dbg(ERR_ZONE,
  994. "%s: Failed to load firmware to 9116 device\n",
  995. __func__);
  996. return -EINVAL;
  997. }
  998. break;
  999. default:
  1000. return -EINVAL;
  1001. }
  1002. common->fsm_state = FSM_CARD_NOT_READY;
  1003. return 0;
  1004. }
  1005. EXPORT_SYMBOL_GPL(rsi_hal_device_init);