islpci_mgt.c 13 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491
  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (C) 2002 Intersil Americas Inc.
  4. * Copyright 2004 Jens Maurer <Jens.Maurer@gmx.net>
  5. */
  6. #include <linux/netdevice.h>
  7. #include <linux/module.h>
  8. #include <linux/pci.h>
  9. #include <linux/sched.h>
  10. #include <linux/slab.h>
  11. #include <asm/io.h>
  12. #include <linux/if_arp.h>
  13. #include "prismcompat.h"
  14. #include "isl_38xx.h"
  15. #include "islpci_mgt.h"
  16. #include "isl_oid.h" /* additional types and defs for isl38xx fw */
  17. #include "isl_ioctl.h"
  18. #include <net/iw_handler.h>
  19. /******************************************************************************
  20. Global variable definition section
  21. ******************************************************************************/
  22. int pc_debug = VERBOSE;
  23. module_param(pc_debug, int, 0);
  24. /******************************************************************************
  25. Driver general functions
  26. ******************************************************************************/
  27. #if VERBOSE > SHOW_ERROR_MESSAGES
  28. void
  29. display_buffer(char *buffer, int length)
  30. {
  31. if ((pc_debug & SHOW_BUFFER_CONTENTS) == 0)
  32. return;
  33. while (length > 0) {
  34. printk("[%02x]", *buffer & 255);
  35. length--;
  36. buffer++;
  37. }
  38. printk("\n");
  39. }
  40. #endif
  41. /*****************************************************************************
  42. Queue handling for management frames
  43. ******************************************************************************/
  44. /*
  45. * Helper function to create a PIMFOR management frame header.
  46. */
  47. static void
  48. pimfor_encode_header(int operation, u32 oid, u32 length, pimfor_header_t *h)
  49. {
  50. h->version = PIMFOR_VERSION;
  51. h->operation = operation;
  52. h->device_id = PIMFOR_DEV_ID_MHLI_MIB;
  53. h->flags = 0;
  54. h->oid = cpu_to_be32(oid);
  55. h->length = cpu_to_be32(length);
  56. }
  57. /*
  58. * Helper function to analyze a PIMFOR management frame header.
  59. */
  60. static pimfor_header_t *
  61. pimfor_decode_header(void *data, int len)
  62. {
  63. pimfor_header_t *h = data;
  64. while ((void *) h < data + len) {
  65. if (h->flags & PIMFOR_FLAG_LITTLE_ENDIAN) {
  66. le32_to_cpus(&h->oid);
  67. le32_to_cpus(&h->length);
  68. } else {
  69. be32_to_cpus(&h->oid);
  70. be32_to_cpus(&h->length);
  71. }
  72. if (h->oid != OID_INL_TUNNEL)
  73. return h;
  74. h++;
  75. }
  76. return NULL;
  77. }
  78. /*
  79. * Fill the receive queue for management frames with fresh buffers.
  80. */
  81. int
  82. islpci_mgmt_rx_fill(struct net_device *ndev)
  83. {
  84. islpci_private *priv = netdev_priv(ndev);
  85. isl38xx_control_block *cb = /* volatile not needed */
  86. (isl38xx_control_block *) priv->control_block;
  87. u32 curr = le32_to_cpu(cb->driver_curr_frag[ISL38XX_CB_RX_MGMTQ]);
  88. #if VERBOSE > SHOW_ERROR_MESSAGES
  89. DEBUG(SHOW_FUNCTION_CALLS, "islpci_mgmt_rx_fill\n");
  90. #endif
  91. while (curr - priv->index_mgmt_rx < ISL38XX_CB_MGMT_QSIZE) {
  92. u32 index = curr % ISL38XX_CB_MGMT_QSIZE;
  93. struct islpci_membuf *buf = &priv->mgmt_rx[index];
  94. isl38xx_fragment *frag = &cb->rx_data_mgmt[index];
  95. if (buf->mem == NULL) {
  96. buf->mem = kmalloc(MGMT_FRAME_SIZE, GFP_ATOMIC);
  97. if (!buf->mem)
  98. return -ENOMEM;
  99. buf->size = MGMT_FRAME_SIZE;
  100. }
  101. if (buf->pci_addr == 0) {
  102. buf->pci_addr = pci_map_single(priv->pdev, buf->mem,
  103. MGMT_FRAME_SIZE,
  104. PCI_DMA_FROMDEVICE);
  105. if (pci_dma_mapping_error(priv->pdev, buf->pci_addr)) {
  106. printk(KERN_WARNING
  107. "Failed to make memory DMA'able.\n");
  108. return -ENOMEM;
  109. }
  110. }
  111. /* be safe: always reset control block information */
  112. frag->size = cpu_to_le16(MGMT_FRAME_SIZE);
  113. frag->flags = 0;
  114. frag->address = cpu_to_le32(buf->pci_addr);
  115. curr++;
  116. /* The fragment address in the control block must have
  117. * been written before announcing the frame buffer to
  118. * device */
  119. wmb();
  120. cb->driver_curr_frag[ISL38XX_CB_RX_MGMTQ] = cpu_to_le32(curr);
  121. }
  122. return 0;
  123. }
  124. /*
  125. * Create and transmit a management frame using "operation" and "oid",
  126. * with arguments data/length.
  127. * We either return an error and free the frame, or we return 0 and
  128. * islpci_mgt_cleanup_transmit() frees the frame in the tx-done
  129. * interrupt.
  130. */
  131. static int
  132. islpci_mgt_transmit(struct net_device *ndev, int operation, unsigned long oid,
  133. void *data, int length)
  134. {
  135. islpci_private *priv = netdev_priv(ndev);
  136. isl38xx_control_block *cb =
  137. (isl38xx_control_block *) priv->control_block;
  138. void *p;
  139. int err = -EINVAL;
  140. unsigned long flags;
  141. isl38xx_fragment *frag;
  142. struct islpci_membuf buf;
  143. u32 curr_frag;
  144. int index;
  145. int frag_len = length + PIMFOR_HEADER_SIZE;
  146. #if VERBOSE > SHOW_ERROR_MESSAGES
  147. DEBUG(SHOW_FUNCTION_CALLS, "islpci_mgt_transmit\n");
  148. #endif
  149. if (frag_len > MGMT_FRAME_SIZE) {
  150. printk(KERN_DEBUG "%s: mgmt frame too large %d\n",
  151. ndev->name, frag_len);
  152. goto error;
  153. }
  154. err = -ENOMEM;
  155. p = buf.mem = kmalloc(frag_len, GFP_KERNEL);
  156. if (!buf.mem)
  157. goto error;
  158. buf.size = frag_len;
  159. /* create the header directly in the fragment data area */
  160. pimfor_encode_header(operation, oid, length, (pimfor_header_t *) p);
  161. p += PIMFOR_HEADER_SIZE;
  162. if (data)
  163. memcpy(p, data, length);
  164. else
  165. memset(p, 0, length);
  166. #if VERBOSE > SHOW_ERROR_MESSAGES
  167. {
  168. pimfor_header_t *h = buf.mem;
  169. DEBUG(SHOW_PIMFOR_FRAMES,
  170. "PIMFOR: op %i, oid 0x%08lx, device %i, flags 0x%x length 0x%x\n",
  171. h->operation, oid, h->device_id, h->flags, length);
  172. /* display the buffer contents for debugging */
  173. display_buffer((char *) h, sizeof (pimfor_header_t));
  174. display_buffer(p, length);
  175. }
  176. #endif
  177. err = -ENOMEM;
  178. buf.pci_addr = pci_map_single(priv->pdev, buf.mem, frag_len,
  179. PCI_DMA_TODEVICE);
  180. if (pci_dma_mapping_error(priv->pdev, buf.pci_addr)) {
  181. printk(KERN_WARNING "%s: cannot map PCI memory for mgmt\n",
  182. ndev->name);
  183. goto error_free;
  184. }
  185. /* Protect the control block modifications against interrupts. */
  186. spin_lock_irqsave(&priv->slock, flags);
  187. curr_frag = le32_to_cpu(cb->driver_curr_frag[ISL38XX_CB_TX_MGMTQ]);
  188. if (curr_frag - priv->index_mgmt_tx >= ISL38XX_CB_MGMT_QSIZE) {
  189. printk(KERN_WARNING "%s: mgmt tx queue is still full\n",
  190. ndev->name);
  191. goto error_unlock;
  192. }
  193. /* commit the frame to the tx device queue */
  194. index = curr_frag % ISL38XX_CB_MGMT_QSIZE;
  195. priv->mgmt_tx[index] = buf;
  196. frag = &cb->tx_data_mgmt[index];
  197. frag->size = cpu_to_le16(frag_len);
  198. frag->flags = 0; /* for any other than the last fragment, set to 1 */
  199. frag->address = cpu_to_le32(buf.pci_addr);
  200. /* The fragment address in the control block must have
  201. * been written before announcing the frame buffer to
  202. * device */
  203. wmb();
  204. cb->driver_curr_frag[ISL38XX_CB_TX_MGMTQ] = cpu_to_le32(curr_frag + 1);
  205. spin_unlock_irqrestore(&priv->slock, flags);
  206. /* trigger the device */
  207. islpci_trigger(priv);
  208. return 0;
  209. error_unlock:
  210. spin_unlock_irqrestore(&priv->slock, flags);
  211. error_free:
  212. kfree(buf.mem);
  213. error:
  214. return err;
  215. }
  216. /*
  217. * Receive a management frame from the device.
  218. * This can be an arbitrary number of traps, and at most one response
  219. * frame for a previous request sent via islpci_mgt_transmit().
  220. */
  221. int
  222. islpci_mgt_receive(struct net_device *ndev)
  223. {
  224. islpci_private *priv = netdev_priv(ndev);
  225. isl38xx_control_block *cb =
  226. (isl38xx_control_block *) priv->control_block;
  227. u32 curr_frag;
  228. #if VERBOSE > SHOW_ERROR_MESSAGES
  229. DEBUG(SHOW_FUNCTION_CALLS, "islpci_mgt_receive\n");
  230. #endif
  231. /* Only once per interrupt, determine fragment range to
  232. * process. This avoids an endless loop (i.e. lockup) if
  233. * frames come in faster than we can process them. */
  234. curr_frag = le32_to_cpu(cb->device_curr_frag[ISL38XX_CB_RX_MGMTQ]);
  235. barrier();
  236. for (; priv->index_mgmt_rx < curr_frag; priv->index_mgmt_rx++) {
  237. pimfor_header_t *header;
  238. u32 index = priv->index_mgmt_rx % ISL38XX_CB_MGMT_QSIZE;
  239. struct islpci_membuf *buf = &priv->mgmt_rx[index];
  240. u16 frag_len;
  241. int size;
  242. struct islpci_mgmtframe *frame;
  243. /* I have no idea (and no documentation) if flags != 0
  244. * is possible. Drop the frame, reuse the buffer. */
  245. if (le16_to_cpu(cb->rx_data_mgmt[index].flags) != 0) {
  246. printk(KERN_WARNING "%s: unknown flags 0x%04x\n",
  247. ndev->name,
  248. le16_to_cpu(cb->rx_data_mgmt[index].flags));
  249. continue;
  250. }
  251. /* The device only returns the size of the header(s) here. */
  252. frag_len = le16_to_cpu(cb->rx_data_mgmt[index].size);
  253. /*
  254. * We appear to have no way to tell the device the
  255. * size of a receive buffer. Thus, if this check
  256. * triggers, we likely have kernel heap corruption. */
  257. if (frag_len > MGMT_FRAME_SIZE) {
  258. printk(KERN_WARNING
  259. "%s: Bogus packet size of %d (%#x).\n",
  260. ndev->name, frag_len, frag_len);
  261. frag_len = MGMT_FRAME_SIZE;
  262. }
  263. /* Ensure the results of device DMA are visible to the CPU. */
  264. pci_dma_sync_single_for_cpu(priv->pdev, buf->pci_addr,
  265. buf->size, PCI_DMA_FROMDEVICE);
  266. /* Perform endianess conversion for PIMFOR header in-place. */
  267. header = pimfor_decode_header(buf->mem, frag_len);
  268. if (!header) {
  269. printk(KERN_WARNING "%s: no PIMFOR header found\n",
  270. ndev->name);
  271. continue;
  272. }
  273. /* The device ID from the PIMFOR packet received from
  274. * the MVC is always 0. We forward a sensible device_id.
  275. * Not that anyone upstream would care... */
  276. header->device_id = priv->ndev->ifindex;
  277. #if VERBOSE > SHOW_ERROR_MESSAGES
  278. DEBUG(SHOW_PIMFOR_FRAMES,
  279. "PIMFOR: op %i, oid 0x%08x, device %i, flags 0x%x length 0x%x\n",
  280. header->operation, header->oid, header->device_id,
  281. header->flags, header->length);
  282. /* display the buffer contents for debugging */
  283. display_buffer((char *) header, PIMFOR_HEADER_SIZE);
  284. display_buffer((char *) header + PIMFOR_HEADER_SIZE,
  285. header->length);
  286. #endif
  287. /* nobody sends these */
  288. if (header->flags & PIMFOR_FLAG_APPLIC_ORIGIN) {
  289. printk(KERN_DEBUG
  290. "%s: errant PIMFOR application frame\n",
  291. ndev->name);
  292. continue;
  293. }
  294. /* Determine frame size, skipping OID_INL_TUNNEL headers. */
  295. size = PIMFOR_HEADER_SIZE + header->length;
  296. frame = kmalloc(sizeof(struct islpci_mgmtframe) + size,
  297. GFP_ATOMIC);
  298. if (!frame)
  299. continue;
  300. frame->ndev = ndev;
  301. memcpy(&frame->buf, header, size);
  302. frame->header = (pimfor_header_t *) frame->buf;
  303. frame->data = frame->buf + PIMFOR_HEADER_SIZE;
  304. #if VERBOSE > SHOW_ERROR_MESSAGES
  305. DEBUG(SHOW_PIMFOR_FRAMES,
  306. "frame: header: %p, data: %p, size: %d\n",
  307. frame->header, frame->data, size);
  308. #endif
  309. if (header->operation == PIMFOR_OP_TRAP) {
  310. #if VERBOSE > SHOW_ERROR_MESSAGES
  311. printk(KERN_DEBUG
  312. "TRAP: oid 0x%x, device %i, flags 0x%x length %i\n",
  313. header->oid, header->device_id, header->flags,
  314. header->length);
  315. #endif
  316. /* Create work to handle trap out of interrupt
  317. * context. */
  318. INIT_WORK(&frame->ws, prism54_process_trap);
  319. schedule_work(&frame->ws);
  320. } else {
  321. /* Signal the one waiting process that a response
  322. * has been received. */
  323. if ((frame = xchg(&priv->mgmt_received, frame)) != NULL) {
  324. printk(KERN_WARNING
  325. "%s: mgmt response not collected\n",
  326. ndev->name);
  327. kfree(frame);
  328. }
  329. #if VERBOSE > SHOW_ERROR_MESSAGES
  330. DEBUG(SHOW_TRACING, "Wake up Mgmt Queue\n");
  331. #endif
  332. wake_up(&priv->mgmt_wqueue);
  333. }
  334. }
  335. return 0;
  336. }
  337. /*
  338. * Cleanup the transmit queue by freeing all frames handled by the device.
  339. */
  340. void
  341. islpci_mgt_cleanup_transmit(struct net_device *ndev)
  342. {
  343. islpci_private *priv = netdev_priv(ndev);
  344. isl38xx_control_block *cb = /* volatile not needed */
  345. (isl38xx_control_block *) priv->control_block;
  346. u32 curr_frag;
  347. #if VERBOSE > SHOW_ERROR_MESSAGES
  348. DEBUG(SHOW_FUNCTION_CALLS, "islpci_mgt_cleanup_transmit\n");
  349. #endif
  350. /* Only once per cleanup, determine fragment range to
  351. * process. This avoids an endless loop (i.e. lockup) if
  352. * the device became confused, incrementing device_curr_frag
  353. * rapidly. */
  354. curr_frag = le32_to_cpu(cb->device_curr_frag[ISL38XX_CB_TX_MGMTQ]);
  355. barrier();
  356. for (; priv->index_mgmt_tx < curr_frag; priv->index_mgmt_tx++) {
  357. int index = priv->index_mgmt_tx % ISL38XX_CB_MGMT_QSIZE;
  358. struct islpci_membuf *buf = &priv->mgmt_tx[index];
  359. pci_unmap_single(priv->pdev, buf->pci_addr, buf->size,
  360. PCI_DMA_TODEVICE);
  361. buf->pci_addr = 0;
  362. kfree(buf->mem);
  363. buf->mem = NULL;
  364. buf->size = 0;
  365. }
  366. }
  367. /*
  368. * Perform one request-response transaction to the device.
  369. */
  370. int
  371. islpci_mgt_transaction(struct net_device *ndev,
  372. int operation, unsigned long oid,
  373. void *senddata, int sendlen,
  374. struct islpci_mgmtframe **recvframe)
  375. {
  376. islpci_private *priv = netdev_priv(ndev);
  377. const long wait_cycle_jiffies = msecs_to_jiffies(ISL38XX_WAIT_CYCLE * 10);
  378. long timeout_left = ISL38XX_MAX_WAIT_CYCLES * wait_cycle_jiffies;
  379. int err;
  380. DEFINE_WAIT(wait);
  381. *recvframe = NULL;
  382. if (mutex_lock_interruptible(&priv->mgmt_lock))
  383. return -ERESTARTSYS;
  384. prepare_to_wait(&priv->mgmt_wqueue, &wait, TASK_UNINTERRUPTIBLE);
  385. err = islpci_mgt_transmit(ndev, operation, oid, senddata, sendlen);
  386. if (err)
  387. goto out;
  388. err = -ETIMEDOUT;
  389. while (timeout_left > 0) {
  390. int timeleft;
  391. struct islpci_mgmtframe *frame;
  392. timeleft = schedule_timeout_uninterruptible(wait_cycle_jiffies);
  393. frame = xchg(&priv->mgmt_received, NULL);
  394. if (frame) {
  395. if (frame->header->oid == oid) {
  396. *recvframe = frame;
  397. err = 0;
  398. goto out;
  399. } else {
  400. printk(KERN_DEBUG
  401. "%s: expecting oid 0x%x, received 0x%x.\n",
  402. ndev->name, (unsigned int) oid,
  403. frame->header->oid);
  404. kfree(frame);
  405. frame = NULL;
  406. }
  407. }
  408. if (timeleft == 0) {
  409. printk(KERN_DEBUG
  410. "%s: timeout waiting for mgmt response %lu, "
  411. "triggering device\n",
  412. ndev->name, timeout_left);
  413. islpci_trigger(priv);
  414. }
  415. timeout_left += timeleft - wait_cycle_jiffies;
  416. }
  417. printk(KERN_WARNING "%s: timeout waiting for mgmt response\n",
  418. ndev->name);
  419. /* TODO: we should reset the device here */
  420. out:
  421. finish_wait(&priv->mgmt_wqueue, &wait);
  422. mutex_unlock(&priv->mgmt_lock);
  423. return err;
  424. }