lxt.c 6.5 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * drivers/net/phy/lxt.c
  4. *
  5. * Driver for Intel LXT PHYs
  6. *
  7. * Author: Andy Fleming
  8. *
  9. * Copyright (c) 2004 Freescale Semiconductor, Inc.
  10. */
  11. #include <linux/kernel.h>
  12. #include <linux/string.h>
  13. #include <linux/errno.h>
  14. #include <linux/unistd.h>
  15. #include <linux/interrupt.h>
  16. #include <linux/init.h>
  17. #include <linux/delay.h>
  18. #include <linux/netdevice.h>
  19. #include <linux/etherdevice.h>
  20. #include <linux/skbuff.h>
  21. #include <linux/spinlock.h>
  22. #include <linux/mm.h>
  23. #include <linux/module.h>
  24. #include <linux/mii.h>
  25. #include <linux/ethtool.h>
  26. #include <linux/phy.h>
  27. #include <asm/io.h>
  28. #include <asm/irq.h>
  29. #include <linux/uaccess.h>
  30. /* The Level one LXT970 is used by many boards */
  31. #define MII_LXT970_IER 17 /* Interrupt Enable Register */
  32. #define MII_LXT970_IER_IEN 0x0002
  33. #define MII_LXT970_ISR 18 /* Interrupt Status Register */
  34. #define MII_LXT970_CONFIG 19 /* Configuration Register */
  35. /* ------------------------------------------------------------------------- */
  36. /* The Level one LXT971 is used on some of my custom boards */
  37. /* register definitions for the 971 */
  38. #define MII_LXT971_IER 18 /* Interrupt Enable Register */
  39. #define MII_LXT971_IER_IEN 0x00f2
  40. #define MII_LXT971_ISR 19 /* Interrupt Status Register */
  41. /* register definitions for the 973 */
  42. #define MII_LXT973_PCR 16 /* Port Configuration Register */
  43. #define PCR_FIBER_SELECT 1
  44. MODULE_DESCRIPTION("Intel LXT PHY driver");
  45. MODULE_AUTHOR("Andy Fleming");
  46. MODULE_LICENSE("GPL");
  47. static int lxt970_ack_interrupt(struct phy_device *phydev)
  48. {
  49. int err;
  50. err = phy_read(phydev, MII_BMSR);
  51. if (err < 0)
  52. return err;
  53. err = phy_read(phydev, MII_LXT970_ISR);
  54. if (err < 0)
  55. return err;
  56. return 0;
  57. }
  58. static int lxt970_config_intr(struct phy_device *phydev)
  59. {
  60. if (phydev->interrupts == PHY_INTERRUPT_ENABLED)
  61. return phy_write(phydev, MII_LXT970_IER, MII_LXT970_IER_IEN);
  62. else
  63. return phy_write(phydev, MII_LXT970_IER, 0);
  64. }
  65. static int lxt970_config_init(struct phy_device *phydev)
  66. {
  67. return phy_write(phydev, MII_LXT970_CONFIG, 0);
  68. }
  69. static int lxt971_ack_interrupt(struct phy_device *phydev)
  70. {
  71. int err = phy_read(phydev, MII_LXT971_ISR);
  72. if (err < 0)
  73. return err;
  74. return 0;
  75. }
  76. static int lxt971_config_intr(struct phy_device *phydev)
  77. {
  78. if (phydev->interrupts == PHY_INTERRUPT_ENABLED)
  79. return phy_write(phydev, MII_LXT971_IER, MII_LXT971_IER_IEN);
  80. else
  81. return phy_write(phydev, MII_LXT971_IER, 0);
  82. }
  83. /*
  84. * A2 version of LXT973 chip has an ERRATA: it randomly return the contents
  85. * of the previous even register when you read a odd register regularly
  86. */
  87. static int lxt973a2_update_link(struct phy_device *phydev)
  88. {
  89. int status;
  90. int control;
  91. int retry = 8; /* we try 8 times */
  92. /* Do a fake read */
  93. status = phy_read(phydev, MII_BMSR);
  94. if (status < 0)
  95. return status;
  96. control = phy_read(phydev, MII_BMCR);
  97. if (control < 0)
  98. return control;
  99. do {
  100. /* Read link and autonegotiation status */
  101. status = phy_read(phydev, MII_BMSR);
  102. } while (status >= 0 && retry-- && status == control);
  103. if (status < 0)
  104. return status;
  105. if ((status & BMSR_LSTATUS) == 0)
  106. phydev->link = 0;
  107. else
  108. phydev->link = 1;
  109. return 0;
  110. }
  111. static int lxt973a2_read_status(struct phy_device *phydev)
  112. {
  113. int adv;
  114. int err;
  115. int lpa;
  116. /* Update the link, but return if there was an error */
  117. err = lxt973a2_update_link(phydev);
  118. if (err)
  119. return err;
  120. if (AUTONEG_ENABLE == phydev->autoneg) {
  121. int retry = 1;
  122. adv = phy_read(phydev, MII_ADVERTISE);
  123. if (adv < 0)
  124. return adv;
  125. do {
  126. lpa = phy_read(phydev, MII_LPA);
  127. if (lpa < 0)
  128. return lpa;
  129. /* If both registers are equal, it is suspect but not
  130. * impossible, hence a new try
  131. */
  132. } while (lpa == adv && retry--);
  133. mii_lpa_to_linkmode_lpa_t(phydev->lp_advertising, lpa);
  134. lpa &= adv;
  135. phydev->speed = SPEED_10;
  136. phydev->duplex = DUPLEX_HALF;
  137. phydev->pause = phydev->asym_pause = 0;
  138. if (lpa & (LPA_100FULL | LPA_100HALF)) {
  139. phydev->speed = SPEED_100;
  140. if (lpa & LPA_100FULL)
  141. phydev->duplex = DUPLEX_FULL;
  142. } else {
  143. if (lpa & LPA_10FULL)
  144. phydev->duplex = DUPLEX_FULL;
  145. }
  146. if (phydev->duplex == DUPLEX_FULL) {
  147. phydev->pause = lpa & LPA_PAUSE_CAP ? 1 : 0;
  148. phydev->asym_pause = lpa & LPA_PAUSE_ASYM ? 1 : 0;
  149. }
  150. } else {
  151. int bmcr = phy_read(phydev, MII_BMCR);
  152. if (bmcr < 0)
  153. return bmcr;
  154. if (bmcr & BMCR_FULLDPLX)
  155. phydev->duplex = DUPLEX_FULL;
  156. else
  157. phydev->duplex = DUPLEX_HALF;
  158. if (bmcr & BMCR_SPEED1000)
  159. phydev->speed = SPEED_1000;
  160. else if (bmcr & BMCR_SPEED100)
  161. phydev->speed = SPEED_100;
  162. else
  163. phydev->speed = SPEED_10;
  164. phydev->pause = phydev->asym_pause = 0;
  165. linkmode_zero(phydev->lp_advertising);
  166. }
  167. return 0;
  168. }
  169. static int lxt973_probe(struct phy_device *phydev)
  170. {
  171. int val = phy_read(phydev, MII_LXT973_PCR);
  172. if (val & PCR_FIBER_SELECT) {
  173. /*
  174. * If fiber is selected, then the only correct setting
  175. * is 100Mbps, full duplex, and auto negotiation off.
  176. */
  177. val = phy_read(phydev, MII_BMCR);
  178. val |= (BMCR_SPEED100 | BMCR_FULLDPLX);
  179. val &= ~BMCR_ANENABLE;
  180. phy_write(phydev, MII_BMCR, val);
  181. /* Remember that the port is in fiber mode. */
  182. phydev->priv = lxt973_probe;
  183. } else {
  184. phydev->priv = NULL;
  185. }
  186. return 0;
  187. }
  188. static int lxt973_config_aneg(struct phy_device *phydev)
  189. {
  190. /* Do nothing if port is in fiber mode. */
  191. return phydev->priv ? 0 : genphy_config_aneg(phydev);
  192. }
  193. static struct phy_driver lxt97x_driver[] = {
  194. {
  195. .phy_id = 0x78100000,
  196. .name = "LXT970",
  197. .phy_id_mask = 0xfffffff0,
  198. /* PHY_BASIC_FEATURES */
  199. .config_init = lxt970_config_init,
  200. .ack_interrupt = lxt970_ack_interrupt,
  201. .config_intr = lxt970_config_intr,
  202. }, {
  203. .phy_id = 0x001378e0,
  204. .name = "LXT971",
  205. .phy_id_mask = 0xfffffff0,
  206. /* PHY_BASIC_FEATURES */
  207. .ack_interrupt = lxt971_ack_interrupt,
  208. .config_intr = lxt971_config_intr,
  209. .suspend = genphy_suspend,
  210. .resume = genphy_resume,
  211. }, {
  212. .phy_id = 0x00137a10,
  213. .name = "LXT973-A2",
  214. .phy_id_mask = 0xffffffff,
  215. /* PHY_BASIC_FEATURES */
  216. .flags = 0,
  217. .probe = lxt973_probe,
  218. .config_aneg = lxt973_config_aneg,
  219. .read_status = lxt973a2_read_status,
  220. .suspend = genphy_suspend,
  221. .resume = genphy_resume,
  222. }, {
  223. .phy_id = 0x00137a10,
  224. .name = "LXT973",
  225. .phy_id_mask = 0xfffffff0,
  226. /* PHY_BASIC_FEATURES */
  227. .flags = 0,
  228. .probe = lxt973_probe,
  229. .config_aneg = lxt973_config_aneg,
  230. .suspend = genphy_suspend,
  231. .resume = genphy_resume,
  232. } };
  233. module_phy_driver(lxt97x_driver);
  234. static struct mdio_device_id __maybe_unused lxt_tbl[] = {
  235. { 0x78100000, 0xfffffff0 },
  236. { 0x001378e0, 0xfffffff0 },
  237. { 0x00137a10, 0xfffffff0 },
  238. { }
  239. };
  240. MODULE_DEVICE_TABLE(mdio, lxt_tbl);