davicom.c 4.3 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * drivers/net/phy/davicom.c
  4. *
  5. * Driver for Davicom PHYs
  6. *
  7. * Author: Andy Fleming
  8. *
  9. * Copyright (c) 2004 Freescale Semiconductor, Inc.
  10. */
  11. #include <linux/kernel.h>
  12. #include <linux/string.h>
  13. #include <linux/errno.h>
  14. #include <linux/unistd.h>
  15. #include <linux/interrupt.h>
  16. #include <linux/init.h>
  17. #include <linux/delay.h>
  18. #include <linux/netdevice.h>
  19. #include <linux/etherdevice.h>
  20. #include <linux/skbuff.h>
  21. #include <linux/spinlock.h>
  22. #include <linux/mm.h>
  23. #include <linux/module.h>
  24. #include <linux/mii.h>
  25. #include <linux/ethtool.h>
  26. #include <linux/phy.h>
  27. #include <asm/io.h>
  28. #include <asm/irq.h>
  29. #include <linux/uaccess.h>
  30. #define MII_DM9161_SCR 0x10
  31. #define MII_DM9161_SCR_INIT 0x0610
  32. #define MII_DM9161_SCR_RMII 0x0100
  33. /* DM9161 Interrupt Register */
  34. #define MII_DM9161_INTR 0x15
  35. #define MII_DM9161_INTR_PEND 0x8000
  36. #define MII_DM9161_INTR_DPLX_MASK 0x0800
  37. #define MII_DM9161_INTR_SPD_MASK 0x0400
  38. #define MII_DM9161_INTR_LINK_MASK 0x0200
  39. #define MII_DM9161_INTR_MASK 0x0100
  40. #define MII_DM9161_INTR_DPLX_CHANGE 0x0010
  41. #define MII_DM9161_INTR_SPD_CHANGE 0x0008
  42. #define MII_DM9161_INTR_LINK_CHANGE 0x0004
  43. #define MII_DM9161_INTR_INIT 0x0000
  44. #define MII_DM9161_INTR_STOP \
  45. (MII_DM9161_INTR_DPLX_MASK | MII_DM9161_INTR_SPD_MASK \
  46. | MII_DM9161_INTR_LINK_MASK | MII_DM9161_INTR_MASK)
  47. /* DM9161 10BT Configuration/Status */
  48. #define MII_DM9161_10BTCSR 0x12
  49. #define MII_DM9161_10BTCSR_INIT 0x7800
  50. MODULE_DESCRIPTION("Davicom PHY driver");
  51. MODULE_AUTHOR("Andy Fleming");
  52. MODULE_LICENSE("GPL");
  53. #define DM9161_DELAY 1
  54. static int dm9161_config_intr(struct phy_device *phydev)
  55. {
  56. int temp;
  57. temp = phy_read(phydev, MII_DM9161_INTR);
  58. if (temp < 0)
  59. return temp;
  60. if (PHY_INTERRUPT_ENABLED == phydev->interrupts)
  61. temp &= ~(MII_DM9161_INTR_STOP);
  62. else
  63. temp |= MII_DM9161_INTR_STOP;
  64. temp = phy_write(phydev, MII_DM9161_INTR, temp);
  65. return temp;
  66. }
  67. static int dm9161_config_aneg(struct phy_device *phydev)
  68. {
  69. int err;
  70. /* Isolate the PHY */
  71. err = phy_write(phydev, MII_BMCR, BMCR_ISOLATE);
  72. if (err < 0)
  73. return err;
  74. /* Configure the new settings */
  75. err = genphy_config_aneg(phydev);
  76. if (err < 0)
  77. return err;
  78. return 0;
  79. }
  80. static int dm9161_config_init(struct phy_device *phydev)
  81. {
  82. int err, temp;
  83. /* Isolate the PHY */
  84. err = phy_write(phydev, MII_BMCR, BMCR_ISOLATE);
  85. if (err < 0)
  86. return err;
  87. switch (phydev->interface) {
  88. case PHY_INTERFACE_MODE_MII:
  89. temp = MII_DM9161_SCR_INIT;
  90. break;
  91. case PHY_INTERFACE_MODE_RMII:
  92. temp = MII_DM9161_SCR_INIT | MII_DM9161_SCR_RMII;
  93. break;
  94. default:
  95. return -EINVAL;
  96. }
  97. /* Do not bypass the scrambler/descrambler */
  98. err = phy_write(phydev, MII_DM9161_SCR, temp);
  99. if (err < 0)
  100. return err;
  101. /* Clear 10BTCSR to default */
  102. err = phy_write(phydev, MII_DM9161_10BTCSR, MII_DM9161_10BTCSR_INIT);
  103. if (err < 0)
  104. return err;
  105. /* Reconnect the PHY, and enable Autonegotiation */
  106. return phy_write(phydev, MII_BMCR, BMCR_ANENABLE);
  107. }
  108. static int dm9161_ack_interrupt(struct phy_device *phydev)
  109. {
  110. int err = phy_read(phydev, MII_DM9161_INTR);
  111. return (err < 0) ? err : 0;
  112. }
  113. static struct phy_driver dm91xx_driver[] = {
  114. {
  115. .phy_id = 0x0181b880,
  116. .name = "Davicom DM9161E",
  117. .phy_id_mask = 0x0ffffff0,
  118. /* PHY_BASIC_FEATURES */
  119. .config_init = dm9161_config_init,
  120. .config_aneg = dm9161_config_aneg,
  121. .ack_interrupt = dm9161_ack_interrupt,
  122. .config_intr = dm9161_config_intr,
  123. }, {
  124. .phy_id = 0x0181b8b0,
  125. .name = "Davicom DM9161B/C",
  126. .phy_id_mask = 0x0ffffff0,
  127. /* PHY_BASIC_FEATURES */
  128. .config_init = dm9161_config_init,
  129. .config_aneg = dm9161_config_aneg,
  130. .ack_interrupt = dm9161_ack_interrupt,
  131. .config_intr = dm9161_config_intr,
  132. }, {
  133. .phy_id = 0x0181b8a0,
  134. .name = "Davicom DM9161A",
  135. .phy_id_mask = 0x0ffffff0,
  136. /* PHY_BASIC_FEATURES */
  137. .config_init = dm9161_config_init,
  138. .config_aneg = dm9161_config_aneg,
  139. .ack_interrupt = dm9161_ack_interrupt,
  140. .config_intr = dm9161_config_intr,
  141. }, {
  142. .phy_id = 0x00181b80,
  143. .name = "Davicom DM9131",
  144. .phy_id_mask = 0x0ffffff0,
  145. /* PHY_BASIC_FEATURES */
  146. .ack_interrupt = dm9161_ack_interrupt,
  147. .config_intr = dm9161_config_intr,
  148. } };
  149. module_phy_driver(dm91xx_driver);
  150. static struct mdio_device_id __maybe_unused davicom_tbl[] = {
  151. { 0x0181b880, 0x0ffffff0 },
  152. { 0x0181b8b0, 0x0ffffff0 },
  153. { 0x0181b8a0, 0x0ffffff0 },
  154. { 0x00181b80, 0x0ffffff0 },
  155. { }
  156. };
  157. MODULE_DEVICE_TABLE(mdio, davicom_tbl);