rrunner.c 41 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * rrunner.c: Linux driver for the Essential RoadRunner HIPPI board.
  4. *
  5. * Copyright (C) 1998-2002 by Jes Sorensen, <jes@wildopensource.com>.
  6. *
  7. * Thanks to Essential Communication for providing us with hardware
  8. * and very comprehensive documentation without which I would not have
  9. * been able to write this driver. A special thank you to John Gibbon
  10. * for sorting out the legal issues, with the NDA, allowing the code to
  11. * be released under the GPL.
  12. *
  13. * Thanks to Jayaram Bhat from ODS/Essential for fixing some of the
  14. * stupid bugs in my code.
  15. *
  16. * Softnet support and various other patches from Val Henson of
  17. * ODS/Essential.
  18. *
  19. * PCI DMA mapping code partly based on work by Francois Romieu.
  20. */
  21. #define DEBUG 1
  22. #define RX_DMA_SKBUFF 1
  23. #define PKT_COPY_THRESHOLD 512
  24. #include <linux/module.h>
  25. #include <linux/types.h>
  26. #include <linux/errno.h>
  27. #include <linux/ioport.h>
  28. #include <linux/pci.h>
  29. #include <linux/kernel.h>
  30. #include <linux/netdevice.h>
  31. #include <linux/hippidevice.h>
  32. #include <linux/skbuff.h>
  33. #include <linux/delay.h>
  34. #include <linux/mm.h>
  35. #include <linux/slab.h>
  36. #include <net/sock.h>
  37. #include <asm/cache.h>
  38. #include <asm/byteorder.h>
  39. #include <asm/io.h>
  40. #include <asm/irq.h>
  41. #include <linux/uaccess.h>
  42. #define rr_if_busy(dev) netif_queue_stopped(dev)
  43. #define rr_if_running(dev) netif_running(dev)
  44. #include "rrunner.h"
  45. #define RUN_AT(x) (jiffies + (x))
  46. MODULE_AUTHOR("Jes Sorensen <jes@wildopensource.com>");
  47. MODULE_DESCRIPTION("Essential RoadRunner HIPPI driver");
  48. MODULE_LICENSE("GPL");
  49. static const char version[] =
  50. "rrunner.c: v0.50 11/11/2002 Jes Sorensen (jes@wildopensource.com)\n";
  51. static const struct net_device_ops rr_netdev_ops = {
  52. .ndo_open = rr_open,
  53. .ndo_stop = rr_close,
  54. .ndo_do_ioctl = rr_ioctl,
  55. .ndo_start_xmit = rr_start_xmit,
  56. .ndo_set_mac_address = hippi_mac_addr,
  57. };
  58. /*
  59. * Implementation notes:
  60. *
  61. * The DMA engine only allows for DMA within physical 64KB chunks of
  62. * memory. The current approach of the driver (and stack) is to use
  63. * linear blocks of memory for the skbuffs. However, as the data block
  64. * is always the first part of the skb and skbs are 2^n aligned so we
  65. * are guarantted to get the whole block within one 64KB align 64KB
  66. * chunk.
  67. *
  68. * On the long term, relying on being able to allocate 64KB linear
  69. * chunks of memory is not feasible and the skb handling code and the
  70. * stack will need to know about I/O vectors or something similar.
  71. */
  72. static int rr_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
  73. {
  74. struct net_device *dev;
  75. static int version_disp;
  76. u8 pci_latency;
  77. struct rr_private *rrpriv;
  78. void *tmpptr;
  79. dma_addr_t ring_dma;
  80. int ret = -ENOMEM;
  81. dev = alloc_hippi_dev(sizeof(struct rr_private));
  82. if (!dev)
  83. goto out3;
  84. ret = pci_enable_device(pdev);
  85. if (ret) {
  86. ret = -ENODEV;
  87. goto out2;
  88. }
  89. rrpriv = netdev_priv(dev);
  90. SET_NETDEV_DEV(dev, &pdev->dev);
  91. ret = pci_request_regions(pdev, "rrunner");
  92. if (ret < 0)
  93. goto out;
  94. pci_set_drvdata(pdev, dev);
  95. rrpriv->pci_dev = pdev;
  96. spin_lock_init(&rrpriv->lock);
  97. dev->netdev_ops = &rr_netdev_ops;
  98. /* display version info if adapter is found */
  99. if (!version_disp) {
  100. /* set display flag to TRUE so that */
  101. /* we only display this string ONCE */
  102. version_disp = 1;
  103. printk(version);
  104. }
  105. pci_read_config_byte(pdev, PCI_LATENCY_TIMER, &pci_latency);
  106. if (pci_latency <= 0x58){
  107. pci_latency = 0x58;
  108. pci_write_config_byte(pdev, PCI_LATENCY_TIMER, pci_latency);
  109. }
  110. pci_set_master(pdev);
  111. printk(KERN_INFO "%s: Essential RoadRunner serial HIPPI "
  112. "at 0x%llx, irq %i, PCI latency %i\n", dev->name,
  113. (unsigned long long)pci_resource_start(pdev, 0),
  114. pdev->irq, pci_latency);
  115. /*
  116. * Remap the MMIO regs into kernel space.
  117. */
  118. rrpriv->regs = pci_iomap(pdev, 0, 0x1000);
  119. if (!rrpriv->regs) {
  120. printk(KERN_ERR "%s: Unable to map I/O register, "
  121. "RoadRunner will be disabled.\n", dev->name);
  122. ret = -EIO;
  123. goto out;
  124. }
  125. tmpptr = pci_alloc_consistent(pdev, TX_TOTAL_SIZE, &ring_dma);
  126. rrpriv->tx_ring = tmpptr;
  127. rrpriv->tx_ring_dma = ring_dma;
  128. if (!tmpptr) {
  129. ret = -ENOMEM;
  130. goto out;
  131. }
  132. tmpptr = pci_alloc_consistent(pdev, RX_TOTAL_SIZE, &ring_dma);
  133. rrpriv->rx_ring = tmpptr;
  134. rrpriv->rx_ring_dma = ring_dma;
  135. if (!tmpptr) {
  136. ret = -ENOMEM;
  137. goto out;
  138. }
  139. tmpptr = pci_alloc_consistent(pdev, EVT_RING_SIZE, &ring_dma);
  140. rrpriv->evt_ring = tmpptr;
  141. rrpriv->evt_ring_dma = ring_dma;
  142. if (!tmpptr) {
  143. ret = -ENOMEM;
  144. goto out;
  145. }
  146. /*
  147. * Don't access any register before this point!
  148. */
  149. #ifdef __BIG_ENDIAN
  150. writel(readl(&rrpriv->regs->HostCtrl) | NO_SWAP,
  151. &rrpriv->regs->HostCtrl);
  152. #endif
  153. /*
  154. * Need to add a case for little-endian 64-bit hosts here.
  155. */
  156. rr_init(dev);
  157. ret = register_netdev(dev);
  158. if (ret)
  159. goto out;
  160. return 0;
  161. out:
  162. if (rrpriv->evt_ring)
  163. pci_free_consistent(pdev, EVT_RING_SIZE, rrpriv->evt_ring,
  164. rrpriv->evt_ring_dma);
  165. if (rrpriv->rx_ring)
  166. pci_free_consistent(pdev, RX_TOTAL_SIZE, rrpriv->rx_ring,
  167. rrpriv->rx_ring_dma);
  168. if (rrpriv->tx_ring)
  169. pci_free_consistent(pdev, TX_TOTAL_SIZE, rrpriv->tx_ring,
  170. rrpriv->tx_ring_dma);
  171. if (rrpriv->regs)
  172. pci_iounmap(pdev, rrpriv->regs);
  173. if (pdev)
  174. pci_release_regions(pdev);
  175. out2:
  176. free_netdev(dev);
  177. out3:
  178. return ret;
  179. }
  180. static void rr_remove_one(struct pci_dev *pdev)
  181. {
  182. struct net_device *dev = pci_get_drvdata(pdev);
  183. struct rr_private *rr = netdev_priv(dev);
  184. if (!(readl(&rr->regs->HostCtrl) & NIC_HALTED)) {
  185. printk(KERN_ERR "%s: trying to unload running NIC\n",
  186. dev->name);
  187. writel(HALT_NIC, &rr->regs->HostCtrl);
  188. }
  189. unregister_netdev(dev);
  190. pci_free_consistent(pdev, EVT_RING_SIZE, rr->evt_ring,
  191. rr->evt_ring_dma);
  192. pci_free_consistent(pdev, RX_TOTAL_SIZE, rr->rx_ring,
  193. rr->rx_ring_dma);
  194. pci_free_consistent(pdev, TX_TOTAL_SIZE, rr->tx_ring,
  195. rr->tx_ring_dma);
  196. pci_iounmap(pdev, rr->regs);
  197. pci_release_regions(pdev);
  198. pci_disable_device(pdev);
  199. free_netdev(dev);
  200. }
  201. /*
  202. * Commands are considered to be slow, thus there is no reason to
  203. * inline this.
  204. */
  205. static void rr_issue_cmd(struct rr_private *rrpriv, struct cmd *cmd)
  206. {
  207. struct rr_regs __iomem *regs;
  208. u32 idx;
  209. regs = rrpriv->regs;
  210. /*
  211. * This is temporary - it will go away in the final version.
  212. * We probably also want to make this function inline.
  213. */
  214. if (readl(&regs->HostCtrl) & NIC_HALTED){
  215. printk("issuing command for halted NIC, code 0x%x, "
  216. "HostCtrl %08x\n", cmd->code, readl(&regs->HostCtrl));
  217. if (readl(&regs->Mode) & FATAL_ERR)
  218. printk("error codes Fail1 %02x, Fail2 %02x\n",
  219. readl(&regs->Fail1), readl(&regs->Fail2));
  220. }
  221. idx = rrpriv->info->cmd_ctrl.pi;
  222. writel(*(u32*)(cmd), &regs->CmdRing[idx]);
  223. wmb();
  224. idx = (idx - 1) % CMD_RING_ENTRIES;
  225. rrpriv->info->cmd_ctrl.pi = idx;
  226. wmb();
  227. if (readl(&regs->Mode) & FATAL_ERR)
  228. printk("error code %02x\n", readl(&regs->Fail1));
  229. }
  230. /*
  231. * Reset the board in a sensible manner. The NIC is already halted
  232. * when we get here and a spin-lock is held.
  233. */
  234. static int rr_reset(struct net_device *dev)
  235. {
  236. struct rr_private *rrpriv;
  237. struct rr_regs __iomem *regs;
  238. u32 start_pc;
  239. int i;
  240. rrpriv = netdev_priv(dev);
  241. regs = rrpriv->regs;
  242. rr_load_firmware(dev);
  243. writel(0x01000000, &regs->TX_state);
  244. writel(0xff800000, &regs->RX_state);
  245. writel(0, &regs->AssistState);
  246. writel(CLEAR_INTA, &regs->LocalCtrl);
  247. writel(0x01, &regs->BrkPt);
  248. writel(0, &regs->Timer);
  249. writel(0, &regs->TimerRef);
  250. writel(RESET_DMA, &regs->DmaReadState);
  251. writel(RESET_DMA, &regs->DmaWriteState);
  252. writel(0, &regs->DmaWriteHostHi);
  253. writel(0, &regs->DmaWriteHostLo);
  254. writel(0, &regs->DmaReadHostHi);
  255. writel(0, &regs->DmaReadHostLo);
  256. writel(0, &regs->DmaReadLen);
  257. writel(0, &regs->DmaWriteLen);
  258. writel(0, &regs->DmaWriteLcl);
  259. writel(0, &regs->DmaWriteIPchecksum);
  260. writel(0, &regs->DmaReadLcl);
  261. writel(0, &regs->DmaReadIPchecksum);
  262. writel(0, &regs->PciState);
  263. #if (BITS_PER_LONG == 64) && defined __LITTLE_ENDIAN
  264. writel(SWAP_DATA | PTR64BIT | PTR_WD_SWAP, &regs->Mode);
  265. #elif (BITS_PER_LONG == 64)
  266. writel(SWAP_DATA | PTR64BIT | PTR_WD_NOSWAP, &regs->Mode);
  267. #else
  268. writel(SWAP_DATA | PTR32BIT | PTR_WD_NOSWAP, &regs->Mode);
  269. #endif
  270. #if 0
  271. /*
  272. * Don't worry, this is just black magic.
  273. */
  274. writel(0xdf000, &regs->RxBase);
  275. writel(0xdf000, &regs->RxPrd);
  276. writel(0xdf000, &regs->RxCon);
  277. writel(0xce000, &regs->TxBase);
  278. writel(0xce000, &regs->TxPrd);
  279. writel(0xce000, &regs->TxCon);
  280. writel(0, &regs->RxIndPro);
  281. writel(0, &regs->RxIndCon);
  282. writel(0, &regs->RxIndRef);
  283. writel(0, &regs->TxIndPro);
  284. writel(0, &regs->TxIndCon);
  285. writel(0, &regs->TxIndRef);
  286. writel(0xcc000, &regs->pad10[0]);
  287. writel(0, &regs->DrCmndPro);
  288. writel(0, &regs->DrCmndCon);
  289. writel(0, &regs->DwCmndPro);
  290. writel(0, &regs->DwCmndCon);
  291. writel(0, &regs->DwCmndRef);
  292. writel(0, &regs->DrDataPro);
  293. writel(0, &regs->DrDataCon);
  294. writel(0, &regs->DrDataRef);
  295. writel(0, &regs->DwDataPro);
  296. writel(0, &regs->DwDataCon);
  297. writel(0, &regs->DwDataRef);
  298. #endif
  299. writel(0xffffffff, &regs->MbEvent);
  300. writel(0, &regs->Event);
  301. writel(0, &regs->TxPi);
  302. writel(0, &regs->IpRxPi);
  303. writel(0, &regs->EvtCon);
  304. writel(0, &regs->EvtPrd);
  305. rrpriv->info->evt_ctrl.pi = 0;
  306. for (i = 0; i < CMD_RING_ENTRIES; i++)
  307. writel(0, &regs->CmdRing[i]);
  308. /*
  309. * Why 32 ? is this not cache line size dependent?
  310. */
  311. writel(RBURST_64|WBURST_64, &regs->PciState);
  312. wmb();
  313. start_pc = rr_read_eeprom_word(rrpriv,
  314. offsetof(struct eeprom, rncd_info.FwStart));
  315. #if (DEBUG > 1)
  316. printk("%s: Executing firmware at address 0x%06x\n",
  317. dev->name, start_pc);
  318. #endif
  319. writel(start_pc + 0x800, &regs->Pc);
  320. wmb();
  321. udelay(5);
  322. writel(start_pc, &regs->Pc);
  323. wmb();
  324. return 0;
  325. }
  326. /*
  327. * Read a string from the EEPROM.
  328. */
  329. static unsigned int rr_read_eeprom(struct rr_private *rrpriv,
  330. unsigned long offset,
  331. unsigned char *buf,
  332. unsigned long length)
  333. {
  334. struct rr_regs __iomem *regs = rrpriv->regs;
  335. u32 misc, io, host, i;
  336. io = readl(&regs->ExtIo);
  337. writel(0, &regs->ExtIo);
  338. misc = readl(&regs->LocalCtrl);
  339. writel(0, &regs->LocalCtrl);
  340. host = readl(&regs->HostCtrl);
  341. writel(host | HALT_NIC, &regs->HostCtrl);
  342. mb();
  343. for (i = 0; i < length; i++){
  344. writel((EEPROM_BASE + ((offset+i) << 3)), &regs->WinBase);
  345. mb();
  346. buf[i] = (readl(&regs->WinData) >> 24) & 0xff;
  347. mb();
  348. }
  349. writel(host, &regs->HostCtrl);
  350. writel(misc, &regs->LocalCtrl);
  351. writel(io, &regs->ExtIo);
  352. mb();
  353. return i;
  354. }
  355. /*
  356. * Shortcut to read one word (4 bytes) out of the EEPROM and convert
  357. * it to our CPU byte-order.
  358. */
  359. static u32 rr_read_eeprom_word(struct rr_private *rrpriv,
  360. size_t offset)
  361. {
  362. __be32 word;
  363. if ((rr_read_eeprom(rrpriv, offset,
  364. (unsigned char *)&word, 4) == 4))
  365. return be32_to_cpu(word);
  366. return 0;
  367. }
  368. /*
  369. * Write a string to the EEPROM.
  370. *
  371. * This is only called when the firmware is not running.
  372. */
  373. static unsigned int write_eeprom(struct rr_private *rrpriv,
  374. unsigned long offset,
  375. unsigned char *buf,
  376. unsigned long length)
  377. {
  378. struct rr_regs __iomem *regs = rrpriv->regs;
  379. u32 misc, io, data, i, j, ready, error = 0;
  380. io = readl(&regs->ExtIo);
  381. writel(0, &regs->ExtIo);
  382. misc = readl(&regs->LocalCtrl);
  383. writel(ENABLE_EEPROM_WRITE, &regs->LocalCtrl);
  384. mb();
  385. for (i = 0; i < length; i++){
  386. writel((EEPROM_BASE + ((offset+i) << 3)), &regs->WinBase);
  387. mb();
  388. data = buf[i] << 24;
  389. /*
  390. * Only try to write the data if it is not the same
  391. * value already.
  392. */
  393. if ((readl(&regs->WinData) & 0xff000000) != data){
  394. writel(data, &regs->WinData);
  395. ready = 0;
  396. j = 0;
  397. mb();
  398. while(!ready){
  399. udelay(20);
  400. if ((readl(&regs->WinData) & 0xff000000) ==
  401. data)
  402. ready = 1;
  403. mb();
  404. if (j++ > 5000){
  405. printk("data mismatch: %08x, "
  406. "WinData %08x\n", data,
  407. readl(&regs->WinData));
  408. ready = 1;
  409. error = 1;
  410. }
  411. }
  412. }
  413. }
  414. writel(misc, &regs->LocalCtrl);
  415. writel(io, &regs->ExtIo);
  416. mb();
  417. return error;
  418. }
  419. static int rr_init(struct net_device *dev)
  420. {
  421. struct rr_private *rrpriv;
  422. struct rr_regs __iomem *regs;
  423. u32 sram_size, rev;
  424. rrpriv = netdev_priv(dev);
  425. regs = rrpriv->regs;
  426. rev = readl(&regs->FwRev);
  427. rrpriv->fw_rev = rev;
  428. if (rev > 0x00020024)
  429. printk(" Firmware revision: %i.%i.%i\n", (rev >> 16),
  430. ((rev >> 8) & 0xff), (rev & 0xff));
  431. else if (rev >= 0x00020000) {
  432. printk(" Firmware revision: %i.%i.%i (2.0.37 or "
  433. "later is recommended)\n", (rev >> 16),
  434. ((rev >> 8) & 0xff), (rev & 0xff));
  435. }else{
  436. printk(" Firmware revision too old: %i.%i.%i, please "
  437. "upgrade to 2.0.37 or later.\n",
  438. (rev >> 16), ((rev >> 8) & 0xff), (rev & 0xff));
  439. }
  440. #if (DEBUG > 2)
  441. printk(" Maximum receive rings %i\n", readl(&regs->MaxRxRng));
  442. #endif
  443. /*
  444. * Read the hardware address from the eeprom. The HW address
  445. * is not really necessary for HIPPI but awfully convenient.
  446. * The pointer arithmetic to put it in dev_addr is ugly, but
  447. * Donald Becker does it this way for the GigE version of this
  448. * card and it's shorter and more portable than any
  449. * other method I've seen. -VAL
  450. */
  451. *(__be16 *)(dev->dev_addr) =
  452. htons(rr_read_eeprom_word(rrpriv, offsetof(struct eeprom, manf.BoardULA)));
  453. *(__be32 *)(dev->dev_addr+2) =
  454. htonl(rr_read_eeprom_word(rrpriv, offsetof(struct eeprom, manf.BoardULA[4])));
  455. printk(" MAC: %pM\n", dev->dev_addr);
  456. sram_size = rr_read_eeprom_word(rrpriv, 8);
  457. printk(" SRAM size 0x%06x\n", sram_size);
  458. return 0;
  459. }
  460. static int rr_init1(struct net_device *dev)
  461. {
  462. struct rr_private *rrpriv;
  463. struct rr_regs __iomem *regs;
  464. unsigned long myjif, flags;
  465. struct cmd cmd;
  466. u32 hostctrl;
  467. int ecode = 0;
  468. short i;
  469. rrpriv = netdev_priv(dev);
  470. regs = rrpriv->regs;
  471. spin_lock_irqsave(&rrpriv->lock, flags);
  472. hostctrl = readl(&regs->HostCtrl);
  473. writel(hostctrl | HALT_NIC | RR_CLEAR_INT, &regs->HostCtrl);
  474. wmb();
  475. if (hostctrl & PARITY_ERR){
  476. printk("%s: Parity error halting NIC - this is serious!\n",
  477. dev->name);
  478. spin_unlock_irqrestore(&rrpriv->lock, flags);
  479. ecode = -EFAULT;
  480. goto error;
  481. }
  482. set_rxaddr(regs, rrpriv->rx_ctrl_dma);
  483. set_infoaddr(regs, rrpriv->info_dma);
  484. rrpriv->info->evt_ctrl.entry_size = sizeof(struct event);
  485. rrpriv->info->evt_ctrl.entries = EVT_RING_ENTRIES;
  486. rrpriv->info->evt_ctrl.mode = 0;
  487. rrpriv->info->evt_ctrl.pi = 0;
  488. set_rraddr(&rrpriv->info->evt_ctrl.rngptr, rrpriv->evt_ring_dma);
  489. rrpriv->info->cmd_ctrl.entry_size = sizeof(struct cmd);
  490. rrpriv->info->cmd_ctrl.entries = CMD_RING_ENTRIES;
  491. rrpriv->info->cmd_ctrl.mode = 0;
  492. rrpriv->info->cmd_ctrl.pi = 15;
  493. for (i = 0; i < CMD_RING_ENTRIES; i++) {
  494. writel(0, &regs->CmdRing[i]);
  495. }
  496. for (i = 0; i < TX_RING_ENTRIES; i++) {
  497. rrpriv->tx_ring[i].size = 0;
  498. set_rraddr(&rrpriv->tx_ring[i].addr, 0);
  499. rrpriv->tx_skbuff[i] = NULL;
  500. }
  501. rrpriv->info->tx_ctrl.entry_size = sizeof(struct tx_desc);
  502. rrpriv->info->tx_ctrl.entries = TX_RING_ENTRIES;
  503. rrpriv->info->tx_ctrl.mode = 0;
  504. rrpriv->info->tx_ctrl.pi = 0;
  505. set_rraddr(&rrpriv->info->tx_ctrl.rngptr, rrpriv->tx_ring_dma);
  506. /*
  507. * Set dirty_tx before we start receiving interrupts, otherwise
  508. * the interrupt handler might think it is supposed to process
  509. * tx ints before we are up and running, which may cause a null
  510. * pointer access in the int handler.
  511. */
  512. rrpriv->tx_full = 0;
  513. rrpriv->cur_rx = 0;
  514. rrpriv->dirty_rx = rrpriv->dirty_tx = 0;
  515. rr_reset(dev);
  516. /* Tuning values */
  517. writel(0x5000, &regs->ConRetry);
  518. writel(0x100, &regs->ConRetryTmr);
  519. writel(0x500000, &regs->ConTmout);
  520. writel(0x60, &regs->IntrTmr);
  521. writel(0x500000, &regs->TxDataMvTimeout);
  522. writel(0x200000, &regs->RxDataMvTimeout);
  523. writel(0x80, &regs->WriteDmaThresh);
  524. writel(0x80, &regs->ReadDmaThresh);
  525. rrpriv->fw_running = 0;
  526. wmb();
  527. hostctrl &= ~(HALT_NIC | INVALID_INST_B | PARITY_ERR);
  528. writel(hostctrl, &regs->HostCtrl);
  529. wmb();
  530. spin_unlock_irqrestore(&rrpriv->lock, flags);
  531. for (i = 0; i < RX_RING_ENTRIES; i++) {
  532. struct sk_buff *skb;
  533. dma_addr_t addr;
  534. rrpriv->rx_ring[i].mode = 0;
  535. skb = alloc_skb(dev->mtu + HIPPI_HLEN, GFP_ATOMIC);
  536. if (!skb) {
  537. printk(KERN_WARNING "%s: Unable to allocate memory "
  538. "for receive ring - halting NIC\n", dev->name);
  539. ecode = -ENOMEM;
  540. goto error;
  541. }
  542. rrpriv->rx_skbuff[i] = skb;
  543. addr = pci_map_single(rrpriv->pci_dev, skb->data,
  544. dev->mtu + HIPPI_HLEN, PCI_DMA_FROMDEVICE);
  545. /*
  546. * Sanity test to see if we conflict with the DMA
  547. * limitations of the Roadrunner.
  548. */
  549. if ((((unsigned long)skb->data) & 0xfff) > ~65320)
  550. printk("skb alloc error\n");
  551. set_rraddr(&rrpriv->rx_ring[i].addr, addr);
  552. rrpriv->rx_ring[i].size = dev->mtu + HIPPI_HLEN;
  553. }
  554. rrpriv->rx_ctrl[4].entry_size = sizeof(struct rx_desc);
  555. rrpriv->rx_ctrl[4].entries = RX_RING_ENTRIES;
  556. rrpriv->rx_ctrl[4].mode = 8;
  557. rrpriv->rx_ctrl[4].pi = 0;
  558. wmb();
  559. set_rraddr(&rrpriv->rx_ctrl[4].rngptr, rrpriv->rx_ring_dma);
  560. udelay(1000);
  561. /*
  562. * Now start the FirmWare.
  563. */
  564. cmd.code = C_START_FW;
  565. cmd.ring = 0;
  566. cmd.index = 0;
  567. rr_issue_cmd(rrpriv, &cmd);
  568. /*
  569. * Give the FirmWare time to chew on the `get running' command.
  570. */
  571. myjif = jiffies + 5 * HZ;
  572. while (time_before(jiffies, myjif) && !rrpriv->fw_running)
  573. cpu_relax();
  574. netif_start_queue(dev);
  575. return ecode;
  576. error:
  577. /*
  578. * We might have gotten here because we are out of memory,
  579. * make sure we release everything we allocated before failing
  580. */
  581. for (i = 0; i < RX_RING_ENTRIES; i++) {
  582. struct sk_buff *skb = rrpriv->rx_skbuff[i];
  583. if (skb) {
  584. pci_unmap_single(rrpriv->pci_dev,
  585. rrpriv->rx_ring[i].addr.addrlo,
  586. dev->mtu + HIPPI_HLEN,
  587. PCI_DMA_FROMDEVICE);
  588. rrpriv->rx_ring[i].size = 0;
  589. set_rraddr(&rrpriv->rx_ring[i].addr, 0);
  590. dev_kfree_skb(skb);
  591. rrpriv->rx_skbuff[i] = NULL;
  592. }
  593. }
  594. return ecode;
  595. }
  596. /*
  597. * All events are considered to be slow (RX/TX ints do not generate
  598. * events) and are handled here, outside the main interrupt handler,
  599. * to reduce the size of the handler.
  600. */
  601. static u32 rr_handle_event(struct net_device *dev, u32 prodidx, u32 eidx)
  602. {
  603. struct rr_private *rrpriv;
  604. struct rr_regs __iomem *regs;
  605. u32 tmp;
  606. rrpriv = netdev_priv(dev);
  607. regs = rrpriv->regs;
  608. while (prodidx != eidx){
  609. switch (rrpriv->evt_ring[eidx].code){
  610. case E_NIC_UP:
  611. tmp = readl(&regs->FwRev);
  612. printk(KERN_INFO "%s: Firmware revision %i.%i.%i "
  613. "up and running\n", dev->name,
  614. (tmp >> 16), ((tmp >> 8) & 0xff), (tmp & 0xff));
  615. rrpriv->fw_running = 1;
  616. writel(RX_RING_ENTRIES - 1, &regs->IpRxPi);
  617. wmb();
  618. break;
  619. case E_LINK_ON:
  620. printk(KERN_INFO "%s: Optical link ON\n", dev->name);
  621. break;
  622. case E_LINK_OFF:
  623. printk(KERN_INFO "%s: Optical link OFF\n", dev->name);
  624. break;
  625. case E_RX_IDLE:
  626. printk(KERN_WARNING "%s: RX data not moving\n",
  627. dev->name);
  628. goto drop;
  629. case E_WATCHDOG:
  630. printk(KERN_INFO "%s: The watchdog is here to see "
  631. "us\n", dev->name);
  632. break;
  633. case E_INTERN_ERR:
  634. printk(KERN_ERR "%s: HIPPI Internal NIC error\n",
  635. dev->name);
  636. writel(readl(&regs->HostCtrl)|HALT_NIC|RR_CLEAR_INT,
  637. &regs->HostCtrl);
  638. wmb();
  639. break;
  640. case E_HOST_ERR:
  641. printk(KERN_ERR "%s: Host software error\n",
  642. dev->name);
  643. writel(readl(&regs->HostCtrl)|HALT_NIC|RR_CLEAR_INT,
  644. &regs->HostCtrl);
  645. wmb();
  646. break;
  647. /*
  648. * TX events.
  649. */
  650. case E_CON_REJ:
  651. printk(KERN_WARNING "%s: Connection rejected\n",
  652. dev->name);
  653. dev->stats.tx_aborted_errors++;
  654. break;
  655. case E_CON_TMOUT:
  656. printk(KERN_WARNING "%s: Connection timeout\n",
  657. dev->name);
  658. break;
  659. case E_DISC_ERR:
  660. printk(KERN_WARNING "%s: HIPPI disconnect error\n",
  661. dev->name);
  662. dev->stats.tx_aborted_errors++;
  663. break;
  664. case E_INT_PRTY:
  665. printk(KERN_ERR "%s: HIPPI Internal Parity error\n",
  666. dev->name);
  667. writel(readl(&regs->HostCtrl)|HALT_NIC|RR_CLEAR_INT,
  668. &regs->HostCtrl);
  669. wmb();
  670. break;
  671. case E_TX_IDLE:
  672. printk(KERN_WARNING "%s: Transmitter idle\n",
  673. dev->name);
  674. break;
  675. case E_TX_LINK_DROP:
  676. printk(KERN_WARNING "%s: Link lost during transmit\n",
  677. dev->name);
  678. dev->stats.tx_aborted_errors++;
  679. writel(readl(&regs->HostCtrl)|HALT_NIC|RR_CLEAR_INT,
  680. &regs->HostCtrl);
  681. wmb();
  682. break;
  683. case E_TX_INV_RNG:
  684. printk(KERN_ERR "%s: Invalid send ring block\n",
  685. dev->name);
  686. writel(readl(&regs->HostCtrl)|HALT_NIC|RR_CLEAR_INT,
  687. &regs->HostCtrl);
  688. wmb();
  689. break;
  690. case E_TX_INV_BUF:
  691. printk(KERN_ERR "%s: Invalid send buffer address\n",
  692. dev->name);
  693. writel(readl(&regs->HostCtrl)|HALT_NIC|RR_CLEAR_INT,
  694. &regs->HostCtrl);
  695. wmb();
  696. break;
  697. case E_TX_INV_DSC:
  698. printk(KERN_ERR "%s: Invalid descriptor address\n",
  699. dev->name);
  700. writel(readl(&regs->HostCtrl)|HALT_NIC|RR_CLEAR_INT,
  701. &regs->HostCtrl);
  702. wmb();
  703. break;
  704. /*
  705. * RX events.
  706. */
  707. case E_RX_RNG_OUT:
  708. printk(KERN_INFO "%s: Receive ring full\n", dev->name);
  709. break;
  710. case E_RX_PAR_ERR:
  711. printk(KERN_WARNING "%s: Receive parity error\n",
  712. dev->name);
  713. goto drop;
  714. case E_RX_LLRC_ERR:
  715. printk(KERN_WARNING "%s: Receive LLRC error\n",
  716. dev->name);
  717. goto drop;
  718. case E_PKT_LN_ERR:
  719. printk(KERN_WARNING "%s: Receive packet length "
  720. "error\n", dev->name);
  721. goto drop;
  722. case E_DTA_CKSM_ERR:
  723. printk(KERN_WARNING "%s: Data checksum error\n",
  724. dev->name);
  725. goto drop;
  726. case E_SHT_BST:
  727. printk(KERN_WARNING "%s: Unexpected short burst "
  728. "error\n", dev->name);
  729. goto drop;
  730. case E_STATE_ERR:
  731. printk(KERN_WARNING "%s: Recv. state transition"
  732. " error\n", dev->name);
  733. goto drop;
  734. case E_UNEXP_DATA:
  735. printk(KERN_WARNING "%s: Unexpected data error\n",
  736. dev->name);
  737. goto drop;
  738. case E_LST_LNK_ERR:
  739. printk(KERN_WARNING "%s: Link lost error\n",
  740. dev->name);
  741. goto drop;
  742. case E_FRM_ERR:
  743. printk(KERN_WARNING "%s: Framing Error\n",
  744. dev->name);
  745. goto drop;
  746. case E_FLG_SYN_ERR:
  747. printk(KERN_WARNING "%s: Flag sync. lost during "
  748. "packet\n", dev->name);
  749. goto drop;
  750. case E_RX_INV_BUF:
  751. printk(KERN_ERR "%s: Invalid receive buffer "
  752. "address\n", dev->name);
  753. writel(readl(&regs->HostCtrl)|HALT_NIC|RR_CLEAR_INT,
  754. &regs->HostCtrl);
  755. wmb();
  756. break;
  757. case E_RX_INV_DSC:
  758. printk(KERN_ERR "%s: Invalid receive descriptor "
  759. "address\n", dev->name);
  760. writel(readl(&regs->HostCtrl)|HALT_NIC|RR_CLEAR_INT,
  761. &regs->HostCtrl);
  762. wmb();
  763. break;
  764. case E_RNG_BLK:
  765. printk(KERN_ERR "%s: Invalid ring block\n",
  766. dev->name);
  767. writel(readl(&regs->HostCtrl)|HALT_NIC|RR_CLEAR_INT,
  768. &regs->HostCtrl);
  769. wmb();
  770. break;
  771. drop:
  772. /* Label packet to be dropped.
  773. * Actual dropping occurs in rx
  774. * handling.
  775. *
  776. * The index of packet we get to drop is
  777. * the index of the packet following
  778. * the bad packet. -kbf
  779. */
  780. {
  781. u16 index = rrpriv->evt_ring[eidx].index;
  782. index = (index + (RX_RING_ENTRIES - 1)) %
  783. RX_RING_ENTRIES;
  784. rrpriv->rx_ring[index].mode |=
  785. (PACKET_BAD | PACKET_END);
  786. }
  787. break;
  788. default:
  789. printk(KERN_WARNING "%s: Unhandled event 0x%02x\n",
  790. dev->name, rrpriv->evt_ring[eidx].code);
  791. }
  792. eidx = (eidx + 1) % EVT_RING_ENTRIES;
  793. }
  794. rrpriv->info->evt_ctrl.pi = eidx;
  795. wmb();
  796. return eidx;
  797. }
  798. static void rx_int(struct net_device *dev, u32 rxlimit, u32 index)
  799. {
  800. struct rr_private *rrpriv = netdev_priv(dev);
  801. struct rr_regs __iomem *regs = rrpriv->regs;
  802. do {
  803. struct rx_desc *desc;
  804. u32 pkt_len;
  805. desc = &(rrpriv->rx_ring[index]);
  806. pkt_len = desc->size;
  807. #if (DEBUG > 2)
  808. printk("index %i, rxlimit %i\n", index, rxlimit);
  809. printk("len %x, mode %x\n", pkt_len, desc->mode);
  810. #endif
  811. if ( (rrpriv->rx_ring[index].mode & PACKET_BAD) == PACKET_BAD){
  812. dev->stats.rx_dropped++;
  813. goto defer;
  814. }
  815. if (pkt_len > 0){
  816. struct sk_buff *skb, *rx_skb;
  817. rx_skb = rrpriv->rx_skbuff[index];
  818. if (pkt_len < PKT_COPY_THRESHOLD) {
  819. skb = alloc_skb(pkt_len, GFP_ATOMIC);
  820. if (skb == NULL){
  821. printk(KERN_WARNING "%s: Unable to allocate skb (%i bytes), deferring packet\n", dev->name, pkt_len);
  822. dev->stats.rx_dropped++;
  823. goto defer;
  824. } else {
  825. pci_dma_sync_single_for_cpu(rrpriv->pci_dev,
  826. desc->addr.addrlo,
  827. pkt_len,
  828. PCI_DMA_FROMDEVICE);
  829. skb_put_data(skb, rx_skb->data,
  830. pkt_len);
  831. pci_dma_sync_single_for_device(rrpriv->pci_dev,
  832. desc->addr.addrlo,
  833. pkt_len,
  834. PCI_DMA_FROMDEVICE);
  835. }
  836. }else{
  837. struct sk_buff *newskb;
  838. newskb = alloc_skb(dev->mtu + HIPPI_HLEN,
  839. GFP_ATOMIC);
  840. if (newskb){
  841. dma_addr_t addr;
  842. pci_unmap_single(rrpriv->pci_dev,
  843. desc->addr.addrlo, dev->mtu +
  844. HIPPI_HLEN, PCI_DMA_FROMDEVICE);
  845. skb = rx_skb;
  846. skb_put(skb, pkt_len);
  847. rrpriv->rx_skbuff[index] = newskb;
  848. addr = pci_map_single(rrpriv->pci_dev,
  849. newskb->data,
  850. dev->mtu + HIPPI_HLEN,
  851. PCI_DMA_FROMDEVICE);
  852. set_rraddr(&desc->addr, addr);
  853. } else {
  854. printk("%s: Out of memory, deferring "
  855. "packet\n", dev->name);
  856. dev->stats.rx_dropped++;
  857. goto defer;
  858. }
  859. }
  860. skb->protocol = hippi_type_trans(skb, dev);
  861. netif_rx(skb); /* send it up */
  862. dev->stats.rx_packets++;
  863. dev->stats.rx_bytes += pkt_len;
  864. }
  865. defer:
  866. desc->mode = 0;
  867. desc->size = dev->mtu + HIPPI_HLEN;
  868. if ((index & 7) == 7)
  869. writel(index, &regs->IpRxPi);
  870. index = (index + 1) % RX_RING_ENTRIES;
  871. } while(index != rxlimit);
  872. rrpriv->cur_rx = index;
  873. wmb();
  874. }
  875. static irqreturn_t rr_interrupt(int irq, void *dev_id)
  876. {
  877. struct rr_private *rrpriv;
  878. struct rr_regs __iomem *regs;
  879. struct net_device *dev = (struct net_device *)dev_id;
  880. u32 prodidx, rxindex, eidx, txcsmr, rxlimit, txcon;
  881. rrpriv = netdev_priv(dev);
  882. regs = rrpriv->regs;
  883. if (!(readl(&regs->HostCtrl) & RR_INT))
  884. return IRQ_NONE;
  885. spin_lock(&rrpriv->lock);
  886. prodidx = readl(&regs->EvtPrd);
  887. txcsmr = (prodidx >> 8) & 0xff;
  888. rxlimit = (prodidx >> 16) & 0xff;
  889. prodidx &= 0xff;
  890. #if (DEBUG > 2)
  891. printk("%s: interrupt, prodidx = %i, eidx = %i\n", dev->name,
  892. prodidx, rrpriv->info->evt_ctrl.pi);
  893. #endif
  894. /*
  895. * Order here is important. We must handle events
  896. * before doing anything else in order to catch
  897. * such things as LLRC errors, etc -kbf
  898. */
  899. eidx = rrpriv->info->evt_ctrl.pi;
  900. if (prodidx != eidx)
  901. eidx = rr_handle_event(dev, prodidx, eidx);
  902. rxindex = rrpriv->cur_rx;
  903. if (rxindex != rxlimit)
  904. rx_int(dev, rxlimit, rxindex);
  905. txcon = rrpriv->dirty_tx;
  906. if (txcsmr != txcon) {
  907. do {
  908. /* Due to occational firmware TX producer/consumer out
  909. * of sync. error need to check entry in ring -kbf
  910. */
  911. if(rrpriv->tx_skbuff[txcon]){
  912. struct tx_desc *desc;
  913. struct sk_buff *skb;
  914. desc = &(rrpriv->tx_ring[txcon]);
  915. skb = rrpriv->tx_skbuff[txcon];
  916. dev->stats.tx_packets++;
  917. dev->stats.tx_bytes += skb->len;
  918. pci_unmap_single(rrpriv->pci_dev,
  919. desc->addr.addrlo, skb->len,
  920. PCI_DMA_TODEVICE);
  921. dev_kfree_skb_irq(skb);
  922. rrpriv->tx_skbuff[txcon] = NULL;
  923. desc->size = 0;
  924. set_rraddr(&rrpriv->tx_ring[txcon].addr, 0);
  925. desc->mode = 0;
  926. }
  927. txcon = (txcon + 1) % TX_RING_ENTRIES;
  928. } while (txcsmr != txcon);
  929. wmb();
  930. rrpriv->dirty_tx = txcon;
  931. if (rrpriv->tx_full && rr_if_busy(dev) &&
  932. (((rrpriv->info->tx_ctrl.pi + 1) % TX_RING_ENTRIES)
  933. != rrpriv->dirty_tx)){
  934. rrpriv->tx_full = 0;
  935. netif_wake_queue(dev);
  936. }
  937. }
  938. eidx |= ((txcsmr << 8) | (rxlimit << 16));
  939. writel(eidx, &regs->EvtCon);
  940. wmb();
  941. spin_unlock(&rrpriv->lock);
  942. return IRQ_HANDLED;
  943. }
  944. static inline void rr_raz_tx(struct rr_private *rrpriv,
  945. struct net_device *dev)
  946. {
  947. int i;
  948. for (i = 0; i < TX_RING_ENTRIES; i++) {
  949. struct sk_buff *skb = rrpriv->tx_skbuff[i];
  950. if (skb) {
  951. struct tx_desc *desc = &(rrpriv->tx_ring[i]);
  952. pci_unmap_single(rrpriv->pci_dev, desc->addr.addrlo,
  953. skb->len, PCI_DMA_TODEVICE);
  954. desc->size = 0;
  955. set_rraddr(&desc->addr, 0);
  956. dev_kfree_skb(skb);
  957. rrpriv->tx_skbuff[i] = NULL;
  958. }
  959. }
  960. }
  961. static inline void rr_raz_rx(struct rr_private *rrpriv,
  962. struct net_device *dev)
  963. {
  964. int i;
  965. for (i = 0; i < RX_RING_ENTRIES; i++) {
  966. struct sk_buff *skb = rrpriv->rx_skbuff[i];
  967. if (skb) {
  968. struct rx_desc *desc = &(rrpriv->rx_ring[i]);
  969. pci_unmap_single(rrpriv->pci_dev, desc->addr.addrlo,
  970. dev->mtu + HIPPI_HLEN, PCI_DMA_FROMDEVICE);
  971. desc->size = 0;
  972. set_rraddr(&desc->addr, 0);
  973. dev_kfree_skb(skb);
  974. rrpriv->rx_skbuff[i] = NULL;
  975. }
  976. }
  977. }
  978. static void rr_timer(struct timer_list *t)
  979. {
  980. struct rr_private *rrpriv = from_timer(rrpriv, t, timer);
  981. struct net_device *dev = pci_get_drvdata(rrpriv->pci_dev);
  982. struct rr_regs __iomem *regs = rrpriv->regs;
  983. unsigned long flags;
  984. if (readl(&regs->HostCtrl) & NIC_HALTED){
  985. printk("%s: Restarting nic\n", dev->name);
  986. memset(rrpriv->rx_ctrl, 0, 256 * sizeof(struct ring_ctrl));
  987. memset(rrpriv->info, 0, sizeof(struct rr_info));
  988. wmb();
  989. rr_raz_tx(rrpriv, dev);
  990. rr_raz_rx(rrpriv, dev);
  991. if (rr_init1(dev)) {
  992. spin_lock_irqsave(&rrpriv->lock, flags);
  993. writel(readl(&regs->HostCtrl)|HALT_NIC|RR_CLEAR_INT,
  994. &regs->HostCtrl);
  995. spin_unlock_irqrestore(&rrpriv->lock, flags);
  996. }
  997. }
  998. rrpriv->timer.expires = RUN_AT(5*HZ);
  999. add_timer(&rrpriv->timer);
  1000. }
  1001. static int rr_open(struct net_device *dev)
  1002. {
  1003. struct rr_private *rrpriv = netdev_priv(dev);
  1004. struct pci_dev *pdev = rrpriv->pci_dev;
  1005. struct rr_regs __iomem *regs;
  1006. int ecode = 0;
  1007. unsigned long flags;
  1008. dma_addr_t dma_addr;
  1009. regs = rrpriv->regs;
  1010. if (rrpriv->fw_rev < 0x00020000) {
  1011. printk(KERN_WARNING "%s: trying to configure device with "
  1012. "obsolete firmware\n", dev->name);
  1013. ecode = -EBUSY;
  1014. goto error;
  1015. }
  1016. rrpriv->rx_ctrl = pci_alloc_consistent(pdev,
  1017. 256 * sizeof(struct ring_ctrl),
  1018. &dma_addr);
  1019. if (!rrpriv->rx_ctrl) {
  1020. ecode = -ENOMEM;
  1021. goto error;
  1022. }
  1023. rrpriv->rx_ctrl_dma = dma_addr;
  1024. rrpriv->info = pci_alloc_consistent(pdev, sizeof(struct rr_info),
  1025. &dma_addr);
  1026. if (!rrpriv->info) {
  1027. ecode = -ENOMEM;
  1028. goto error;
  1029. }
  1030. rrpriv->info_dma = dma_addr;
  1031. wmb();
  1032. spin_lock_irqsave(&rrpriv->lock, flags);
  1033. writel(readl(&regs->HostCtrl)|HALT_NIC|RR_CLEAR_INT, &regs->HostCtrl);
  1034. readl(&regs->HostCtrl);
  1035. spin_unlock_irqrestore(&rrpriv->lock, flags);
  1036. if (request_irq(pdev->irq, rr_interrupt, IRQF_SHARED, dev->name, dev)) {
  1037. printk(KERN_WARNING "%s: Requested IRQ %d is busy\n",
  1038. dev->name, pdev->irq);
  1039. ecode = -EAGAIN;
  1040. goto error;
  1041. }
  1042. if ((ecode = rr_init1(dev)))
  1043. goto error;
  1044. /* Set the timer to switch to check for link beat and perhaps switch
  1045. to an alternate media type. */
  1046. timer_setup(&rrpriv->timer, rr_timer, 0);
  1047. rrpriv->timer.expires = RUN_AT(5*HZ); /* 5 sec. watchdog */
  1048. add_timer(&rrpriv->timer);
  1049. netif_start_queue(dev);
  1050. return ecode;
  1051. error:
  1052. spin_lock_irqsave(&rrpriv->lock, flags);
  1053. writel(readl(&regs->HostCtrl)|HALT_NIC|RR_CLEAR_INT, &regs->HostCtrl);
  1054. spin_unlock_irqrestore(&rrpriv->lock, flags);
  1055. if (rrpriv->info) {
  1056. pci_free_consistent(pdev, sizeof(struct rr_info), rrpriv->info,
  1057. rrpriv->info_dma);
  1058. rrpriv->info = NULL;
  1059. }
  1060. if (rrpriv->rx_ctrl) {
  1061. pci_free_consistent(pdev, 256 * sizeof(struct ring_ctrl),
  1062. rrpriv->rx_ctrl, rrpriv->rx_ctrl_dma);
  1063. rrpriv->rx_ctrl = NULL;
  1064. }
  1065. netif_stop_queue(dev);
  1066. return ecode;
  1067. }
  1068. static void rr_dump(struct net_device *dev)
  1069. {
  1070. struct rr_private *rrpriv;
  1071. struct rr_regs __iomem *regs;
  1072. u32 index, cons;
  1073. short i;
  1074. int len;
  1075. rrpriv = netdev_priv(dev);
  1076. regs = rrpriv->regs;
  1077. printk("%s: dumping NIC TX rings\n", dev->name);
  1078. printk("RxPrd %08x, TxPrd %02x, EvtPrd %08x, TxPi %02x, TxCtrlPi %02x\n",
  1079. readl(&regs->RxPrd), readl(&regs->TxPrd),
  1080. readl(&regs->EvtPrd), readl(&regs->TxPi),
  1081. rrpriv->info->tx_ctrl.pi);
  1082. printk("Error code 0x%x\n", readl(&regs->Fail1));
  1083. index = (((readl(&regs->EvtPrd) >> 8) & 0xff) - 1) % TX_RING_ENTRIES;
  1084. cons = rrpriv->dirty_tx;
  1085. printk("TX ring index %i, TX consumer %i\n",
  1086. index, cons);
  1087. if (rrpriv->tx_skbuff[index]){
  1088. len = min_t(int, 0x80, rrpriv->tx_skbuff[index]->len);
  1089. printk("skbuff for index %i is valid - dumping data (0x%x bytes - DMA len 0x%x)\n", index, len, rrpriv->tx_ring[index].size);
  1090. for (i = 0; i < len; i++){
  1091. if (!(i & 7))
  1092. printk("\n");
  1093. printk("%02x ", (unsigned char) rrpriv->tx_skbuff[index]->data[i]);
  1094. }
  1095. printk("\n");
  1096. }
  1097. if (rrpriv->tx_skbuff[cons]){
  1098. len = min_t(int, 0x80, rrpriv->tx_skbuff[cons]->len);
  1099. printk("skbuff for cons %i is valid - dumping data (0x%x bytes - skbuff len 0x%x)\n", cons, len, rrpriv->tx_skbuff[cons]->len);
  1100. printk("mode 0x%x, size 0x%x,\n phys %08Lx, skbuff-addr %p, truesize 0x%x\n",
  1101. rrpriv->tx_ring[cons].mode,
  1102. rrpriv->tx_ring[cons].size,
  1103. (unsigned long long) rrpriv->tx_ring[cons].addr.addrlo,
  1104. rrpriv->tx_skbuff[cons]->data,
  1105. (unsigned int)rrpriv->tx_skbuff[cons]->truesize);
  1106. for (i = 0; i < len; i++){
  1107. if (!(i & 7))
  1108. printk("\n");
  1109. printk("%02x ", (unsigned char)rrpriv->tx_ring[cons].size);
  1110. }
  1111. printk("\n");
  1112. }
  1113. printk("dumping TX ring info:\n");
  1114. for (i = 0; i < TX_RING_ENTRIES; i++)
  1115. printk("mode 0x%x, size 0x%x, phys-addr %08Lx\n",
  1116. rrpriv->tx_ring[i].mode,
  1117. rrpriv->tx_ring[i].size,
  1118. (unsigned long long) rrpriv->tx_ring[i].addr.addrlo);
  1119. }
  1120. static int rr_close(struct net_device *dev)
  1121. {
  1122. struct rr_private *rrpriv = netdev_priv(dev);
  1123. struct rr_regs __iomem *regs = rrpriv->regs;
  1124. struct pci_dev *pdev = rrpriv->pci_dev;
  1125. unsigned long flags;
  1126. u32 tmp;
  1127. short i;
  1128. netif_stop_queue(dev);
  1129. /*
  1130. * Lock to make sure we are not cleaning up while another CPU
  1131. * is handling interrupts.
  1132. */
  1133. spin_lock_irqsave(&rrpriv->lock, flags);
  1134. tmp = readl(&regs->HostCtrl);
  1135. if (tmp & NIC_HALTED){
  1136. printk("%s: NIC already halted\n", dev->name);
  1137. rr_dump(dev);
  1138. }else{
  1139. tmp |= HALT_NIC | RR_CLEAR_INT;
  1140. writel(tmp, &regs->HostCtrl);
  1141. readl(&regs->HostCtrl);
  1142. }
  1143. rrpriv->fw_running = 0;
  1144. del_timer_sync(&rrpriv->timer);
  1145. writel(0, &regs->TxPi);
  1146. writel(0, &regs->IpRxPi);
  1147. writel(0, &regs->EvtCon);
  1148. writel(0, &regs->EvtPrd);
  1149. for (i = 0; i < CMD_RING_ENTRIES; i++)
  1150. writel(0, &regs->CmdRing[i]);
  1151. rrpriv->info->tx_ctrl.entries = 0;
  1152. rrpriv->info->cmd_ctrl.pi = 0;
  1153. rrpriv->info->evt_ctrl.pi = 0;
  1154. rrpriv->rx_ctrl[4].entries = 0;
  1155. rr_raz_tx(rrpriv, dev);
  1156. rr_raz_rx(rrpriv, dev);
  1157. pci_free_consistent(pdev, 256 * sizeof(struct ring_ctrl),
  1158. rrpriv->rx_ctrl, rrpriv->rx_ctrl_dma);
  1159. rrpriv->rx_ctrl = NULL;
  1160. pci_free_consistent(pdev, sizeof(struct rr_info), rrpriv->info,
  1161. rrpriv->info_dma);
  1162. rrpriv->info = NULL;
  1163. spin_unlock_irqrestore(&rrpriv->lock, flags);
  1164. free_irq(pdev->irq, dev);
  1165. return 0;
  1166. }
  1167. static netdev_tx_t rr_start_xmit(struct sk_buff *skb,
  1168. struct net_device *dev)
  1169. {
  1170. struct rr_private *rrpriv = netdev_priv(dev);
  1171. struct rr_regs __iomem *regs = rrpriv->regs;
  1172. struct hippi_cb *hcb = (struct hippi_cb *) skb->cb;
  1173. struct ring_ctrl *txctrl;
  1174. unsigned long flags;
  1175. u32 index, len = skb->len;
  1176. u32 *ifield;
  1177. struct sk_buff *new_skb;
  1178. if (readl(&regs->Mode) & FATAL_ERR)
  1179. printk("error codes Fail1 %02x, Fail2 %02x\n",
  1180. readl(&regs->Fail1), readl(&regs->Fail2));
  1181. /*
  1182. * We probably need to deal with tbusy here to prevent overruns.
  1183. */
  1184. if (skb_headroom(skb) < 8){
  1185. printk("incoming skb too small - reallocating\n");
  1186. if (!(new_skb = dev_alloc_skb(len + 8))) {
  1187. dev_kfree_skb(skb);
  1188. netif_wake_queue(dev);
  1189. return NETDEV_TX_OK;
  1190. }
  1191. skb_reserve(new_skb, 8);
  1192. skb_put(new_skb, len);
  1193. skb_copy_from_linear_data(skb, new_skb->data, len);
  1194. dev_kfree_skb(skb);
  1195. skb = new_skb;
  1196. }
  1197. ifield = skb_push(skb, 8);
  1198. ifield[0] = 0;
  1199. ifield[1] = hcb->ifield;
  1200. /*
  1201. * We don't need the lock before we are actually going to start
  1202. * fiddling with the control blocks.
  1203. */
  1204. spin_lock_irqsave(&rrpriv->lock, flags);
  1205. txctrl = &rrpriv->info->tx_ctrl;
  1206. index = txctrl->pi;
  1207. rrpriv->tx_skbuff[index] = skb;
  1208. set_rraddr(&rrpriv->tx_ring[index].addr, pci_map_single(
  1209. rrpriv->pci_dev, skb->data, len + 8, PCI_DMA_TODEVICE));
  1210. rrpriv->tx_ring[index].size = len + 8; /* include IFIELD */
  1211. rrpriv->tx_ring[index].mode = PACKET_START | PACKET_END;
  1212. txctrl->pi = (index + 1) % TX_RING_ENTRIES;
  1213. wmb();
  1214. writel(txctrl->pi, &regs->TxPi);
  1215. if (txctrl->pi == rrpriv->dirty_tx){
  1216. rrpriv->tx_full = 1;
  1217. netif_stop_queue(dev);
  1218. }
  1219. spin_unlock_irqrestore(&rrpriv->lock, flags);
  1220. return NETDEV_TX_OK;
  1221. }
  1222. /*
  1223. * Read the firmware out of the EEPROM and put it into the SRAM
  1224. * (or from user space - later)
  1225. *
  1226. * This operation requires the NIC to be halted and is performed with
  1227. * interrupts disabled and with the spinlock hold.
  1228. */
  1229. static int rr_load_firmware(struct net_device *dev)
  1230. {
  1231. struct rr_private *rrpriv;
  1232. struct rr_regs __iomem *regs;
  1233. size_t eptr, segptr;
  1234. int i, j;
  1235. u32 localctrl, sptr, len, tmp;
  1236. u32 p2len, p2size, nr_seg, revision, io, sram_size;
  1237. rrpriv = netdev_priv(dev);
  1238. regs = rrpriv->regs;
  1239. if (dev->flags & IFF_UP)
  1240. return -EBUSY;
  1241. if (!(readl(&regs->HostCtrl) & NIC_HALTED)){
  1242. printk("%s: Trying to load firmware to a running NIC.\n",
  1243. dev->name);
  1244. return -EBUSY;
  1245. }
  1246. localctrl = readl(&regs->LocalCtrl);
  1247. writel(0, &regs->LocalCtrl);
  1248. writel(0, &regs->EvtPrd);
  1249. writel(0, &regs->RxPrd);
  1250. writel(0, &regs->TxPrd);
  1251. /*
  1252. * First wipe the entire SRAM, otherwise we might run into all
  1253. * kinds of trouble ... sigh, this took almost all afternoon
  1254. * to track down ;-(
  1255. */
  1256. io = readl(&regs->ExtIo);
  1257. writel(0, &regs->ExtIo);
  1258. sram_size = rr_read_eeprom_word(rrpriv, 8);
  1259. for (i = 200; i < sram_size / 4; i++){
  1260. writel(i * 4, &regs->WinBase);
  1261. mb();
  1262. writel(0, &regs->WinData);
  1263. mb();
  1264. }
  1265. writel(io, &regs->ExtIo);
  1266. mb();
  1267. eptr = rr_read_eeprom_word(rrpriv,
  1268. offsetof(struct eeprom, rncd_info.AddrRunCodeSegs));
  1269. eptr = ((eptr & 0x1fffff) >> 3);
  1270. p2len = rr_read_eeprom_word(rrpriv, 0x83*4);
  1271. p2len = (p2len << 2);
  1272. p2size = rr_read_eeprom_word(rrpriv, 0x84*4);
  1273. p2size = ((p2size & 0x1fffff) >> 3);
  1274. if ((eptr < p2size) || (eptr > (p2size + p2len))){
  1275. printk("%s: eptr is invalid\n", dev->name);
  1276. goto out;
  1277. }
  1278. revision = rr_read_eeprom_word(rrpriv,
  1279. offsetof(struct eeprom, manf.HeaderFmt));
  1280. if (revision != 1){
  1281. printk("%s: invalid firmware format (%i)\n",
  1282. dev->name, revision);
  1283. goto out;
  1284. }
  1285. nr_seg = rr_read_eeprom_word(rrpriv, eptr);
  1286. eptr +=4;
  1287. #if (DEBUG > 1)
  1288. printk("%s: nr_seg %i\n", dev->name, nr_seg);
  1289. #endif
  1290. for (i = 0; i < nr_seg; i++){
  1291. sptr = rr_read_eeprom_word(rrpriv, eptr);
  1292. eptr += 4;
  1293. len = rr_read_eeprom_word(rrpriv, eptr);
  1294. eptr += 4;
  1295. segptr = rr_read_eeprom_word(rrpriv, eptr);
  1296. segptr = ((segptr & 0x1fffff) >> 3);
  1297. eptr += 4;
  1298. #if (DEBUG > 1)
  1299. printk("%s: segment %i, sram address %06x, length %04x, segptr %06x\n",
  1300. dev->name, i, sptr, len, segptr);
  1301. #endif
  1302. for (j = 0; j < len; j++){
  1303. tmp = rr_read_eeprom_word(rrpriv, segptr);
  1304. writel(sptr, &regs->WinBase);
  1305. mb();
  1306. writel(tmp, &regs->WinData);
  1307. mb();
  1308. segptr += 4;
  1309. sptr += 4;
  1310. }
  1311. }
  1312. out:
  1313. writel(localctrl, &regs->LocalCtrl);
  1314. mb();
  1315. return 0;
  1316. }
  1317. static int rr_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
  1318. {
  1319. struct rr_private *rrpriv;
  1320. unsigned char *image, *oldimage;
  1321. unsigned long flags;
  1322. unsigned int i;
  1323. int error = -EOPNOTSUPP;
  1324. rrpriv = netdev_priv(dev);
  1325. switch(cmd){
  1326. case SIOCRRGFW:
  1327. if (!capable(CAP_SYS_RAWIO)){
  1328. return -EPERM;
  1329. }
  1330. image = kmalloc_array(EEPROM_WORDS, sizeof(u32), GFP_KERNEL);
  1331. if (!image)
  1332. return -ENOMEM;
  1333. if (rrpriv->fw_running){
  1334. printk("%s: Firmware already running\n", dev->name);
  1335. error = -EPERM;
  1336. goto gf_out;
  1337. }
  1338. spin_lock_irqsave(&rrpriv->lock, flags);
  1339. i = rr_read_eeprom(rrpriv, 0, image, EEPROM_BYTES);
  1340. spin_unlock_irqrestore(&rrpriv->lock, flags);
  1341. if (i != EEPROM_BYTES){
  1342. printk(KERN_ERR "%s: Error reading EEPROM\n",
  1343. dev->name);
  1344. error = -EFAULT;
  1345. goto gf_out;
  1346. }
  1347. error = copy_to_user(rq->ifr_data, image, EEPROM_BYTES);
  1348. if (error)
  1349. error = -EFAULT;
  1350. gf_out:
  1351. kfree(image);
  1352. return error;
  1353. case SIOCRRPFW:
  1354. if (!capable(CAP_SYS_RAWIO)){
  1355. return -EPERM;
  1356. }
  1357. image = memdup_user(rq->ifr_data, EEPROM_BYTES);
  1358. if (IS_ERR(image))
  1359. return PTR_ERR(image);
  1360. oldimage = kmalloc(EEPROM_BYTES, GFP_KERNEL);
  1361. if (!oldimage) {
  1362. kfree(image);
  1363. return -ENOMEM;
  1364. }
  1365. if (rrpriv->fw_running){
  1366. printk("%s: Firmware already running\n", dev->name);
  1367. error = -EPERM;
  1368. goto wf_out;
  1369. }
  1370. printk("%s: Updating EEPROM firmware\n", dev->name);
  1371. spin_lock_irqsave(&rrpriv->lock, flags);
  1372. error = write_eeprom(rrpriv, 0, image, EEPROM_BYTES);
  1373. if (error)
  1374. printk(KERN_ERR "%s: Error writing EEPROM\n",
  1375. dev->name);
  1376. i = rr_read_eeprom(rrpriv, 0, oldimage, EEPROM_BYTES);
  1377. spin_unlock_irqrestore(&rrpriv->lock, flags);
  1378. if (i != EEPROM_BYTES)
  1379. printk(KERN_ERR "%s: Error reading back EEPROM "
  1380. "image\n", dev->name);
  1381. error = memcmp(image, oldimage, EEPROM_BYTES);
  1382. if (error){
  1383. printk(KERN_ERR "%s: Error verifying EEPROM image\n",
  1384. dev->name);
  1385. error = -EFAULT;
  1386. }
  1387. wf_out:
  1388. kfree(oldimage);
  1389. kfree(image);
  1390. return error;
  1391. case SIOCRRID:
  1392. return put_user(0x52523032, (int __user *)rq->ifr_data);
  1393. default:
  1394. return error;
  1395. }
  1396. }
  1397. static const struct pci_device_id rr_pci_tbl[] = {
  1398. { PCI_VENDOR_ID_ESSENTIAL, PCI_DEVICE_ID_ESSENTIAL_ROADRUNNER,
  1399. PCI_ANY_ID, PCI_ANY_ID, },
  1400. { 0,}
  1401. };
  1402. MODULE_DEVICE_TABLE(pci, rr_pci_tbl);
  1403. static struct pci_driver rr_driver = {
  1404. .name = "rrunner",
  1405. .id_table = rr_pci_tbl,
  1406. .probe = rr_init_one,
  1407. .remove = rr_remove_one,
  1408. };
  1409. module_pci_driver(rr_driver);