smc911x.c 56 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * smc911x.c
  4. * This is a driver for SMSC's LAN911{5,6,7,8} single-chip Ethernet devices.
  5. *
  6. * Copyright (C) 2005 Sensoria Corp
  7. * Derived from the unified SMC91x driver by Nicolas Pitre
  8. * and the smsc911x.c reference driver by SMSC
  9. *
  10. * Arguments:
  11. * watchdog = TX watchdog timeout
  12. * tx_fifo_kb = Size of TX FIFO in KB
  13. *
  14. * History:
  15. * 04/16/05 Dustin McIntire Initial version
  16. */
  17. static const char version[] =
  18. "smc911x.c: v1.0 04-16-2005 by Dustin McIntire <dustin@sensoria.com>\n";
  19. /* Debugging options */
  20. #define ENABLE_SMC_DEBUG_RX 0
  21. #define ENABLE_SMC_DEBUG_TX 0
  22. #define ENABLE_SMC_DEBUG_DMA 0
  23. #define ENABLE_SMC_DEBUG_PKTS 0
  24. #define ENABLE_SMC_DEBUG_MISC 0
  25. #define ENABLE_SMC_DEBUG_FUNC 0
  26. #define SMC_DEBUG_RX ((ENABLE_SMC_DEBUG_RX ? 1 : 0) << 0)
  27. #define SMC_DEBUG_TX ((ENABLE_SMC_DEBUG_TX ? 1 : 0) << 1)
  28. #define SMC_DEBUG_DMA ((ENABLE_SMC_DEBUG_DMA ? 1 : 0) << 2)
  29. #define SMC_DEBUG_PKTS ((ENABLE_SMC_DEBUG_PKTS ? 1 : 0) << 3)
  30. #define SMC_DEBUG_MISC ((ENABLE_SMC_DEBUG_MISC ? 1 : 0) << 4)
  31. #define SMC_DEBUG_FUNC ((ENABLE_SMC_DEBUG_FUNC ? 1 : 0) << 5)
  32. #ifndef SMC_DEBUG
  33. #define SMC_DEBUG ( SMC_DEBUG_RX | \
  34. SMC_DEBUG_TX | \
  35. SMC_DEBUG_DMA | \
  36. SMC_DEBUG_PKTS | \
  37. SMC_DEBUG_MISC | \
  38. SMC_DEBUG_FUNC \
  39. )
  40. #endif
  41. #include <linux/module.h>
  42. #include <linux/kernel.h>
  43. #include <linux/sched.h>
  44. #include <linux/delay.h>
  45. #include <linux/interrupt.h>
  46. #include <linux/errno.h>
  47. #include <linux/ioport.h>
  48. #include <linux/crc32.h>
  49. #include <linux/device.h>
  50. #include <linux/platform_device.h>
  51. #include <linux/spinlock.h>
  52. #include <linux/ethtool.h>
  53. #include <linux/mii.h>
  54. #include <linux/workqueue.h>
  55. #include <linux/netdevice.h>
  56. #include <linux/etherdevice.h>
  57. #include <linux/skbuff.h>
  58. #include <linux/dmaengine.h>
  59. #include <asm/io.h>
  60. #include "smc911x.h"
  61. /*
  62. * Transmit timeout, default 5 seconds.
  63. */
  64. static int watchdog = 5000;
  65. module_param(watchdog, int, 0400);
  66. MODULE_PARM_DESC(watchdog, "transmit timeout in milliseconds");
  67. static int tx_fifo_kb=8;
  68. module_param(tx_fifo_kb, int, 0400);
  69. MODULE_PARM_DESC(tx_fifo_kb,"transmit FIFO size in KB (1<x<15)(default=8)");
  70. MODULE_LICENSE("GPL");
  71. MODULE_ALIAS("platform:smc911x");
  72. /*
  73. * The internal workings of the driver. If you are changing anything
  74. * here with the SMC stuff, you should have the datasheet and know
  75. * what you are doing.
  76. */
  77. #define CARDNAME "smc911x"
  78. /*
  79. * Use power-down feature of the chip
  80. */
  81. #define POWER_DOWN 1
  82. #if SMC_DEBUG > 0
  83. #define DBG(n, dev, args...) \
  84. do { \
  85. if (SMC_DEBUG & (n)) \
  86. netdev_dbg(dev, args); \
  87. } while (0)
  88. #define PRINTK(dev, args...) netdev_info(dev, args)
  89. #else
  90. #define DBG(n, dev, args...) do { } while (0)
  91. #define PRINTK(dev, args...) netdev_dbg(dev, args)
  92. #endif
  93. #if SMC_DEBUG_PKTS > 0
  94. static void PRINT_PKT(u_char *buf, int length)
  95. {
  96. int i;
  97. int remainder;
  98. int lines;
  99. lines = length / 16;
  100. remainder = length % 16;
  101. for (i = 0; i < lines ; i ++) {
  102. int cur;
  103. printk(KERN_DEBUG);
  104. for (cur = 0; cur < 8; cur++) {
  105. u_char a, b;
  106. a = *buf++;
  107. b = *buf++;
  108. pr_cont("%02x%02x ", a, b);
  109. }
  110. pr_cont("\n");
  111. }
  112. printk(KERN_DEBUG);
  113. for (i = 0; i < remainder/2 ; i++) {
  114. u_char a, b;
  115. a = *buf++;
  116. b = *buf++;
  117. pr_cont("%02x%02x ", a, b);
  118. }
  119. pr_cont("\n");
  120. }
  121. #else
  122. #define PRINT_PKT(x...) do { } while (0)
  123. #endif
  124. /* this enables an interrupt in the interrupt mask register */
  125. #define SMC_ENABLE_INT(lp, x) do { \
  126. unsigned int __mask; \
  127. __mask = SMC_GET_INT_EN((lp)); \
  128. __mask |= (x); \
  129. SMC_SET_INT_EN((lp), __mask); \
  130. } while (0)
  131. /* this disables an interrupt from the interrupt mask register */
  132. #define SMC_DISABLE_INT(lp, x) do { \
  133. unsigned int __mask; \
  134. __mask = SMC_GET_INT_EN((lp)); \
  135. __mask &= ~(x); \
  136. SMC_SET_INT_EN((lp), __mask); \
  137. } while (0)
  138. /*
  139. * this does a soft reset on the device
  140. */
  141. static void smc911x_reset(struct net_device *dev)
  142. {
  143. struct smc911x_local *lp = netdev_priv(dev);
  144. unsigned int reg, timeout=0, resets=1, irq_cfg;
  145. unsigned long flags;
  146. DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
  147. /* Take out of PM setting first */
  148. if ((SMC_GET_PMT_CTRL(lp) & PMT_CTRL_READY_) == 0) {
  149. /* Write to the bytetest will take out of powerdown */
  150. SMC_SET_BYTE_TEST(lp, 0);
  151. timeout=10;
  152. do {
  153. udelay(10);
  154. reg = SMC_GET_PMT_CTRL(lp) & PMT_CTRL_READY_;
  155. } while (--timeout && !reg);
  156. if (timeout == 0) {
  157. PRINTK(dev, "smc911x_reset timeout waiting for PM restore\n");
  158. return;
  159. }
  160. }
  161. /* Disable all interrupts */
  162. spin_lock_irqsave(&lp->lock, flags);
  163. SMC_SET_INT_EN(lp, 0);
  164. spin_unlock_irqrestore(&lp->lock, flags);
  165. while (resets--) {
  166. SMC_SET_HW_CFG(lp, HW_CFG_SRST_);
  167. timeout=10;
  168. do {
  169. udelay(10);
  170. reg = SMC_GET_HW_CFG(lp);
  171. /* If chip indicates reset timeout then try again */
  172. if (reg & HW_CFG_SRST_TO_) {
  173. PRINTK(dev, "chip reset timeout, retrying...\n");
  174. resets++;
  175. break;
  176. }
  177. } while (--timeout && (reg & HW_CFG_SRST_));
  178. }
  179. if (timeout == 0) {
  180. PRINTK(dev, "smc911x_reset timeout waiting for reset\n");
  181. return;
  182. }
  183. /* make sure EEPROM has finished loading before setting GPIO_CFG */
  184. timeout=1000;
  185. while (--timeout && (SMC_GET_E2P_CMD(lp) & E2P_CMD_EPC_BUSY_))
  186. udelay(10);
  187. if (timeout == 0){
  188. PRINTK(dev, "smc911x_reset timeout waiting for EEPROM busy\n");
  189. return;
  190. }
  191. /* Initialize interrupts */
  192. SMC_SET_INT_EN(lp, 0);
  193. SMC_ACK_INT(lp, -1);
  194. /* Reset the FIFO level and flow control settings */
  195. SMC_SET_HW_CFG(lp, (lp->tx_fifo_kb & 0xF) << 16);
  196. //TODO: Figure out what appropriate pause time is
  197. SMC_SET_FLOW(lp, FLOW_FCPT_ | FLOW_FCEN_);
  198. SMC_SET_AFC_CFG(lp, lp->afc_cfg);
  199. /* Set to LED outputs */
  200. SMC_SET_GPIO_CFG(lp, 0x70070000);
  201. /*
  202. * Deassert IRQ for 1*10us for edge type interrupts
  203. * and drive IRQ pin push-pull
  204. */
  205. irq_cfg = (1 << 24) | INT_CFG_IRQ_EN_ | INT_CFG_IRQ_TYPE_;
  206. #ifdef SMC_DYNAMIC_BUS_CONFIG
  207. if (lp->cfg.irq_polarity)
  208. irq_cfg |= INT_CFG_IRQ_POL_;
  209. #endif
  210. SMC_SET_IRQ_CFG(lp, irq_cfg);
  211. /* clear anything saved */
  212. if (lp->pending_tx_skb != NULL) {
  213. dev_kfree_skb (lp->pending_tx_skb);
  214. lp->pending_tx_skb = NULL;
  215. dev->stats.tx_errors++;
  216. dev->stats.tx_aborted_errors++;
  217. }
  218. }
  219. /*
  220. * Enable Interrupts, Receive, and Transmit
  221. */
  222. static void smc911x_enable(struct net_device *dev)
  223. {
  224. struct smc911x_local *lp = netdev_priv(dev);
  225. unsigned mask, cfg, cr;
  226. unsigned long flags;
  227. DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
  228. spin_lock_irqsave(&lp->lock, flags);
  229. SMC_SET_MAC_ADDR(lp, dev->dev_addr);
  230. /* Enable TX */
  231. cfg = SMC_GET_HW_CFG(lp);
  232. cfg &= HW_CFG_TX_FIF_SZ_ | 0xFFF;
  233. cfg |= HW_CFG_SF_;
  234. SMC_SET_HW_CFG(lp, cfg);
  235. SMC_SET_FIFO_TDA(lp, 0xFF);
  236. /* Update TX stats on every 64 packets received or every 1 sec */
  237. SMC_SET_FIFO_TSL(lp, 64);
  238. SMC_SET_GPT_CFG(lp, GPT_CFG_TIMER_EN_ | 10000);
  239. SMC_GET_MAC_CR(lp, cr);
  240. cr |= MAC_CR_TXEN_ | MAC_CR_HBDIS_;
  241. SMC_SET_MAC_CR(lp, cr);
  242. SMC_SET_TX_CFG(lp, TX_CFG_TX_ON_);
  243. /* Add 2 byte padding to start of packets */
  244. SMC_SET_RX_CFG(lp, (2<<8) & RX_CFG_RXDOFF_);
  245. /* Turn on receiver and enable RX */
  246. if (cr & MAC_CR_RXEN_)
  247. DBG(SMC_DEBUG_RX, dev, "Receiver already enabled\n");
  248. SMC_SET_MAC_CR(lp, cr | MAC_CR_RXEN_);
  249. /* Interrupt on every received packet */
  250. SMC_SET_FIFO_RSA(lp, 0x01);
  251. SMC_SET_FIFO_RSL(lp, 0x00);
  252. /* now, enable interrupts */
  253. mask = INT_EN_TDFA_EN_ | INT_EN_TSFL_EN_ | INT_EN_RSFL_EN_ |
  254. INT_EN_GPT_INT_EN_ | INT_EN_RXDFH_INT_EN_ | INT_EN_RXE_EN_ |
  255. INT_EN_PHY_INT_EN_;
  256. if (IS_REV_A(lp->revision))
  257. mask|=INT_EN_RDFL_EN_;
  258. else {
  259. mask|=INT_EN_RDFO_EN_;
  260. }
  261. SMC_ENABLE_INT(lp, mask);
  262. spin_unlock_irqrestore(&lp->lock, flags);
  263. }
  264. /*
  265. * this puts the device in an inactive state
  266. */
  267. static void smc911x_shutdown(struct net_device *dev)
  268. {
  269. struct smc911x_local *lp = netdev_priv(dev);
  270. unsigned cr;
  271. unsigned long flags;
  272. DBG(SMC_DEBUG_FUNC, dev, "%s: --> %s\n", CARDNAME, __func__);
  273. /* Disable IRQ's */
  274. SMC_SET_INT_EN(lp, 0);
  275. /* Turn of Rx and TX */
  276. spin_lock_irqsave(&lp->lock, flags);
  277. SMC_GET_MAC_CR(lp, cr);
  278. cr &= ~(MAC_CR_TXEN_ | MAC_CR_RXEN_ | MAC_CR_HBDIS_);
  279. SMC_SET_MAC_CR(lp, cr);
  280. SMC_SET_TX_CFG(lp, TX_CFG_STOP_TX_);
  281. spin_unlock_irqrestore(&lp->lock, flags);
  282. }
  283. static inline void smc911x_drop_pkt(struct net_device *dev)
  284. {
  285. struct smc911x_local *lp = netdev_priv(dev);
  286. unsigned int fifo_count, timeout, reg;
  287. DBG(SMC_DEBUG_FUNC | SMC_DEBUG_RX, dev, "%s: --> %s\n",
  288. CARDNAME, __func__);
  289. fifo_count = SMC_GET_RX_FIFO_INF(lp) & 0xFFFF;
  290. if (fifo_count <= 4) {
  291. /* Manually dump the packet data */
  292. while (fifo_count--)
  293. SMC_GET_RX_FIFO(lp);
  294. } else {
  295. /* Fast forward through the bad packet */
  296. SMC_SET_RX_DP_CTRL(lp, RX_DP_CTRL_FFWD_BUSY_);
  297. timeout=50;
  298. do {
  299. udelay(10);
  300. reg = SMC_GET_RX_DP_CTRL(lp) & RX_DP_CTRL_FFWD_BUSY_;
  301. } while (--timeout && reg);
  302. if (timeout == 0) {
  303. PRINTK(dev, "timeout waiting for RX fast forward\n");
  304. }
  305. }
  306. }
  307. /*
  308. * This is the procedure to handle the receipt of a packet.
  309. * It should be called after checking for packet presence in
  310. * the RX status FIFO. It must be called with the spin lock
  311. * already held.
  312. */
  313. static inline void smc911x_rcv(struct net_device *dev)
  314. {
  315. struct smc911x_local *lp = netdev_priv(dev);
  316. unsigned int pkt_len, status;
  317. struct sk_buff *skb;
  318. unsigned char *data;
  319. DBG(SMC_DEBUG_FUNC | SMC_DEBUG_RX, dev, "--> %s\n",
  320. __func__);
  321. status = SMC_GET_RX_STS_FIFO(lp);
  322. DBG(SMC_DEBUG_RX, dev, "Rx pkt len %d status 0x%08x\n",
  323. (status & 0x3fff0000) >> 16, status & 0xc000ffff);
  324. pkt_len = (status & RX_STS_PKT_LEN_) >> 16;
  325. if (status & RX_STS_ES_) {
  326. /* Deal with a bad packet */
  327. dev->stats.rx_errors++;
  328. if (status & RX_STS_CRC_ERR_)
  329. dev->stats.rx_crc_errors++;
  330. else {
  331. if (status & RX_STS_LEN_ERR_)
  332. dev->stats.rx_length_errors++;
  333. if (status & RX_STS_MCAST_)
  334. dev->stats.multicast++;
  335. }
  336. /* Remove the bad packet data from the RX FIFO */
  337. smc911x_drop_pkt(dev);
  338. } else {
  339. /* Receive a valid packet */
  340. /* Alloc a buffer with extra room for DMA alignment */
  341. skb = netdev_alloc_skb(dev, pkt_len+32);
  342. if (unlikely(skb == NULL)) {
  343. PRINTK(dev, "Low memory, rcvd packet dropped.\n");
  344. dev->stats.rx_dropped++;
  345. smc911x_drop_pkt(dev);
  346. return;
  347. }
  348. /* Align IP header to 32 bits
  349. * Note that the device is configured to add a 2
  350. * byte padding to the packet start, so we really
  351. * want to write to the orignal data pointer */
  352. data = skb->data;
  353. skb_reserve(skb, 2);
  354. skb_put(skb,pkt_len-4);
  355. #ifdef SMC_USE_DMA
  356. {
  357. unsigned int fifo;
  358. /* Lower the FIFO threshold if possible */
  359. fifo = SMC_GET_FIFO_INT(lp);
  360. if (fifo & 0xFF) fifo--;
  361. DBG(SMC_DEBUG_RX, dev, "Setting RX stat FIFO threshold to %d\n",
  362. fifo & 0xff);
  363. SMC_SET_FIFO_INT(lp, fifo);
  364. /* Setup RX DMA */
  365. SMC_SET_RX_CFG(lp, RX_CFG_RX_END_ALGN16_ | ((2<<8) & RX_CFG_RXDOFF_));
  366. lp->rxdma_active = 1;
  367. lp->current_rx_skb = skb;
  368. SMC_PULL_DATA(lp, data, (pkt_len+2+15) & ~15);
  369. /* Packet processing deferred to DMA RX interrupt */
  370. }
  371. #else
  372. SMC_SET_RX_CFG(lp, RX_CFG_RX_END_ALGN4_ | ((2<<8) & RX_CFG_RXDOFF_));
  373. SMC_PULL_DATA(lp, data, pkt_len+2+3);
  374. DBG(SMC_DEBUG_PKTS, dev, "Received packet\n");
  375. PRINT_PKT(data, ((pkt_len - 4) <= 64) ? pkt_len - 4 : 64);
  376. skb->protocol = eth_type_trans(skb, dev);
  377. netif_rx(skb);
  378. dev->stats.rx_packets++;
  379. dev->stats.rx_bytes += pkt_len-4;
  380. #endif
  381. }
  382. }
  383. /*
  384. * This is called to actually send a packet to the chip.
  385. */
  386. static void smc911x_hardware_send_pkt(struct net_device *dev)
  387. {
  388. struct smc911x_local *lp = netdev_priv(dev);
  389. struct sk_buff *skb;
  390. unsigned int cmdA, cmdB, len;
  391. unsigned char *buf;
  392. DBG(SMC_DEBUG_FUNC | SMC_DEBUG_TX, dev, "--> %s\n", __func__);
  393. BUG_ON(lp->pending_tx_skb == NULL);
  394. skb = lp->pending_tx_skb;
  395. lp->pending_tx_skb = NULL;
  396. /* cmdA {25:24] data alignment [20:16] start offset [10:0] buffer length */
  397. /* cmdB {31:16] pkt tag [10:0] length */
  398. #ifdef SMC_USE_DMA
  399. /* 16 byte buffer alignment mode */
  400. buf = (char*)((u32)(skb->data) & ~0xF);
  401. len = (skb->len + 0xF + ((u32)skb->data & 0xF)) & ~0xF;
  402. cmdA = (1<<24) | (((u32)skb->data & 0xF)<<16) |
  403. TX_CMD_A_INT_FIRST_SEG_ | TX_CMD_A_INT_LAST_SEG_ |
  404. skb->len;
  405. #else
  406. buf = (char*)((u32)skb->data & ~0x3);
  407. len = (skb->len + 3 + ((u32)skb->data & 3)) & ~0x3;
  408. cmdA = (((u32)skb->data & 0x3) << 16) |
  409. TX_CMD_A_INT_FIRST_SEG_ | TX_CMD_A_INT_LAST_SEG_ |
  410. skb->len;
  411. #endif
  412. /* tag is packet length so we can use this in stats update later */
  413. cmdB = (skb->len << 16) | (skb->len & 0x7FF);
  414. DBG(SMC_DEBUG_TX, dev, "TX PKT LENGTH 0x%04x (%d) BUF 0x%p CMDA 0x%08x CMDB 0x%08x\n",
  415. len, len, buf, cmdA, cmdB);
  416. SMC_SET_TX_FIFO(lp, cmdA);
  417. SMC_SET_TX_FIFO(lp, cmdB);
  418. DBG(SMC_DEBUG_PKTS, dev, "Transmitted packet\n");
  419. PRINT_PKT(buf, len <= 64 ? len : 64);
  420. /* Send pkt via PIO or DMA */
  421. #ifdef SMC_USE_DMA
  422. lp->current_tx_skb = skb;
  423. SMC_PUSH_DATA(lp, buf, len);
  424. /* DMA complete IRQ will free buffer and set jiffies */
  425. #else
  426. SMC_PUSH_DATA(lp, buf, len);
  427. netif_trans_update(dev);
  428. dev_kfree_skb_irq(skb);
  429. #endif
  430. if (!lp->tx_throttle) {
  431. netif_wake_queue(dev);
  432. }
  433. SMC_ENABLE_INT(lp, INT_EN_TDFA_EN_ | INT_EN_TSFL_EN_);
  434. }
  435. /*
  436. * Since I am not sure if I will have enough room in the chip's ram
  437. * to store the packet, I call this routine which either sends it
  438. * now, or set the card to generates an interrupt when ready
  439. * for the packet.
  440. */
  441. static netdev_tx_t
  442. smc911x_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
  443. {
  444. struct smc911x_local *lp = netdev_priv(dev);
  445. unsigned int free;
  446. unsigned long flags;
  447. DBG(SMC_DEBUG_FUNC | SMC_DEBUG_TX, dev, "--> %s\n",
  448. __func__);
  449. spin_lock_irqsave(&lp->lock, flags);
  450. BUG_ON(lp->pending_tx_skb != NULL);
  451. free = SMC_GET_TX_FIFO_INF(lp) & TX_FIFO_INF_TDFREE_;
  452. DBG(SMC_DEBUG_TX, dev, "TX free space %d\n", free);
  453. /* Turn off the flow when running out of space in FIFO */
  454. if (free <= SMC911X_TX_FIFO_LOW_THRESHOLD) {
  455. DBG(SMC_DEBUG_TX, dev, "Disabling data flow due to low FIFO space (%d)\n",
  456. free);
  457. /* Reenable when at least 1 packet of size MTU present */
  458. SMC_SET_FIFO_TDA(lp, (SMC911X_TX_FIFO_LOW_THRESHOLD)/64);
  459. lp->tx_throttle = 1;
  460. netif_stop_queue(dev);
  461. }
  462. /* Drop packets when we run out of space in TX FIFO
  463. * Account for overhead required for:
  464. *
  465. * Tx command words 8 bytes
  466. * Start offset 15 bytes
  467. * End padding 15 bytes
  468. */
  469. if (unlikely(free < (skb->len + 8 + 15 + 15))) {
  470. netdev_warn(dev, "No Tx free space %d < %d\n",
  471. free, skb->len);
  472. lp->pending_tx_skb = NULL;
  473. dev->stats.tx_errors++;
  474. dev->stats.tx_dropped++;
  475. spin_unlock_irqrestore(&lp->lock, flags);
  476. dev_kfree_skb_any(skb);
  477. return NETDEV_TX_OK;
  478. }
  479. #ifdef SMC_USE_DMA
  480. {
  481. /* If the DMA is already running then defer this packet Tx until
  482. * the DMA IRQ starts it
  483. */
  484. if (lp->txdma_active) {
  485. DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, dev, "Tx DMA running, deferring packet\n");
  486. lp->pending_tx_skb = skb;
  487. netif_stop_queue(dev);
  488. spin_unlock_irqrestore(&lp->lock, flags);
  489. return NETDEV_TX_OK;
  490. } else {
  491. DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, dev, "Activating Tx DMA\n");
  492. lp->txdma_active = 1;
  493. }
  494. }
  495. #endif
  496. lp->pending_tx_skb = skb;
  497. smc911x_hardware_send_pkt(dev);
  498. spin_unlock_irqrestore(&lp->lock, flags);
  499. return NETDEV_TX_OK;
  500. }
  501. /*
  502. * This handles a TX status interrupt, which is only called when:
  503. * - a TX error occurred, or
  504. * - TX of a packet completed.
  505. */
  506. static void smc911x_tx(struct net_device *dev)
  507. {
  508. struct smc911x_local *lp = netdev_priv(dev);
  509. unsigned int tx_status;
  510. DBG(SMC_DEBUG_FUNC | SMC_DEBUG_TX, dev, "--> %s\n",
  511. __func__);
  512. /* Collect the TX status */
  513. while (((SMC_GET_TX_FIFO_INF(lp) & TX_FIFO_INF_TSUSED_) >> 16) != 0) {
  514. DBG(SMC_DEBUG_TX, dev, "Tx stat FIFO used 0x%04x\n",
  515. (SMC_GET_TX_FIFO_INF(lp) & TX_FIFO_INF_TSUSED_) >> 16);
  516. tx_status = SMC_GET_TX_STS_FIFO(lp);
  517. dev->stats.tx_packets++;
  518. dev->stats.tx_bytes+=tx_status>>16;
  519. DBG(SMC_DEBUG_TX, dev, "Tx FIFO tag 0x%04x status 0x%04x\n",
  520. (tx_status & 0xffff0000) >> 16,
  521. tx_status & 0x0000ffff);
  522. /* count Tx errors, but ignore lost carrier errors when in
  523. * full-duplex mode */
  524. if ((tx_status & TX_STS_ES_) && !(lp->ctl_rfduplx &&
  525. !(tx_status & 0x00000306))) {
  526. dev->stats.tx_errors++;
  527. }
  528. if (tx_status & TX_STS_MANY_COLL_) {
  529. dev->stats.collisions+=16;
  530. dev->stats.tx_aborted_errors++;
  531. } else {
  532. dev->stats.collisions+=(tx_status & TX_STS_COLL_CNT_) >> 3;
  533. }
  534. /* carrier error only has meaning for half-duplex communication */
  535. if ((tx_status & (TX_STS_LOC_ | TX_STS_NO_CARR_)) &&
  536. !lp->ctl_rfduplx) {
  537. dev->stats.tx_carrier_errors++;
  538. }
  539. if (tx_status & TX_STS_LATE_COLL_) {
  540. dev->stats.collisions++;
  541. dev->stats.tx_aborted_errors++;
  542. }
  543. }
  544. }
  545. /*---PHY CONTROL AND CONFIGURATION-----------------------------------------*/
  546. /*
  547. * Reads a register from the MII Management serial interface
  548. */
  549. static int smc911x_phy_read(struct net_device *dev, int phyaddr, int phyreg)
  550. {
  551. struct smc911x_local *lp = netdev_priv(dev);
  552. unsigned int phydata;
  553. SMC_GET_MII(lp, phyreg, phyaddr, phydata);
  554. DBG(SMC_DEBUG_MISC, dev, "%s: phyaddr=0x%x, phyreg=0x%02x, phydata=0x%04x\n",
  555. __func__, phyaddr, phyreg, phydata);
  556. return phydata;
  557. }
  558. /*
  559. * Writes a register to the MII Management serial interface
  560. */
  561. static void smc911x_phy_write(struct net_device *dev, int phyaddr, int phyreg,
  562. int phydata)
  563. {
  564. struct smc911x_local *lp = netdev_priv(dev);
  565. DBG(SMC_DEBUG_MISC, dev, "%s: phyaddr=0x%x, phyreg=0x%x, phydata=0x%x\n",
  566. __func__, phyaddr, phyreg, phydata);
  567. SMC_SET_MII(lp, phyreg, phyaddr, phydata);
  568. }
  569. /*
  570. * Finds and reports the PHY address (115 and 117 have external
  571. * PHY interface 118 has internal only
  572. */
  573. static void smc911x_phy_detect(struct net_device *dev)
  574. {
  575. struct smc911x_local *lp = netdev_priv(dev);
  576. int phyaddr;
  577. unsigned int cfg, id1, id2;
  578. DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
  579. lp->phy_type = 0;
  580. /*
  581. * Scan all 32 PHY addresses if necessary, starting at
  582. * PHY#1 to PHY#31, and then PHY#0 last.
  583. */
  584. switch(lp->version) {
  585. case CHIP_9115:
  586. case CHIP_9117:
  587. case CHIP_9215:
  588. case CHIP_9217:
  589. cfg = SMC_GET_HW_CFG(lp);
  590. if (cfg & HW_CFG_EXT_PHY_DET_) {
  591. cfg &= ~HW_CFG_PHY_CLK_SEL_;
  592. cfg |= HW_CFG_PHY_CLK_SEL_CLK_DIS_;
  593. SMC_SET_HW_CFG(lp, cfg);
  594. udelay(10); /* Wait for clocks to stop */
  595. cfg |= HW_CFG_EXT_PHY_EN_;
  596. SMC_SET_HW_CFG(lp, cfg);
  597. udelay(10); /* Wait for clocks to stop */
  598. cfg &= ~HW_CFG_PHY_CLK_SEL_;
  599. cfg |= HW_CFG_PHY_CLK_SEL_EXT_PHY_;
  600. SMC_SET_HW_CFG(lp, cfg);
  601. udelay(10); /* Wait for clocks to stop */
  602. cfg |= HW_CFG_SMI_SEL_;
  603. SMC_SET_HW_CFG(lp, cfg);
  604. for (phyaddr = 1; phyaddr < 32; ++phyaddr) {
  605. /* Read the PHY identifiers */
  606. SMC_GET_PHY_ID1(lp, phyaddr & 31, id1);
  607. SMC_GET_PHY_ID2(lp, phyaddr & 31, id2);
  608. /* Make sure it is a valid identifier */
  609. if (id1 != 0x0000 && id1 != 0xffff &&
  610. id1 != 0x8000 && id2 != 0x0000 &&
  611. id2 != 0xffff && id2 != 0x8000) {
  612. /* Save the PHY's address */
  613. lp->mii.phy_id = phyaddr & 31;
  614. lp->phy_type = id1 << 16 | id2;
  615. break;
  616. }
  617. }
  618. if (phyaddr < 32)
  619. /* Found an external PHY */
  620. break;
  621. }
  622. /* Else, fall through */
  623. default:
  624. /* Internal media only */
  625. SMC_GET_PHY_ID1(lp, 1, id1);
  626. SMC_GET_PHY_ID2(lp, 1, id2);
  627. /* Save the PHY's address */
  628. lp->mii.phy_id = 1;
  629. lp->phy_type = id1 << 16 | id2;
  630. }
  631. DBG(SMC_DEBUG_MISC, dev, "phy_id1=0x%x, phy_id2=0x%x phyaddr=0x%x\n",
  632. id1, id2, lp->mii.phy_id);
  633. }
  634. /*
  635. * Sets the PHY to a configuration as determined by the user.
  636. * Called with spin_lock held.
  637. */
  638. static int smc911x_phy_fixed(struct net_device *dev)
  639. {
  640. struct smc911x_local *lp = netdev_priv(dev);
  641. int phyaddr = lp->mii.phy_id;
  642. int bmcr;
  643. DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
  644. /* Enter Link Disable state */
  645. SMC_GET_PHY_BMCR(lp, phyaddr, bmcr);
  646. bmcr |= BMCR_PDOWN;
  647. SMC_SET_PHY_BMCR(lp, phyaddr, bmcr);
  648. /*
  649. * Set our fixed capabilities
  650. * Disable auto-negotiation
  651. */
  652. bmcr &= ~BMCR_ANENABLE;
  653. if (lp->ctl_rfduplx)
  654. bmcr |= BMCR_FULLDPLX;
  655. if (lp->ctl_rspeed == 100)
  656. bmcr |= BMCR_SPEED100;
  657. /* Write our capabilities to the phy control register */
  658. SMC_SET_PHY_BMCR(lp, phyaddr, bmcr);
  659. /* Re-Configure the Receive/Phy Control register */
  660. bmcr &= ~BMCR_PDOWN;
  661. SMC_SET_PHY_BMCR(lp, phyaddr, bmcr);
  662. return 1;
  663. }
  664. /**
  665. * smc911x_phy_reset - reset the phy
  666. * @dev: net device
  667. * @phy: phy address
  668. *
  669. * Issue a software reset for the specified PHY and
  670. * wait up to 100ms for the reset to complete. We should
  671. * not access the PHY for 50ms after issuing the reset.
  672. *
  673. * The time to wait appears to be dependent on the PHY.
  674. *
  675. */
  676. static int smc911x_phy_reset(struct net_device *dev, int phy)
  677. {
  678. struct smc911x_local *lp = netdev_priv(dev);
  679. int timeout;
  680. unsigned long flags;
  681. unsigned int reg;
  682. DBG(SMC_DEBUG_FUNC, dev, "--> %s()\n", __func__);
  683. spin_lock_irqsave(&lp->lock, flags);
  684. reg = SMC_GET_PMT_CTRL(lp);
  685. reg &= ~0xfffff030;
  686. reg |= PMT_CTRL_PHY_RST_;
  687. SMC_SET_PMT_CTRL(lp, reg);
  688. spin_unlock_irqrestore(&lp->lock, flags);
  689. for (timeout = 2; timeout; timeout--) {
  690. msleep(50);
  691. spin_lock_irqsave(&lp->lock, flags);
  692. reg = SMC_GET_PMT_CTRL(lp);
  693. spin_unlock_irqrestore(&lp->lock, flags);
  694. if (!(reg & PMT_CTRL_PHY_RST_)) {
  695. /* extra delay required because the phy may
  696. * not be completed with its reset
  697. * when PHY_BCR_RESET_ is cleared. 256us
  698. * should suffice, but use 500us to be safe
  699. */
  700. udelay(500);
  701. break;
  702. }
  703. }
  704. return reg & PMT_CTRL_PHY_RST_;
  705. }
  706. /**
  707. * smc911x_phy_powerdown - powerdown phy
  708. * @dev: net device
  709. * @phy: phy address
  710. *
  711. * Power down the specified PHY
  712. */
  713. static void smc911x_phy_powerdown(struct net_device *dev, int phy)
  714. {
  715. struct smc911x_local *lp = netdev_priv(dev);
  716. unsigned int bmcr;
  717. /* Enter Link Disable state */
  718. SMC_GET_PHY_BMCR(lp, phy, bmcr);
  719. bmcr |= BMCR_PDOWN;
  720. SMC_SET_PHY_BMCR(lp, phy, bmcr);
  721. }
  722. /**
  723. * smc911x_phy_check_media - check the media status and adjust BMCR
  724. * @dev: net device
  725. * @init: set true for initialisation
  726. *
  727. * Select duplex mode depending on negotiation state. This
  728. * also updates our carrier state.
  729. */
  730. static void smc911x_phy_check_media(struct net_device *dev, int init)
  731. {
  732. struct smc911x_local *lp = netdev_priv(dev);
  733. int phyaddr = lp->mii.phy_id;
  734. unsigned int bmcr, cr;
  735. DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
  736. if (mii_check_media(&lp->mii, netif_msg_link(lp), init)) {
  737. /* duplex state has changed */
  738. SMC_GET_PHY_BMCR(lp, phyaddr, bmcr);
  739. SMC_GET_MAC_CR(lp, cr);
  740. if (lp->mii.full_duplex) {
  741. DBG(SMC_DEBUG_MISC, dev, "Configuring for full-duplex mode\n");
  742. bmcr |= BMCR_FULLDPLX;
  743. cr |= MAC_CR_RCVOWN_;
  744. } else {
  745. DBG(SMC_DEBUG_MISC, dev, "Configuring for half-duplex mode\n");
  746. bmcr &= ~BMCR_FULLDPLX;
  747. cr &= ~MAC_CR_RCVOWN_;
  748. }
  749. SMC_SET_PHY_BMCR(lp, phyaddr, bmcr);
  750. SMC_SET_MAC_CR(lp, cr);
  751. }
  752. }
  753. /*
  754. * Configures the specified PHY through the MII management interface
  755. * using Autonegotiation.
  756. * Calls smc911x_phy_fixed() if the user has requested a certain config.
  757. * If RPC ANEG bit is set, the media selection is dependent purely on
  758. * the selection by the MII (either in the MII BMCR reg or the result
  759. * of autonegotiation.) If the RPC ANEG bit is cleared, the selection
  760. * is controlled by the RPC SPEED and RPC DPLX bits.
  761. */
  762. static void smc911x_phy_configure(struct work_struct *work)
  763. {
  764. struct smc911x_local *lp = container_of(work, struct smc911x_local,
  765. phy_configure);
  766. struct net_device *dev = lp->netdev;
  767. int phyaddr = lp->mii.phy_id;
  768. int my_phy_caps; /* My PHY capabilities */
  769. int my_ad_caps; /* My Advertised capabilities */
  770. int status;
  771. unsigned long flags;
  772. DBG(SMC_DEBUG_FUNC, dev, "--> %s()\n", __func__);
  773. /*
  774. * We should not be called if phy_type is zero.
  775. */
  776. if (lp->phy_type == 0)
  777. return;
  778. if (smc911x_phy_reset(dev, phyaddr)) {
  779. netdev_info(dev, "PHY reset timed out\n");
  780. return;
  781. }
  782. spin_lock_irqsave(&lp->lock, flags);
  783. /*
  784. * Enable PHY Interrupts (for register 18)
  785. * Interrupts listed here are enabled
  786. */
  787. SMC_SET_PHY_INT_MASK(lp, phyaddr, PHY_INT_MASK_ENERGY_ON_ |
  788. PHY_INT_MASK_ANEG_COMP_ | PHY_INT_MASK_REMOTE_FAULT_ |
  789. PHY_INT_MASK_LINK_DOWN_);
  790. /* If the user requested no auto neg, then go set his request */
  791. if (lp->mii.force_media) {
  792. smc911x_phy_fixed(dev);
  793. goto smc911x_phy_configure_exit;
  794. }
  795. /* Copy our capabilities from MII_BMSR to MII_ADVERTISE */
  796. SMC_GET_PHY_BMSR(lp, phyaddr, my_phy_caps);
  797. if (!(my_phy_caps & BMSR_ANEGCAPABLE)) {
  798. netdev_info(dev, "Auto negotiation NOT supported\n");
  799. smc911x_phy_fixed(dev);
  800. goto smc911x_phy_configure_exit;
  801. }
  802. /* CSMA capable w/ both pauses */
  803. my_ad_caps = ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM;
  804. if (my_phy_caps & BMSR_100BASE4)
  805. my_ad_caps |= ADVERTISE_100BASE4;
  806. if (my_phy_caps & BMSR_100FULL)
  807. my_ad_caps |= ADVERTISE_100FULL;
  808. if (my_phy_caps & BMSR_100HALF)
  809. my_ad_caps |= ADVERTISE_100HALF;
  810. if (my_phy_caps & BMSR_10FULL)
  811. my_ad_caps |= ADVERTISE_10FULL;
  812. if (my_phy_caps & BMSR_10HALF)
  813. my_ad_caps |= ADVERTISE_10HALF;
  814. /* Disable capabilities not selected by our user */
  815. if (lp->ctl_rspeed != 100)
  816. my_ad_caps &= ~(ADVERTISE_100BASE4|ADVERTISE_100FULL|ADVERTISE_100HALF);
  817. if (!lp->ctl_rfduplx)
  818. my_ad_caps &= ~(ADVERTISE_100FULL|ADVERTISE_10FULL);
  819. /* Update our Auto-Neg Advertisement Register */
  820. SMC_SET_PHY_MII_ADV(lp, phyaddr, my_ad_caps);
  821. lp->mii.advertising = my_ad_caps;
  822. /*
  823. * Read the register back. Without this, it appears that when
  824. * auto-negotiation is restarted, sometimes it isn't ready and
  825. * the link does not come up.
  826. */
  827. udelay(10);
  828. SMC_GET_PHY_MII_ADV(lp, phyaddr, status);
  829. DBG(SMC_DEBUG_MISC, dev, "phy caps=0x%04x\n", my_phy_caps);
  830. DBG(SMC_DEBUG_MISC, dev, "phy advertised caps=0x%04x\n", my_ad_caps);
  831. /* Restart auto-negotiation process in order to advertise my caps */
  832. SMC_SET_PHY_BMCR(lp, phyaddr, BMCR_ANENABLE | BMCR_ANRESTART);
  833. smc911x_phy_check_media(dev, 1);
  834. smc911x_phy_configure_exit:
  835. spin_unlock_irqrestore(&lp->lock, flags);
  836. }
  837. /*
  838. * smc911x_phy_interrupt
  839. *
  840. * Purpose: Handle interrupts relating to PHY register 18. This is
  841. * called from the "hard" interrupt handler under our private spinlock.
  842. */
  843. static void smc911x_phy_interrupt(struct net_device *dev)
  844. {
  845. struct smc911x_local *lp = netdev_priv(dev);
  846. int phyaddr = lp->mii.phy_id;
  847. int status;
  848. DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
  849. if (lp->phy_type == 0)
  850. return;
  851. smc911x_phy_check_media(dev, 0);
  852. /* read to clear status bits */
  853. SMC_GET_PHY_INT_SRC(lp, phyaddr,status);
  854. DBG(SMC_DEBUG_MISC, dev, "PHY interrupt status 0x%04x\n",
  855. status & 0xffff);
  856. DBG(SMC_DEBUG_MISC, dev, "AFC_CFG 0x%08x\n",
  857. SMC_GET_AFC_CFG(lp));
  858. }
  859. /*--- END PHY CONTROL AND CONFIGURATION-------------------------------------*/
  860. /*
  861. * This is the main routine of the driver, to handle the device when
  862. * it needs some attention.
  863. */
  864. static irqreturn_t smc911x_interrupt(int irq, void *dev_id)
  865. {
  866. struct net_device *dev = dev_id;
  867. struct smc911x_local *lp = netdev_priv(dev);
  868. unsigned int status, mask, timeout;
  869. unsigned int rx_overrun=0, cr, pkts;
  870. unsigned long flags;
  871. DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
  872. spin_lock_irqsave(&lp->lock, flags);
  873. /* Spurious interrupt check */
  874. if ((SMC_GET_IRQ_CFG(lp) & (INT_CFG_IRQ_INT_ | INT_CFG_IRQ_EN_)) !=
  875. (INT_CFG_IRQ_INT_ | INT_CFG_IRQ_EN_)) {
  876. spin_unlock_irqrestore(&lp->lock, flags);
  877. return IRQ_NONE;
  878. }
  879. mask = SMC_GET_INT_EN(lp);
  880. SMC_SET_INT_EN(lp, 0);
  881. /* set a timeout value, so I don't stay here forever */
  882. timeout = 8;
  883. do {
  884. status = SMC_GET_INT(lp);
  885. DBG(SMC_DEBUG_MISC, dev, "INT 0x%08x MASK 0x%08x OUTSIDE MASK 0x%08x\n",
  886. status, mask, status & ~mask);
  887. status &= mask;
  888. if (!status)
  889. break;
  890. /* Handle SW interrupt condition */
  891. if (status & INT_STS_SW_INT_) {
  892. SMC_ACK_INT(lp, INT_STS_SW_INT_);
  893. mask &= ~INT_EN_SW_INT_EN_;
  894. }
  895. /* Handle various error conditions */
  896. if (status & INT_STS_RXE_) {
  897. SMC_ACK_INT(lp, INT_STS_RXE_);
  898. dev->stats.rx_errors++;
  899. }
  900. if (status & INT_STS_RXDFH_INT_) {
  901. SMC_ACK_INT(lp, INT_STS_RXDFH_INT_);
  902. dev->stats.rx_dropped+=SMC_GET_RX_DROP(lp);
  903. }
  904. /* Undocumented interrupt-what is the right thing to do here? */
  905. if (status & INT_STS_RXDF_INT_) {
  906. SMC_ACK_INT(lp, INT_STS_RXDF_INT_);
  907. }
  908. /* Rx Data FIFO exceeds set level */
  909. if (status & INT_STS_RDFL_) {
  910. if (IS_REV_A(lp->revision)) {
  911. rx_overrun=1;
  912. SMC_GET_MAC_CR(lp, cr);
  913. cr &= ~MAC_CR_RXEN_;
  914. SMC_SET_MAC_CR(lp, cr);
  915. DBG(SMC_DEBUG_RX, dev, "RX overrun\n");
  916. dev->stats.rx_errors++;
  917. dev->stats.rx_fifo_errors++;
  918. }
  919. SMC_ACK_INT(lp, INT_STS_RDFL_);
  920. }
  921. if (status & INT_STS_RDFO_) {
  922. if (!IS_REV_A(lp->revision)) {
  923. SMC_GET_MAC_CR(lp, cr);
  924. cr &= ~MAC_CR_RXEN_;
  925. SMC_SET_MAC_CR(lp, cr);
  926. rx_overrun=1;
  927. DBG(SMC_DEBUG_RX, dev, "RX overrun\n");
  928. dev->stats.rx_errors++;
  929. dev->stats.rx_fifo_errors++;
  930. }
  931. SMC_ACK_INT(lp, INT_STS_RDFO_);
  932. }
  933. /* Handle receive condition */
  934. if ((status & INT_STS_RSFL_) || rx_overrun) {
  935. unsigned int fifo;
  936. DBG(SMC_DEBUG_RX, dev, "RX irq\n");
  937. fifo = SMC_GET_RX_FIFO_INF(lp);
  938. pkts = (fifo & RX_FIFO_INF_RXSUSED_) >> 16;
  939. DBG(SMC_DEBUG_RX, dev, "Rx FIFO pkts %d, bytes %d\n",
  940. pkts, fifo & 0xFFFF);
  941. if (pkts != 0) {
  942. #ifdef SMC_USE_DMA
  943. unsigned int fifo;
  944. if (lp->rxdma_active){
  945. DBG(SMC_DEBUG_RX | SMC_DEBUG_DMA, dev,
  946. "RX DMA active\n");
  947. /* The DMA is already running so up the IRQ threshold */
  948. fifo = SMC_GET_FIFO_INT(lp) & ~0xFF;
  949. fifo |= pkts & 0xFF;
  950. DBG(SMC_DEBUG_RX, dev,
  951. "Setting RX stat FIFO threshold to %d\n",
  952. fifo & 0xff);
  953. SMC_SET_FIFO_INT(lp, fifo);
  954. } else
  955. #endif
  956. smc911x_rcv(dev);
  957. }
  958. SMC_ACK_INT(lp, INT_STS_RSFL_);
  959. }
  960. /* Handle transmit FIFO available */
  961. if (status & INT_STS_TDFA_) {
  962. DBG(SMC_DEBUG_TX, dev, "TX data FIFO space available irq\n");
  963. SMC_SET_FIFO_TDA(lp, 0xFF);
  964. lp->tx_throttle = 0;
  965. #ifdef SMC_USE_DMA
  966. if (!lp->txdma_active)
  967. #endif
  968. netif_wake_queue(dev);
  969. SMC_ACK_INT(lp, INT_STS_TDFA_);
  970. }
  971. /* Handle transmit done condition */
  972. #if 1
  973. if (status & (INT_STS_TSFL_ | INT_STS_GPT_INT_)) {
  974. DBG(SMC_DEBUG_TX | SMC_DEBUG_MISC, dev,
  975. "Tx stat FIFO limit (%d) /GPT irq\n",
  976. (SMC_GET_FIFO_INT(lp) & 0x00ff0000) >> 16);
  977. smc911x_tx(dev);
  978. SMC_SET_GPT_CFG(lp, GPT_CFG_TIMER_EN_ | 10000);
  979. SMC_ACK_INT(lp, INT_STS_TSFL_);
  980. SMC_ACK_INT(lp, INT_STS_TSFL_ | INT_STS_GPT_INT_);
  981. }
  982. #else
  983. if (status & INT_STS_TSFL_) {
  984. DBG(SMC_DEBUG_TX, dev, "TX status FIFO limit (%d) irq\n", ?);
  985. smc911x_tx(dev);
  986. SMC_ACK_INT(lp, INT_STS_TSFL_);
  987. }
  988. if (status & INT_STS_GPT_INT_) {
  989. DBG(SMC_DEBUG_RX, dev, "IRQ_CFG 0x%08x FIFO_INT 0x%08x RX_CFG 0x%08x\n",
  990. SMC_GET_IRQ_CFG(lp),
  991. SMC_GET_FIFO_INT(lp),
  992. SMC_GET_RX_CFG(lp));
  993. DBG(SMC_DEBUG_RX, dev, "Rx Stat FIFO Used 0x%02x Data FIFO Used 0x%04x Stat FIFO 0x%08x\n",
  994. (SMC_GET_RX_FIFO_INF(lp) & 0x00ff0000) >> 16,
  995. SMC_GET_RX_FIFO_INF(lp) & 0xffff,
  996. SMC_GET_RX_STS_FIFO_PEEK(lp));
  997. SMC_SET_GPT_CFG(lp, GPT_CFG_TIMER_EN_ | 10000);
  998. SMC_ACK_INT(lp, INT_STS_GPT_INT_);
  999. }
  1000. #endif
  1001. /* Handle PHY interrupt condition */
  1002. if (status & INT_STS_PHY_INT_) {
  1003. DBG(SMC_DEBUG_MISC, dev, "PHY irq\n");
  1004. smc911x_phy_interrupt(dev);
  1005. SMC_ACK_INT(lp, INT_STS_PHY_INT_);
  1006. }
  1007. } while (--timeout);
  1008. /* restore mask state */
  1009. SMC_SET_INT_EN(lp, mask);
  1010. DBG(SMC_DEBUG_MISC, dev, "Interrupt done (%d loops)\n",
  1011. 8-timeout);
  1012. spin_unlock_irqrestore(&lp->lock, flags);
  1013. return IRQ_HANDLED;
  1014. }
  1015. #ifdef SMC_USE_DMA
  1016. static void
  1017. smc911x_tx_dma_irq(void *data)
  1018. {
  1019. struct smc911x_local *lp = data;
  1020. struct net_device *dev = lp->netdev;
  1021. struct sk_buff *skb = lp->current_tx_skb;
  1022. unsigned long flags;
  1023. DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
  1024. DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, dev, "TX DMA irq handler\n");
  1025. BUG_ON(skb == NULL);
  1026. dma_unmap_single(lp->dev, tx_dmabuf, tx_dmalen, DMA_TO_DEVICE);
  1027. netif_trans_update(dev);
  1028. dev_kfree_skb_irq(skb);
  1029. lp->current_tx_skb = NULL;
  1030. if (lp->pending_tx_skb != NULL)
  1031. smc911x_hardware_send_pkt(dev);
  1032. else {
  1033. DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, dev,
  1034. "No pending Tx packets. DMA disabled\n");
  1035. spin_lock_irqsave(&lp->lock, flags);
  1036. lp->txdma_active = 0;
  1037. if (!lp->tx_throttle) {
  1038. netif_wake_queue(dev);
  1039. }
  1040. spin_unlock_irqrestore(&lp->lock, flags);
  1041. }
  1042. DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, dev,
  1043. "TX DMA irq completed\n");
  1044. }
  1045. static void
  1046. smc911x_rx_dma_irq(void *data)
  1047. {
  1048. struct smc911x_local *lp = data;
  1049. struct net_device *dev = lp->netdev;
  1050. struct sk_buff *skb = lp->current_rx_skb;
  1051. unsigned long flags;
  1052. unsigned int pkts;
  1053. DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
  1054. DBG(SMC_DEBUG_RX | SMC_DEBUG_DMA, dev, "RX DMA irq handler\n");
  1055. dma_unmap_single(lp->dev, rx_dmabuf, rx_dmalen, DMA_FROM_DEVICE);
  1056. BUG_ON(skb == NULL);
  1057. lp->current_rx_skb = NULL;
  1058. PRINT_PKT(skb->data, skb->len);
  1059. skb->protocol = eth_type_trans(skb, dev);
  1060. dev->stats.rx_packets++;
  1061. dev->stats.rx_bytes += skb->len;
  1062. netif_rx(skb);
  1063. spin_lock_irqsave(&lp->lock, flags);
  1064. pkts = (SMC_GET_RX_FIFO_INF(lp) & RX_FIFO_INF_RXSUSED_) >> 16;
  1065. if (pkts != 0) {
  1066. smc911x_rcv(dev);
  1067. }else {
  1068. lp->rxdma_active = 0;
  1069. }
  1070. spin_unlock_irqrestore(&lp->lock, flags);
  1071. DBG(SMC_DEBUG_RX | SMC_DEBUG_DMA, dev,
  1072. "RX DMA irq completed. DMA RX FIFO PKTS %d\n",
  1073. pkts);
  1074. }
  1075. #endif /* SMC_USE_DMA */
  1076. #ifdef CONFIG_NET_POLL_CONTROLLER
  1077. /*
  1078. * Polling receive - used by netconsole and other diagnostic tools
  1079. * to allow network i/o with interrupts disabled.
  1080. */
  1081. static void smc911x_poll_controller(struct net_device *dev)
  1082. {
  1083. disable_irq(dev->irq);
  1084. smc911x_interrupt(dev->irq, dev);
  1085. enable_irq(dev->irq);
  1086. }
  1087. #endif
  1088. /* Our watchdog timed out. Called by the networking layer */
  1089. static void smc911x_timeout(struct net_device *dev)
  1090. {
  1091. struct smc911x_local *lp = netdev_priv(dev);
  1092. int status, mask;
  1093. unsigned long flags;
  1094. DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
  1095. spin_lock_irqsave(&lp->lock, flags);
  1096. status = SMC_GET_INT(lp);
  1097. mask = SMC_GET_INT_EN(lp);
  1098. spin_unlock_irqrestore(&lp->lock, flags);
  1099. DBG(SMC_DEBUG_MISC, dev, "INT 0x%02x MASK 0x%02x\n",
  1100. status, mask);
  1101. /* Dump the current TX FIFO contents and restart */
  1102. mask = SMC_GET_TX_CFG(lp);
  1103. SMC_SET_TX_CFG(lp, mask | TX_CFG_TXS_DUMP_ | TX_CFG_TXD_DUMP_);
  1104. /*
  1105. * Reconfiguring the PHY doesn't seem like a bad idea here, but
  1106. * smc911x_phy_configure() calls msleep() which calls schedule_timeout()
  1107. * which calls schedule(). Hence we use a work queue.
  1108. */
  1109. if (lp->phy_type != 0)
  1110. schedule_work(&lp->phy_configure);
  1111. /* We can accept TX packets again */
  1112. netif_trans_update(dev); /* prevent tx timeout */
  1113. netif_wake_queue(dev);
  1114. }
  1115. /*
  1116. * This routine will, depending on the values passed to it,
  1117. * either make it accept multicast packets, go into
  1118. * promiscuous mode (for TCPDUMP and cousins) or accept
  1119. * a select set of multicast packets
  1120. */
  1121. static void smc911x_set_multicast_list(struct net_device *dev)
  1122. {
  1123. struct smc911x_local *lp = netdev_priv(dev);
  1124. unsigned int multicast_table[2];
  1125. unsigned int mcr, update_multicast = 0;
  1126. unsigned long flags;
  1127. DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
  1128. spin_lock_irqsave(&lp->lock, flags);
  1129. SMC_GET_MAC_CR(lp, mcr);
  1130. spin_unlock_irqrestore(&lp->lock, flags);
  1131. if (dev->flags & IFF_PROMISC) {
  1132. DBG(SMC_DEBUG_MISC, dev, "RCR_PRMS\n");
  1133. mcr |= MAC_CR_PRMS_;
  1134. }
  1135. /*
  1136. * Here, I am setting this to accept all multicast packets.
  1137. * I don't need to zero the multicast table, because the flag is
  1138. * checked before the table is
  1139. */
  1140. else if (dev->flags & IFF_ALLMULTI || netdev_mc_count(dev) > 16) {
  1141. DBG(SMC_DEBUG_MISC, dev, "RCR_ALMUL\n");
  1142. mcr |= MAC_CR_MCPAS_;
  1143. }
  1144. /*
  1145. * This sets the internal hardware table to filter out unwanted
  1146. * multicast packets before they take up memory.
  1147. *
  1148. * The SMC chip uses a hash table where the high 6 bits of the CRC of
  1149. * address are the offset into the table. If that bit is 1, then the
  1150. * multicast packet is accepted. Otherwise, it's dropped silently.
  1151. *
  1152. * To use the 6 bits as an offset into the table, the high 1 bit is
  1153. * the number of the 32 bit register, while the low 5 bits are the bit
  1154. * within that register.
  1155. */
  1156. else if (!netdev_mc_empty(dev)) {
  1157. struct netdev_hw_addr *ha;
  1158. /* Set the Hash perfec mode */
  1159. mcr |= MAC_CR_HPFILT_;
  1160. /* start with a table of all zeros: reject all */
  1161. memset(multicast_table, 0, sizeof(multicast_table));
  1162. netdev_for_each_mc_addr(ha, dev) {
  1163. u32 position;
  1164. /* upper 6 bits are used as hash index */
  1165. position = ether_crc(ETH_ALEN, ha->addr)>>26;
  1166. multicast_table[position>>5] |= 1 << (position&0x1f);
  1167. }
  1168. /* be sure I get rid of flags I might have set */
  1169. mcr &= ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_);
  1170. /* now, the table can be loaded into the chipset */
  1171. update_multicast = 1;
  1172. } else {
  1173. DBG(SMC_DEBUG_MISC, dev, "~(MAC_CR_PRMS_|MAC_CR_MCPAS_)\n");
  1174. mcr &= ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_);
  1175. /*
  1176. * since I'm disabling all multicast entirely, I need to
  1177. * clear the multicast list
  1178. */
  1179. memset(multicast_table, 0, sizeof(multicast_table));
  1180. update_multicast = 1;
  1181. }
  1182. spin_lock_irqsave(&lp->lock, flags);
  1183. SMC_SET_MAC_CR(lp, mcr);
  1184. if (update_multicast) {
  1185. DBG(SMC_DEBUG_MISC, dev,
  1186. "update mcast hash table 0x%08x 0x%08x\n",
  1187. multicast_table[0], multicast_table[1]);
  1188. SMC_SET_HASHL(lp, multicast_table[0]);
  1189. SMC_SET_HASHH(lp, multicast_table[1]);
  1190. }
  1191. spin_unlock_irqrestore(&lp->lock, flags);
  1192. }
  1193. /*
  1194. * Open and Initialize the board
  1195. *
  1196. * Set up everything, reset the card, etc..
  1197. */
  1198. static int
  1199. smc911x_open(struct net_device *dev)
  1200. {
  1201. struct smc911x_local *lp = netdev_priv(dev);
  1202. DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
  1203. /* reset the hardware */
  1204. smc911x_reset(dev);
  1205. /* Configure the PHY, initialize the link state */
  1206. smc911x_phy_configure(&lp->phy_configure);
  1207. /* Turn on Tx + Rx */
  1208. smc911x_enable(dev);
  1209. netif_start_queue(dev);
  1210. return 0;
  1211. }
  1212. /*
  1213. * smc911x_close
  1214. *
  1215. * this makes the board clean up everything that it can
  1216. * and not talk to the outside world. Caused by
  1217. * an 'ifconfig ethX down'
  1218. */
  1219. static int smc911x_close(struct net_device *dev)
  1220. {
  1221. struct smc911x_local *lp = netdev_priv(dev);
  1222. DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
  1223. netif_stop_queue(dev);
  1224. netif_carrier_off(dev);
  1225. /* clear everything */
  1226. smc911x_shutdown(dev);
  1227. if (lp->phy_type != 0) {
  1228. /* We need to ensure that no calls to
  1229. * smc911x_phy_configure are pending.
  1230. */
  1231. cancel_work_sync(&lp->phy_configure);
  1232. smc911x_phy_powerdown(dev, lp->mii.phy_id);
  1233. }
  1234. if (lp->pending_tx_skb) {
  1235. dev_kfree_skb(lp->pending_tx_skb);
  1236. lp->pending_tx_skb = NULL;
  1237. }
  1238. return 0;
  1239. }
  1240. /*
  1241. * Ethtool support
  1242. */
  1243. static int
  1244. smc911x_ethtool_get_link_ksettings(struct net_device *dev,
  1245. struct ethtool_link_ksettings *cmd)
  1246. {
  1247. struct smc911x_local *lp = netdev_priv(dev);
  1248. int status;
  1249. unsigned long flags;
  1250. u32 supported;
  1251. DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
  1252. if (lp->phy_type != 0) {
  1253. spin_lock_irqsave(&lp->lock, flags);
  1254. mii_ethtool_get_link_ksettings(&lp->mii, cmd);
  1255. spin_unlock_irqrestore(&lp->lock, flags);
  1256. } else {
  1257. supported = SUPPORTED_10baseT_Half |
  1258. SUPPORTED_10baseT_Full |
  1259. SUPPORTED_TP | SUPPORTED_AUI;
  1260. if (lp->ctl_rspeed == 10)
  1261. cmd->base.speed = SPEED_10;
  1262. else if (lp->ctl_rspeed == 100)
  1263. cmd->base.speed = SPEED_100;
  1264. cmd->base.autoneg = AUTONEG_DISABLE;
  1265. cmd->base.port = 0;
  1266. SMC_GET_PHY_SPECIAL(lp, lp->mii.phy_id, status);
  1267. cmd->base.duplex =
  1268. (status & (PHY_SPECIAL_SPD_10FULL_ | PHY_SPECIAL_SPD_100FULL_)) ?
  1269. DUPLEX_FULL : DUPLEX_HALF;
  1270. ethtool_convert_legacy_u32_to_link_mode(
  1271. cmd->link_modes.supported, supported);
  1272. }
  1273. return 0;
  1274. }
  1275. static int
  1276. smc911x_ethtool_set_link_ksettings(struct net_device *dev,
  1277. const struct ethtool_link_ksettings *cmd)
  1278. {
  1279. struct smc911x_local *lp = netdev_priv(dev);
  1280. int ret;
  1281. unsigned long flags;
  1282. if (lp->phy_type != 0) {
  1283. spin_lock_irqsave(&lp->lock, flags);
  1284. ret = mii_ethtool_set_link_ksettings(&lp->mii, cmd);
  1285. spin_unlock_irqrestore(&lp->lock, flags);
  1286. } else {
  1287. if (cmd->base.autoneg != AUTONEG_DISABLE ||
  1288. cmd->base.speed != SPEED_10 ||
  1289. (cmd->base.duplex != DUPLEX_HALF &&
  1290. cmd->base.duplex != DUPLEX_FULL) ||
  1291. (cmd->base.port != PORT_TP &&
  1292. cmd->base.port != PORT_AUI))
  1293. return -EINVAL;
  1294. lp->ctl_rfduplx = cmd->base.duplex == DUPLEX_FULL;
  1295. ret = 0;
  1296. }
  1297. return ret;
  1298. }
  1299. static void
  1300. smc911x_ethtool_getdrvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
  1301. {
  1302. strlcpy(info->driver, CARDNAME, sizeof(info->driver));
  1303. strlcpy(info->version, version, sizeof(info->version));
  1304. strlcpy(info->bus_info, dev_name(dev->dev.parent),
  1305. sizeof(info->bus_info));
  1306. }
  1307. static int smc911x_ethtool_nwayreset(struct net_device *dev)
  1308. {
  1309. struct smc911x_local *lp = netdev_priv(dev);
  1310. int ret = -EINVAL;
  1311. unsigned long flags;
  1312. if (lp->phy_type != 0) {
  1313. spin_lock_irqsave(&lp->lock, flags);
  1314. ret = mii_nway_restart(&lp->mii);
  1315. spin_unlock_irqrestore(&lp->lock, flags);
  1316. }
  1317. return ret;
  1318. }
  1319. static u32 smc911x_ethtool_getmsglevel(struct net_device *dev)
  1320. {
  1321. struct smc911x_local *lp = netdev_priv(dev);
  1322. return lp->msg_enable;
  1323. }
  1324. static void smc911x_ethtool_setmsglevel(struct net_device *dev, u32 level)
  1325. {
  1326. struct smc911x_local *lp = netdev_priv(dev);
  1327. lp->msg_enable = level;
  1328. }
  1329. static int smc911x_ethtool_getregslen(struct net_device *dev)
  1330. {
  1331. /* System regs + MAC regs + PHY regs */
  1332. return (((E2P_CMD - ID_REV)/4 + 1) +
  1333. (WUCSR - MAC_CR)+1 + 32) * sizeof(u32);
  1334. }
  1335. static void smc911x_ethtool_getregs(struct net_device *dev,
  1336. struct ethtool_regs* regs, void *buf)
  1337. {
  1338. struct smc911x_local *lp = netdev_priv(dev);
  1339. unsigned long flags;
  1340. u32 reg,i,j=0;
  1341. u32 *data = (u32*)buf;
  1342. regs->version = lp->version;
  1343. for(i=ID_REV;i<=E2P_CMD;i+=4) {
  1344. data[j++] = SMC_inl(lp, i);
  1345. }
  1346. for(i=MAC_CR;i<=WUCSR;i++) {
  1347. spin_lock_irqsave(&lp->lock, flags);
  1348. SMC_GET_MAC_CSR(lp, i, reg);
  1349. spin_unlock_irqrestore(&lp->lock, flags);
  1350. data[j++] = reg;
  1351. }
  1352. for(i=0;i<=31;i++) {
  1353. spin_lock_irqsave(&lp->lock, flags);
  1354. SMC_GET_MII(lp, i, lp->mii.phy_id, reg);
  1355. spin_unlock_irqrestore(&lp->lock, flags);
  1356. data[j++] = reg & 0xFFFF;
  1357. }
  1358. }
  1359. static int smc911x_ethtool_wait_eeprom_ready(struct net_device *dev)
  1360. {
  1361. struct smc911x_local *lp = netdev_priv(dev);
  1362. unsigned int timeout;
  1363. int e2p_cmd;
  1364. e2p_cmd = SMC_GET_E2P_CMD(lp);
  1365. for(timeout=10;(e2p_cmd & E2P_CMD_EPC_BUSY_) && timeout; timeout--) {
  1366. if (e2p_cmd & E2P_CMD_EPC_TIMEOUT_) {
  1367. PRINTK(dev, "%s timeout waiting for EEPROM to respond\n",
  1368. __func__);
  1369. return -EFAULT;
  1370. }
  1371. mdelay(1);
  1372. e2p_cmd = SMC_GET_E2P_CMD(lp);
  1373. }
  1374. if (timeout == 0) {
  1375. PRINTK(dev, "%s timeout waiting for EEPROM CMD not busy\n",
  1376. __func__);
  1377. return -ETIMEDOUT;
  1378. }
  1379. return 0;
  1380. }
  1381. static inline int smc911x_ethtool_write_eeprom_cmd(struct net_device *dev,
  1382. int cmd, int addr)
  1383. {
  1384. struct smc911x_local *lp = netdev_priv(dev);
  1385. int ret;
  1386. if ((ret = smc911x_ethtool_wait_eeprom_ready(dev))!=0)
  1387. return ret;
  1388. SMC_SET_E2P_CMD(lp, E2P_CMD_EPC_BUSY_ |
  1389. ((cmd) & (0x7<<28)) |
  1390. ((addr) & 0xFF));
  1391. return 0;
  1392. }
  1393. static inline int smc911x_ethtool_read_eeprom_byte(struct net_device *dev,
  1394. u8 *data)
  1395. {
  1396. struct smc911x_local *lp = netdev_priv(dev);
  1397. int ret;
  1398. if ((ret = smc911x_ethtool_wait_eeprom_ready(dev))!=0)
  1399. return ret;
  1400. *data = SMC_GET_E2P_DATA(lp);
  1401. return 0;
  1402. }
  1403. static inline int smc911x_ethtool_write_eeprom_byte(struct net_device *dev,
  1404. u8 data)
  1405. {
  1406. struct smc911x_local *lp = netdev_priv(dev);
  1407. int ret;
  1408. if ((ret = smc911x_ethtool_wait_eeprom_ready(dev))!=0)
  1409. return ret;
  1410. SMC_SET_E2P_DATA(lp, data);
  1411. return 0;
  1412. }
  1413. static int smc911x_ethtool_geteeprom(struct net_device *dev,
  1414. struct ethtool_eeprom *eeprom, u8 *data)
  1415. {
  1416. u8 eebuf[SMC911X_EEPROM_LEN];
  1417. int i, ret;
  1418. for(i=0;i<SMC911X_EEPROM_LEN;i++) {
  1419. if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_READ_, i ))!=0)
  1420. return ret;
  1421. if ((ret=smc911x_ethtool_read_eeprom_byte(dev, &eebuf[i]))!=0)
  1422. return ret;
  1423. }
  1424. memcpy(data, eebuf+eeprom->offset, eeprom->len);
  1425. return 0;
  1426. }
  1427. static int smc911x_ethtool_seteeprom(struct net_device *dev,
  1428. struct ethtool_eeprom *eeprom, u8 *data)
  1429. {
  1430. int i, ret;
  1431. /* Enable erase */
  1432. if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_EWEN_, 0 ))!=0)
  1433. return ret;
  1434. for(i=eeprom->offset;i<(eeprom->offset+eeprom->len);i++) {
  1435. /* erase byte */
  1436. if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_ERASE_, i ))!=0)
  1437. return ret;
  1438. /* write byte */
  1439. if ((ret=smc911x_ethtool_write_eeprom_byte(dev, *data))!=0)
  1440. return ret;
  1441. if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_WRITE_, i ))!=0)
  1442. return ret;
  1443. }
  1444. return 0;
  1445. }
  1446. static int smc911x_ethtool_geteeprom_len(struct net_device *dev)
  1447. {
  1448. return SMC911X_EEPROM_LEN;
  1449. }
  1450. static const struct ethtool_ops smc911x_ethtool_ops = {
  1451. .get_drvinfo = smc911x_ethtool_getdrvinfo,
  1452. .get_msglevel = smc911x_ethtool_getmsglevel,
  1453. .set_msglevel = smc911x_ethtool_setmsglevel,
  1454. .nway_reset = smc911x_ethtool_nwayreset,
  1455. .get_link = ethtool_op_get_link,
  1456. .get_regs_len = smc911x_ethtool_getregslen,
  1457. .get_regs = smc911x_ethtool_getregs,
  1458. .get_eeprom_len = smc911x_ethtool_geteeprom_len,
  1459. .get_eeprom = smc911x_ethtool_geteeprom,
  1460. .set_eeprom = smc911x_ethtool_seteeprom,
  1461. .get_link_ksettings = smc911x_ethtool_get_link_ksettings,
  1462. .set_link_ksettings = smc911x_ethtool_set_link_ksettings,
  1463. };
  1464. /*
  1465. * smc911x_findirq
  1466. *
  1467. * This routine has a simple purpose -- make the SMC chip generate an
  1468. * interrupt, so an auto-detect routine can detect it, and find the IRQ,
  1469. */
  1470. static int smc911x_findirq(struct net_device *dev)
  1471. {
  1472. struct smc911x_local *lp = netdev_priv(dev);
  1473. int timeout = 20;
  1474. unsigned long cookie;
  1475. DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
  1476. cookie = probe_irq_on();
  1477. /*
  1478. * Force a SW interrupt
  1479. */
  1480. SMC_SET_INT_EN(lp, INT_EN_SW_INT_EN_);
  1481. /*
  1482. * Wait until positive that the interrupt has been generated
  1483. */
  1484. do {
  1485. int int_status;
  1486. udelay(10);
  1487. int_status = SMC_GET_INT_EN(lp);
  1488. if (int_status & INT_EN_SW_INT_EN_)
  1489. break; /* got the interrupt */
  1490. } while (--timeout);
  1491. /*
  1492. * there is really nothing that I can do here if timeout fails,
  1493. * as autoirq_report will return a 0 anyway, which is what I
  1494. * want in this case. Plus, the clean up is needed in both
  1495. * cases.
  1496. */
  1497. /* and disable all interrupts again */
  1498. SMC_SET_INT_EN(lp, 0);
  1499. /* and return what I found */
  1500. return probe_irq_off(cookie);
  1501. }
  1502. static const struct net_device_ops smc911x_netdev_ops = {
  1503. .ndo_open = smc911x_open,
  1504. .ndo_stop = smc911x_close,
  1505. .ndo_start_xmit = smc911x_hard_start_xmit,
  1506. .ndo_tx_timeout = smc911x_timeout,
  1507. .ndo_set_rx_mode = smc911x_set_multicast_list,
  1508. .ndo_validate_addr = eth_validate_addr,
  1509. .ndo_set_mac_address = eth_mac_addr,
  1510. #ifdef CONFIG_NET_POLL_CONTROLLER
  1511. .ndo_poll_controller = smc911x_poll_controller,
  1512. #endif
  1513. };
  1514. /*
  1515. * Function: smc911x_probe(unsigned long ioaddr)
  1516. *
  1517. * Purpose:
  1518. * Tests to see if a given ioaddr points to an SMC911x chip.
  1519. * Returns a 0 on success
  1520. *
  1521. * Algorithm:
  1522. * (1) see if the endian word is OK
  1523. * (1) see if I recognize the chip ID in the appropriate register
  1524. *
  1525. * Here I do typical initialization tasks.
  1526. *
  1527. * o Initialize the structure if needed
  1528. * o print out my vanity message if not done so already
  1529. * o print out what type of hardware is detected
  1530. * o print out the ethernet address
  1531. * o find the IRQ
  1532. * o set up my private data
  1533. * o configure the dev structure with my subroutines
  1534. * o actually GRAB the irq.
  1535. * o GRAB the region
  1536. */
  1537. static int smc911x_probe(struct net_device *dev)
  1538. {
  1539. struct smc911x_local *lp = netdev_priv(dev);
  1540. int i, retval;
  1541. unsigned int val, chip_id, revision;
  1542. const char *version_string;
  1543. unsigned long irq_flags;
  1544. #ifdef SMC_USE_DMA
  1545. struct dma_slave_config config;
  1546. dma_cap_mask_t mask;
  1547. #endif
  1548. DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
  1549. /* First, see if the endian word is recognized */
  1550. val = SMC_GET_BYTE_TEST(lp);
  1551. DBG(SMC_DEBUG_MISC, dev, "%s: endian probe returned 0x%04x\n",
  1552. CARDNAME, val);
  1553. if (val != 0x87654321) {
  1554. netdev_err(dev, "Invalid chip endian 0x%08x\n", val);
  1555. retval = -ENODEV;
  1556. goto err_out;
  1557. }
  1558. /*
  1559. * check if the revision register is something that I
  1560. * recognize. These might need to be added to later,
  1561. * as future revisions could be added.
  1562. */
  1563. chip_id = SMC_GET_PN(lp);
  1564. DBG(SMC_DEBUG_MISC, dev, "%s: id probe returned 0x%04x\n",
  1565. CARDNAME, chip_id);
  1566. for(i=0;chip_ids[i].id != 0; i++) {
  1567. if (chip_ids[i].id == chip_id) break;
  1568. }
  1569. if (!chip_ids[i].id) {
  1570. netdev_err(dev, "Unknown chip ID %04x\n", chip_id);
  1571. retval = -ENODEV;
  1572. goto err_out;
  1573. }
  1574. version_string = chip_ids[i].name;
  1575. revision = SMC_GET_REV(lp);
  1576. DBG(SMC_DEBUG_MISC, dev, "%s: revision = 0x%04x\n", CARDNAME, revision);
  1577. /* At this point I'll assume that the chip is an SMC911x. */
  1578. DBG(SMC_DEBUG_MISC, dev, "%s: Found a %s\n",
  1579. CARDNAME, chip_ids[i].name);
  1580. /* Validate the TX FIFO size requested */
  1581. if ((tx_fifo_kb < 2) || (tx_fifo_kb > 14)) {
  1582. netdev_err(dev, "Invalid TX FIFO size requested %d\n",
  1583. tx_fifo_kb);
  1584. retval = -EINVAL;
  1585. goto err_out;
  1586. }
  1587. /* fill in some of the fields */
  1588. lp->version = chip_ids[i].id;
  1589. lp->revision = revision;
  1590. lp->tx_fifo_kb = tx_fifo_kb;
  1591. /* Reverse calculate the RX FIFO size from the TX */
  1592. lp->tx_fifo_size=(lp->tx_fifo_kb<<10) - 512;
  1593. lp->rx_fifo_size= ((0x4000 - 512 - lp->tx_fifo_size) / 16) * 15;
  1594. /* Set the automatic flow control values */
  1595. switch(lp->tx_fifo_kb) {
  1596. /*
  1597. * AFC_HI is about ((Rx Data Fifo Size)*2/3)/64
  1598. * AFC_LO is AFC_HI/2
  1599. * BACK_DUR is about 5uS*(AFC_LO) rounded down
  1600. */
  1601. case 2:/* 13440 Rx Data Fifo Size */
  1602. lp->afc_cfg=0x008C46AF;break;
  1603. case 3:/* 12480 Rx Data Fifo Size */
  1604. lp->afc_cfg=0x0082419F;break;
  1605. case 4:/* 11520 Rx Data Fifo Size */
  1606. lp->afc_cfg=0x00783C9F;break;
  1607. case 5:/* 10560 Rx Data Fifo Size */
  1608. lp->afc_cfg=0x006E374F;break;
  1609. case 6:/* 9600 Rx Data Fifo Size */
  1610. lp->afc_cfg=0x0064328F;break;
  1611. case 7:/* 8640 Rx Data Fifo Size */
  1612. lp->afc_cfg=0x005A2D7F;break;
  1613. case 8:/* 7680 Rx Data Fifo Size */
  1614. lp->afc_cfg=0x0050287F;break;
  1615. case 9:/* 6720 Rx Data Fifo Size */
  1616. lp->afc_cfg=0x0046236F;break;
  1617. case 10:/* 5760 Rx Data Fifo Size */
  1618. lp->afc_cfg=0x003C1E6F;break;
  1619. case 11:/* 4800 Rx Data Fifo Size */
  1620. lp->afc_cfg=0x0032195F;break;
  1621. /*
  1622. * AFC_HI is ~1520 bytes less than RX Data Fifo Size
  1623. * AFC_LO is AFC_HI/2
  1624. * BACK_DUR is about 5uS*(AFC_LO) rounded down
  1625. */
  1626. case 12:/* 3840 Rx Data Fifo Size */
  1627. lp->afc_cfg=0x0024124F;break;
  1628. case 13:/* 2880 Rx Data Fifo Size */
  1629. lp->afc_cfg=0x0015073F;break;
  1630. case 14:/* 1920 Rx Data Fifo Size */
  1631. lp->afc_cfg=0x0006032F;break;
  1632. default:
  1633. PRINTK(dev, "ERROR -- no AFC_CFG setting found");
  1634. break;
  1635. }
  1636. DBG(SMC_DEBUG_MISC | SMC_DEBUG_TX | SMC_DEBUG_RX, dev,
  1637. "%s: tx_fifo %d rx_fifo %d afc_cfg 0x%08x\n", CARDNAME,
  1638. lp->tx_fifo_size, lp->rx_fifo_size, lp->afc_cfg);
  1639. spin_lock_init(&lp->lock);
  1640. /* Get the MAC address */
  1641. SMC_GET_MAC_ADDR(lp, dev->dev_addr);
  1642. /* now, reset the chip, and put it into a known state */
  1643. smc911x_reset(dev);
  1644. /*
  1645. * If dev->irq is 0, then the device has to be banged on to see
  1646. * what the IRQ is.
  1647. *
  1648. * Specifying an IRQ is done with the assumption that the user knows
  1649. * what (s)he is doing. No checking is done!!!!
  1650. */
  1651. if (dev->irq < 1) {
  1652. int trials;
  1653. trials = 3;
  1654. while (trials--) {
  1655. dev->irq = smc911x_findirq(dev);
  1656. if (dev->irq)
  1657. break;
  1658. /* kick the card and try again */
  1659. smc911x_reset(dev);
  1660. }
  1661. }
  1662. if (dev->irq == 0) {
  1663. netdev_warn(dev, "Couldn't autodetect your IRQ. Use irq=xx.\n");
  1664. retval = -ENODEV;
  1665. goto err_out;
  1666. }
  1667. dev->irq = irq_canonicalize(dev->irq);
  1668. dev->netdev_ops = &smc911x_netdev_ops;
  1669. dev->watchdog_timeo = msecs_to_jiffies(watchdog);
  1670. dev->ethtool_ops = &smc911x_ethtool_ops;
  1671. INIT_WORK(&lp->phy_configure, smc911x_phy_configure);
  1672. lp->mii.phy_id_mask = 0x1f;
  1673. lp->mii.reg_num_mask = 0x1f;
  1674. lp->mii.force_media = 0;
  1675. lp->mii.full_duplex = 0;
  1676. lp->mii.dev = dev;
  1677. lp->mii.mdio_read = smc911x_phy_read;
  1678. lp->mii.mdio_write = smc911x_phy_write;
  1679. /*
  1680. * Locate the phy, if any.
  1681. */
  1682. smc911x_phy_detect(dev);
  1683. /* Set default parameters */
  1684. lp->msg_enable = NETIF_MSG_LINK;
  1685. lp->ctl_rfduplx = 1;
  1686. lp->ctl_rspeed = 100;
  1687. #ifdef SMC_DYNAMIC_BUS_CONFIG
  1688. irq_flags = lp->cfg.irq_flags;
  1689. #else
  1690. irq_flags = IRQF_SHARED | SMC_IRQ_SENSE;
  1691. #endif
  1692. /* Grab the IRQ */
  1693. retval = request_irq(dev->irq, smc911x_interrupt,
  1694. irq_flags, dev->name, dev);
  1695. if (retval)
  1696. goto err_out;
  1697. #ifdef SMC_USE_DMA
  1698. dma_cap_zero(mask);
  1699. dma_cap_set(DMA_SLAVE, mask);
  1700. lp->rxdma = dma_request_channel(mask, NULL, NULL);
  1701. lp->txdma = dma_request_channel(mask, NULL, NULL);
  1702. lp->rxdma_active = 0;
  1703. lp->txdma_active = 0;
  1704. memset(&config, 0, sizeof(config));
  1705. config.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
  1706. config.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
  1707. config.src_addr = lp->physaddr + RX_DATA_FIFO;
  1708. config.dst_addr = lp->physaddr + TX_DATA_FIFO;
  1709. config.src_maxburst = 32;
  1710. config.dst_maxburst = 32;
  1711. retval = dmaengine_slave_config(lp->rxdma, &config);
  1712. if (retval) {
  1713. dev_err(lp->dev, "dma rx channel configuration failed: %d\n",
  1714. retval);
  1715. goto err_out;
  1716. }
  1717. retval = dmaengine_slave_config(lp->txdma, &config);
  1718. if (retval) {
  1719. dev_err(lp->dev, "dma tx channel configuration failed: %d\n",
  1720. retval);
  1721. goto err_out;
  1722. }
  1723. #endif
  1724. retval = register_netdev(dev);
  1725. if (retval == 0) {
  1726. /* now, print out the card info, in a short format.. */
  1727. netdev_info(dev, "%s (rev %d) at %#lx IRQ %d",
  1728. version_string, lp->revision,
  1729. dev->base_addr, dev->irq);
  1730. #ifdef SMC_USE_DMA
  1731. if (lp->rxdma)
  1732. pr_cont(" RXDMA %p", lp->rxdma);
  1733. if (lp->txdma)
  1734. pr_cont(" TXDMA %p", lp->txdma);
  1735. #endif
  1736. pr_cont("\n");
  1737. if (!is_valid_ether_addr(dev->dev_addr)) {
  1738. netdev_warn(dev, "Invalid ethernet MAC address. Please set using ifconfig\n");
  1739. } else {
  1740. /* Print the Ethernet address */
  1741. netdev_info(dev, "Ethernet addr: %pM\n",
  1742. dev->dev_addr);
  1743. }
  1744. if (lp->phy_type == 0) {
  1745. PRINTK(dev, "No PHY found\n");
  1746. } else if ((lp->phy_type & ~0xff) == LAN911X_INTERNAL_PHY_ID) {
  1747. PRINTK(dev, "LAN911x Internal PHY\n");
  1748. } else {
  1749. PRINTK(dev, "External PHY 0x%08x\n", lp->phy_type);
  1750. }
  1751. }
  1752. err_out:
  1753. #ifdef SMC_USE_DMA
  1754. if (retval) {
  1755. if (lp->rxdma)
  1756. dma_release_channel(lp->rxdma);
  1757. if (lp->txdma)
  1758. dma_release_channel(lp->txdma);
  1759. }
  1760. #endif
  1761. return retval;
  1762. }
  1763. /*
  1764. * smc911x_drv_probe(void)
  1765. *
  1766. * Output:
  1767. * 0 --> there is a device
  1768. * anything else, error
  1769. */
  1770. static int smc911x_drv_probe(struct platform_device *pdev)
  1771. {
  1772. struct net_device *ndev;
  1773. struct resource *res;
  1774. struct smc911x_local *lp;
  1775. void __iomem *addr;
  1776. int ret;
  1777. /* ndev is not valid yet, so avoid passing it in. */
  1778. DBG(SMC_DEBUG_FUNC, "--> %s\n", __func__);
  1779. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  1780. if (!res) {
  1781. ret = -ENODEV;
  1782. goto out;
  1783. }
  1784. /*
  1785. * Request the regions.
  1786. */
  1787. if (!request_mem_region(res->start, SMC911X_IO_EXTENT, CARDNAME)) {
  1788. ret = -EBUSY;
  1789. goto out;
  1790. }
  1791. ndev = alloc_etherdev(sizeof(struct smc911x_local));
  1792. if (!ndev) {
  1793. ret = -ENOMEM;
  1794. goto release_1;
  1795. }
  1796. SET_NETDEV_DEV(ndev, &pdev->dev);
  1797. ndev->dma = (unsigned char)-1;
  1798. ndev->irq = platform_get_irq(pdev, 0);
  1799. lp = netdev_priv(ndev);
  1800. lp->netdev = ndev;
  1801. #ifdef SMC_DYNAMIC_BUS_CONFIG
  1802. {
  1803. struct smc911x_platdata *pd = dev_get_platdata(&pdev->dev);
  1804. if (!pd) {
  1805. ret = -EINVAL;
  1806. goto release_both;
  1807. }
  1808. memcpy(&lp->cfg, pd, sizeof(lp->cfg));
  1809. }
  1810. #endif
  1811. addr = ioremap(res->start, SMC911X_IO_EXTENT);
  1812. if (!addr) {
  1813. ret = -ENOMEM;
  1814. goto release_both;
  1815. }
  1816. platform_set_drvdata(pdev, ndev);
  1817. lp->base = addr;
  1818. ndev->base_addr = res->start;
  1819. ret = smc911x_probe(ndev);
  1820. if (ret != 0) {
  1821. iounmap(addr);
  1822. release_both:
  1823. free_netdev(ndev);
  1824. release_1:
  1825. release_mem_region(res->start, SMC911X_IO_EXTENT);
  1826. out:
  1827. pr_info("%s: not found (%d).\n", CARDNAME, ret);
  1828. }
  1829. #ifdef SMC_USE_DMA
  1830. else {
  1831. lp->physaddr = res->start;
  1832. lp->dev = &pdev->dev;
  1833. }
  1834. #endif
  1835. return ret;
  1836. }
  1837. static int smc911x_drv_remove(struct platform_device *pdev)
  1838. {
  1839. struct net_device *ndev = platform_get_drvdata(pdev);
  1840. struct smc911x_local *lp = netdev_priv(ndev);
  1841. struct resource *res;
  1842. DBG(SMC_DEBUG_FUNC, ndev, "--> %s\n", __func__);
  1843. unregister_netdev(ndev);
  1844. free_irq(ndev->irq, ndev);
  1845. #ifdef SMC_USE_DMA
  1846. {
  1847. if (lp->rxdma)
  1848. dma_release_channel(lp->rxdma);
  1849. if (lp->txdma)
  1850. dma_release_channel(lp->txdma);
  1851. }
  1852. #endif
  1853. iounmap(lp->base);
  1854. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  1855. release_mem_region(res->start, SMC911X_IO_EXTENT);
  1856. free_netdev(ndev);
  1857. return 0;
  1858. }
  1859. static int smc911x_drv_suspend(struct platform_device *dev, pm_message_t state)
  1860. {
  1861. struct net_device *ndev = platform_get_drvdata(dev);
  1862. struct smc911x_local *lp = netdev_priv(ndev);
  1863. DBG(SMC_DEBUG_FUNC, ndev, "--> %s\n", __func__);
  1864. if (ndev) {
  1865. if (netif_running(ndev)) {
  1866. netif_device_detach(ndev);
  1867. smc911x_shutdown(ndev);
  1868. #if POWER_DOWN
  1869. /* Set D2 - Energy detect only setting */
  1870. SMC_SET_PMT_CTRL(lp, 2<<12);
  1871. #endif
  1872. }
  1873. }
  1874. return 0;
  1875. }
  1876. static int smc911x_drv_resume(struct platform_device *dev)
  1877. {
  1878. struct net_device *ndev = platform_get_drvdata(dev);
  1879. DBG(SMC_DEBUG_FUNC, ndev, "--> %s\n", __func__);
  1880. if (ndev) {
  1881. struct smc911x_local *lp = netdev_priv(ndev);
  1882. if (netif_running(ndev)) {
  1883. smc911x_reset(ndev);
  1884. if (lp->phy_type != 0)
  1885. smc911x_phy_configure(&lp->phy_configure);
  1886. smc911x_enable(ndev);
  1887. netif_device_attach(ndev);
  1888. }
  1889. }
  1890. return 0;
  1891. }
  1892. static struct platform_driver smc911x_driver = {
  1893. .probe = smc911x_drv_probe,
  1894. .remove = smc911x_drv_remove,
  1895. .suspend = smc911x_drv_suspend,
  1896. .resume = smc911x_drv_resume,
  1897. .driver = {
  1898. .name = CARDNAME,
  1899. },
  1900. };
  1901. module_platform_driver(smc911x_driver);