mcdi.c 63 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /****************************************************************************
  3. * Driver for Solarflare network controllers and boards
  4. * Copyright 2008-2013 Solarflare Communications Inc.
  5. */
  6. #include <linux/delay.h>
  7. #include <linux/moduleparam.h>
  8. #include <linux/atomic.h>
  9. #include "net_driver.h"
  10. #include "nic.h"
  11. #include "io.h"
  12. #include "farch_regs.h"
  13. #include "mcdi_pcol.h"
  14. /**************************************************************************
  15. *
  16. * Management-Controller-to-Driver Interface
  17. *
  18. **************************************************************************
  19. */
  20. #define MCDI_RPC_TIMEOUT (10 * HZ)
  21. /* A reboot/assertion causes the MCDI status word to be set after the
  22. * command word is set or a REBOOT event is sent. If we notice a reboot
  23. * via these mechanisms then wait 250ms for the status word to be set.
  24. */
  25. #define MCDI_STATUS_DELAY_US 100
  26. #define MCDI_STATUS_DELAY_COUNT 2500
  27. #define MCDI_STATUS_SLEEP_MS \
  28. (MCDI_STATUS_DELAY_US * MCDI_STATUS_DELAY_COUNT / 1000)
  29. #define SEQ_MASK \
  30. EFX_MASK32(EFX_WIDTH(MCDI_HEADER_SEQ))
  31. struct efx_mcdi_async_param {
  32. struct list_head list;
  33. unsigned int cmd;
  34. size_t inlen;
  35. size_t outlen;
  36. bool quiet;
  37. efx_mcdi_async_completer *complete;
  38. unsigned long cookie;
  39. /* followed by request/response buffer */
  40. };
  41. static void efx_mcdi_timeout_async(struct timer_list *t);
  42. static int efx_mcdi_drv_attach(struct efx_nic *efx, bool driver_operating,
  43. bool *was_attached_out);
  44. static bool efx_mcdi_poll_once(struct efx_nic *efx);
  45. static void efx_mcdi_abandon(struct efx_nic *efx);
  46. #ifdef CONFIG_SFC_MCDI_LOGGING
  47. static bool mcdi_logging_default;
  48. module_param(mcdi_logging_default, bool, 0644);
  49. MODULE_PARM_DESC(mcdi_logging_default,
  50. "Enable MCDI logging on newly-probed functions");
  51. #endif
  52. int efx_mcdi_init(struct efx_nic *efx)
  53. {
  54. struct efx_mcdi_iface *mcdi;
  55. bool already_attached;
  56. int rc = -ENOMEM;
  57. efx->mcdi = kzalloc(sizeof(*efx->mcdi), GFP_KERNEL);
  58. if (!efx->mcdi)
  59. goto fail;
  60. mcdi = efx_mcdi(efx);
  61. mcdi->efx = efx;
  62. #ifdef CONFIG_SFC_MCDI_LOGGING
  63. /* consuming code assumes buffer is page-sized */
  64. mcdi->logging_buffer = (char *)__get_free_page(GFP_KERNEL);
  65. if (!mcdi->logging_buffer)
  66. goto fail1;
  67. mcdi->logging_enabled = mcdi_logging_default;
  68. #endif
  69. init_waitqueue_head(&mcdi->wq);
  70. init_waitqueue_head(&mcdi->proxy_rx_wq);
  71. spin_lock_init(&mcdi->iface_lock);
  72. mcdi->state = MCDI_STATE_QUIESCENT;
  73. mcdi->mode = MCDI_MODE_POLL;
  74. spin_lock_init(&mcdi->async_lock);
  75. INIT_LIST_HEAD(&mcdi->async_list);
  76. timer_setup(&mcdi->async_timer, efx_mcdi_timeout_async, 0);
  77. (void) efx_mcdi_poll_reboot(efx);
  78. mcdi->new_epoch = true;
  79. /* Recover from a failed assertion before probing */
  80. rc = efx_mcdi_handle_assertion(efx);
  81. if (rc)
  82. goto fail2;
  83. /* Let the MC (and BMC, if this is a LOM) know that the driver
  84. * is loaded. We should do this before we reset the NIC.
  85. */
  86. rc = efx_mcdi_drv_attach(efx, true, &already_attached);
  87. if (rc) {
  88. netif_err(efx, probe, efx->net_dev,
  89. "Unable to register driver with MCPU\n");
  90. goto fail2;
  91. }
  92. if (already_attached)
  93. /* Not a fatal error */
  94. netif_err(efx, probe, efx->net_dev,
  95. "Host already registered with MCPU\n");
  96. if (efx->mcdi->fn_flags &
  97. (1 << MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_PRIMARY))
  98. efx->primary = efx;
  99. return 0;
  100. fail2:
  101. #ifdef CONFIG_SFC_MCDI_LOGGING
  102. free_page((unsigned long)mcdi->logging_buffer);
  103. fail1:
  104. #endif
  105. kfree(efx->mcdi);
  106. efx->mcdi = NULL;
  107. fail:
  108. return rc;
  109. }
  110. void efx_mcdi_detach(struct efx_nic *efx)
  111. {
  112. if (!efx->mcdi)
  113. return;
  114. BUG_ON(efx->mcdi->iface.state != MCDI_STATE_QUIESCENT);
  115. /* Relinquish the device (back to the BMC, if this is a LOM) */
  116. efx_mcdi_drv_attach(efx, false, NULL);
  117. }
  118. void efx_mcdi_fini(struct efx_nic *efx)
  119. {
  120. if (!efx->mcdi)
  121. return;
  122. #ifdef CONFIG_SFC_MCDI_LOGGING
  123. free_page((unsigned long)efx->mcdi->iface.logging_buffer);
  124. #endif
  125. kfree(efx->mcdi);
  126. }
  127. static void efx_mcdi_send_request(struct efx_nic *efx, unsigned cmd,
  128. const efx_dword_t *inbuf, size_t inlen)
  129. {
  130. struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
  131. #ifdef CONFIG_SFC_MCDI_LOGGING
  132. char *buf = mcdi->logging_buffer; /* page-sized */
  133. #endif
  134. efx_dword_t hdr[2];
  135. size_t hdr_len;
  136. u32 xflags, seqno;
  137. BUG_ON(mcdi->state == MCDI_STATE_QUIESCENT);
  138. /* Serialise with efx_mcdi_ev_cpl() and efx_mcdi_ev_death() */
  139. spin_lock_bh(&mcdi->iface_lock);
  140. ++mcdi->seqno;
  141. spin_unlock_bh(&mcdi->iface_lock);
  142. seqno = mcdi->seqno & SEQ_MASK;
  143. xflags = 0;
  144. if (mcdi->mode == MCDI_MODE_EVENTS)
  145. xflags |= MCDI_HEADER_XFLAGS_EVREQ;
  146. if (efx->type->mcdi_max_ver == 1) {
  147. /* MCDI v1 */
  148. EFX_POPULATE_DWORD_7(hdr[0],
  149. MCDI_HEADER_RESPONSE, 0,
  150. MCDI_HEADER_RESYNC, 1,
  151. MCDI_HEADER_CODE, cmd,
  152. MCDI_HEADER_DATALEN, inlen,
  153. MCDI_HEADER_SEQ, seqno,
  154. MCDI_HEADER_XFLAGS, xflags,
  155. MCDI_HEADER_NOT_EPOCH, !mcdi->new_epoch);
  156. hdr_len = 4;
  157. } else {
  158. /* MCDI v2 */
  159. BUG_ON(inlen > MCDI_CTL_SDU_LEN_MAX_V2);
  160. EFX_POPULATE_DWORD_7(hdr[0],
  161. MCDI_HEADER_RESPONSE, 0,
  162. MCDI_HEADER_RESYNC, 1,
  163. MCDI_HEADER_CODE, MC_CMD_V2_EXTN,
  164. MCDI_HEADER_DATALEN, 0,
  165. MCDI_HEADER_SEQ, seqno,
  166. MCDI_HEADER_XFLAGS, xflags,
  167. MCDI_HEADER_NOT_EPOCH, !mcdi->new_epoch);
  168. EFX_POPULATE_DWORD_2(hdr[1],
  169. MC_CMD_V2_EXTN_IN_EXTENDED_CMD, cmd,
  170. MC_CMD_V2_EXTN_IN_ACTUAL_LEN, inlen);
  171. hdr_len = 8;
  172. }
  173. #ifdef CONFIG_SFC_MCDI_LOGGING
  174. if (mcdi->logging_enabled && !WARN_ON_ONCE(!buf)) {
  175. int bytes = 0;
  176. int i;
  177. /* Lengths should always be a whole number of dwords, so scream
  178. * if they're not.
  179. */
  180. WARN_ON_ONCE(hdr_len % 4);
  181. WARN_ON_ONCE(inlen % 4);
  182. /* We own the logging buffer, as only one MCDI can be in
  183. * progress on a NIC at any one time. So no need for locking.
  184. */
  185. for (i = 0; i < hdr_len / 4 && bytes < PAGE_SIZE; i++)
  186. bytes += snprintf(buf + bytes, PAGE_SIZE - bytes,
  187. " %08x", le32_to_cpu(hdr[i].u32[0]));
  188. for (i = 0; i < inlen / 4 && bytes < PAGE_SIZE; i++)
  189. bytes += snprintf(buf + bytes, PAGE_SIZE - bytes,
  190. " %08x", le32_to_cpu(inbuf[i].u32[0]));
  191. netif_info(efx, hw, efx->net_dev, "MCDI RPC REQ:%s\n", buf);
  192. }
  193. #endif
  194. efx->type->mcdi_request(efx, hdr, hdr_len, inbuf, inlen);
  195. mcdi->new_epoch = false;
  196. }
  197. static int efx_mcdi_errno(unsigned int mcdi_err)
  198. {
  199. switch (mcdi_err) {
  200. case 0:
  201. return 0;
  202. #define TRANSLATE_ERROR(name) \
  203. case MC_CMD_ERR_ ## name: \
  204. return -name;
  205. TRANSLATE_ERROR(EPERM);
  206. TRANSLATE_ERROR(ENOENT);
  207. TRANSLATE_ERROR(EINTR);
  208. TRANSLATE_ERROR(EAGAIN);
  209. TRANSLATE_ERROR(EACCES);
  210. TRANSLATE_ERROR(EBUSY);
  211. TRANSLATE_ERROR(EINVAL);
  212. TRANSLATE_ERROR(EDEADLK);
  213. TRANSLATE_ERROR(ENOSYS);
  214. TRANSLATE_ERROR(ETIME);
  215. TRANSLATE_ERROR(EALREADY);
  216. TRANSLATE_ERROR(ENOSPC);
  217. #undef TRANSLATE_ERROR
  218. case MC_CMD_ERR_ENOTSUP:
  219. return -EOPNOTSUPP;
  220. case MC_CMD_ERR_ALLOC_FAIL:
  221. return -ENOBUFS;
  222. case MC_CMD_ERR_MAC_EXIST:
  223. return -EADDRINUSE;
  224. default:
  225. return -EPROTO;
  226. }
  227. }
  228. static void efx_mcdi_read_response_header(struct efx_nic *efx)
  229. {
  230. struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
  231. unsigned int respseq, respcmd, error;
  232. #ifdef CONFIG_SFC_MCDI_LOGGING
  233. char *buf = mcdi->logging_buffer; /* page-sized */
  234. #endif
  235. efx_dword_t hdr;
  236. efx->type->mcdi_read_response(efx, &hdr, 0, 4);
  237. respseq = EFX_DWORD_FIELD(hdr, MCDI_HEADER_SEQ);
  238. respcmd = EFX_DWORD_FIELD(hdr, MCDI_HEADER_CODE);
  239. error = EFX_DWORD_FIELD(hdr, MCDI_HEADER_ERROR);
  240. if (respcmd != MC_CMD_V2_EXTN) {
  241. mcdi->resp_hdr_len = 4;
  242. mcdi->resp_data_len = EFX_DWORD_FIELD(hdr, MCDI_HEADER_DATALEN);
  243. } else {
  244. efx->type->mcdi_read_response(efx, &hdr, 4, 4);
  245. mcdi->resp_hdr_len = 8;
  246. mcdi->resp_data_len =
  247. EFX_DWORD_FIELD(hdr, MC_CMD_V2_EXTN_IN_ACTUAL_LEN);
  248. }
  249. #ifdef CONFIG_SFC_MCDI_LOGGING
  250. if (mcdi->logging_enabled && !WARN_ON_ONCE(!buf)) {
  251. size_t hdr_len, data_len;
  252. int bytes = 0;
  253. int i;
  254. WARN_ON_ONCE(mcdi->resp_hdr_len % 4);
  255. hdr_len = mcdi->resp_hdr_len / 4;
  256. /* MCDI_DECLARE_BUF ensures that underlying buffer is padded
  257. * to dword size, and the MCDI buffer is always dword size
  258. */
  259. data_len = DIV_ROUND_UP(mcdi->resp_data_len, 4);
  260. /* We own the logging buffer, as only one MCDI can be in
  261. * progress on a NIC at any one time. So no need for locking.
  262. */
  263. for (i = 0; i < hdr_len && bytes < PAGE_SIZE; i++) {
  264. efx->type->mcdi_read_response(efx, &hdr, (i * 4), 4);
  265. bytes += snprintf(buf + bytes, PAGE_SIZE - bytes,
  266. " %08x", le32_to_cpu(hdr.u32[0]));
  267. }
  268. for (i = 0; i < data_len && bytes < PAGE_SIZE; i++) {
  269. efx->type->mcdi_read_response(efx, &hdr,
  270. mcdi->resp_hdr_len + (i * 4), 4);
  271. bytes += snprintf(buf + bytes, PAGE_SIZE - bytes,
  272. " %08x", le32_to_cpu(hdr.u32[0]));
  273. }
  274. netif_info(efx, hw, efx->net_dev, "MCDI RPC RESP:%s\n", buf);
  275. }
  276. #endif
  277. mcdi->resprc_raw = 0;
  278. if (error && mcdi->resp_data_len == 0) {
  279. netif_err(efx, hw, efx->net_dev, "MC rebooted\n");
  280. mcdi->resprc = -EIO;
  281. } else if ((respseq ^ mcdi->seqno) & SEQ_MASK) {
  282. netif_err(efx, hw, efx->net_dev,
  283. "MC response mismatch tx seq 0x%x rx seq 0x%x\n",
  284. respseq, mcdi->seqno);
  285. mcdi->resprc = -EIO;
  286. } else if (error) {
  287. efx->type->mcdi_read_response(efx, &hdr, mcdi->resp_hdr_len, 4);
  288. mcdi->resprc_raw = EFX_DWORD_FIELD(hdr, EFX_DWORD_0);
  289. mcdi->resprc = efx_mcdi_errno(mcdi->resprc_raw);
  290. } else {
  291. mcdi->resprc = 0;
  292. }
  293. }
  294. static bool efx_mcdi_poll_once(struct efx_nic *efx)
  295. {
  296. struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
  297. rmb();
  298. if (!efx->type->mcdi_poll_response(efx))
  299. return false;
  300. spin_lock_bh(&mcdi->iface_lock);
  301. efx_mcdi_read_response_header(efx);
  302. spin_unlock_bh(&mcdi->iface_lock);
  303. return true;
  304. }
  305. static int efx_mcdi_poll(struct efx_nic *efx)
  306. {
  307. struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
  308. unsigned long time, finish;
  309. unsigned int spins;
  310. int rc;
  311. /* Check for a reboot atomically with respect to efx_mcdi_copyout() */
  312. rc = efx_mcdi_poll_reboot(efx);
  313. if (rc) {
  314. spin_lock_bh(&mcdi->iface_lock);
  315. mcdi->resprc = rc;
  316. mcdi->resp_hdr_len = 0;
  317. mcdi->resp_data_len = 0;
  318. spin_unlock_bh(&mcdi->iface_lock);
  319. return 0;
  320. }
  321. /* Poll for completion. Poll quickly (once a us) for the 1st jiffy,
  322. * because generally mcdi responses are fast. After that, back off
  323. * and poll once a jiffy (approximately)
  324. */
  325. spins = USER_TICK_USEC;
  326. finish = jiffies + MCDI_RPC_TIMEOUT;
  327. while (1) {
  328. if (spins != 0) {
  329. --spins;
  330. udelay(1);
  331. } else {
  332. schedule_timeout_uninterruptible(1);
  333. }
  334. time = jiffies;
  335. if (efx_mcdi_poll_once(efx))
  336. break;
  337. if (time_after(time, finish))
  338. return -ETIMEDOUT;
  339. }
  340. /* Return rc=0 like wait_event_timeout() */
  341. return 0;
  342. }
  343. /* Test and clear MC-rebooted flag for this port/function; reset
  344. * software state as necessary.
  345. */
  346. int efx_mcdi_poll_reboot(struct efx_nic *efx)
  347. {
  348. if (!efx->mcdi)
  349. return 0;
  350. return efx->type->mcdi_poll_reboot(efx);
  351. }
  352. static bool efx_mcdi_acquire_async(struct efx_mcdi_iface *mcdi)
  353. {
  354. return cmpxchg(&mcdi->state,
  355. MCDI_STATE_QUIESCENT, MCDI_STATE_RUNNING_ASYNC) ==
  356. MCDI_STATE_QUIESCENT;
  357. }
  358. static void efx_mcdi_acquire_sync(struct efx_mcdi_iface *mcdi)
  359. {
  360. /* Wait until the interface becomes QUIESCENT and we win the race
  361. * to mark it RUNNING_SYNC.
  362. */
  363. wait_event(mcdi->wq,
  364. cmpxchg(&mcdi->state,
  365. MCDI_STATE_QUIESCENT, MCDI_STATE_RUNNING_SYNC) ==
  366. MCDI_STATE_QUIESCENT);
  367. }
  368. static int efx_mcdi_await_completion(struct efx_nic *efx)
  369. {
  370. struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
  371. if (wait_event_timeout(mcdi->wq, mcdi->state == MCDI_STATE_COMPLETED,
  372. MCDI_RPC_TIMEOUT) == 0)
  373. return -ETIMEDOUT;
  374. /* Check if efx_mcdi_set_mode() switched us back to polled completions.
  375. * In which case, poll for completions directly. If efx_mcdi_ev_cpl()
  376. * completed the request first, then we'll just end up completing the
  377. * request again, which is safe.
  378. *
  379. * We need an smp_rmb() to synchronise with efx_mcdi_mode_poll(), which
  380. * wait_event_timeout() implicitly provides.
  381. */
  382. if (mcdi->mode == MCDI_MODE_POLL)
  383. return efx_mcdi_poll(efx);
  384. return 0;
  385. }
  386. /* If the interface is RUNNING_SYNC, switch to COMPLETED and wake the
  387. * requester. Return whether this was done. Does not take any locks.
  388. */
  389. static bool efx_mcdi_complete_sync(struct efx_mcdi_iface *mcdi)
  390. {
  391. if (cmpxchg(&mcdi->state,
  392. MCDI_STATE_RUNNING_SYNC, MCDI_STATE_COMPLETED) ==
  393. MCDI_STATE_RUNNING_SYNC) {
  394. wake_up(&mcdi->wq);
  395. return true;
  396. }
  397. return false;
  398. }
  399. static void efx_mcdi_release(struct efx_mcdi_iface *mcdi)
  400. {
  401. if (mcdi->mode == MCDI_MODE_EVENTS) {
  402. struct efx_mcdi_async_param *async;
  403. struct efx_nic *efx = mcdi->efx;
  404. /* Process the asynchronous request queue */
  405. spin_lock_bh(&mcdi->async_lock);
  406. async = list_first_entry_or_null(
  407. &mcdi->async_list, struct efx_mcdi_async_param, list);
  408. if (async) {
  409. mcdi->state = MCDI_STATE_RUNNING_ASYNC;
  410. efx_mcdi_send_request(efx, async->cmd,
  411. (const efx_dword_t *)(async + 1),
  412. async->inlen);
  413. mod_timer(&mcdi->async_timer,
  414. jiffies + MCDI_RPC_TIMEOUT);
  415. }
  416. spin_unlock_bh(&mcdi->async_lock);
  417. if (async)
  418. return;
  419. }
  420. mcdi->state = MCDI_STATE_QUIESCENT;
  421. wake_up(&mcdi->wq);
  422. }
  423. /* If the interface is RUNNING_ASYNC, switch to COMPLETED, call the
  424. * asynchronous completion function, and release the interface.
  425. * Return whether this was done. Must be called in bh-disabled
  426. * context. Will take iface_lock and async_lock.
  427. */
  428. static bool efx_mcdi_complete_async(struct efx_mcdi_iface *mcdi, bool timeout)
  429. {
  430. struct efx_nic *efx = mcdi->efx;
  431. struct efx_mcdi_async_param *async;
  432. size_t hdr_len, data_len, err_len;
  433. efx_dword_t *outbuf;
  434. MCDI_DECLARE_BUF_ERR(errbuf);
  435. int rc;
  436. if (cmpxchg(&mcdi->state,
  437. MCDI_STATE_RUNNING_ASYNC, MCDI_STATE_COMPLETED) !=
  438. MCDI_STATE_RUNNING_ASYNC)
  439. return false;
  440. spin_lock(&mcdi->iface_lock);
  441. if (timeout) {
  442. /* Ensure that if the completion event arrives later,
  443. * the seqno check in efx_mcdi_ev_cpl() will fail
  444. */
  445. ++mcdi->seqno;
  446. ++mcdi->credits;
  447. rc = -ETIMEDOUT;
  448. hdr_len = 0;
  449. data_len = 0;
  450. } else {
  451. rc = mcdi->resprc;
  452. hdr_len = mcdi->resp_hdr_len;
  453. data_len = mcdi->resp_data_len;
  454. }
  455. spin_unlock(&mcdi->iface_lock);
  456. /* Stop the timer. In case the timer function is running, we
  457. * must wait for it to return so that there is no possibility
  458. * of it aborting the next request.
  459. */
  460. if (!timeout)
  461. del_timer_sync(&mcdi->async_timer);
  462. spin_lock(&mcdi->async_lock);
  463. async = list_first_entry(&mcdi->async_list,
  464. struct efx_mcdi_async_param, list);
  465. list_del(&async->list);
  466. spin_unlock(&mcdi->async_lock);
  467. outbuf = (efx_dword_t *)(async + 1);
  468. efx->type->mcdi_read_response(efx, outbuf, hdr_len,
  469. min(async->outlen, data_len));
  470. if (!timeout && rc && !async->quiet) {
  471. err_len = min(sizeof(errbuf), data_len);
  472. efx->type->mcdi_read_response(efx, errbuf, hdr_len,
  473. sizeof(errbuf));
  474. efx_mcdi_display_error(efx, async->cmd, async->inlen, errbuf,
  475. err_len, rc);
  476. }
  477. if (async->complete)
  478. async->complete(efx, async->cookie, rc, outbuf,
  479. min(async->outlen, data_len));
  480. kfree(async);
  481. efx_mcdi_release(mcdi);
  482. return true;
  483. }
  484. static void efx_mcdi_ev_cpl(struct efx_nic *efx, unsigned int seqno,
  485. unsigned int datalen, unsigned int mcdi_err)
  486. {
  487. struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
  488. bool wake = false;
  489. spin_lock(&mcdi->iface_lock);
  490. if ((seqno ^ mcdi->seqno) & SEQ_MASK) {
  491. if (mcdi->credits)
  492. /* The request has been cancelled */
  493. --mcdi->credits;
  494. else
  495. netif_err(efx, hw, efx->net_dev,
  496. "MC response mismatch tx seq 0x%x rx "
  497. "seq 0x%x\n", seqno, mcdi->seqno);
  498. } else {
  499. if (efx->type->mcdi_max_ver >= 2) {
  500. /* MCDI v2 responses don't fit in an event */
  501. efx_mcdi_read_response_header(efx);
  502. } else {
  503. mcdi->resprc = efx_mcdi_errno(mcdi_err);
  504. mcdi->resp_hdr_len = 4;
  505. mcdi->resp_data_len = datalen;
  506. }
  507. wake = true;
  508. }
  509. spin_unlock(&mcdi->iface_lock);
  510. if (wake) {
  511. if (!efx_mcdi_complete_async(mcdi, false))
  512. (void) efx_mcdi_complete_sync(mcdi);
  513. /* If the interface isn't RUNNING_ASYNC or
  514. * RUNNING_SYNC then we've received a duplicate
  515. * completion after we've already transitioned back to
  516. * QUIESCENT. [A subsequent invocation would increment
  517. * seqno, so would have failed the seqno check].
  518. */
  519. }
  520. }
  521. static void efx_mcdi_timeout_async(struct timer_list *t)
  522. {
  523. struct efx_mcdi_iface *mcdi = from_timer(mcdi, t, async_timer);
  524. efx_mcdi_complete_async(mcdi, true);
  525. }
  526. static int
  527. efx_mcdi_check_supported(struct efx_nic *efx, unsigned int cmd, size_t inlen)
  528. {
  529. if (efx->type->mcdi_max_ver < 0 ||
  530. (efx->type->mcdi_max_ver < 2 &&
  531. cmd > MC_CMD_CMD_SPACE_ESCAPE_7))
  532. return -EINVAL;
  533. if (inlen > MCDI_CTL_SDU_LEN_MAX_V2 ||
  534. (efx->type->mcdi_max_ver < 2 &&
  535. inlen > MCDI_CTL_SDU_LEN_MAX_V1))
  536. return -EMSGSIZE;
  537. return 0;
  538. }
  539. static bool efx_mcdi_get_proxy_handle(struct efx_nic *efx,
  540. size_t hdr_len, size_t data_len,
  541. u32 *proxy_handle)
  542. {
  543. MCDI_DECLARE_BUF_ERR(testbuf);
  544. const size_t buflen = sizeof(testbuf);
  545. if (!proxy_handle || data_len < buflen)
  546. return false;
  547. efx->type->mcdi_read_response(efx, testbuf, hdr_len, buflen);
  548. if (MCDI_DWORD(testbuf, ERR_CODE) == MC_CMD_ERR_PROXY_PENDING) {
  549. *proxy_handle = MCDI_DWORD(testbuf, ERR_PROXY_PENDING_HANDLE);
  550. return true;
  551. }
  552. return false;
  553. }
  554. static int _efx_mcdi_rpc_finish(struct efx_nic *efx, unsigned int cmd,
  555. size_t inlen,
  556. efx_dword_t *outbuf, size_t outlen,
  557. size_t *outlen_actual, bool quiet,
  558. u32 *proxy_handle, int *raw_rc)
  559. {
  560. struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
  561. MCDI_DECLARE_BUF_ERR(errbuf);
  562. int rc;
  563. if (mcdi->mode == MCDI_MODE_POLL)
  564. rc = efx_mcdi_poll(efx);
  565. else
  566. rc = efx_mcdi_await_completion(efx);
  567. if (rc != 0) {
  568. netif_err(efx, hw, efx->net_dev,
  569. "MC command 0x%x inlen %d mode %d timed out\n",
  570. cmd, (int)inlen, mcdi->mode);
  571. if (mcdi->mode == MCDI_MODE_EVENTS && efx_mcdi_poll_once(efx)) {
  572. netif_err(efx, hw, efx->net_dev,
  573. "MCDI request was completed without an event\n");
  574. rc = 0;
  575. }
  576. efx_mcdi_abandon(efx);
  577. /* Close the race with efx_mcdi_ev_cpl() executing just too late
  578. * and completing a request we've just cancelled, by ensuring
  579. * that the seqno check therein fails.
  580. */
  581. spin_lock_bh(&mcdi->iface_lock);
  582. ++mcdi->seqno;
  583. ++mcdi->credits;
  584. spin_unlock_bh(&mcdi->iface_lock);
  585. }
  586. if (proxy_handle)
  587. *proxy_handle = 0;
  588. if (rc != 0) {
  589. if (outlen_actual)
  590. *outlen_actual = 0;
  591. } else {
  592. size_t hdr_len, data_len, err_len;
  593. /* At the very least we need a memory barrier here to ensure
  594. * we pick up changes from efx_mcdi_ev_cpl(). Protect against
  595. * a spurious efx_mcdi_ev_cpl() running concurrently by
  596. * acquiring the iface_lock. */
  597. spin_lock_bh(&mcdi->iface_lock);
  598. rc = mcdi->resprc;
  599. if (raw_rc)
  600. *raw_rc = mcdi->resprc_raw;
  601. hdr_len = mcdi->resp_hdr_len;
  602. data_len = mcdi->resp_data_len;
  603. err_len = min(sizeof(errbuf), data_len);
  604. spin_unlock_bh(&mcdi->iface_lock);
  605. BUG_ON(rc > 0);
  606. efx->type->mcdi_read_response(efx, outbuf, hdr_len,
  607. min(outlen, data_len));
  608. if (outlen_actual)
  609. *outlen_actual = data_len;
  610. efx->type->mcdi_read_response(efx, errbuf, hdr_len, err_len);
  611. if (cmd == MC_CMD_REBOOT && rc == -EIO) {
  612. /* Don't reset if MC_CMD_REBOOT returns EIO */
  613. } else if (rc == -EIO || rc == -EINTR) {
  614. netif_err(efx, hw, efx->net_dev, "MC reboot detected\n");
  615. netif_dbg(efx, hw, efx->net_dev, "MC rebooted during command %d rc %d\n",
  616. cmd, -rc);
  617. if (efx->type->mcdi_reboot_detected)
  618. efx->type->mcdi_reboot_detected(efx);
  619. efx_schedule_reset(efx, RESET_TYPE_MC_FAILURE);
  620. } else if (proxy_handle && (rc == -EPROTO) &&
  621. efx_mcdi_get_proxy_handle(efx, hdr_len, data_len,
  622. proxy_handle)) {
  623. mcdi->proxy_rx_status = 0;
  624. mcdi->proxy_rx_handle = 0;
  625. mcdi->state = MCDI_STATE_PROXY_WAIT;
  626. } else if (rc && !quiet) {
  627. efx_mcdi_display_error(efx, cmd, inlen, errbuf, err_len,
  628. rc);
  629. }
  630. if (rc == -EIO || rc == -EINTR) {
  631. msleep(MCDI_STATUS_SLEEP_MS);
  632. efx_mcdi_poll_reboot(efx);
  633. mcdi->new_epoch = true;
  634. }
  635. }
  636. if (!proxy_handle || !*proxy_handle)
  637. efx_mcdi_release(mcdi);
  638. return rc;
  639. }
  640. static void efx_mcdi_proxy_abort(struct efx_mcdi_iface *mcdi)
  641. {
  642. if (mcdi->state == MCDI_STATE_PROXY_WAIT) {
  643. /* Interrupt the proxy wait. */
  644. mcdi->proxy_rx_status = -EINTR;
  645. wake_up(&mcdi->proxy_rx_wq);
  646. }
  647. }
  648. static void efx_mcdi_ev_proxy_response(struct efx_nic *efx,
  649. u32 handle, int status)
  650. {
  651. struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
  652. WARN_ON(mcdi->state != MCDI_STATE_PROXY_WAIT);
  653. mcdi->proxy_rx_status = efx_mcdi_errno(status);
  654. /* Ensure the status is written before we update the handle, since the
  655. * latter is used to check if we've finished.
  656. */
  657. wmb();
  658. mcdi->proxy_rx_handle = handle;
  659. wake_up(&mcdi->proxy_rx_wq);
  660. }
  661. static int efx_mcdi_proxy_wait(struct efx_nic *efx, u32 handle, bool quiet)
  662. {
  663. struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
  664. int rc;
  665. /* Wait for a proxy event, or timeout. */
  666. rc = wait_event_timeout(mcdi->proxy_rx_wq,
  667. mcdi->proxy_rx_handle != 0 ||
  668. mcdi->proxy_rx_status == -EINTR,
  669. MCDI_RPC_TIMEOUT);
  670. if (rc <= 0) {
  671. netif_dbg(efx, hw, efx->net_dev,
  672. "MCDI proxy timeout %d\n", handle);
  673. return -ETIMEDOUT;
  674. } else if (mcdi->proxy_rx_handle != handle) {
  675. netif_warn(efx, hw, efx->net_dev,
  676. "MCDI proxy unexpected handle %d (expected %d)\n",
  677. mcdi->proxy_rx_handle, handle);
  678. return -EINVAL;
  679. }
  680. return mcdi->proxy_rx_status;
  681. }
  682. static int _efx_mcdi_rpc(struct efx_nic *efx, unsigned int cmd,
  683. const efx_dword_t *inbuf, size_t inlen,
  684. efx_dword_t *outbuf, size_t outlen,
  685. size_t *outlen_actual, bool quiet, int *raw_rc)
  686. {
  687. u32 proxy_handle = 0; /* Zero is an invalid proxy handle. */
  688. int rc;
  689. if (inbuf && inlen && (inbuf == outbuf)) {
  690. /* The input buffer can't be aliased with the output. */
  691. WARN_ON(1);
  692. return -EINVAL;
  693. }
  694. rc = efx_mcdi_rpc_start(efx, cmd, inbuf, inlen);
  695. if (rc)
  696. return rc;
  697. rc = _efx_mcdi_rpc_finish(efx, cmd, inlen, outbuf, outlen,
  698. outlen_actual, quiet, &proxy_handle, raw_rc);
  699. if (proxy_handle) {
  700. /* Handle proxy authorisation. This allows approval of MCDI
  701. * operations to be delegated to the admin function, allowing
  702. * fine control over (eg) multicast subscriptions.
  703. */
  704. struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
  705. netif_dbg(efx, hw, efx->net_dev,
  706. "MCDI waiting for proxy auth %d\n",
  707. proxy_handle);
  708. rc = efx_mcdi_proxy_wait(efx, proxy_handle, quiet);
  709. if (rc == 0) {
  710. netif_dbg(efx, hw, efx->net_dev,
  711. "MCDI proxy retry %d\n", proxy_handle);
  712. /* We now retry the original request. */
  713. mcdi->state = MCDI_STATE_RUNNING_SYNC;
  714. efx_mcdi_send_request(efx, cmd, inbuf, inlen);
  715. rc = _efx_mcdi_rpc_finish(efx, cmd, inlen,
  716. outbuf, outlen, outlen_actual,
  717. quiet, NULL, raw_rc);
  718. } else {
  719. netif_cond_dbg(efx, hw, efx->net_dev, rc == -EPERM, err,
  720. "MC command 0x%x failed after proxy auth rc=%d\n",
  721. cmd, rc);
  722. if (rc == -EINTR || rc == -EIO)
  723. efx_schedule_reset(efx, RESET_TYPE_MC_FAILURE);
  724. efx_mcdi_release(mcdi);
  725. }
  726. }
  727. return rc;
  728. }
  729. static int _efx_mcdi_rpc_evb_retry(struct efx_nic *efx, unsigned cmd,
  730. const efx_dword_t *inbuf, size_t inlen,
  731. efx_dword_t *outbuf, size_t outlen,
  732. size_t *outlen_actual, bool quiet)
  733. {
  734. int raw_rc = 0;
  735. int rc;
  736. rc = _efx_mcdi_rpc(efx, cmd, inbuf, inlen,
  737. outbuf, outlen, outlen_actual, true, &raw_rc);
  738. if ((rc == -EPROTO) && (raw_rc == MC_CMD_ERR_NO_EVB_PORT) &&
  739. efx->type->is_vf) {
  740. /* If the EVB port isn't available within a VF this may
  741. * mean the PF is still bringing the switch up. We should
  742. * retry our request shortly.
  743. */
  744. unsigned long abort_time = jiffies + MCDI_RPC_TIMEOUT;
  745. unsigned int delay_us = 10000;
  746. netif_dbg(efx, hw, efx->net_dev,
  747. "%s: NO_EVB_PORT; will retry request\n",
  748. __func__);
  749. do {
  750. usleep_range(delay_us, delay_us + 10000);
  751. rc = _efx_mcdi_rpc(efx, cmd, inbuf, inlen,
  752. outbuf, outlen, outlen_actual,
  753. true, &raw_rc);
  754. if (delay_us < 100000)
  755. delay_us <<= 1;
  756. } while ((rc == -EPROTO) &&
  757. (raw_rc == MC_CMD_ERR_NO_EVB_PORT) &&
  758. time_before(jiffies, abort_time));
  759. }
  760. if (rc && !quiet && !(cmd == MC_CMD_REBOOT && rc == -EIO))
  761. efx_mcdi_display_error(efx, cmd, inlen,
  762. outbuf, outlen, rc);
  763. return rc;
  764. }
  765. /**
  766. * efx_mcdi_rpc - Issue an MCDI command and wait for completion
  767. * @efx: NIC through which to issue the command
  768. * @cmd: Command type number
  769. * @inbuf: Command parameters
  770. * @inlen: Length of command parameters, in bytes. Must be a multiple
  771. * of 4 and no greater than %MCDI_CTL_SDU_LEN_MAX_V1.
  772. * @outbuf: Response buffer. May be %NULL if @outlen is 0.
  773. * @outlen: Length of response buffer, in bytes. If the actual
  774. * response is longer than @outlen & ~3, it will be truncated
  775. * to that length.
  776. * @outlen_actual: Pointer through which to return the actual response
  777. * length. May be %NULL if this is not needed.
  778. *
  779. * This function may sleep and therefore must be called in an appropriate
  780. * context.
  781. *
  782. * Return: A negative error code, or zero if successful. The error
  783. * code may come from the MCDI response or may indicate a failure
  784. * to communicate with the MC. In the former case, the response
  785. * will still be copied to @outbuf and *@outlen_actual will be
  786. * set accordingly. In the latter case, *@outlen_actual will be
  787. * set to zero.
  788. */
  789. int efx_mcdi_rpc(struct efx_nic *efx, unsigned cmd,
  790. const efx_dword_t *inbuf, size_t inlen,
  791. efx_dword_t *outbuf, size_t outlen,
  792. size_t *outlen_actual)
  793. {
  794. return _efx_mcdi_rpc_evb_retry(efx, cmd, inbuf, inlen, outbuf, outlen,
  795. outlen_actual, false);
  796. }
  797. /* Normally, on receiving an error code in the MCDI response,
  798. * efx_mcdi_rpc will log an error message containing (among other
  799. * things) the raw error code, by means of efx_mcdi_display_error.
  800. * This _quiet version suppresses that; if the caller wishes to log
  801. * the error conditionally on the return code, it should call this
  802. * function and is then responsible for calling efx_mcdi_display_error
  803. * as needed.
  804. */
  805. int efx_mcdi_rpc_quiet(struct efx_nic *efx, unsigned cmd,
  806. const efx_dword_t *inbuf, size_t inlen,
  807. efx_dword_t *outbuf, size_t outlen,
  808. size_t *outlen_actual)
  809. {
  810. return _efx_mcdi_rpc_evb_retry(efx, cmd, inbuf, inlen, outbuf, outlen,
  811. outlen_actual, true);
  812. }
  813. int efx_mcdi_rpc_start(struct efx_nic *efx, unsigned cmd,
  814. const efx_dword_t *inbuf, size_t inlen)
  815. {
  816. struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
  817. int rc;
  818. rc = efx_mcdi_check_supported(efx, cmd, inlen);
  819. if (rc)
  820. return rc;
  821. if (efx->mc_bist_for_other_fn)
  822. return -ENETDOWN;
  823. if (mcdi->mode == MCDI_MODE_FAIL)
  824. return -ENETDOWN;
  825. efx_mcdi_acquire_sync(mcdi);
  826. efx_mcdi_send_request(efx, cmd, inbuf, inlen);
  827. return 0;
  828. }
  829. static int _efx_mcdi_rpc_async(struct efx_nic *efx, unsigned int cmd,
  830. const efx_dword_t *inbuf, size_t inlen,
  831. size_t outlen,
  832. efx_mcdi_async_completer *complete,
  833. unsigned long cookie, bool quiet)
  834. {
  835. struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
  836. struct efx_mcdi_async_param *async;
  837. int rc;
  838. rc = efx_mcdi_check_supported(efx, cmd, inlen);
  839. if (rc)
  840. return rc;
  841. if (efx->mc_bist_for_other_fn)
  842. return -ENETDOWN;
  843. async = kmalloc(sizeof(*async) + ALIGN(max(inlen, outlen), 4),
  844. GFP_ATOMIC);
  845. if (!async)
  846. return -ENOMEM;
  847. async->cmd = cmd;
  848. async->inlen = inlen;
  849. async->outlen = outlen;
  850. async->quiet = quiet;
  851. async->complete = complete;
  852. async->cookie = cookie;
  853. memcpy(async + 1, inbuf, inlen);
  854. spin_lock_bh(&mcdi->async_lock);
  855. if (mcdi->mode == MCDI_MODE_EVENTS) {
  856. list_add_tail(&async->list, &mcdi->async_list);
  857. /* If this is at the front of the queue, try to start it
  858. * immediately
  859. */
  860. if (mcdi->async_list.next == &async->list &&
  861. efx_mcdi_acquire_async(mcdi)) {
  862. efx_mcdi_send_request(efx, cmd, inbuf, inlen);
  863. mod_timer(&mcdi->async_timer,
  864. jiffies + MCDI_RPC_TIMEOUT);
  865. }
  866. } else {
  867. kfree(async);
  868. rc = -ENETDOWN;
  869. }
  870. spin_unlock_bh(&mcdi->async_lock);
  871. return rc;
  872. }
  873. /**
  874. * efx_mcdi_rpc_async - Schedule an MCDI command to run asynchronously
  875. * @efx: NIC through which to issue the command
  876. * @cmd: Command type number
  877. * @inbuf: Command parameters
  878. * @inlen: Length of command parameters, in bytes
  879. * @outlen: Length to allocate for response buffer, in bytes
  880. * @complete: Function to be called on completion or cancellation.
  881. * @cookie: Arbitrary value to be passed to @complete.
  882. *
  883. * This function does not sleep and therefore may be called in atomic
  884. * context. It will fail if event queues are disabled or if MCDI
  885. * event completions have been disabled due to an error.
  886. *
  887. * If it succeeds, the @complete function will be called exactly once
  888. * in atomic context, when one of the following occurs:
  889. * (a) the completion event is received (in NAPI context)
  890. * (b) event queues are disabled (in the process that disables them)
  891. * (c) the request times-out (in timer context)
  892. */
  893. int
  894. efx_mcdi_rpc_async(struct efx_nic *efx, unsigned int cmd,
  895. const efx_dword_t *inbuf, size_t inlen, size_t outlen,
  896. efx_mcdi_async_completer *complete, unsigned long cookie)
  897. {
  898. return _efx_mcdi_rpc_async(efx, cmd, inbuf, inlen, outlen, complete,
  899. cookie, false);
  900. }
  901. int efx_mcdi_rpc_async_quiet(struct efx_nic *efx, unsigned int cmd,
  902. const efx_dword_t *inbuf, size_t inlen,
  903. size_t outlen, efx_mcdi_async_completer *complete,
  904. unsigned long cookie)
  905. {
  906. return _efx_mcdi_rpc_async(efx, cmd, inbuf, inlen, outlen, complete,
  907. cookie, true);
  908. }
  909. int efx_mcdi_rpc_finish(struct efx_nic *efx, unsigned cmd, size_t inlen,
  910. efx_dword_t *outbuf, size_t outlen,
  911. size_t *outlen_actual)
  912. {
  913. return _efx_mcdi_rpc_finish(efx, cmd, inlen, outbuf, outlen,
  914. outlen_actual, false, NULL, NULL);
  915. }
  916. int efx_mcdi_rpc_finish_quiet(struct efx_nic *efx, unsigned cmd, size_t inlen,
  917. efx_dword_t *outbuf, size_t outlen,
  918. size_t *outlen_actual)
  919. {
  920. return _efx_mcdi_rpc_finish(efx, cmd, inlen, outbuf, outlen,
  921. outlen_actual, true, NULL, NULL);
  922. }
  923. void efx_mcdi_display_error(struct efx_nic *efx, unsigned cmd,
  924. size_t inlen, efx_dword_t *outbuf,
  925. size_t outlen, int rc)
  926. {
  927. int code = 0, err_arg = 0;
  928. if (outlen >= MC_CMD_ERR_CODE_OFST + 4)
  929. code = MCDI_DWORD(outbuf, ERR_CODE);
  930. if (outlen >= MC_CMD_ERR_ARG_OFST + 4)
  931. err_arg = MCDI_DWORD(outbuf, ERR_ARG);
  932. netif_cond_dbg(efx, hw, efx->net_dev, rc == -EPERM, err,
  933. "MC command 0x%x inlen %zu failed rc=%d (raw=%d) arg=%d\n",
  934. cmd, inlen, rc, code, err_arg);
  935. }
  936. /* Switch to polled MCDI completions. This can be called in various
  937. * error conditions with various locks held, so it must be lockless.
  938. * Caller is responsible for flushing asynchronous requests later.
  939. */
  940. void efx_mcdi_mode_poll(struct efx_nic *efx)
  941. {
  942. struct efx_mcdi_iface *mcdi;
  943. if (!efx->mcdi)
  944. return;
  945. mcdi = efx_mcdi(efx);
  946. /* If already in polling mode, nothing to do.
  947. * If in fail-fast state, don't switch to polled completion.
  948. * FLR recovery will do that later.
  949. */
  950. if (mcdi->mode == MCDI_MODE_POLL || mcdi->mode == MCDI_MODE_FAIL)
  951. return;
  952. /* We can switch from event completion to polled completion, because
  953. * mcdi requests are always completed in shared memory. We do this by
  954. * switching the mode to POLL'd then completing the request.
  955. * efx_mcdi_await_completion() will then call efx_mcdi_poll().
  956. *
  957. * We need an smp_wmb() to synchronise with efx_mcdi_await_completion(),
  958. * which efx_mcdi_complete_sync() provides for us.
  959. */
  960. mcdi->mode = MCDI_MODE_POLL;
  961. efx_mcdi_complete_sync(mcdi);
  962. }
  963. /* Flush any running or queued asynchronous requests, after event processing
  964. * is stopped
  965. */
  966. void efx_mcdi_flush_async(struct efx_nic *efx)
  967. {
  968. struct efx_mcdi_async_param *async, *next;
  969. struct efx_mcdi_iface *mcdi;
  970. if (!efx->mcdi)
  971. return;
  972. mcdi = efx_mcdi(efx);
  973. /* We must be in poll or fail mode so no more requests can be queued */
  974. BUG_ON(mcdi->mode == MCDI_MODE_EVENTS);
  975. del_timer_sync(&mcdi->async_timer);
  976. /* If a request is still running, make sure we give the MC
  977. * time to complete it so that the response won't overwrite our
  978. * next request.
  979. */
  980. if (mcdi->state == MCDI_STATE_RUNNING_ASYNC) {
  981. efx_mcdi_poll(efx);
  982. mcdi->state = MCDI_STATE_QUIESCENT;
  983. }
  984. /* Nothing else will access the async list now, so it is safe
  985. * to walk it without holding async_lock. If we hold it while
  986. * calling a completer then lockdep may warn that we have
  987. * acquired locks in the wrong order.
  988. */
  989. list_for_each_entry_safe(async, next, &mcdi->async_list, list) {
  990. if (async->complete)
  991. async->complete(efx, async->cookie, -ENETDOWN, NULL, 0);
  992. list_del(&async->list);
  993. kfree(async);
  994. }
  995. }
  996. void efx_mcdi_mode_event(struct efx_nic *efx)
  997. {
  998. struct efx_mcdi_iface *mcdi;
  999. if (!efx->mcdi)
  1000. return;
  1001. mcdi = efx_mcdi(efx);
  1002. /* If already in event completion mode, nothing to do.
  1003. * If in fail-fast state, don't switch to event completion. FLR
  1004. * recovery will do that later.
  1005. */
  1006. if (mcdi->mode == MCDI_MODE_EVENTS || mcdi->mode == MCDI_MODE_FAIL)
  1007. return;
  1008. /* We can't switch from polled to event completion in the middle of a
  1009. * request, because the completion method is specified in the request.
  1010. * So acquire the interface to serialise the requestors. We don't need
  1011. * to acquire the iface_lock to change the mode here, but we do need a
  1012. * write memory barrier ensure that efx_mcdi_rpc() sees it, which
  1013. * efx_mcdi_acquire() provides.
  1014. */
  1015. efx_mcdi_acquire_sync(mcdi);
  1016. mcdi->mode = MCDI_MODE_EVENTS;
  1017. efx_mcdi_release(mcdi);
  1018. }
  1019. static void efx_mcdi_ev_death(struct efx_nic *efx, int rc)
  1020. {
  1021. struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
  1022. /* If there is an outstanding MCDI request, it has been terminated
  1023. * either by a BADASSERT or REBOOT event. If the mcdi interface is
  1024. * in polled mode, then do nothing because the MC reboot handler will
  1025. * set the header correctly. However, if the mcdi interface is waiting
  1026. * for a CMDDONE event it won't receive it [and since all MCDI events
  1027. * are sent to the same queue, we can't be racing with
  1028. * efx_mcdi_ev_cpl()]
  1029. *
  1030. * If there is an outstanding asynchronous request, we can't
  1031. * complete it now (efx_mcdi_complete() would deadlock). The
  1032. * reset process will take care of this.
  1033. *
  1034. * There's a race here with efx_mcdi_send_request(), because
  1035. * we might receive a REBOOT event *before* the request has
  1036. * been copied out. In polled mode (during startup) this is
  1037. * irrelevant, because efx_mcdi_complete_sync() is ignored. In
  1038. * event mode, this condition is just an edge-case of
  1039. * receiving a REBOOT event after posting the MCDI
  1040. * request. Did the mc reboot before or after the copyout? The
  1041. * best we can do always is just return failure.
  1042. *
  1043. * If there is an outstanding proxy response expected it is not going
  1044. * to arrive. We should thus abort it.
  1045. */
  1046. spin_lock(&mcdi->iface_lock);
  1047. efx_mcdi_proxy_abort(mcdi);
  1048. if (efx_mcdi_complete_sync(mcdi)) {
  1049. if (mcdi->mode == MCDI_MODE_EVENTS) {
  1050. mcdi->resprc = rc;
  1051. mcdi->resp_hdr_len = 0;
  1052. mcdi->resp_data_len = 0;
  1053. ++mcdi->credits;
  1054. }
  1055. } else {
  1056. int count;
  1057. /* Consume the status word since efx_mcdi_rpc_finish() won't */
  1058. for (count = 0; count < MCDI_STATUS_DELAY_COUNT; ++count) {
  1059. rc = efx_mcdi_poll_reboot(efx);
  1060. if (rc)
  1061. break;
  1062. udelay(MCDI_STATUS_DELAY_US);
  1063. }
  1064. /* On EF10, a CODE_MC_REBOOT event can be received without the
  1065. * reboot detection in efx_mcdi_poll_reboot() being triggered.
  1066. * If zero was returned from the final call to
  1067. * efx_mcdi_poll_reboot(), the MC reboot wasn't noticed but the
  1068. * MC has definitely rebooted so prepare for the reset.
  1069. */
  1070. if (!rc && efx->type->mcdi_reboot_detected)
  1071. efx->type->mcdi_reboot_detected(efx);
  1072. mcdi->new_epoch = true;
  1073. /* Nobody was waiting for an MCDI request, so trigger a reset */
  1074. efx_schedule_reset(efx, RESET_TYPE_MC_FAILURE);
  1075. }
  1076. spin_unlock(&mcdi->iface_lock);
  1077. }
  1078. /* The MC is going down in to BIST mode. set the BIST flag to block
  1079. * new MCDI, cancel any outstanding MCDI and and schedule a BIST-type reset
  1080. * (which doesn't actually execute a reset, it waits for the controlling
  1081. * function to reset it).
  1082. */
  1083. static void efx_mcdi_ev_bist(struct efx_nic *efx)
  1084. {
  1085. struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
  1086. spin_lock(&mcdi->iface_lock);
  1087. efx->mc_bist_for_other_fn = true;
  1088. efx_mcdi_proxy_abort(mcdi);
  1089. if (efx_mcdi_complete_sync(mcdi)) {
  1090. if (mcdi->mode == MCDI_MODE_EVENTS) {
  1091. mcdi->resprc = -EIO;
  1092. mcdi->resp_hdr_len = 0;
  1093. mcdi->resp_data_len = 0;
  1094. ++mcdi->credits;
  1095. }
  1096. }
  1097. mcdi->new_epoch = true;
  1098. efx_schedule_reset(efx, RESET_TYPE_MC_BIST);
  1099. spin_unlock(&mcdi->iface_lock);
  1100. }
  1101. /* MCDI timeouts seen, so make all MCDI calls fail-fast and issue an FLR to try
  1102. * to recover.
  1103. */
  1104. static void efx_mcdi_abandon(struct efx_nic *efx)
  1105. {
  1106. struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
  1107. if (xchg(&mcdi->mode, MCDI_MODE_FAIL) == MCDI_MODE_FAIL)
  1108. return; /* it had already been done */
  1109. netif_dbg(efx, hw, efx->net_dev, "MCDI is timing out; trying to recover\n");
  1110. efx_schedule_reset(efx, RESET_TYPE_MCDI_TIMEOUT);
  1111. }
  1112. /* Called from efx_farch_ev_process and efx_ef10_ev_process for MCDI events */
  1113. void efx_mcdi_process_event(struct efx_channel *channel,
  1114. efx_qword_t *event)
  1115. {
  1116. struct efx_nic *efx = channel->efx;
  1117. int code = EFX_QWORD_FIELD(*event, MCDI_EVENT_CODE);
  1118. u32 data = EFX_QWORD_FIELD(*event, MCDI_EVENT_DATA);
  1119. switch (code) {
  1120. case MCDI_EVENT_CODE_BADSSERT:
  1121. netif_err(efx, hw, efx->net_dev,
  1122. "MC watchdog or assertion failure at 0x%x\n", data);
  1123. efx_mcdi_ev_death(efx, -EINTR);
  1124. break;
  1125. case MCDI_EVENT_CODE_PMNOTICE:
  1126. netif_info(efx, wol, efx->net_dev, "MCDI PM event.\n");
  1127. break;
  1128. case MCDI_EVENT_CODE_CMDDONE:
  1129. efx_mcdi_ev_cpl(efx,
  1130. MCDI_EVENT_FIELD(*event, CMDDONE_SEQ),
  1131. MCDI_EVENT_FIELD(*event, CMDDONE_DATALEN),
  1132. MCDI_EVENT_FIELD(*event, CMDDONE_ERRNO));
  1133. break;
  1134. case MCDI_EVENT_CODE_LINKCHANGE:
  1135. efx_mcdi_process_link_change(efx, event);
  1136. break;
  1137. case MCDI_EVENT_CODE_SENSOREVT:
  1138. efx_mcdi_sensor_event(efx, event);
  1139. break;
  1140. case MCDI_EVENT_CODE_SCHEDERR:
  1141. netif_dbg(efx, hw, efx->net_dev,
  1142. "MC Scheduler alert (0x%x)\n", data);
  1143. break;
  1144. case MCDI_EVENT_CODE_REBOOT:
  1145. case MCDI_EVENT_CODE_MC_REBOOT:
  1146. netif_info(efx, hw, efx->net_dev, "MC Reboot\n");
  1147. efx_mcdi_ev_death(efx, -EIO);
  1148. break;
  1149. case MCDI_EVENT_CODE_MC_BIST:
  1150. netif_info(efx, hw, efx->net_dev, "MC entered BIST mode\n");
  1151. efx_mcdi_ev_bist(efx);
  1152. break;
  1153. case MCDI_EVENT_CODE_MAC_STATS_DMA:
  1154. /* MAC stats are gather lazily. We can ignore this. */
  1155. break;
  1156. case MCDI_EVENT_CODE_FLR:
  1157. if (efx->type->sriov_flr)
  1158. efx->type->sriov_flr(efx,
  1159. MCDI_EVENT_FIELD(*event, FLR_VF));
  1160. break;
  1161. case MCDI_EVENT_CODE_PTP_RX:
  1162. case MCDI_EVENT_CODE_PTP_FAULT:
  1163. case MCDI_EVENT_CODE_PTP_PPS:
  1164. efx_ptp_event(efx, event);
  1165. break;
  1166. case MCDI_EVENT_CODE_PTP_TIME:
  1167. efx_time_sync_event(channel, event);
  1168. break;
  1169. case MCDI_EVENT_CODE_TX_FLUSH:
  1170. case MCDI_EVENT_CODE_RX_FLUSH:
  1171. /* Two flush events will be sent: one to the same event
  1172. * queue as completions, and one to event queue 0.
  1173. * In the latter case the {RX,TX}_FLUSH_TO_DRIVER
  1174. * flag will be set, and we should ignore the event
  1175. * because we want to wait for all completions.
  1176. */
  1177. BUILD_BUG_ON(MCDI_EVENT_TX_FLUSH_TO_DRIVER_LBN !=
  1178. MCDI_EVENT_RX_FLUSH_TO_DRIVER_LBN);
  1179. if (!MCDI_EVENT_FIELD(*event, TX_FLUSH_TO_DRIVER))
  1180. efx_ef10_handle_drain_event(efx);
  1181. break;
  1182. case MCDI_EVENT_CODE_TX_ERR:
  1183. case MCDI_EVENT_CODE_RX_ERR:
  1184. netif_err(efx, hw, efx->net_dev,
  1185. "%s DMA error (event: "EFX_QWORD_FMT")\n",
  1186. code == MCDI_EVENT_CODE_TX_ERR ? "TX" : "RX",
  1187. EFX_QWORD_VAL(*event));
  1188. efx_schedule_reset(efx, RESET_TYPE_DMA_ERROR);
  1189. break;
  1190. case MCDI_EVENT_CODE_PROXY_RESPONSE:
  1191. efx_mcdi_ev_proxy_response(efx,
  1192. MCDI_EVENT_FIELD(*event, PROXY_RESPONSE_HANDLE),
  1193. MCDI_EVENT_FIELD(*event, PROXY_RESPONSE_RC));
  1194. break;
  1195. default:
  1196. netif_err(efx, hw, efx->net_dev,
  1197. "Unknown MCDI event " EFX_QWORD_FMT "\n",
  1198. EFX_QWORD_VAL(*event));
  1199. }
  1200. }
  1201. /**************************************************************************
  1202. *
  1203. * Specific request functions
  1204. *
  1205. **************************************************************************
  1206. */
  1207. void efx_mcdi_print_fwver(struct efx_nic *efx, char *buf, size_t len)
  1208. {
  1209. MCDI_DECLARE_BUF(outbuf, MC_CMD_GET_VERSION_OUT_LEN);
  1210. size_t outlength;
  1211. const __le16 *ver_words;
  1212. size_t offset;
  1213. int rc;
  1214. BUILD_BUG_ON(MC_CMD_GET_VERSION_IN_LEN != 0);
  1215. rc = efx_mcdi_rpc(efx, MC_CMD_GET_VERSION, NULL, 0,
  1216. outbuf, sizeof(outbuf), &outlength);
  1217. if (rc)
  1218. goto fail;
  1219. if (outlength < MC_CMD_GET_VERSION_OUT_LEN) {
  1220. rc = -EIO;
  1221. goto fail;
  1222. }
  1223. ver_words = (__le16 *)MCDI_PTR(outbuf, GET_VERSION_OUT_VERSION);
  1224. offset = snprintf(buf, len, "%u.%u.%u.%u",
  1225. le16_to_cpu(ver_words[0]), le16_to_cpu(ver_words[1]),
  1226. le16_to_cpu(ver_words[2]), le16_to_cpu(ver_words[3]));
  1227. /* EF10 may have multiple datapath firmware variants within a
  1228. * single version. Report which variants are running.
  1229. */
  1230. if (efx_nic_rev(efx) >= EFX_REV_HUNT_A0) {
  1231. struct efx_ef10_nic_data *nic_data = efx->nic_data;
  1232. offset += snprintf(buf + offset, len - offset, " rx%x tx%x",
  1233. nic_data->rx_dpcpu_fw_id,
  1234. nic_data->tx_dpcpu_fw_id);
  1235. /* It's theoretically possible for the string to exceed 31
  1236. * characters, though in practice the first three version
  1237. * components are short enough that this doesn't happen.
  1238. */
  1239. if (WARN_ON(offset >= len))
  1240. buf[0] = 0;
  1241. }
  1242. return;
  1243. fail:
  1244. netif_err(efx, probe, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
  1245. buf[0] = 0;
  1246. }
  1247. static int efx_mcdi_drv_attach(struct efx_nic *efx, bool driver_operating,
  1248. bool *was_attached)
  1249. {
  1250. MCDI_DECLARE_BUF(inbuf, MC_CMD_DRV_ATTACH_IN_LEN);
  1251. MCDI_DECLARE_BUF(outbuf, MC_CMD_DRV_ATTACH_EXT_OUT_LEN);
  1252. size_t outlen;
  1253. int rc;
  1254. MCDI_SET_DWORD(inbuf, DRV_ATTACH_IN_NEW_STATE,
  1255. driver_operating ? 1 : 0);
  1256. MCDI_SET_DWORD(inbuf, DRV_ATTACH_IN_UPDATE, 1);
  1257. MCDI_SET_DWORD(inbuf, DRV_ATTACH_IN_FIRMWARE_ID, MC_CMD_FW_LOW_LATENCY);
  1258. rc = efx_mcdi_rpc_quiet(efx, MC_CMD_DRV_ATTACH, inbuf, sizeof(inbuf),
  1259. outbuf, sizeof(outbuf), &outlen);
  1260. /* If we're not the primary PF, trying to ATTACH with a FIRMWARE_ID
  1261. * specified will fail with EPERM, and we have to tell the MC we don't
  1262. * care what firmware we get.
  1263. */
  1264. if (rc == -EPERM) {
  1265. netif_dbg(efx, probe, efx->net_dev,
  1266. "efx_mcdi_drv_attach with fw-variant setting failed EPERM, trying without it\n");
  1267. MCDI_SET_DWORD(inbuf, DRV_ATTACH_IN_FIRMWARE_ID,
  1268. MC_CMD_FW_DONT_CARE);
  1269. rc = efx_mcdi_rpc_quiet(efx, MC_CMD_DRV_ATTACH, inbuf,
  1270. sizeof(inbuf), outbuf, sizeof(outbuf),
  1271. &outlen);
  1272. }
  1273. if (rc) {
  1274. efx_mcdi_display_error(efx, MC_CMD_DRV_ATTACH, sizeof(inbuf),
  1275. outbuf, outlen, rc);
  1276. goto fail;
  1277. }
  1278. if (outlen < MC_CMD_DRV_ATTACH_OUT_LEN) {
  1279. rc = -EIO;
  1280. goto fail;
  1281. }
  1282. if (driver_operating) {
  1283. if (outlen >= MC_CMD_DRV_ATTACH_EXT_OUT_LEN) {
  1284. efx->mcdi->fn_flags =
  1285. MCDI_DWORD(outbuf,
  1286. DRV_ATTACH_EXT_OUT_FUNC_FLAGS);
  1287. } else {
  1288. /* Synthesise flags for Siena */
  1289. efx->mcdi->fn_flags =
  1290. 1 << MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_LINKCTRL |
  1291. 1 << MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_TRUSTED |
  1292. (efx_port_num(efx) == 0) <<
  1293. MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_PRIMARY;
  1294. }
  1295. }
  1296. /* We currently assume we have control of the external link
  1297. * and are completely trusted by firmware. Abort probing
  1298. * if that's not true for this function.
  1299. */
  1300. if (was_attached != NULL)
  1301. *was_attached = MCDI_DWORD(outbuf, DRV_ATTACH_OUT_OLD_STATE);
  1302. return 0;
  1303. fail:
  1304. netif_err(efx, probe, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
  1305. return rc;
  1306. }
  1307. int efx_mcdi_get_board_cfg(struct efx_nic *efx, u8 *mac_address,
  1308. u16 *fw_subtype_list, u32 *capabilities)
  1309. {
  1310. MCDI_DECLARE_BUF(outbuf, MC_CMD_GET_BOARD_CFG_OUT_LENMAX);
  1311. size_t outlen, i;
  1312. int port_num = efx_port_num(efx);
  1313. int rc;
  1314. BUILD_BUG_ON(MC_CMD_GET_BOARD_CFG_IN_LEN != 0);
  1315. /* we need __aligned(2) for ether_addr_copy */
  1316. BUILD_BUG_ON(MC_CMD_GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT0_OFST & 1);
  1317. BUILD_BUG_ON(MC_CMD_GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT1_OFST & 1);
  1318. rc = efx_mcdi_rpc(efx, MC_CMD_GET_BOARD_CFG, NULL, 0,
  1319. outbuf, sizeof(outbuf), &outlen);
  1320. if (rc)
  1321. goto fail;
  1322. if (outlen < MC_CMD_GET_BOARD_CFG_OUT_LENMIN) {
  1323. rc = -EIO;
  1324. goto fail;
  1325. }
  1326. if (mac_address)
  1327. ether_addr_copy(mac_address,
  1328. port_num ?
  1329. MCDI_PTR(outbuf, GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT1) :
  1330. MCDI_PTR(outbuf, GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT0));
  1331. if (fw_subtype_list) {
  1332. for (i = 0;
  1333. i < MCDI_VAR_ARRAY_LEN(outlen,
  1334. GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST);
  1335. i++)
  1336. fw_subtype_list[i] = MCDI_ARRAY_WORD(
  1337. outbuf, GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST, i);
  1338. for (; i < MC_CMD_GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST_MAXNUM; i++)
  1339. fw_subtype_list[i] = 0;
  1340. }
  1341. if (capabilities) {
  1342. if (port_num)
  1343. *capabilities = MCDI_DWORD(outbuf,
  1344. GET_BOARD_CFG_OUT_CAPABILITIES_PORT1);
  1345. else
  1346. *capabilities = MCDI_DWORD(outbuf,
  1347. GET_BOARD_CFG_OUT_CAPABILITIES_PORT0);
  1348. }
  1349. return 0;
  1350. fail:
  1351. netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d len=%d\n",
  1352. __func__, rc, (int)outlen);
  1353. return rc;
  1354. }
  1355. int efx_mcdi_log_ctrl(struct efx_nic *efx, bool evq, bool uart, u32 dest_evq)
  1356. {
  1357. MCDI_DECLARE_BUF(inbuf, MC_CMD_LOG_CTRL_IN_LEN);
  1358. u32 dest = 0;
  1359. int rc;
  1360. if (uart)
  1361. dest |= MC_CMD_LOG_CTRL_IN_LOG_DEST_UART;
  1362. if (evq)
  1363. dest |= MC_CMD_LOG_CTRL_IN_LOG_DEST_EVQ;
  1364. MCDI_SET_DWORD(inbuf, LOG_CTRL_IN_LOG_DEST, dest);
  1365. MCDI_SET_DWORD(inbuf, LOG_CTRL_IN_LOG_DEST_EVQ, dest_evq);
  1366. BUILD_BUG_ON(MC_CMD_LOG_CTRL_OUT_LEN != 0);
  1367. rc = efx_mcdi_rpc(efx, MC_CMD_LOG_CTRL, inbuf, sizeof(inbuf),
  1368. NULL, 0, NULL);
  1369. return rc;
  1370. }
  1371. int efx_mcdi_nvram_types(struct efx_nic *efx, u32 *nvram_types_out)
  1372. {
  1373. MCDI_DECLARE_BUF(outbuf, MC_CMD_NVRAM_TYPES_OUT_LEN);
  1374. size_t outlen;
  1375. int rc;
  1376. BUILD_BUG_ON(MC_CMD_NVRAM_TYPES_IN_LEN != 0);
  1377. rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_TYPES, NULL, 0,
  1378. outbuf, sizeof(outbuf), &outlen);
  1379. if (rc)
  1380. goto fail;
  1381. if (outlen < MC_CMD_NVRAM_TYPES_OUT_LEN) {
  1382. rc = -EIO;
  1383. goto fail;
  1384. }
  1385. *nvram_types_out = MCDI_DWORD(outbuf, NVRAM_TYPES_OUT_TYPES);
  1386. return 0;
  1387. fail:
  1388. netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n",
  1389. __func__, rc);
  1390. return rc;
  1391. }
  1392. int efx_mcdi_nvram_info(struct efx_nic *efx, unsigned int type,
  1393. size_t *size_out, size_t *erase_size_out,
  1394. bool *protected_out)
  1395. {
  1396. MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_INFO_IN_LEN);
  1397. MCDI_DECLARE_BUF(outbuf, MC_CMD_NVRAM_INFO_OUT_LEN);
  1398. size_t outlen;
  1399. int rc;
  1400. MCDI_SET_DWORD(inbuf, NVRAM_INFO_IN_TYPE, type);
  1401. rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_INFO, inbuf, sizeof(inbuf),
  1402. outbuf, sizeof(outbuf), &outlen);
  1403. if (rc)
  1404. goto fail;
  1405. if (outlen < MC_CMD_NVRAM_INFO_OUT_LEN) {
  1406. rc = -EIO;
  1407. goto fail;
  1408. }
  1409. *size_out = MCDI_DWORD(outbuf, NVRAM_INFO_OUT_SIZE);
  1410. *erase_size_out = MCDI_DWORD(outbuf, NVRAM_INFO_OUT_ERASESIZE);
  1411. *protected_out = !!(MCDI_DWORD(outbuf, NVRAM_INFO_OUT_FLAGS) &
  1412. (1 << MC_CMD_NVRAM_INFO_OUT_PROTECTED_LBN));
  1413. return 0;
  1414. fail:
  1415. netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
  1416. return rc;
  1417. }
  1418. static int efx_mcdi_nvram_test(struct efx_nic *efx, unsigned int type)
  1419. {
  1420. MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_TEST_IN_LEN);
  1421. MCDI_DECLARE_BUF(outbuf, MC_CMD_NVRAM_TEST_OUT_LEN);
  1422. int rc;
  1423. MCDI_SET_DWORD(inbuf, NVRAM_TEST_IN_TYPE, type);
  1424. rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_TEST, inbuf, sizeof(inbuf),
  1425. outbuf, sizeof(outbuf), NULL);
  1426. if (rc)
  1427. return rc;
  1428. switch (MCDI_DWORD(outbuf, NVRAM_TEST_OUT_RESULT)) {
  1429. case MC_CMD_NVRAM_TEST_PASS:
  1430. case MC_CMD_NVRAM_TEST_NOTSUPP:
  1431. return 0;
  1432. default:
  1433. return -EIO;
  1434. }
  1435. }
  1436. int efx_mcdi_nvram_test_all(struct efx_nic *efx)
  1437. {
  1438. u32 nvram_types;
  1439. unsigned int type;
  1440. int rc;
  1441. rc = efx_mcdi_nvram_types(efx, &nvram_types);
  1442. if (rc)
  1443. goto fail1;
  1444. type = 0;
  1445. while (nvram_types != 0) {
  1446. if (nvram_types & 1) {
  1447. rc = efx_mcdi_nvram_test(efx, type);
  1448. if (rc)
  1449. goto fail2;
  1450. }
  1451. type++;
  1452. nvram_types >>= 1;
  1453. }
  1454. return 0;
  1455. fail2:
  1456. netif_err(efx, hw, efx->net_dev, "%s: failed type=%u\n",
  1457. __func__, type);
  1458. fail1:
  1459. netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
  1460. return rc;
  1461. }
  1462. /* Returns 1 if an assertion was read, 0 if no assertion had fired,
  1463. * negative on error.
  1464. */
  1465. static int efx_mcdi_read_assertion(struct efx_nic *efx)
  1466. {
  1467. MCDI_DECLARE_BUF(inbuf, MC_CMD_GET_ASSERTS_IN_LEN);
  1468. MCDI_DECLARE_BUF(outbuf, MC_CMD_GET_ASSERTS_OUT_LEN);
  1469. unsigned int flags, index;
  1470. const char *reason;
  1471. size_t outlen;
  1472. int retry;
  1473. int rc;
  1474. /* Attempt to read any stored assertion state before we reboot
  1475. * the mcfw out of the assertion handler. Retry twice, once
  1476. * because a boot-time assertion might cause this command to fail
  1477. * with EINTR. And once again because GET_ASSERTS can race with
  1478. * MC_CMD_REBOOT running on the other port. */
  1479. retry = 2;
  1480. do {
  1481. MCDI_SET_DWORD(inbuf, GET_ASSERTS_IN_CLEAR, 1);
  1482. rc = efx_mcdi_rpc_quiet(efx, MC_CMD_GET_ASSERTS,
  1483. inbuf, MC_CMD_GET_ASSERTS_IN_LEN,
  1484. outbuf, sizeof(outbuf), &outlen);
  1485. if (rc == -EPERM)
  1486. return 0;
  1487. } while ((rc == -EINTR || rc == -EIO) && retry-- > 0);
  1488. if (rc) {
  1489. efx_mcdi_display_error(efx, MC_CMD_GET_ASSERTS,
  1490. MC_CMD_GET_ASSERTS_IN_LEN, outbuf,
  1491. outlen, rc);
  1492. return rc;
  1493. }
  1494. if (outlen < MC_CMD_GET_ASSERTS_OUT_LEN)
  1495. return -EIO;
  1496. /* Print out any recorded assertion state */
  1497. flags = MCDI_DWORD(outbuf, GET_ASSERTS_OUT_GLOBAL_FLAGS);
  1498. if (flags == MC_CMD_GET_ASSERTS_FLAGS_NO_FAILS)
  1499. return 0;
  1500. reason = (flags == MC_CMD_GET_ASSERTS_FLAGS_SYS_FAIL)
  1501. ? "system-level assertion"
  1502. : (flags == MC_CMD_GET_ASSERTS_FLAGS_THR_FAIL)
  1503. ? "thread-level assertion"
  1504. : (flags == MC_CMD_GET_ASSERTS_FLAGS_WDOG_FIRED)
  1505. ? "watchdog reset"
  1506. : "unknown assertion";
  1507. netif_err(efx, hw, efx->net_dev,
  1508. "MCPU %s at PC = 0x%.8x in thread 0x%.8x\n", reason,
  1509. MCDI_DWORD(outbuf, GET_ASSERTS_OUT_SAVED_PC_OFFS),
  1510. MCDI_DWORD(outbuf, GET_ASSERTS_OUT_THREAD_OFFS));
  1511. /* Print out the registers */
  1512. for (index = 0;
  1513. index < MC_CMD_GET_ASSERTS_OUT_GP_REGS_OFFS_NUM;
  1514. index++)
  1515. netif_err(efx, hw, efx->net_dev, "R%.2d (?): 0x%.8x\n",
  1516. 1 + index,
  1517. MCDI_ARRAY_DWORD(outbuf, GET_ASSERTS_OUT_GP_REGS_OFFS,
  1518. index));
  1519. return 1;
  1520. }
  1521. static int efx_mcdi_exit_assertion(struct efx_nic *efx)
  1522. {
  1523. MCDI_DECLARE_BUF(inbuf, MC_CMD_REBOOT_IN_LEN);
  1524. int rc;
  1525. /* If the MC is running debug firmware, it might now be
  1526. * waiting for a debugger to attach, but we just want it to
  1527. * reboot. We set a flag that makes the command a no-op if it
  1528. * has already done so.
  1529. * The MCDI will thus return either 0 or -EIO.
  1530. */
  1531. BUILD_BUG_ON(MC_CMD_REBOOT_OUT_LEN != 0);
  1532. MCDI_SET_DWORD(inbuf, REBOOT_IN_FLAGS,
  1533. MC_CMD_REBOOT_FLAGS_AFTER_ASSERTION);
  1534. rc = efx_mcdi_rpc_quiet(efx, MC_CMD_REBOOT, inbuf, MC_CMD_REBOOT_IN_LEN,
  1535. NULL, 0, NULL);
  1536. if (rc == -EIO)
  1537. rc = 0;
  1538. if (rc)
  1539. efx_mcdi_display_error(efx, MC_CMD_REBOOT, MC_CMD_REBOOT_IN_LEN,
  1540. NULL, 0, rc);
  1541. return rc;
  1542. }
  1543. int efx_mcdi_handle_assertion(struct efx_nic *efx)
  1544. {
  1545. int rc;
  1546. rc = efx_mcdi_read_assertion(efx);
  1547. if (rc <= 0)
  1548. return rc;
  1549. return efx_mcdi_exit_assertion(efx);
  1550. }
  1551. void efx_mcdi_set_id_led(struct efx_nic *efx, enum efx_led_mode mode)
  1552. {
  1553. MCDI_DECLARE_BUF(inbuf, MC_CMD_SET_ID_LED_IN_LEN);
  1554. int rc;
  1555. BUILD_BUG_ON(EFX_LED_OFF != MC_CMD_LED_OFF);
  1556. BUILD_BUG_ON(EFX_LED_ON != MC_CMD_LED_ON);
  1557. BUILD_BUG_ON(EFX_LED_DEFAULT != MC_CMD_LED_DEFAULT);
  1558. BUILD_BUG_ON(MC_CMD_SET_ID_LED_OUT_LEN != 0);
  1559. MCDI_SET_DWORD(inbuf, SET_ID_LED_IN_STATE, mode);
  1560. rc = efx_mcdi_rpc(efx, MC_CMD_SET_ID_LED, inbuf, sizeof(inbuf),
  1561. NULL, 0, NULL);
  1562. }
  1563. static int efx_mcdi_reset_func(struct efx_nic *efx)
  1564. {
  1565. MCDI_DECLARE_BUF(inbuf, MC_CMD_ENTITY_RESET_IN_LEN);
  1566. int rc;
  1567. BUILD_BUG_ON(MC_CMD_ENTITY_RESET_OUT_LEN != 0);
  1568. MCDI_POPULATE_DWORD_1(inbuf, ENTITY_RESET_IN_FLAG,
  1569. ENTITY_RESET_IN_FUNCTION_RESOURCE_RESET, 1);
  1570. rc = efx_mcdi_rpc(efx, MC_CMD_ENTITY_RESET, inbuf, sizeof(inbuf),
  1571. NULL, 0, NULL);
  1572. return rc;
  1573. }
  1574. static int efx_mcdi_reset_mc(struct efx_nic *efx)
  1575. {
  1576. MCDI_DECLARE_BUF(inbuf, MC_CMD_REBOOT_IN_LEN);
  1577. int rc;
  1578. BUILD_BUG_ON(MC_CMD_REBOOT_OUT_LEN != 0);
  1579. MCDI_SET_DWORD(inbuf, REBOOT_IN_FLAGS, 0);
  1580. rc = efx_mcdi_rpc(efx, MC_CMD_REBOOT, inbuf, sizeof(inbuf),
  1581. NULL, 0, NULL);
  1582. /* White is black, and up is down */
  1583. if (rc == -EIO)
  1584. return 0;
  1585. if (rc == 0)
  1586. rc = -EIO;
  1587. return rc;
  1588. }
  1589. enum reset_type efx_mcdi_map_reset_reason(enum reset_type reason)
  1590. {
  1591. return RESET_TYPE_RECOVER_OR_ALL;
  1592. }
  1593. int efx_mcdi_reset(struct efx_nic *efx, enum reset_type method)
  1594. {
  1595. int rc;
  1596. /* If MCDI is down, we can't handle_assertion */
  1597. if (method == RESET_TYPE_MCDI_TIMEOUT) {
  1598. rc = pci_reset_function(efx->pci_dev);
  1599. if (rc)
  1600. return rc;
  1601. /* Re-enable polled MCDI completion */
  1602. if (efx->mcdi) {
  1603. struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
  1604. mcdi->mode = MCDI_MODE_POLL;
  1605. }
  1606. return 0;
  1607. }
  1608. /* Recover from a failed assertion pre-reset */
  1609. rc = efx_mcdi_handle_assertion(efx);
  1610. if (rc)
  1611. return rc;
  1612. if (method == RESET_TYPE_DATAPATH)
  1613. return 0;
  1614. else if (method == RESET_TYPE_WORLD)
  1615. return efx_mcdi_reset_mc(efx);
  1616. else
  1617. return efx_mcdi_reset_func(efx);
  1618. }
  1619. static int efx_mcdi_wol_filter_set(struct efx_nic *efx, u32 type,
  1620. const u8 *mac, int *id_out)
  1621. {
  1622. MCDI_DECLARE_BUF(inbuf, MC_CMD_WOL_FILTER_SET_IN_LEN);
  1623. MCDI_DECLARE_BUF(outbuf, MC_CMD_WOL_FILTER_SET_OUT_LEN);
  1624. size_t outlen;
  1625. int rc;
  1626. MCDI_SET_DWORD(inbuf, WOL_FILTER_SET_IN_WOL_TYPE, type);
  1627. MCDI_SET_DWORD(inbuf, WOL_FILTER_SET_IN_FILTER_MODE,
  1628. MC_CMD_FILTER_MODE_SIMPLE);
  1629. ether_addr_copy(MCDI_PTR(inbuf, WOL_FILTER_SET_IN_MAGIC_MAC), mac);
  1630. rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_SET, inbuf, sizeof(inbuf),
  1631. outbuf, sizeof(outbuf), &outlen);
  1632. if (rc)
  1633. goto fail;
  1634. if (outlen < MC_CMD_WOL_FILTER_SET_OUT_LEN) {
  1635. rc = -EIO;
  1636. goto fail;
  1637. }
  1638. *id_out = (int)MCDI_DWORD(outbuf, WOL_FILTER_SET_OUT_FILTER_ID);
  1639. return 0;
  1640. fail:
  1641. *id_out = -1;
  1642. netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
  1643. return rc;
  1644. }
  1645. int
  1646. efx_mcdi_wol_filter_set_magic(struct efx_nic *efx, const u8 *mac, int *id_out)
  1647. {
  1648. return efx_mcdi_wol_filter_set(efx, MC_CMD_WOL_TYPE_MAGIC, mac, id_out);
  1649. }
  1650. int efx_mcdi_wol_filter_get_magic(struct efx_nic *efx, int *id_out)
  1651. {
  1652. MCDI_DECLARE_BUF(outbuf, MC_CMD_WOL_FILTER_GET_OUT_LEN);
  1653. size_t outlen;
  1654. int rc;
  1655. rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_GET, NULL, 0,
  1656. outbuf, sizeof(outbuf), &outlen);
  1657. if (rc)
  1658. goto fail;
  1659. if (outlen < MC_CMD_WOL_FILTER_GET_OUT_LEN) {
  1660. rc = -EIO;
  1661. goto fail;
  1662. }
  1663. *id_out = (int)MCDI_DWORD(outbuf, WOL_FILTER_GET_OUT_FILTER_ID);
  1664. return 0;
  1665. fail:
  1666. *id_out = -1;
  1667. netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
  1668. return rc;
  1669. }
  1670. int efx_mcdi_wol_filter_remove(struct efx_nic *efx, int id)
  1671. {
  1672. MCDI_DECLARE_BUF(inbuf, MC_CMD_WOL_FILTER_REMOVE_IN_LEN);
  1673. int rc;
  1674. MCDI_SET_DWORD(inbuf, WOL_FILTER_REMOVE_IN_FILTER_ID, (u32)id);
  1675. rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_REMOVE, inbuf, sizeof(inbuf),
  1676. NULL, 0, NULL);
  1677. return rc;
  1678. }
  1679. int efx_mcdi_flush_rxqs(struct efx_nic *efx)
  1680. {
  1681. struct efx_channel *channel;
  1682. struct efx_rx_queue *rx_queue;
  1683. MCDI_DECLARE_BUF(inbuf,
  1684. MC_CMD_FLUSH_RX_QUEUES_IN_LEN(EFX_MAX_CHANNELS));
  1685. int rc, count;
  1686. BUILD_BUG_ON(EFX_MAX_CHANNELS >
  1687. MC_CMD_FLUSH_RX_QUEUES_IN_QID_OFST_MAXNUM);
  1688. count = 0;
  1689. efx_for_each_channel(channel, efx) {
  1690. efx_for_each_channel_rx_queue(rx_queue, channel) {
  1691. if (rx_queue->flush_pending) {
  1692. rx_queue->flush_pending = false;
  1693. atomic_dec(&efx->rxq_flush_pending);
  1694. MCDI_SET_ARRAY_DWORD(
  1695. inbuf, FLUSH_RX_QUEUES_IN_QID_OFST,
  1696. count, efx_rx_queue_index(rx_queue));
  1697. count++;
  1698. }
  1699. }
  1700. }
  1701. rc = efx_mcdi_rpc(efx, MC_CMD_FLUSH_RX_QUEUES, inbuf,
  1702. MC_CMD_FLUSH_RX_QUEUES_IN_LEN(count), NULL, 0, NULL);
  1703. WARN_ON(rc < 0);
  1704. return rc;
  1705. }
  1706. int efx_mcdi_wol_filter_reset(struct efx_nic *efx)
  1707. {
  1708. int rc;
  1709. rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_RESET, NULL, 0, NULL, 0, NULL);
  1710. return rc;
  1711. }
  1712. int efx_mcdi_set_workaround(struct efx_nic *efx, u32 type, bool enabled,
  1713. unsigned int *flags)
  1714. {
  1715. MCDI_DECLARE_BUF(inbuf, MC_CMD_WORKAROUND_IN_LEN);
  1716. MCDI_DECLARE_BUF(outbuf, MC_CMD_WORKAROUND_EXT_OUT_LEN);
  1717. size_t outlen;
  1718. int rc;
  1719. BUILD_BUG_ON(MC_CMD_WORKAROUND_OUT_LEN != 0);
  1720. MCDI_SET_DWORD(inbuf, WORKAROUND_IN_TYPE, type);
  1721. MCDI_SET_DWORD(inbuf, WORKAROUND_IN_ENABLED, enabled);
  1722. rc = efx_mcdi_rpc(efx, MC_CMD_WORKAROUND, inbuf, sizeof(inbuf),
  1723. outbuf, sizeof(outbuf), &outlen);
  1724. if (rc)
  1725. return rc;
  1726. if (!flags)
  1727. return 0;
  1728. if (outlen >= MC_CMD_WORKAROUND_EXT_OUT_LEN)
  1729. *flags = MCDI_DWORD(outbuf, WORKAROUND_EXT_OUT_FLAGS);
  1730. else
  1731. *flags = 0;
  1732. return 0;
  1733. }
  1734. int efx_mcdi_get_workarounds(struct efx_nic *efx, unsigned int *impl_out,
  1735. unsigned int *enabled_out)
  1736. {
  1737. MCDI_DECLARE_BUF(outbuf, MC_CMD_GET_WORKAROUNDS_OUT_LEN);
  1738. size_t outlen;
  1739. int rc;
  1740. rc = efx_mcdi_rpc(efx, MC_CMD_GET_WORKAROUNDS, NULL, 0,
  1741. outbuf, sizeof(outbuf), &outlen);
  1742. if (rc)
  1743. goto fail;
  1744. if (outlen < MC_CMD_GET_WORKAROUNDS_OUT_LEN) {
  1745. rc = -EIO;
  1746. goto fail;
  1747. }
  1748. if (impl_out)
  1749. *impl_out = MCDI_DWORD(outbuf, GET_WORKAROUNDS_OUT_IMPLEMENTED);
  1750. if (enabled_out)
  1751. *enabled_out = MCDI_DWORD(outbuf, GET_WORKAROUNDS_OUT_ENABLED);
  1752. return 0;
  1753. fail:
  1754. /* Older firmware lacks GET_WORKAROUNDS and this isn't especially
  1755. * terrifying. The call site will have to deal with it though.
  1756. */
  1757. netif_cond_dbg(efx, hw, efx->net_dev, rc == -ENOSYS, err,
  1758. "%s: failed rc=%d\n", __func__, rc);
  1759. return rc;
  1760. }
  1761. #ifdef CONFIG_SFC_MTD
  1762. #define EFX_MCDI_NVRAM_LEN_MAX 128
  1763. static int efx_mcdi_nvram_update_start(struct efx_nic *efx, unsigned int type)
  1764. {
  1765. MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_UPDATE_START_V2_IN_LEN);
  1766. int rc;
  1767. MCDI_SET_DWORD(inbuf, NVRAM_UPDATE_START_IN_TYPE, type);
  1768. MCDI_POPULATE_DWORD_1(inbuf, NVRAM_UPDATE_START_V2_IN_FLAGS,
  1769. NVRAM_UPDATE_START_V2_IN_FLAG_REPORT_VERIFY_RESULT,
  1770. 1);
  1771. BUILD_BUG_ON(MC_CMD_NVRAM_UPDATE_START_OUT_LEN != 0);
  1772. rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_UPDATE_START, inbuf, sizeof(inbuf),
  1773. NULL, 0, NULL);
  1774. return rc;
  1775. }
  1776. static int efx_mcdi_nvram_read(struct efx_nic *efx, unsigned int type,
  1777. loff_t offset, u8 *buffer, size_t length)
  1778. {
  1779. MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_READ_IN_V2_LEN);
  1780. MCDI_DECLARE_BUF(outbuf,
  1781. MC_CMD_NVRAM_READ_OUT_LEN(EFX_MCDI_NVRAM_LEN_MAX));
  1782. size_t outlen;
  1783. int rc;
  1784. MCDI_SET_DWORD(inbuf, NVRAM_READ_IN_TYPE, type);
  1785. MCDI_SET_DWORD(inbuf, NVRAM_READ_IN_OFFSET, offset);
  1786. MCDI_SET_DWORD(inbuf, NVRAM_READ_IN_LENGTH, length);
  1787. MCDI_SET_DWORD(inbuf, NVRAM_READ_IN_V2_MODE,
  1788. MC_CMD_NVRAM_READ_IN_V2_DEFAULT);
  1789. rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_READ, inbuf, sizeof(inbuf),
  1790. outbuf, sizeof(outbuf), &outlen);
  1791. if (rc)
  1792. return rc;
  1793. memcpy(buffer, MCDI_PTR(outbuf, NVRAM_READ_OUT_READ_BUFFER), length);
  1794. return 0;
  1795. }
  1796. static int efx_mcdi_nvram_write(struct efx_nic *efx, unsigned int type,
  1797. loff_t offset, const u8 *buffer, size_t length)
  1798. {
  1799. MCDI_DECLARE_BUF(inbuf,
  1800. MC_CMD_NVRAM_WRITE_IN_LEN(EFX_MCDI_NVRAM_LEN_MAX));
  1801. int rc;
  1802. MCDI_SET_DWORD(inbuf, NVRAM_WRITE_IN_TYPE, type);
  1803. MCDI_SET_DWORD(inbuf, NVRAM_WRITE_IN_OFFSET, offset);
  1804. MCDI_SET_DWORD(inbuf, NVRAM_WRITE_IN_LENGTH, length);
  1805. memcpy(MCDI_PTR(inbuf, NVRAM_WRITE_IN_WRITE_BUFFER), buffer, length);
  1806. BUILD_BUG_ON(MC_CMD_NVRAM_WRITE_OUT_LEN != 0);
  1807. rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_WRITE, inbuf,
  1808. ALIGN(MC_CMD_NVRAM_WRITE_IN_LEN(length), 4),
  1809. NULL, 0, NULL);
  1810. return rc;
  1811. }
  1812. static int efx_mcdi_nvram_erase(struct efx_nic *efx, unsigned int type,
  1813. loff_t offset, size_t length)
  1814. {
  1815. MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_ERASE_IN_LEN);
  1816. int rc;
  1817. MCDI_SET_DWORD(inbuf, NVRAM_ERASE_IN_TYPE, type);
  1818. MCDI_SET_DWORD(inbuf, NVRAM_ERASE_IN_OFFSET, offset);
  1819. MCDI_SET_DWORD(inbuf, NVRAM_ERASE_IN_LENGTH, length);
  1820. BUILD_BUG_ON(MC_CMD_NVRAM_ERASE_OUT_LEN != 0);
  1821. rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_ERASE, inbuf, sizeof(inbuf),
  1822. NULL, 0, NULL);
  1823. return rc;
  1824. }
  1825. static int efx_mcdi_nvram_update_finish(struct efx_nic *efx, unsigned int type)
  1826. {
  1827. MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_UPDATE_FINISH_V2_IN_LEN);
  1828. MCDI_DECLARE_BUF(outbuf, MC_CMD_NVRAM_UPDATE_FINISH_V2_OUT_LEN);
  1829. size_t outlen;
  1830. int rc, rc2;
  1831. MCDI_SET_DWORD(inbuf, NVRAM_UPDATE_FINISH_IN_TYPE, type);
  1832. /* Always set this flag. Old firmware ignores it */
  1833. MCDI_POPULATE_DWORD_1(inbuf, NVRAM_UPDATE_FINISH_V2_IN_FLAGS,
  1834. NVRAM_UPDATE_FINISH_V2_IN_FLAG_REPORT_VERIFY_RESULT,
  1835. 1);
  1836. rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_UPDATE_FINISH, inbuf, sizeof(inbuf),
  1837. outbuf, sizeof(outbuf), &outlen);
  1838. if (!rc && outlen >= MC_CMD_NVRAM_UPDATE_FINISH_V2_OUT_LEN) {
  1839. rc2 = MCDI_DWORD(outbuf, NVRAM_UPDATE_FINISH_V2_OUT_RESULT_CODE);
  1840. if (rc2 != MC_CMD_NVRAM_VERIFY_RC_SUCCESS)
  1841. netif_err(efx, drv, efx->net_dev,
  1842. "NVRAM update failed verification with code 0x%x\n",
  1843. rc2);
  1844. switch (rc2) {
  1845. case MC_CMD_NVRAM_VERIFY_RC_SUCCESS:
  1846. break;
  1847. case MC_CMD_NVRAM_VERIFY_RC_CMS_CHECK_FAILED:
  1848. case MC_CMD_NVRAM_VERIFY_RC_MESSAGE_DIGEST_CHECK_FAILED:
  1849. case MC_CMD_NVRAM_VERIFY_RC_SIGNATURE_CHECK_FAILED:
  1850. case MC_CMD_NVRAM_VERIFY_RC_TRUSTED_APPROVERS_CHECK_FAILED:
  1851. case MC_CMD_NVRAM_VERIFY_RC_SIGNATURE_CHAIN_CHECK_FAILED:
  1852. rc = -EIO;
  1853. break;
  1854. case MC_CMD_NVRAM_VERIFY_RC_INVALID_CMS_FORMAT:
  1855. case MC_CMD_NVRAM_VERIFY_RC_BAD_MESSAGE_DIGEST:
  1856. rc = -EINVAL;
  1857. break;
  1858. case MC_CMD_NVRAM_VERIFY_RC_NO_VALID_SIGNATURES:
  1859. case MC_CMD_NVRAM_VERIFY_RC_NO_TRUSTED_APPROVERS:
  1860. case MC_CMD_NVRAM_VERIFY_RC_NO_SIGNATURE_MATCH:
  1861. rc = -EPERM;
  1862. break;
  1863. default:
  1864. netif_err(efx, drv, efx->net_dev,
  1865. "Unknown response to NVRAM_UPDATE_FINISH\n");
  1866. rc = -EIO;
  1867. }
  1868. }
  1869. return rc;
  1870. }
  1871. int efx_mcdi_mtd_read(struct mtd_info *mtd, loff_t start,
  1872. size_t len, size_t *retlen, u8 *buffer)
  1873. {
  1874. struct efx_mcdi_mtd_partition *part = to_efx_mcdi_mtd_partition(mtd);
  1875. struct efx_nic *efx = mtd->priv;
  1876. loff_t offset = start;
  1877. loff_t end = min_t(loff_t, start + len, mtd->size);
  1878. size_t chunk;
  1879. int rc = 0;
  1880. while (offset < end) {
  1881. chunk = min_t(size_t, end - offset, EFX_MCDI_NVRAM_LEN_MAX);
  1882. rc = efx_mcdi_nvram_read(efx, part->nvram_type, offset,
  1883. buffer, chunk);
  1884. if (rc)
  1885. goto out;
  1886. offset += chunk;
  1887. buffer += chunk;
  1888. }
  1889. out:
  1890. *retlen = offset - start;
  1891. return rc;
  1892. }
  1893. int efx_mcdi_mtd_erase(struct mtd_info *mtd, loff_t start, size_t len)
  1894. {
  1895. struct efx_mcdi_mtd_partition *part = to_efx_mcdi_mtd_partition(mtd);
  1896. struct efx_nic *efx = mtd->priv;
  1897. loff_t offset = start & ~((loff_t)(mtd->erasesize - 1));
  1898. loff_t end = min_t(loff_t, start + len, mtd->size);
  1899. size_t chunk = part->common.mtd.erasesize;
  1900. int rc = 0;
  1901. if (!part->updating) {
  1902. rc = efx_mcdi_nvram_update_start(efx, part->nvram_type);
  1903. if (rc)
  1904. goto out;
  1905. part->updating = true;
  1906. }
  1907. /* The MCDI interface can in fact do multiple erase blocks at once;
  1908. * but erasing may be slow, so we make multiple calls here to avoid
  1909. * tripping the MCDI RPC timeout. */
  1910. while (offset < end) {
  1911. rc = efx_mcdi_nvram_erase(efx, part->nvram_type, offset,
  1912. chunk);
  1913. if (rc)
  1914. goto out;
  1915. offset += chunk;
  1916. }
  1917. out:
  1918. return rc;
  1919. }
  1920. int efx_mcdi_mtd_write(struct mtd_info *mtd, loff_t start,
  1921. size_t len, size_t *retlen, const u8 *buffer)
  1922. {
  1923. struct efx_mcdi_mtd_partition *part = to_efx_mcdi_mtd_partition(mtd);
  1924. struct efx_nic *efx = mtd->priv;
  1925. loff_t offset = start;
  1926. loff_t end = min_t(loff_t, start + len, mtd->size);
  1927. size_t chunk;
  1928. int rc = 0;
  1929. if (!part->updating) {
  1930. rc = efx_mcdi_nvram_update_start(efx, part->nvram_type);
  1931. if (rc)
  1932. goto out;
  1933. part->updating = true;
  1934. }
  1935. while (offset < end) {
  1936. chunk = min_t(size_t, end - offset, EFX_MCDI_NVRAM_LEN_MAX);
  1937. rc = efx_mcdi_nvram_write(efx, part->nvram_type, offset,
  1938. buffer, chunk);
  1939. if (rc)
  1940. goto out;
  1941. offset += chunk;
  1942. buffer += chunk;
  1943. }
  1944. out:
  1945. *retlen = offset - start;
  1946. return rc;
  1947. }
  1948. int efx_mcdi_mtd_sync(struct mtd_info *mtd)
  1949. {
  1950. struct efx_mcdi_mtd_partition *part = to_efx_mcdi_mtd_partition(mtd);
  1951. struct efx_nic *efx = mtd->priv;
  1952. int rc = 0;
  1953. if (part->updating) {
  1954. part->updating = false;
  1955. rc = efx_mcdi_nvram_update_finish(efx, part->nvram_type);
  1956. }
  1957. return rc;
  1958. }
  1959. void efx_mcdi_mtd_rename(struct efx_mtd_partition *part)
  1960. {
  1961. struct efx_mcdi_mtd_partition *mcdi_part =
  1962. container_of(part, struct efx_mcdi_mtd_partition, common);
  1963. struct efx_nic *efx = part->mtd.priv;
  1964. snprintf(part->name, sizeof(part->name), "%s %s:%02x",
  1965. efx->name, part->type_name, mcdi_part->fw_subtype);
  1966. }
  1967. #endif /* CONFIG_SFC_MTD */