en_port.c 15 KB

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  1. /*
  2. * Copyright (c) 2007 Mellanox Technologies. All rights reserved.
  3. *
  4. * This software is available to you under a choice of one of two
  5. * licenses. You may choose to be licensed under the terms of the GNU
  6. * General Public License (GPL) Version 2, available from the file
  7. * COPYING in the main directory of this source tree, or the
  8. * OpenIB.org BSD license below:
  9. *
  10. * Redistribution and use in source and binary forms, with or
  11. * without modification, are permitted provided that the following
  12. * conditions are met:
  13. *
  14. * - Redistributions of source code must retain the above
  15. * copyright notice, this list of conditions and the following
  16. * disclaimer.
  17. *
  18. * - Redistributions in binary form must reproduce the above
  19. * copyright notice, this list of conditions and the following
  20. * disclaimer in the documentation and/or other materials
  21. * provided with the distribution.
  22. *
  23. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30. * SOFTWARE.
  31. *
  32. */
  33. #include <linux/if_vlan.h>
  34. #include <linux/mlx4/device.h>
  35. #include <linux/mlx4/cmd.h>
  36. #include "en_port.h"
  37. #include "mlx4_en.h"
  38. int mlx4_SET_VLAN_FLTR(struct mlx4_dev *dev, struct mlx4_en_priv *priv)
  39. {
  40. struct mlx4_cmd_mailbox *mailbox;
  41. struct mlx4_set_vlan_fltr_mbox *filter;
  42. int i;
  43. int j;
  44. int index = 0;
  45. u32 entry;
  46. int err = 0;
  47. mailbox = mlx4_alloc_cmd_mailbox(dev);
  48. if (IS_ERR(mailbox))
  49. return PTR_ERR(mailbox);
  50. filter = mailbox->buf;
  51. for (i = VLAN_FLTR_SIZE - 1; i >= 0; i--) {
  52. entry = 0;
  53. for (j = 0; j < 32; j++)
  54. if (test_bit(index++, priv->active_vlans))
  55. entry |= 1 << j;
  56. filter->entry[i] = cpu_to_be32(entry);
  57. }
  58. err = mlx4_cmd(dev, mailbox->dma, priv->port, 0, MLX4_CMD_SET_VLAN_FLTR,
  59. MLX4_CMD_TIME_CLASS_B, MLX4_CMD_WRAPPED);
  60. mlx4_free_cmd_mailbox(dev, mailbox);
  61. return err;
  62. }
  63. int mlx4_en_QUERY_PORT(struct mlx4_en_dev *mdev, u8 port)
  64. {
  65. struct mlx4_en_query_port_context *qport_context;
  66. struct mlx4_en_priv *priv = netdev_priv(mdev->pndev[port]);
  67. struct mlx4_en_port_state *state = &priv->port_state;
  68. struct mlx4_cmd_mailbox *mailbox;
  69. int err;
  70. mailbox = mlx4_alloc_cmd_mailbox(mdev->dev);
  71. if (IS_ERR(mailbox))
  72. return PTR_ERR(mailbox);
  73. err = mlx4_cmd_box(mdev->dev, 0, mailbox->dma, port, 0,
  74. MLX4_CMD_QUERY_PORT, MLX4_CMD_TIME_CLASS_B,
  75. MLX4_CMD_WRAPPED);
  76. if (err)
  77. goto out;
  78. qport_context = mailbox->buf;
  79. /* This command is always accessed from Ethtool context
  80. * already synchronized, no need in locking */
  81. state->link_state = !!(qport_context->link_up & MLX4_EN_LINK_UP_MASK);
  82. switch (qport_context->link_speed & MLX4_EN_SPEED_MASK) {
  83. case MLX4_EN_100M_SPEED:
  84. state->link_speed = SPEED_100;
  85. break;
  86. case MLX4_EN_1G_SPEED:
  87. state->link_speed = SPEED_1000;
  88. break;
  89. case MLX4_EN_10G_SPEED_XAUI:
  90. case MLX4_EN_10G_SPEED_XFI:
  91. state->link_speed = SPEED_10000;
  92. break;
  93. case MLX4_EN_20G_SPEED:
  94. state->link_speed = SPEED_20000;
  95. break;
  96. case MLX4_EN_40G_SPEED:
  97. state->link_speed = SPEED_40000;
  98. break;
  99. case MLX4_EN_56G_SPEED:
  100. state->link_speed = SPEED_56000;
  101. break;
  102. default:
  103. state->link_speed = -1;
  104. break;
  105. }
  106. state->transceiver = qport_context->transceiver;
  107. state->flags = 0; /* Reset and recalculate the port flags */
  108. state->flags |= (qport_context->link_up & MLX4_EN_ANC_MASK) ?
  109. MLX4_EN_PORT_ANC : 0;
  110. state->flags |= (qport_context->autoneg & MLX4_EN_AUTONEG_MASK) ?
  111. MLX4_EN_PORT_ANE : 0;
  112. out:
  113. mlx4_free_cmd_mailbox(mdev->dev, mailbox);
  114. return err;
  115. }
  116. /* Each counter set is located in struct mlx4_en_stat_out_mbox
  117. * with a const offset between its prio components.
  118. * This function runs over a counter set and sum all of it's prio components.
  119. */
  120. static unsigned long en_stats_adder(__be64 *start, __be64 *next, int num)
  121. {
  122. __be64 *curr = start;
  123. unsigned long ret = 0;
  124. int i;
  125. int offset = next - start;
  126. for (i = 0; i < num; i++) {
  127. ret += be64_to_cpu(*curr);
  128. curr += offset;
  129. }
  130. return ret;
  131. }
  132. void mlx4_en_fold_software_stats(struct net_device *dev)
  133. {
  134. struct mlx4_en_priv *priv = netdev_priv(dev);
  135. struct mlx4_en_dev *mdev = priv->mdev;
  136. unsigned long packets, bytes;
  137. int i;
  138. if (!priv->port_up || mlx4_is_master(mdev->dev))
  139. return;
  140. packets = 0;
  141. bytes = 0;
  142. for (i = 0; i < priv->rx_ring_num; i++) {
  143. const struct mlx4_en_rx_ring *ring = priv->rx_ring[i];
  144. packets += READ_ONCE(ring->packets);
  145. bytes += READ_ONCE(ring->bytes);
  146. }
  147. dev->stats.rx_packets = packets;
  148. dev->stats.rx_bytes = bytes;
  149. packets = 0;
  150. bytes = 0;
  151. for (i = 0; i < priv->tx_ring_num[TX]; i++) {
  152. const struct mlx4_en_tx_ring *ring = priv->tx_ring[TX][i];
  153. packets += READ_ONCE(ring->packets);
  154. bytes += READ_ONCE(ring->bytes);
  155. }
  156. dev->stats.tx_packets = packets;
  157. dev->stats.tx_bytes = bytes;
  158. }
  159. int mlx4_en_DUMP_ETH_STATS(struct mlx4_en_dev *mdev, u8 port, u8 reset)
  160. {
  161. struct mlx4_counter tmp_counter_stats;
  162. struct mlx4_en_stat_out_mbox *mlx4_en_stats;
  163. struct mlx4_en_stat_out_flow_control_mbox *flowstats;
  164. struct net_device *dev = mdev->pndev[port];
  165. struct mlx4_en_priv *priv = netdev_priv(dev);
  166. struct net_device_stats *stats = &dev->stats;
  167. struct mlx4_cmd_mailbox *mailbox, *mailbox_priority;
  168. u64 in_mod = reset << 8 | port;
  169. int err;
  170. int i, counter_index;
  171. unsigned long sw_tx_dropped = 0;
  172. unsigned long sw_rx_dropped = 0;
  173. mailbox = mlx4_alloc_cmd_mailbox(mdev->dev);
  174. if (IS_ERR(mailbox))
  175. return PTR_ERR(mailbox);
  176. mailbox_priority = mlx4_alloc_cmd_mailbox(mdev->dev);
  177. if (IS_ERR(mailbox_priority)) {
  178. mlx4_free_cmd_mailbox(mdev->dev, mailbox);
  179. return PTR_ERR(mailbox_priority);
  180. }
  181. err = mlx4_cmd_box(mdev->dev, 0, mailbox->dma, in_mod, 0,
  182. MLX4_CMD_DUMP_ETH_STATS, MLX4_CMD_TIME_CLASS_B,
  183. MLX4_CMD_NATIVE);
  184. if (err)
  185. goto out;
  186. mlx4_en_stats = mailbox->buf;
  187. memset(&tmp_counter_stats, 0, sizeof(tmp_counter_stats));
  188. counter_index = mlx4_get_default_counter_index(mdev->dev, port);
  189. err = mlx4_get_counter_stats(mdev->dev, counter_index,
  190. &tmp_counter_stats, reset);
  191. /* 0xffs indicates invalid value */
  192. memset(mailbox_priority->buf, 0xff,
  193. sizeof(*flowstats) * MLX4_NUM_PRIORITIES);
  194. if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_FLOWSTATS_EN) {
  195. memset(mailbox_priority->buf, 0,
  196. sizeof(*flowstats) * MLX4_NUM_PRIORITIES);
  197. err = mlx4_cmd_box(mdev->dev, 0, mailbox_priority->dma,
  198. in_mod | MLX4_DUMP_ETH_STATS_FLOW_CONTROL,
  199. 0, MLX4_CMD_DUMP_ETH_STATS,
  200. MLX4_CMD_TIME_CLASS_B, MLX4_CMD_NATIVE);
  201. if (err)
  202. goto out;
  203. }
  204. flowstats = mailbox_priority->buf;
  205. spin_lock_bh(&priv->stats_lock);
  206. mlx4_en_fold_software_stats(dev);
  207. priv->port_stats.rx_chksum_good = 0;
  208. priv->port_stats.rx_chksum_none = 0;
  209. priv->port_stats.rx_chksum_complete = 0;
  210. priv->port_stats.rx_alloc_pages = 0;
  211. priv->xdp_stats.rx_xdp_drop = 0;
  212. priv->xdp_stats.rx_xdp_tx = 0;
  213. priv->xdp_stats.rx_xdp_tx_full = 0;
  214. for (i = 0; i < priv->rx_ring_num; i++) {
  215. const struct mlx4_en_rx_ring *ring = priv->rx_ring[i];
  216. sw_rx_dropped += READ_ONCE(ring->dropped);
  217. priv->port_stats.rx_chksum_good += READ_ONCE(ring->csum_ok);
  218. priv->port_stats.rx_chksum_none += READ_ONCE(ring->csum_none);
  219. priv->port_stats.rx_chksum_complete += READ_ONCE(ring->csum_complete);
  220. priv->port_stats.rx_alloc_pages += READ_ONCE(ring->rx_alloc_pages);
  221. priv->xdp_stats.rx_xdp_drop += READ_ONCE(ring->xdp_drop);
  222. priv->xdp_stats.rx_xdp_tx += READ_ONCE(ring->xdp_tx);
  223. priv->xdp_stats.rx_xdp_tx_full += READ_ONCE(ring->xdp_tx_full);
  224. }
  225. priv->port_stats.tx_chksum_offload = 0;
  226. priv->port_stats.queue_stopped = 0;
  227. priv->port_stats.wake_queue = 0;
  228. priv->port_stats.tso_packets = 0;
  229. priv->port_stats.xmit_more = 0;
  230. for (i = 0; i < priv->tx_ring_num[TX]; i++) {
  231. const struct mlx4_en_tx_ring *ring = priv->tx_ring[TX][i];
  232. sw_tx_dropped += READ_ONCE(ring->tx_dropped);
  233. priv->port_stats.tx_chksum_offload += READ_ONCE(ring->tx_csum);
  234. priv->port_stats.queue_stopped += READ_ONCE(ring->queue_stopped);
  235. priv->port_stats.wake_queue += READ_ONCE(ring->wake_queue);
  236. priv->port_stats.tso_packets += READ_ONCE(ring->tso_packets);
  237. priv->port_stats.xmit_more += READ_ONCE(ring->xmit_more);
  238. }
  239. if (!mlx4_is_slave(mdev->dev)) {
  240. struct mlx4_en_phy_stats *p_stats = &priv->phy_stats;
  241. p_stats->rx_packets_phy =
  242. en_stats_adder(&mlx4_en_stats->RTOT_prio_0,
  243. &mlx4_en_stats->RTOT_prio_1,
  244. NUM_PRIORITIES);
  245. p_stats->tx_packets_phy =
  246. en_stats_adder(&mlx4_en_stats->TTOT_prio_0,
  247. &mlx4_en_stats->TTOT_prio_1,
  248. NUM_PRIORITIES);
  249. p_stats->rx_bytes_phy =
  250. en_stats_adder(&mlx4_en_stats->ROCT_prio_0,
  251. &mlx4_en_stats->ROCT_prio_1,
  252. NUM_PRIORITIES);
  253. p_stats->tx_bytes_phy =
  254. en_stats_adder(&mlx4_en_stats->TOCT_prio_0,
  255. &mlx4_en_stats->TOCT_prio_1,
  256. NUM_PRIORITIES);
  257. if (mlx4_is_master(mdev->dev)) {
  258. stats->rx_packets = p_stats->rx_packets_phy;
  259. stats->tx_packets = p_stats->tx_packets_phy;
  260. stats->rx_bytes = p_stats->rx_bytes_phy;
  261. stats->tx_bytes = p_stats->tx_bytes_phy;
  262. }
  263. }
  264. /* net device stats */
  265. stats->rx_errors = be64_to_cpu(mlx4_en_stats->PCS) +
  266. be32_to_cpu(mlx4_en_stats->RJBBR) +
  267. be32_to_cpu(mlx4_en_stats->RCRC) +
  268. be32_to_cpu(mlx4_en_stats->RRUNT) +
  269. be64_to_cpu(mlx4_en_stats->RInRangeLengthErr) +
  270. be64_to_cpu(mlx4_en_stats->ROutRangeLengthErr) +
  271. be32_to_cpu(mlx4_en_stats->RSHORT) +
  272. en_stats_adder(&mlx4_en_stats->RGIANT_prio_0,
  273. &mlx4_en_stats->RGIANT_prio_1,
  274. NUM_PRIORITIES);
  275. stats->tx_errors = en_stats_adder(&mlx4_en_stats->TGIANT_prio_0,
  276. &mlx4_en_stats->TGIANT_prio_1,
  277. NUM_PRIORITIES);
  278. stats->multicast = en_stats_adder(&mlx4_en_stats->MCAST_prio_0,
  279. &mlx4_en_stats->MCAST_prio_1,
  280. NUM_PRIORITIES);
  281. stats->rx_dropped = be32_to_cpu(mlx4_en_stats->RDROP) +
  282. sw_rx_dropped;
  283. stats->rx_length_errors = be32_to_cpu(mlx4_en_stats->RdropLength);
  284. stats->rx_crc_errors = be32_to_cpu(mlx4_en_stats->RCRC);
  285. stats->rx_fifo_errors = be32_to_cpu(mlx4_en_stats->RdropOvflw);
  286. stats->tx_dropped = be32_to_cpu(mlx4_en_stats->TDROP) +
  287. sw_tx_dropped;
  288. /* RX stats */
  289. priv->pkstats.rx_multicast_packets = stats->multicast;
  290. priv->pkstats.rx_broadcast_packets =
  291. en_stats_adder(&mlx4_en_stats->RBCAST_prio_0,
  292. &mlx4_en_stats->RBCAST_prio_1,
  293. NUM_PRIORITIES);
  294. priv->pkstats.rx_jabbers = be32_to_cpu(mlx4_en_stats->RJBBR);
  295. priv->pkstats.rx_in_range_length_error =
  296. be64_to_cpu(mlx4_en_stats->RInRangeLengthErr);
  297. priv->pkstats.rx_out_range_length_error =
  298. be64_to_cpu(mlx4_en_stats->ROutRangeLengthErr);
  299. /* Tx stats */
  300. priv->pkstats.tx_multicast_packets =
  301. en_stats_adder(&mlx4_en_stats->TMCAST_prio_0,
  302. &mlx4_en_stats->TMCAST_prio_1,
  303. NUM_PRIORITIES);
  304. priv->pkstats.tx_broadcast_packets =
  305. en_stats_adder(&mlx4_en_stats->TBCAST_prio_0,
  306. &mlx4_en_stats->TBCAST_prio_1,
  307. NUM_PRIORITIES);
  308. priv->pkstats.rx_prio[0][0] = be64_to_cpu(mlx4_en_stats->RTOT_prio_0);
  309. priv->pkstats.rx_prio[0][1] = be64_to_cpu(mlx4_en_stats->ROCT_prio_0);
  310. priv->pkstats.rx_prio[1][0] = be64_to_cpu(mlx4_en_stats->RTOT_prio_1);
  311. priv->pkstats.rx_prio[1][1] = be64_to_cpu(mlx4_en_stats->ROCT_prio_1);
  312. priv->pkstats.rx_prio[2][0] = be64_to_cpu(mlx4_en_stats->RTOT_prio_2);
  313. priv->pkstats.rx_prio[2][1] = be64_to_cpu(mlx4_en_stats->ROCT_prio_2);
  314. priv->pkstats.rx_prio[3][0] = be64_to_cpu(mlx4_en_stats->RTOT_prio_3);
  315. priv->pkstats.rx_prio[3][1] = be64_to_cpu(mlx4_en_stats->ROCT_prio_3);
  316. priv->pkstats.rx_prio[4][0] = be64_to_cpu(mlx4_en_stats->RTOT_prio_4);
  317. priv->pkstats.rx_prio[4][1] = be64_to_cpu(mlx4_en_stats->ROCT_prio_4);
  318. priv->pkstats.rx_prio[5][0] = be64_to_cpu(mlx4_en_stats->RTOT_prio_5);
  319. priv->pkstats.rx_prio[5][1] = be64_to_cpu(mlx4_en_stats->ROCT_prio_5);
  320. priv->pkstats.rx_prio[6][0] = be64_to_cpu(mlx4_en_stats->RTOT_prio_6);
  321. priv->pkstats.rx_prio[6][1] = be64_to_cpu(mlx4_en_stats->ROCT_prio_6);
  322. priv->pkstats.rx_prio[7][0] = be64_to_cpu(mlx4_en_stats->RTOT_prio_7);
  323. priv->pkstats.rx_prio[7][1] = be64_to_cpu(mlx4_en_stats->ROCT_prio_7);
  324. priv->pkstats.rx_prio[8][0] = be64_to_cpu(mlx4_en_stats->RTOT_novlan);
  325. priv->pkstats.rx_prio[8][1] = be64_to_cpu(mlx4_en_stats->ROCT_novlan);
  326. priv->pkstats.tx_prio[0][0] = be64_to_cpu(mlx4_en_stats->TTOT_prio_0);
  327. priv->pkstats.tx_prio[0][1] = be64_to_cpu(mlx4_en_stats->TOCT_prio_0);
  328. priv->pkstats.tx_prio[1][0] = be64_to_cpu(mlx4_en_stats->TTOT_prio_1);
  329. priv->pkstats.tx_prio[1][1] = be64_to_cpu(mlx4_en_stats->TOCT_prio_1);
  330. priv->pkstats.tx_prio[2][0] = be64_to_cpu(mlx4_en_stats->TTOT_prio_2);
  331. priv->pkstats.tx_prio[2][1] = be64_to_cpu(mlx4_en_stats->TOCT_prio_2);
  332. priv->pkstats.tx_prio[3][0] = be64_to_cpu(mlx4_en_stats->TTOT_prio_3);
  333. priv->pkstats.tx_prio[3][1] = be64_to_cpu(mlx4_en_stats->TOCT_prio_3);
  334. priv->pkstats.tx_prio[4][0] = be64_to_cpu(mlx4_en_stats->TTOT_prio_4);
  335. priv->pkstats.tx_prio[4][1] = be64_to_cpu(mlx4_en_stats->TOCT_prio_4);
  336. priv->pkstats.tx_prio[5][0] = be64_to_cpu(mlx4_en_stats->TTOT_prio_5);
  337. priv->pkstats.tx_prio[5][1] = be64_to_cpu(mlx4_en_stats->TOCT_prio_5);
  338. priv->pkstats.tx_prio[6][0] = be64_to_cpu(mlx4_en_stats->TTOT_prio_6);
  339. priv->pkstats.tx_prio[6][1] = be64_to_cpu(mlx4_en_stats->TOCT_prio_6);
  340. priv->pkstats.tx_prio[7][0] = be64_to_cpu(mlx4_en_stats->TTOT_prio_7);
  341. priv->pkstats.tx_prio[7][1] = be64_to_cpu(mlx4_en_stats->TOCT_prio_7);
  342. priv->pkstats.tx_prio[8][0] = be64_to_cpu(mlx4_en_stats->TTOT_novlan);
  343. priv->pkstats.tx_prio[8][1] = be64_to_cpu(mlx4_en_stats->TOCT_novlan);
  344. if (tmp_counter_stats.counter_mode == 0) {
  345. priv->pf_stats.rx_bytes = be64_to_cpu(tmp_counter_stats.rx_bytes);
  346. priv->pf_stats.tx_bytes = be64_to_cpu(tmp_counter_stats.tx_bytes);
  347. priv->pf_stats.rx_packets = be64_to_cpu(tmp_counter_stats.rx_frames);
  348. priv->pf_stats.tx_packets = be64_to_cpu(tmp_counter_stats.tx_frames);
  349. }
  350. for (i = 0; i < MLX4_NUM_PRIORITIES; i++) {
  351. priv->rx_priority_flowstats[i].rx_pause =
  352. be64_to_cpu(flowstats[i].rx_pause);
  353. priv->rx_priority_flowstats[i].rx_pause_duration =
  354. be64_to_cpu(flowstats[i].rx_pause_duration);
  355. priv->rx_priority_flowstats[i].rx_pause_transition =
  356. be64_to_cpu(flowstats[i].rx_pause_transition);
  357. priv->tx_priority_flowstats[i].tx_pause =
  358. be64_to_cpu(flowstats[i].tx_pause);
  359. priv->tx_priority_flowstats[i].tx_pause_duration =
  360. be64_to_cpu(flowstats[i].tx_pause_duration);
  361. priv->tx_priority_flowstats[i].tx_pause_transition =
  362. be64_to_cpu(flowstats[i].tx_pause_transition);
  363. }
  364. /* if pfc is not in use, all priorities counters have the same value */
  365. priv->rx_flowstats.rx_pause =
  366. be64_to_cpu(flowstats[0].rx_pause);
  367. priv->rx_flowstats.rx_pause_duration =
  368. be64_to_cpu(flowstats[0].rx_pause_duration);
  369. priv->rx_flowstats.rx_pause_transition =
  370. be64_to_cpu(flowstats[0].rx_pause_transition);
  371. priv->tx_flowstats.tx_pause =
  372. be64_to_cpu(flowstats[0].tx_pause);
  373. priv->tx_flowstats.tx_pause_duration =
  374. be64_to_cpu(flowstats[0].tx_pause_duration);
  375. priv->tx_flowstats.tx_pause_transition =
  376. be64_to_cpu(flowstats[0].tx_pause_transition);
  377. spin_unlock_bh(&priv->stats_lock);
  378. out:
  379. mlx4_free_cmd_mailbox(mdev->dev, mailbox);
  380. mlx4_free_cmd_mailbox(mdev->dev, mailbox_priority);
  381. return err;
  382. }