hns3_debugfs.c 12 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /* Copyright (c) 2018-2019 Hisilicon Limited. */
  3. #include <linux/debugfs.h>
  4. #include <linux/device.h>
  5. #include "hnae3.h"
  6. #include "hns3_enet.h"
  7. #define HNS3_DBG_READ_LEN 256
  8. #define HNS3_DBG_WRITE_LEN 1024
  9. static struct dentry *hns3_dbgfs_root;
  10. static int hns3_dbg_queue_info(struct hnae3_handle *h,
  11. const char *cmd_buf)
  12. {
  13. struct hns3_nic_priv *priv = h->priv;
  14. struct hns3_nic_ring_data *ring_data;
  15. struct hns3_enet_ring *ring;
  16. u32 base_add_l, base_add_h;
  17. u32 queue_num, queue_max;
  18. u32 value, i = 0;
  19. int cnt;
  20. if (!priv->ring_data) {
  21. dev_err(&h->pdev->dev, "ring_data is NULL\n");
  22. return -EFAULT;
  23. }
  24. queue_max = h->kinfo.num_tqps;
  25. cnt = kstrtouint(&cmd_buf[11], 0, &queue_num);
  26. if (cnt)
  27. queue_num = 0;
  28. else
  29. queue_max = queue_num + 1;
  30. dev_info(&h->pdev->dev, "queue info\n");
  31. if (queue_num >= h->kinfo.num_tqps) {
  32. dev_err(&h->pdev->dev,
  33. "Queue number(%u) is out of range(0-%u)\n", queue_num,
  34. h->kinfo.num_tqps - 1);
  35. return -EINVAL;
  36. }
  37. ring_data = priv->ring_data;
  38. for (i = queue_num; i < queue_max; i++) {
  39. /* Each cycle needs to determine whether the instance is reset,
  40. * to prevent reference to invalid memory. And need to ensure
  41. * that the following code is executed within 100ms.
  42. */
  43. if (!test_bit(HNS3_NIC_STATE_INITED, &priv->state) ||
  44. test_bit(HNS3_NIC_STATE_RESETTING, &priv->state))
  45. return -EPERM;
  46. ring = ring_data[(u32)(i + h->kinfo.num_tqps)].ring;
  47. base_add_h = readl_relaxed(ring->tqp->io_base +
  48. HNS3_RING_RX_RING_BASEADDR_H_REG);
  49. base_add_l = readl_relaxed(ring->tqp->io_base +
  50. HNS3_RING_RX_RING_BASEADDR_L_REG);
  51. dev_info(&h->pdev->dev, "RX(%d) BASE ADD: 0x%08x%08x\n", i,
  52. base_add_h, base_add_l);
  53. value = readl_relaxed(ring->tqp->io_base +
  54. HNS3_RING_RX_RING_BD_NUM_REG);
  55. dev_info(&h->pdev->dev, "RX(%d) RING BD NUM: %u\n", i, value);
  56. value = readl_relaxed(ring->tqp->io_base +
  57. HNS3_RING_RX_RING_BD_LEN_REG);
  58. dev_info(&h->pdev->dev, "RX(%d) RING BD LEN: %u\n", i, value);
  59. value = readl_relaxed(ring->tqp->io_base +
  60. HNS3_RING_RX_RING_TAIL_REG);
  61. dev_info(&h->pdev->dev, "RX(%d) RING TAIL: %u\n", i, value);
  62. value = readl_relaxed(ring->tqp->io_base +
  63. HNS3_RING_RX_RING_HEAD_REG);
  64. dev_info(&h->pdev->dev, "RX(%d) RING HEAD: %u\n", i, value);
  65. value = readl_relaxed(ring->tqp->io_base +
  66. HNS3_RING_RX_RING_FBDNUM_REG);
  67. dev_info(&h->pdev->dev, "RX(%d) RING FBDNUM: %u\n", i, value);
  68. value = readl_relaxed(ring->tqp->io_base +
  69. HNS3_RING_RX_RING_PKTNUM_RECORD_REG);
  70. dev_info(&h->pdev->dev, "RX(%d) RING PKTNUM: %u\n", i, value);
  71. ring = ring_data[i].ring;
  72. base_add_h = readl_relaxed(ring->tqp->io_base +
  73. HNS3_RING_TX_RING_BASEADDR_H_REG);
  74. base_add_l = readl_relaxed(ring->tqp->io_base +
  75. HNS3_RING_TX_RING_BASEADDR_L_REG);
  76. dev_info(&h->pdev->dev, "TX(%d) BASE ADD: 0x%08x%08x\n", i,
  77. base_add_h, base_add_l);
  78. value = readl_relaxed(ring->tqp->io_base +
  79. HNS3_RING_TX_RING_BD_NUM_REG);
  80. dev_info(&h->pdev->dev, "TX(%d) RING BD NUM: %u\n", i, value);
  81. value = readl_relaxed(ring->tqp->io_base +
  82. HNS3_RING_TX_RING_TC_REG);
  83. dev_info(&h->pdev->dev, "TX(%d) RING TC: %u\n", i, value);
  84. value = readl_relaxed(ring->tqp->io_base +
  85. HNS3_RING_TX_RING_TAIL_REG);
  86. dev_info(&h->pdev->dev, "TX(%d) RING TAIL: %u\n", i, value);
  87. value = readl_relaxed(ring->tqp->io_base +
  88. HNS3_RING_TX_RING_HEAD_REG);
  89. dev_info(&h->pdev->dev, "TX(%d) RING HEAD: %u\n", i, value);
  90. value = readl_relaxed(ring->tqp->io_base +
  91. HNS3_RING_TX_RING_FBDNUM_REG);
  92. dev_info(&h->pdev->dev, "TX(%d) RING FBDNUM: %u\n", i, value);
  93. value = readl_relaxed(ring->tqp->io_base +
  94. HNS3_RING_TX_RING_OFFSET_REG);
  95. dev_info(&h->pdev->dev, "TX(%d) RING OFFSET: %u\n", i, value);
  96. value = readl_relaxed(ring->tqp->io_base +
  97. HNS3_RING_TX_RING_PKTNUM_RECORD_REG);
  98. dev_info(&h->pdev->dev, "TX(%d) RING PKTNUM: %u\n\n", i,
  99. value);
  100. }
  101. return 0;
  102. }
  103. static int hns3_dbg_queue_map(struct hnae3_handle *h)
  104. {
  105. struct hns3_nic_priv *priv = h->priv;
  106. struct hns3_nic_ring_data *ring_data;
  107. int i;
  108. if (!h->ae_algo->ops->get_global_queue_id)
  109. return -EOPNOTSUPP;
  110. dev_info(&h->pdev->dev, "map info for queue id and vector id\n");
  111. dev_info(&h->pdev->dev,
  112. "local queue id | global queue id | vector id\n");
  113. for (i = 0; i < h->kinfo.num_tqps; i++) {
  114. u16 global_qid;
  115. global_qid = h->ae_algo->ops->get_global_queue_id(h, i);
  116. ring_data = &priv->ring_data[i];
  117. if (!ring_data || !ring_data->ring ||
  118. !ring_data->ring->tqp_vector)
  119. continue;
  120. dev_info(&h->pdev->dev,
  121. " %4d %4d %4d\n",
  122. i, global_qid,
  123. ring_data->ring->tqp_vector->vector_irq);
  124. }
  125. return 0;
  126. }
  127. static int hns3_dbg_bd_info(struct hnae3_handle *h, const char *cmd_buf)
  128. {
  129. struct hns3_nic_priv *priv = h->priv;
  130. struct hns3_nic_ring_data *ring_data;
  131. struct hns3_desc *rx_desc, *tx_desc;
  132. struct device *dev = &h->pdev->dev;
  133. struct hns3_enet_ring *ring;
  134. u32 tx_index, rx_index;
  135. u32 q_num, value;
  136. dma_addr_t addr;
  137. int cnt;
  138. cnt = sscanf(&cmd_buf[8], "%u %u", &q_num, &tx_index);
  139. if (cnt == 2) {
  140. rx_index = tx_index;
  141. } else if (cnt != 1) {
  142. dev_err(dev, "bd info: bad command string, cnt=%d\n", cnt);
  143. return -EINVAL;
  144. }
  145. if (q_num >= h->kinfo.num_tqps) {
  146. dev_err(dev, "Queue number(%u) is out of range(0-%u)\n", q_num,
  147. h->kinfo.num_tqps - 1);
  148. return -EINVAL;
  149. }
  150. ring_data = priv->ring_data;
  151. ring = ring_data[q_num].ring;
  152. value = readl_relaxed(ring->tqp->io_base + HNS3_RING_TX_RING_TAIL_REG);
  153. tx_index = (cnt == 1) ? value : tx_index;
  154. if (tx_index >= ring->desc_num) {
  155. dev_err(dev, "bd index(%u) is out of range(0-%u)\n", tx_index,
  156. ring->desc_num - 1);
  157. return -EINVAL;
  158. }
  159. tx_desc = &ring->desc[tx_index];
  160. addr = le64_to_cpu(tx_desc->addr);
  161. dev_info(dev, "TX Queue Num: %u, BD Index: %u\n", q_num, tx_index);
  162. dev_info(dev, "(TX)addr: %pad\n", &addr);
  163. dev_info(dev, "(TX)vlan_tag: %u\n", tx_desc->tx.vlan_tag);
  164. dev_info(dev, "(TX)send_size: %u\n", tx_desc->tx.send_size);
  165. dev_info(dev, "(TX)vlan_tso: %u\n", tx_desc->tx.type_cs_vlan_tso);
  166. dev_info(dev, "(TX)l2_len: %u\n", tx_desc->tx.l2_len);
  167. dev_info(dev, "(TX)l3_len: %u\n", tx_desc->tx.l3_len);
  168. dev_info(dev, "(TX)l4_len: %u\n", tx_desc->tx.l4_len);
  169. dev_info(dev, "(TX)vlan_tag: %u\n", tx_desc->tx.outer_vlan_tag);
  170. dev_info(dev, "(TX)tv: %u\n", tx_desc->tx.tv);
  171. dev_info(dev, "(TX)vlan_msec: %u\n", tx_desc->tx.ol_type_vlan_msec);
  172. dev_info(dev, "(TX)ol2_len: %u\n", tx_desc->tx.ol2_len);
  173. dev_info(dev, "(TX)ol3_len: %u\n", tx_desc->tx.ol3_len);
  174. dev_info(dev, "(TX)ol4_len: %u\n", tx_desc->tx.ol4_len);
  175. dev_info(dev, "(TX)paylen: %u\n", tx_desc->tx.paylen);
  176. dev_info(dev, "(TX)vld_ra_ri: %u\n", tx_desc->tx.bdtp_fe_sc_vld_ra_ri);
  177. dev_info(dev, "(TX)mss: %u\n", tx_desc->tx.mss);
  178. ring = ring_data[q_num + h->kinfo.num_tqps].ring;
  179. value = readl_relaxed(ring->tqp->io_base + HNS3_RING_RX_RING_TAIL_REG);
  180. rx_index = (cnt == 1) ? value : tx_index;
  181. rx_desc = &ring->desc[rx_index];
  182. addr = le64_to_cpu(rx_desc->addr);
  183. dev_info(dev, "RX Queue Num: %u, BD Index: %u\n", q_num, rx_index);
  184. dev_info(dev, "(RX)addr: %pad\n", &addr);
  185. dev_info(dev, "(RX)l234_info: %u\n", rx_desc->rx.l234_info);
  186. dev_info(dev, "(RX)pkt_len: %u\n", rx_desc->rx.pkt_len);
  187. dev_info(dev, "(RX)size: %u\n", rx_desc->rx.size);
  188. dev_info(dev, "(RX)rss_hash: %u\n", rx_desc->rx.rss_hash);
  189. dev_info(dev, "(RX)fd_id: %u\n", rx_desc->rx.fd_id);
  190. dev_info(dev, "(RX)vlan_tag: %u\n", rx_desc->rx.vlan_tag);
  191. dev_info(dev, "(RX)o_dm_vlan_id_fb: %u\n", rx_desc->rx.o_dm_vlan_id_fb);
  192. dev_info(dev, "(RX)ot_vlan_tag: %u\n", rx_desc->rx.ot_vlan_tag);
  193. dev_info(dev, "(RX)bd_base_info: %u\n", rx_desc->rx.bd_base_info);
  194. return 0;
  195. }
  196. static void hns3_dbg_help(struct hnae3_handle *h)
  197. {
  198. #define HNS3_DBG_BUF_LEN 256
  199. char printf_buf[HNS3_DBG_BUF_LEN];
  200. dev_info(&h->pdev->dev, "available commands\n");
  201. dev_info(&h->pdev->dev, "queue info <number>\n");
  202. dev_info(&h->pdev->dev, "queue map\n");
  203. dev_info(&h->pdev->dev, "bd info <q_num> <bd index>\n");
  204. if (!hns3_is_phys_func(h->pdev))
  205. return;
  206. dev_info(&h->pdev->dev, "dump fd tcam\n");
  207. dev_info(&h->pdev->dev, "dump tc\n");
  208. dev_info(&h->pdev->dev, "dump tm map <q_num>\n");
  209. dev_info(&h->pdev->dev, "dump tm\n");
  210. dev_info(&h->pdev->dev, "dump qos pause cfg\n");
  211. dev_info(&h->pdev->dev, "dump qos pri map\n");
  212. dev_info(&h->pdev->dev, "dump qos buf cfg\n");
  213. dev_info(&h->pdev->dev, "dump mng tbl\n");
  214. dev_info(&h->pdev->dev, "dump reset info\n");
  215. dev_info(&h->pdev->dev, "dump m7 info\n");
  216. dev_info(&h->pdev->dev, "dump ncl_config <offset> <length>(in hex)\n");
  217. dev_info(&h->pdev->dev, "dump mac tnl status\n");
  218. memset(printf_buf, 0, HNS3_DBG_BUF_LEN);
  219. strncat(printf_buf, "dump reg [[bios common] [ssu <port_id>]",
  220. HNS3_DBG_BUF_LEN - 1);
  221. strncat(printf_buf + strlen(printf_buf),
  222. " [igu egu <port_id>] [rpu <tc_queue_num>]",
  223. HNS3_DBG_BUF_LEN - strlen(printf_buf) - 1);
  224. strncat(printf_buf + strlen(printf_buf),
  225. " [rtc] [ppp] [rcb] [tqp <queue_num>]]\n",
  226. HNS3_DBG_BUF_LEN - strlen(printf_buf) - 1);
  227. dev_info(&h->pdev->dev, "%s", printf_buf);
  228. memset(printf_buf, 0, HNS3_DBG_BUF_LEN);
  229. strncat(printf_buf, "dump reg dcb <port_id> <pri_id> <pg_id>",
  230. HNS3_DBG_BUF_LEN - 1);
  231. strncat(printf_buf + strlen(printf_buf), " <rq_id> <nq_id> <qset_id>\n",
  232. HNS3_DBG_BUF_LEN - strlen(printf_buf) - 1);
  233. dev_info(&h->pdev->dev, "%s", printf_buf);
  234. }
  235. static ssize_t hns3_dbg_cmd_read(struct file *filp, char __user *buffer,
  236. size_t count, loff_t *ppos)
  237. {
  238. int uncopy_bytes;
  239. char *buf;
  240. int len;
  241. if (*ppos != 0)
  242. return 0;
  243. if (count < HNS3_DBG_READ_LEN)
  244. return -ENOSPC;
  245. buf = kzalloc(HNS3_DBG_READ_LEN, GFP_KERNEL);
  246. if (!buf)
  247. return -ENOMEM;
  248. len = snprintf(buf, HNS3_DBG_READ_LEN, "%s\n",
  249. "Please echo help to cmd to get help information");
  250. uncopy_bytes = copy_to_user(buffer, buf, len);
  251. kfree(buf);
  252. if (uncopy_bytes)
  253. return -EFAULT;
  254. return (*ppos = len);
  255. }
  256. static ssize_t hns3_dbg_cmd_write(struct file *filp, const char __user *buffer,
  257. size_t count, loff_t *ppos)
  258. {
  259. struct hnae3_handle *handle = filp->private_data;
  260. struct hns3_nic_priv *priv = handle->priv;
  261. char *cmd_buf, *cmd_buf_tmp;
  262. int uncopied_bytes;
  263. int ret = 0;
  264. if (*ppos != 0)
  265. return 0;
  266. /* Judge if the instance is being reset. */
  267. if (!test_bit(HNS3_NIC_STATE_INITED, &priv->state) ||
  268. test_bit(HNS3_NIC_STATE_RESETTING, &priv->state))
  269. return 0;
  270. if (count > HNS3_DBG_WRITE_LEN)
  271. return -ENOSPC;
  272. cmd_buf = kzalloc(count + 1, GFP_KERNEL);
  273. if (!cmd_buf)
  274. return count;
  275. uncopied_bytes = copy_from_user(cmd_buf, buffer, count);
  276. if (uncopied_bytes) {
  277. kfree(cmd_buf);
  278. return -EFAULT;
  279. }
  280. cmd_buf[count] = '\0';
  281. cmd_buf_tmp = strchr(cmd_buf, '\n');
  282. if (cmd_buf_tmp) {
  283. *cmd_buf_tmp = '\0';
  284. count = cmd_buf_tmp - cmd_buf + 1;
  285. }
  286. if (strncmp(cmd_buf, "help", 4) == 0)
  287. hns3_dbg_help(handle);
  288. else if (strncmp(cmd_buf, "queue info", 10) == 0)
  289. ret = hns3_dbg_queue_info(handle, cmd_buf);
  290. else if (strncmp(cmd_buf, "queue map", 9) == 0)
  291. ret = hns3_dbg_queue_map(handle);
  292. else if (strncmp(cmd_buf, "bd info", 7) == 0)
  293. ret = hns3_dbg_bd_info(handle, cmd_buf);
  294. else if (handle->ae_algo->ops->dbg_run_cmd)
  295. ret = handle->ae_algo->ops->dbg_run_cmd(handle, cmd_buf);
  296. else
  297. ret = -EOPNOTSUPP;
  298. if (ret)
  299. hns3_dbg_help(handle);
  300. kfree(cmd_buf);
  301. cmd_buf = NULL;
  302. return count;
  303. }
  304. static const struct file_operations hns3_dbg_cmd_fops = {
  305. .owner = THIS_MODULE,
  306. .open = simple_open,
  307. .read = hns3_dbg_cmd_read,
  308. .write = hns3_dbg_cmd_write,
  309. };
  310. void hns3_dbg_init(struct hnae3_handle *handle)
  311. {
  312. const char *name = pci_name(handle->pdev);
  313. handle->hnae3_dbgfs = debugfs_create_dir(name, hns3_dbgfs_root);
  314. debugfs_create_file("cmd", 0600, handle->hnae3_dbgfs, handle,
  315. &hns3_dbg_cmd_fops);
  316. }
  317. void hns3_dbg_uninit(struct hnae3_handle *handle)
  318. {
  319. debugfs_remove_recursive(handle->hnae3_dbgfs);
  320. handle->hnae3_dbgfs = NULL;
  321. }
  322. void hns3_dbg_register_debugfs(const char *debugfs_dir_name)
  323. {
  324. hns3_dbgfs_root = debugfs_create_dir(debugfs_dir_name, NULL);
  325. }
  326. void hns3_dbg_unregister_debugfs(void)
  327. {
  328. debugfs_remove_recursive(hns3_dbgfs_root);
  329. hns3_dbgfs_root = NULL;
  330. }