ni65.c 30 KB

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  1. /*
  2. * ni6510 (am7990 'lance' chip) driver for Linux-net-3
  3. * BETAcode v0.71 (96/09/29) for 2.0.0 (or later)
  4. * copyrights (c) 1994,1995,1996 by M.Hipp
  5. *
  6. * This driver can handle the old ni6510 board and the newer ni6510
  7. * EtherBlaster. (probably it also works with every full NE2100
  8. * compatible card)
  9. *
  10. * driver probes: io: 0x360,0x300,0x320,0x340 / dma: 3,5,6,7
  11. *
  12. * This is an extension to the Linux operating system, and is covered by the
  13. * same GNU General Public License that covers the Linux-kernel.
  14. *
  15. * comments/bugs/suggestions can be sent to:
  16. * Michael Hipp
  17. * email: hippm@informatik.uni-tuebingen.de
  18. *
  19. * sources:
  20. * some things are from the 'ni6510-packet-driver for dos by Russ Nelson'
  21. * and from the original drivers by D.Becker
  22. *
  23. * known problems:
  24. * - on some PCI boards (including my own) the card/board/ISA-bridge has
  25. * problems with bus master DMA. This results in lotsa overruns.
  26. * It may help to '#define RCV_PARANOIA_CHECK' or try to #undef
  27. * the XMT and RCV_VIA_SKB option .. this reduces driver performance.
  28. * Or just play with your BIOS options to optimize ISA-DMA access.
  29. * Maybe you also wanna play with the LOW_PERFORAMCE and MID_PERFORMANCE
  30. * defines -> please report me your experience then
  31. * - Harald reported for ASUS SP3G mainboards, that you should use
  32. * the 'optimal settings' from the user's manual on page 3-12!
  33. *
  34. * credits:
  35. * thanx to Jason Sullivan for sending me a ni6510 card!
  36. * lot of debug runs with ASUS SP3G Boards (Intel Saturn) by Harald Koenig
  37. *
  38. * simple performance test: (486DX-33/Ni6510-EB receives from 486DX4-100/Ni6510-EB)
  39. * average: FTP -> 8384421 bytes received in 8.5 seconds
  40. * (no RCV_VIA_SKB,no XMT_VIA_SKB,PARANOIA_CHECK,4 XMIT BUFS, 8 RCV_BUFFS)
  41. * peak: FTP -> 8384421 bytes received in 7.5 seconds
  42. * (RCV_VIA_SKB,XMT_VIA_SKB,no PARANOIA_CHECK,1(!) XMIT BUF, 16 RCV BUFFS)
  43. */
  44. /*
  45. * 99.Jun.8: added support for /proc/net/dev byte count for xosview (HK)
  46. * 96.Sept.29: virt_to_bus stuff added for new memory modell
  47. * 96.April.29: Added Harald Koenig's Patches (MH)
  48. * 96.April.13: enhanced error handling .. more tests (MH)
  49. * 96.April.5/6: a lot of performance tests. Got it stable now (hopefully) (MH)
  50. * 96.April.1: (no joke ;) .. added EtherBlaster and Module support (MH)
  51. * 96.Feb.19: fixed a few bugs .. cleanups .. tested for 1.3.66 (MH)
  52. * hopefully no more 16MB limit
  53. *
  54. * 95.Nov.18: multicast tweaked (AC).
  55. *
  56. * 94.Aug.22: changes in xmit_intr (ack more than one xmitted-packet), ni65_send_packet (p->lock) (MH)
  57. *
  58. * 94.July.16: fixed bugs in recv_skb and skb-alloc stuff (MH)
  59. */
  60. #include <linux/kernel.h>
  61. #include <linux/string.h>
  62. #include <linux/errno.h>
  63. #include <linux/ioport.h>
  64. #include <linux/slab.h>
  65. #include <linux/interrupt.h>
  66. #include <linux/delay.h>
  67. #include <linux/init.h>
  68. #include <linux/netdevice.h>
  69. #include <linux/etherdevice.h>
  70. #include <linux/skbuff.h>
  71. #include <linux/module.h>
  72. #include <linux/bitops.h>
  73. #include <asm/io.h>
  74. #include <asm/dma.h>
  75. #include "ni65.h"
  76. /*
  77. * the current setting allows an acceptable performance
  78. * for 'RCV_PARANOIA_CHECK' read the 'known problems' part in
  79. * the header of this file
  80. * 'invert' the defines for max. performance. This may cause DMA problems
  81. * on some boards (e.g on my ASUS SP3G)
  82. */
  83. #undef XMT_VIA_SKB
  84. #undef RCV_VIA_SKB
  85. #define RCV_PARANOIA_CHECK
  86. #define MID_PERFORMANCE
  87. #if defined( LOW_PERFORMANCE )
  88. static int isa0=7,isa1=7,csr80=0x0c10;
  89. #elif defined( MID_PERFORMANCE )
  90. static int isa0=5,isa1=5,csr80=0x2810;
  91. #else /* high performance */
  92. static int isa0=4,isa1=4,csr80=0x0017;
  93. #endif
  94. /*
  95. * a few card/vendor specific defines
  96. */
  97. #define NI65_ID0 0x00
  98. #define NI65_ID1 0x55
  99. #define NI65_EB_ID0 0x52
  100. #define NI65_EB_ID1 0x44
  101. #define NE2100_ID0 0x57
  102. #define NE2100_ID1 0x57
  103. #define PORT p->cmdr_addr
  104. /*
  105. * buffer configuration
  106. */
  107. #if 1
  108. #define RMDNUM 16
  109. #define RMDNUMMASK 0x80000000
  110. #else
  111. #define RMDNUM 8
  112. #define RMDNUMMASK 0x60000000 /* log2(RMDNUM)<<29 */
  113. #endif
  114. #if 0
  115. #define TMDNUM 1
  116. #define TMDNUMMASK 0x00000000
  117. #else
  118. #define TMDNUM 4
  119. #define TMDNUMMASK 0x40000000 /* log2(TMDNUM)<<29 */
  120. #endif
  121. /* slightly oversized */
  122. #define R_BUF_SIZE 1544
  123. #define T_BUF_SIZE 1544
  124. /*
  125. * lance register defines
  126. */
  127. #define L_DATAREG 0x00
  128. #define L_ADDRREG 0x02
  129. #define L_RESET 0x04
  130. #define L_CONFIG 0x05
  131. #define L_BUSIF 0x06
  132. /*
  133. * to access the lance/am7990-regs, you have to write
  134. * reg-number into L_ADDRREG, then you can access it using L_DATAREG
  135. */
  136. #define CSR0 0x00
  137. #define CSR1 0x01
  138. #define CSR2 0x02
  139. #define CSR3 0x03
  140. #define INIT_RING_BEFORE_START 0x1
  141. #define FULL_RESET_ON_ERROR 0x2
  142. #if 0
  143. #define writereg(val,reg) {outw(reg,PORT+L_ADDRREG);inw(PORT+L_ADDRREG); \
  144. outw(val,PORT+L_DATAREG);inw(PORT+L_DATAREG);}
  145. #define readreg(reg) (outw(reg,PORT+L_ADDRREG),inw(PORT+L_ADDRREG),\
  146. inw(PORT+L_DATAREG))
  147. #if 0
  148. #define writedatareg(val) {outw(val,PORT+L_DATAREG);inw(PORT+L_DATAREG);}
  149. #else
  150. #define writedatareg(val) { writereg(val,CSR0); }
  151. #endif
  152. #else
  153. #define writereg(val,reg) {outw(reg,PORT+L_ADDRREG);outw(val,PORT+L_DATAREG);}
  154. #define readreg(reg) (outw(reg,PORT+L_ADDRREG),inw(PORT+L_DATAREG))
  155. #define writedatareg(val) { writereg(val,CSR0); }
  156. #endif
  157. static unsigned char ni_vendor[] = { 0x02,0x07,0x01 };
  158. static struct card {
  159. unsigned char id0,id1;
  160. short id_offset;
  161. short total_size;
  162. short cmd_offset;
  163. short addr_offset;
  164. unsigned char *vendor_id;
  165. char *cardname;
  166. unsigned long config;
  167. } cards[] = {
  168. {
  169. .id0 = NI65_ID0,
  170. .id1 = NI65_ID1,
  171. .id_offset = 0x0e,
  172. .total_size = 0x10,
  173. .cmd_offset = 0x0,
  174. .addr_offset = 0x8,
  175. .vendor_id = ni_vendor,
  176. .cardname = "ni6510",
  177. .config = 0x1,
  178. },
  179. {
  180. .id0 = NI65_EB_ID0,
  181. .id1 = NI65_EB_ID1,
  182. .id_offset = 0x0e,
  183. .total_size = 0x18,
  184. .cmd_offset = 0x10,
  185. .addr_offset = 0x0,
  186. .vendor_id = ni_vendor,
  187. .cardname = "ni6510 EtherBlaster",
  188. .config = 0x2,
  189. },
  190. {
  191. .id0 = NE2100_ID0,
  192. .id1 = NE2100_ID1,
  193. .id_offset = 0x0e,
  194. .total_size = 0x18,
  195. .cmd_offset = 0x10,
  196. .addr_offset = 0x0,
  197. .vendor_id = NULL,
  198. .cardname = "generic NE2100",
  199. .config = 0x0,
  200. },
  201. };
  202. #define NUM_CARDS 3
  203. struct priv
  204. {
  205. struct rmd rmdhead[RMDNUM];
  206. struct tmd tmdhead[TMDNUM];
  207. struct init_block ib;
  208. int rmdnum;
  209. int tmdnum,tmdlast;
  210. #ifdef RCV_VIA_SKB
  211. struct sk_buff *recv_skb[RMDNUM];
  212. #else
  213. void *recvbounce[RMDNUM];
  214. #endif
  215. #ifdef XMT_VIA_SKB
  216. struct sk_buff *tmd_skb[TMDNUM];
  217. #endif
  218. void *tmdbounce[TMDNUM];
  219. int tmdbouncenum;
  220. int lock,xmit_queued;
  221. void *self;
  222. int cmdr_addr;
  223. int cardno;
  224. int features;
  225. spinlock_t ring_lock;
  226. };
  227. static int ni65_probe1(struct net_device *dev,int);
  228. static irqreturn_t ni65_interrupt(int irq, void * dev_id);
  229. static void ni65_recv_intr(struct net_device *dev,int);
  230. static void ni65_xmit_intr(struct net_device *dev,int);
  231. static int ni65_open(struct net_device *dev);
  232. static int ni65_lance_reinit(struct net_device *dev);
  233. static void ni65_init_lance(struct priv *p,unsigned char*,int,int);
  234. static netdev_tx_t ni65_send_packet(struct sk_buff *skb,
  235. struct net_device *dev);
  236. static void ni65_timeout(struct net_device *dev);
  237. static int ni65_close(struct net_device *dev);
  238. static int ni65_alloc_buffer(struct net_device *dev);
  239. static void ni65_free_buffer(struct priv *p);
  240. static void set_multicast_list(struct net_device *dev);
  241. static int irqtab[] __initdata = { 9,12,15,5 }; /* irq config-translate */
  242. static int dmatab[] __initdata = { 0,3,5,6,7 }; /* dma config-translate and autodetect */
  243. static int debuglevel = 1;
  244. /*
  245. * set 'performance' registers .. we must STOP lance for that
  246. */
  247. static void ni65_set_performance(struct priv *p)
  248. {
  249. writereg(CSR0_STOP | CSR0_CLRALL,CSR0); /* STOP */
  250. if( !(cards[p->cardno].config & 0x02) )
  251. return;
  252. outw(80,PORT+L_ADDRREG);
  253. if(inw(PORT+L_ADDRREG) != 80)
  254. return;
  255. writereg( (csr80 & 0x3fff) ,80); /* FIFO watermarks */
  256. outw(0,PORT+L_ADDRREG);
  257. outw((short)isa0,PORT+L_BUSIF); /* write ISA 0: DMA_R : isa0 * 50ns */
  258. outw(1,PORT+L_ADDRREG);
  259. outw((short)isa1,PORT+L_BUSIF); /* write ISA 1: DMA_W : isa1 * 50ns */
  260. outw(CSR0,PORT+L_ADDRREG); /* switch back to CSR0 */
  261. }
  262. /*
  263. * open interface (up)
  264. */
  265. static int ni65_open(struct net_device *dev)
  266. {
  267. struct priv *p = dev->ml_priv;
  268. int irqval = request_irq(dev->irq, ni65_interrupt,0,
  269. cards[p->cardno].cardname,dev);
  270. if (irqval) {
  271. printk(KERN_ERR "%s: unable to get IRQ %d (irqval=%d).\n",
  272. dev->name,dev->irq, irqval);
  273. return -EAGAIN;
  274. }
  275. if(ni65_lance_reinit(dev))
  276. {
  277. netif_start_queue(dev);
  278. return 0;
  279. }
  280. else
  281. {
  282. free_irq(dev->irq,dev);
  283. return -EAGAIN;
  284. }
  285. }
  286. /*
  287. * close interface (down)
  288. */
  289. static int ni65_close(struct net_device *dev)
  290. {
  291. struct priv *p = dev->ml_priv;
  292. netif_stop_queue(dev);
  293. outw(inw(PORT+L_RESET),PORT+L_RESET); /* that's the hard way */
  294. #ifdef XMT_VIA_SKB
  295. {
  296. int i;
  297. for(i=0;i<TMDNUM;i++)
  298. {
  299. if(p->tmd_skb[i]) {
  300. dev_kfree_skb(p->tmd_skb[i]);
  301. p->tmd_skb[i] = NULL;
  302. }
  303. }
  304. }
  305. #endif
  306. free_irq(dev->irq,dev);
  307. return 0;
  308. }
  309. static void cleanup_card(struct net_device *dev)
  310. {
  311. struct priv *p = dev->ml_priv;
  312. disable_dma(dev->dma);
  313. free_dma(dev->dma);
  314. release_region(dev->base_addr, cards[p->cardno].total_size);
  315. ni65_free_buffer(p);
  316. }
  317. /* set: io,irq,dma or set it when calling insmod */
  318. static int irq;
  319. static int io;
  320. static int dma;
  321. /*
  322. * Probe The Card (not the lance-chip)
  323. */
  324. struct net_device * __init ni65_probe(int unit)
  325. {
  326. struct net_device *dev = alloc_etherdev(0);
  327. static const int ports[] = { 0x360, 0x300, 0x320, 0x340, 0 };
  328. const int *port;
  329. int err = 0;
  330. if (!dev)
  331. return ERR_PTR(-ENOMEM);
  332. if (unit >= 0) {
  333. sprintf(dev->name, "eth%d", unit);
  334. netdev_boot_setup_check(dev);
  335. irq = dev->irq;
  336. dma = dev->dma;
  337. } else {
  338. dev->base_addr = io;
  339. }
  340. if (dev->base_addr > 0x1ff) { /* Check a single specified location. */
  341. err = ni65_probe1(dev, dev->base_addr);
  342. } else if (dev->base_addr > 0) { /* Don't probe at all. */
  343. err = -ENXIO;
  344. } else {
  345. for (port = ports; *port && ni65_probe1(dev, *port); port++)
  346. ;
  347. if (!*port)
  348. err = -ENODEV;
  349. }
  350. if (err)
  351. goto out;
  352. err = register_netdev(dev);
  353. if (err)
  354. goto out1;
  355. return dev;
  356. out1:
  357. cleanup_card(dev);
  358. out:
  359. free_netdev(dev);
  360. return ERR_PTR(err);
  361. }
  362. static const struct net_device_ops ni65_netdev_ops = {
  363. .ndo_open = ni65_open,
  364. .ndo_stop = ni65_close,
  365. .ndo_start_xmit = ni65_send_packet,
  366. .ndo_tx_timeout = ni65_timeout,
  367. .ndo_set_rx_mode = set_multicast_list,
  368. .ndo_set_mac_address = eth_mac_addr,
  369. .ndo_validate_addr = eth_validate_addr,
  370. };
  371. /*
  372. * this is the real card probe ..
  373. */
  374. static int __init ni65_probe1(struct net_device *dev,int ioaddr)
  375. {
  376. int i,j;
  377. struct priv *p;
  378. unsigned long flags;
  379. dev->irq = irq;
  380. dev->dma = dma;
  381. for(i=0;i<NUM_CARDS;i++) {
  382. if(!request_region(ioaddr, cards[i].total_size, cards[i].cardname))
  383. continue;
  384. if(cards[i].id_offset >= 0) {
  385. if(inb(ioaddr+cards[i].id_offset+0) != cards[i].id0 ||
  386. inb(ioaddr+cards[i].id_offset+1) != cards[i].id1) {
  387. release_region(ioaddr, cards[i].total_size);
  388. continue;
  389. }
  390. }
  391. if(cards[i].vendor_id) {
  392. for(j=0;j<3;j++)
  393. if(inb(ioaddr+cards[i].addr_offset+j) != cards[i].vendor_id[j])
  394. release_region(ioaddr, cards[i].total_size);
  395. }
  396. break;
  397. }
  398. if(i == NUM_CARDS)
  399. return -ENODEV;
  400. for(j=0;j<6;j++)
  401. dev->dev_addr[j] = inb(ioaddr+cards[i].addr_offset+j);
  402. if( (j=ni65_alloc_buffer(dev)) < 0) {
  403. release_region(ioaddr, cards[i].total_size);
  404. return j;
  405. }
  406. p = dev->ml_priv;
  407. p->cmdr_addr = ioaddr + cards[i].cmd_offset;
  408. p->cardno = i;
  409. spin_lock_init(&p->ring_lock);
  410. printk(KERN_INFO "%s: %s found at %#3x, ", dev->name, cards[p->cardno].cardname , ioaddr);
  411. outw(inw(PORT+L_RESET),PORT+L_RESET); /* first: reset the card */
  412. if( (j=readreg(CSR0)) != 0x4) {
  413. printk("failed.\n");
  414. printk(KERN_ERR "%s: Can't RESET card: %04x\n", dev->name, j);
  415. ni65_free_buffer(p);
  416. release_region(ioaddr, cards[p->cardno].total_size);
  417. return -EAGAIN;
  418. }
  419. outw(88,PORT+L_ADDRREG);
  420. if(inw(PORT+L_ADDRREG) == 88) {
  421. unsigned long v;
  422. v = inw(PORT+L_DATAREG);
  423. v <<= 16;
  424. outw(89,PORT+L_ADDRREG);
  425. v |= inw(PORT+L_DATAREG);
  426. printk("Version %#08lx, ",v);
  427. p->features = INIT_RING_BEFORE_START;
  428. }
  429. else {
  430. printk("ancient LANCE, ");
  431. p->features = 0x0;
  432. }
  433. if(test_bit(0,&cards[i].config)) {
  434. dev->irq = irqtab[(inw(ioaddr+L_CONFIG)>>2)&3];
  435. dev->dma = dmatab[inw(ioaddr+L_CONFIG)&3];
  436. printk("IRQ %d (from card), DMA %d (from card).\n",dev->irq,dev->dma);
  437. }
  438. else {
  439. if(dev->dma == 0) {
  440. /* 'stuck test' from lance.c */
  441. unsigned long dma_channels =
  442. ((inb(DMA1_STAT_REG) >> 4) & 0x0f)
  443. | (inb(DMA2_STAT_REG) & 0xf0);
  444. for(i=1;i<5;i++) {
  445. int dma = dmatab[i];
  446. if(test_bit(dma,&dma_channels) || request_dma(dma,"ni6510"))
  447. continue;
  448. flags=claim_dma_lock();
  449. disable_dma(dma);
  450. set_dma_mode(dma,DMA_MODE_CASCADE);
  451. enable_dma(dma);
  452. release_dma_lock(flags);
  453. ni65_init_lance(p,dev->dev_addr,0,0); /* trigger memory access */
  454. flags=claim_dma_lock();
  455. disable_dma(dma);
  456. free_dma(dma);
  457. release_dma_lock(flags);
  458. if(readreg(CSR0) & CSR0_IDON)
  459. break;
  460. }
  461. if(i == 5) {
  462. printk("failed.\n");
  463. printk(KERN_ERR "%s: Can't detect DMA channel!\n", dev->name);
  464. ni65_free_buffer(p);
  465. release_region(ioaddr, cards[p->cardno].total_size);
  466. return -EAGAIN;
  467. }
  468. dev->dma = dmatab[i];
  469. printk("DMA %d (autodetected), ",dev->dma);
  470. }
  471. else
  472. printk("DMA %d (assigned), ",dev->dma);
  473. if(dev->irq < 2)
  474. {
  475. unsigned long irq_mask;
  476. ni65_init_lance(p,dev->dev_addr,0,0);
  477. irq_mask = probe_irq_on();
  478. writereg(CSR0_INIT|CSR0_INEA,CSR0); /* trigger interrupt */
  479. msleep(20);
  480. dev->irq = probe_irq_off(irq_mask);
  481. if(!dev->irq)
  482. {
  483. printk("Failed to detect IRQ line!\n");
  484. ni65_free_buffer(p);
  485. release_region(ioaddr, cards[p->cardno].total_size);
  486. return -EAGAIN;
  487. }
  488. printk("IRQ %d (autodetected).\n",dev->irq);
  489. }
  490. else
  491. printk("IRQ %d (assigned).\n",dev->irq);
  492. }
  493. if(request_dma(dev->dma, cards[p->cardno].cardname ) != 0)
  494. {
  495. printk(KERN_ERR "%s: Can't request dma-channel %d\n",dev->name,(int) dev->dma);
  496. ni65_free_buffer(p);
  497. release_region(ioaddr, cards[p->cardno].total_size);
  498. return -EAGAIN;
  499. }
  500. dev->base_addr = ioaddr;
  501. dev->netdev_ops = &ni65_netdev_ops;
  502. dev->watchdog_timeo = HZ/2;
  503. return 0; /* everything is OK */
  504. }
  505. /*
  506. * set lance register and trigger init
  507. */
  508. static void ni65_init_lance(struct priv *p,unsigned char *daddr,int filter,int mode)
  509. {
  510. int i;
  511. u32 pib;
  512. writereg(CSR0_CLRALL|CSR0_STOP,CSR0);
  513. for(i=0;i<6;i++)
  514. p->ib.eaddr[i] = daddr[i];
  515. for(i=0;i<8;i++)
  516. p->ib.filter[i] = filter;
  517. p->ib.mode = mode;
  518. p->ib.trp = (u32) isa_virt_to_bus(p->tmdhead) | TMDNUMMASK;
  519. p->ib.rrp = (u32) isa_virt_to_bus(p->rmdhead) | RMDNUMMASK;
  520. writereg(0,CSR3); /* busmaster/no word-swap */
  521. pib = (u32) isa_virt_to_bus(&p->ib);
  522. writereg(pib & 0xffff,CSR1);
  523. writereg(pib >> 16,CSR2);
  524. writereg(CSR0_INIT,CSR0); /* this changes L_ADDRREG to CSR0 */
  525. for(i=0;i<32;i++)
  526. {
  527. mdelay(4);
  528. if(inw(PORT+L_DATAREG) & (CSR0_IDON | CSR0_MERR) )
  529. break; /* init ok ? */
  530. }
  531. }
  532. /*
  533. * allocate memory area and check the 16MB border
  534. */
  535. static void *ni65_alloc_mem(struct net_device *dev,char *what,int size,int type)
  536. {
  537. struct sk_buff *skb=NULL;
  538. unsigned char *ptr;
  539. void *ret;
  540. if(type) {
  541. ret = skb = alloc_skb(2+16+size,GFP_KERNEL|GFP_DMA);
  542. if(!skb) {
  543. printk(KERN_WARNING "%s: unable to allocate %s memory.\n",dev->name,what);
  544. return NULL;
  545. }
  546. skb_reserve(skb,2+16);
  547. skb_put(skb,R_BUF_SIZE); /* grab the whole space .. (not necessary) */
  548. ptr = skb->data;
  549. }
  550. else {
  551. ret = ptr = kmalloc(T_BUF_SIZE,GFP_KERNEL | GFP_DMA);
  552. if(!ret)
  553. return NULL;
  554. }
  555. if( (u32) virt_to_phys(ptr+size) > 0x1000000) {
  556. printk(KERN_WARNING "%s: unable to allocate %s memory in lower 16MB!\n",dev->name,what);
  557. if(type)
  558. kfree_skb(skb);
  559. else
  560. kfree(ptr);
  561. return NULL;
  562. }
  563. return ret;
  564. }
  565. /*
  566. * allocate all memory structures .. send/recv buffers etc ...
  567. */
  568. static int ni65_alloc_buffer(struct net_device *dev)
  569. {
  570. unsigned char *ptr;
  571. struct priv *p;
  572. int i;
  573. /*
  574. * we need 8-aligned memory ..
  575. */
  576. ptr = ni65_alloc_mem(dev,"BUFFER",sizeof(struct priv)+8,0);
  577. if(!ptr)
  578. return -ENOMEM;
  579. p = dev->ml_priv = (struct priv *) (((unsigned long) ptr + 7) & ~0x7);
  580. memset((char *)p, 0, sizeof(struct priv));
  581. p->self = ptr;
  582. for(i=0;i<TMDNUM;i++)
  583. {
  584. #ifdef XMT_VIA_SKB
  585. p->tmd_skb[i] = NULL;
  586. #endif
  587. p->tmdbounce[i] = ni65_alloc_mem(dev,"XMIT",T_BUF_SIZE,0);
  588. if(!p->tmdbounce[i]) {
  589. ni65_free_buffer(p);
  590. return -ENOMEM;
  591. }
  592. }
  593. for(i=0;i<RMDNUM;i++)
  594. {
  595. #ifdef RCV_VIA_SKB
  596. p->recv_skb[i] = ni65_alloc_mem(dev,"RECV",R_BUF_SIZE,1);
  597. if(!p->recv_skb[i]) {
  598. ni65_free_buffer(p);
  599. return -ENOMEM;
  600. }
  601. #else
  602. p->recvbounce[i] = ni65_alloc_mem(dev,"RECV",R_BUF_SIZE,0);
  603. if(!p->recvbounce[i]) {
  604. ni65_free_buffer(p);
  605. return -ENOMEM;
  606. }
  607. #endif
  608. }
  609. return 0; /* everything is OK */
  610. }
  611. /*
  612. * free buffers and private struct
  613. */
  614. static void ni65_free_buffer(struct priv *p)
  615. {
  616. int i;
  617. if(!p)
  618. return;
  619. for(i=0;i<TMDNUM;i++) {
  620. kfree(p->tmdbounce[i]);
  621. #ifdef XMT_VIA_SKB
  622. dev_kfree_skb(p->tmd_skb[i]);
  623. #endif
  624. }
  625. for(i=0;i<RMDNUM;i++)
  626. {
  627. #ifdef RCV_VIA_SKB
  628. dev_kfree_skb(p->recv_skb[i]);
  629. #else
  630. kfree(p->recvbounce[i]);
  631. #endif
  632. }
  633. kfree(p->self);
  634. }
  635. /*
  636. * stop and (re)start lance .. e.g after an error
  637. */
  638. static void ni65_stop_start(struct net_device *dev,struct priv *p)
  639. {
  640. int csr0 = CSR0_INEA;
  641. writedatareg(CSR0_STOP);
  642. if(debuglevel > 1)
  643. printk(KERN_DEBUG "ni65_stop_start\n");
  644. if(p->features & INIT_RING_BEFORE_START) {
  645. int i;
  646. #ifdef XMT_VIA_SKB
  647. struct sk_buff *skb_save[TMDNUM];
  648. #endif
  649. unsigned long buffer[TMDNUM];
  650. short blen[TMDNUM];
  651. if(p->xmit_queued) {
  652. while(1) {
  653. if((p->tmdhead[p->tmdlast].u.s.status & XMIT_OWN))
  654. break;
  655. p->tmdlast = (p->tmdlast + 1) & (TMDNUM-1);
  656. if(p->tmdlast == p->tmdnum)
  657. break;
  658. }
  659. }
  660. for(i=0;i<TMDNUM;i++) {
  661. struct tmd *tmdp = p->tmdhead + i;
  662. #ifdef XMT_VIA_SKB
  663. skb_save[i] = p->tmd_skb[i];
  664. #endif
  665. buffer[i] = (u32) isa_bus_to_virt(tmdp->u.buffer);
  666. blen[i] = tmdp->blen;
  667. tmdp->u.s.status = 0x0;
  668. }
  669. for(i=0;i<RMDNUM;i++) {
  670. struct rmd *rmdp = p->rmdhead + i;
  671. rmdp->u.s.status = RCV_OWN;
  672. }
  673. p->tmdnum = p->xmit_queued = 0;
  674. writedatareg(CSR0_STRT | csr0);
  675. for(i=0;i<TMDNUM;i++) {
  676. int num = (i + p->tmdlast) & (TMDNUM-1);
  677. p->tmdhead[i].u.buffer = (u32) isa_virt_to_bus((char *)buffer[num]); /* status is part of buffer field */
  678. p->tmdhead[i].blen = blen[num];
  679. if(p->tmdhead[i].u.s.status & XMIT_OWN) {
  680. p->tmdnum = (p->tmdnum + 1) & (TMDNUM-1);
  681. p->xmit_queued = 1;
  682. writedatareg(CSR0_TDMD | CSR0_INEA | csr0);
  683. }
  684. #ifdef XMT_VIA_SKB
  685. p->tmd_skb[i] = skb_save[num];
  686. #endif
  687. }
  688. p->rmdnum = p->tmdlast = 0;
  689. if(!p->lock)
  690. if (p->tmdnum || !p->xmit_queued)
  691. netif_wake_queue(dev);
  692. netif_trans_update(dev); /* prevent tx timeout */
  693. }
  694. else
  695. writedatareg(CSR0_STRT | csr0);
  696. }
  697. /*
  698. * init lance (write init-values .. init-buffers) (open-helper)
  699. */
  700. static int ni65_lance_reinit(struct net_device *dev)
  701. {
  702. int i;
  703. struct priv *p = dev->ml_priv;
  704. unsigned long flags;
  705. p->lock = 0;
  706. p->xmit_queued = 0;
  707. flags=claim_dma_lock();
  708. disable_dma(dev->dma); /* I've never worked with dma, but we do it like the packetdriver */
  709. set_dma_mode(dev->dma,DMA_MODE_CASCADE);
  710. enable_dma(dev->dma);
  711. release_dma_lock(flags);
  712. outw(inw(PORT+L_RESET),PORT+L_RESET); /* first: reset the card */
  713. if( (i=readreg(CSR0) ) != 0x4)
  714. {
  715. printk(KERN_ERR "%s: can't RESET %s card: %04x\n",dev->name,
  716. cards[p->cardno].cardname,(int) i);
  717. flags=claim_dma_lock();
  718. disable_dma(dev->dma);
  719. release_dma_lock(flags);
  720. return 0;
  721. }
  722. p->rmdnum = p->tmdnum = p->tmdlast = p->tmdbouncenum = 0;
  723. for(i=0;i<TMDNUM;i++)
  724. {
  725. struct tmd *tmdp = p->tmdhead + i;
  726. #ifdef XMT_VIA_SKB
  727. if(p->tmd_skb[i]) {
  728. dev_kfree_skb(p->tmd_skb[i]);
  729. p->tmd_skb[i] = NULL;
  730. }
  731. #endif
  732. tmdp->u.buffer = 0x0;
  733. tmdp->u.s.status = XMIT_START | XMIT_END;
  734. tmdp->blen = tmdp->status2 = 0;
  735. }
  736. for(i=0;i<RMDNUM;i++)
  737. {
  738. struct rmd *rmdp = p->rmdhead + i;
  739. #ifdef RCV_VIA_SKB
  740. rmdp->u.buffer = (u32) isa_virt_to_bus(p->recv_skb[i]->data);
  741. #else
  742. rmdp->u.buffer = (u32) isa_virt_to_bus(p->recvbounce[i]);
  743. #endif
  744. rmdp->blen = -(R_BUF_SIZE-8);
  745. rmdp->mlen = 0;
  746. rmdp->u.s.status = RCV_OWN;
  747. }
  748. if(dev->flags & IFF_PROMISC)
  749. ni65_init_lance(p,dev->dev_addr,0x00,M_PROM);
  750. else if (netdev_mc_count(dev) || dev->flags & IFF_ALLMULTI)
  751. ni65_init_lance(p,dev->dev_addr,0xff,0x0);
  752. else
  753. ni65_init_lance(p,dev->dev_addr,0x00,0x00);
  754. /*
  755. * ni65_set_lance_mem() sets L_ADDRREG to CSR0
  756. * NOW, WE WILL NEVER CHANGE THE L_ADDRREG, CSR0 IS ALWAYS SELECTED
  757. */
  758. if(inw(PORT+L_DATAREG) & CSR0_IDON) {
  759. ni65_set_performance(p);
  760. /* init OK: start lance , enable interrupts */
  761. writedatareg(CSR0_CLRALL | CSR0_INEA | CSR0_STRT);
  762. return 1; /* ->OK */
  763. }
  764. printk(KERN_ERR "%s: can't init lance, status: %04x\n",dev->name,(int) inw(PORT+L_DATAREG));
  765. flags=claim_dma_lock();
  766. disable_dma(dev->dma);
  767. release_dma_lock(flags);
  768. return 0; /* ->Error */
  769. }
  770. /*
  771. * interrupt handler
  772. */
  773. static irqreturn_t ni65_interrupt(int irq, void * dev_id)
  774. {
  775. int csr0 = 0;
  776. struct net_device *dev = dev_id;
  777. struct priv *p;
  778. int bcnt = 32;
  779. p = dev->ml_priv;
  780. spin_lock(&p->ring_lock);
  781. while(--bcnt) {
  782. csr0 = inw(PORT+L_DATAREG);
  783. #if 0
  784. writedatareg( (csr0 & CSR0_CLRALL) ); /* ack interrupts, disable int. */
  785. #else
  786. writedatareg( (csr0 & CSR0_CLRALL) | CSR0_INEA ); /* ack interrupts, interrupts enabled */
  787. #endif
  788. if(!(csr0 & (CSR0_ERR | CSR0_RINT | CSR0_TINT)))
  789. break;
  790. if(csr0 & CSR0_RINT) /* RECV-int? */
  791. ni65_recv_intr(dev,csr0);
  792. if(csr0 & CSR0_TINT) /* XMIT-int? */
  793. ni65_xmit_intr(dev,csr0);
  794. if(csr0 & CSR0_ERR)
  795. {
  796. if(debuglevel > 1)
  797. printk(KERN_ERR "%s: general error: %04x.\n",dev->name,csr0);
  798. if(csr0 & CSR0_BABL)
  799. dev->stats.tx_errors++;
  800. if(csr0 & CSR0_MISS) {
  801. int i;
  802. for(i=0;i<RMDNUM;i++)
  803. printk("%02x ",p->rmdhead[i].u.s.status);
  804. printk("\n");
  805. dev->stats.rx_errors++;
  806. }
  807. if(csr0 & CSR0_MERR) {
  808. if(debuglevel > 1)
  809. printk(KERN_ERR "%s: Ooops .. memory error: %04x.\n",dev->name,csr0);
  810. ni65_stop_start(dev,p);
  811. }
  812. }
  813. }
  814. #ifdef RCV_PARANOIA_CHECK
  815. {
  816. int j;
  817. for(j=0;j<RMDNUM;j++)
  818. {
  819. int i, num2;
  820. for(i=RMDNUM-1;i>0;i--) {
  821. num2 = (p->rmdnum + i) & (RMDNUM-1);
  822. if(!(p->rmdhead[num2].u.s.status & RCV_OWN))
  823. break;
  824. }
  825. if(i) {
  826. int k, num1;
  827. for(k=0;k<RMDNUM;k++) {
  828. num1 = (p->rmdnum + k) & (RMDNUM-1);
  829. if(!(p->rmdhead[num1].u.s.status & RCV_OWN))
  830. break;
  831. }
  832. if(!k)
  833. break;
  834. if(debuglevel > 0)
  835. {
  836. char buf[256],*buf1;
  837. buf1 = buf;
  838. for(k=0;k<RMDNUM;k++) {
  839. sprintf(buf1,"%02x ",(p->rmdhead[k].u.s.status)); /* & RCV_OWN) ); */
  840. buf1 += 3;
  841. }
  842. *buf1 = 0;
  843. printk(KERN_ERR "%s: Ooops, receive ring corrupted %2d %2d | %s\n",dev->name,p->rmdnum,i,buf);
  844. }
  845. p->rmdnum = num1;
  846. ni65_recv_intr(dev,csr0);
  847. if((p->rmdhead[num2].u.s.status & RCV_OWN))
  848. break; /* ok, we are 'in sync' again */
  849. }
  850. else
  851. break;
  852. }
  853. }
  854. #endif
  855. if( (csr0 & (CSR0_RXON | CSR0_TXON)) != (CSR0_RXON | CSR0_TXON) ) {
  856. printk(KERN_DEBUG "%s: RX or TX was offline -> restart\n",dev->name);
  857. ni65_stop_start(dev,p);
  858. }
  859. else
  860. writedatareg(CSR0_INEA);
  861. spin_unlock(&p->ring_lock);
  862. return IRQ_HANDLED;
  863. }
  864. /*
  865. * We have received an Xmit-Interrupt ..
  866. * send a new packet if necessary
  867. */
  868. static void ni65_xmit_intr(struct net_device *dev,int csr0)
  869. {
  870. struct priv *p = dev->ml_priv;
  871. while(p->xmit_queued)
  872. {
  873. struct tmd *tmdp = p->tmdhead + p->tmdlast;
  874. int tmdstat = tmdp->u.s.status;
  875. if(tmdstat & XMIT_OWN)
  876. break;
  877. if(tmdstat & XMIT_ERR)
  878. {
  879. #if 0
  880. if(tmdp->status2 & XMIT_TDRMASK && debuglevel > 3)
  881. printk(KERN_ERR "%s: tdr-problems (e.g. no resistor)\n",dev->name);
  882. #endif
  883. /* checking some errors */
  884. if(tmdp->status2 & XMIT_RTRY)
  885. dev->stats.tx_aborted_errors++;
  886. if(tmdp->status2 & XMIT_LCAR)
  887. dev->stats.tx_carrier_errors++;
  888. if(tmdp->status2 & (XMIT_BUFF | XMIT_UFLO )) {
  889. /* this stops the xmitter */
  890. dev->stats.tx_fifo_errors++;
  891. if(debuglevel > 0)
  892. printk(KERN_ERR "%s: Xmit FIFO/BUFF error\n",dev->name);
  893. if(p->features & INIT_RING_BEFORE_START) {
  894. tmdp->u.s.status = XMIT_OWN | XMIT_START | XMIT_END; /* test: resend this frame */
  895. ni65_stop_start(dev,p);
  896. break; /* no more Xmit processing .. */
  897. }
  898. else
  899. ni65_stop_start(dev,p);
  900. }
  901. if(debuglevel > 2)
  902. printk(KERN_ERR "%s: xmit-error: %04x %02x-%04x\n",dev->name,csr0,(int) tmdstat,(int) tmdp->status2);
  903. if(!(csr0 & CSR0_BABL)) /* don't count errors twice */
  904. dev->stats.tx_errors++;
  905. tmdp->status2 = 0;
  906. }
  907. else {
  908. dev->stats.tx_bytes -= (short)(tmdp->blen);
  909. dev->stats.tx_packets++;
  910. }
  911. #ifdef XMT_VIA_SKB
  912. if(p->tmd_skb[p->tmdlast]) {
  913. dev_consume_skb_irq(p->tmd_skb[p->tmdlast]);
  914. p->tmd_skb[p->tmdlast] = NULL;
  915. }
  916. #endif
  917. p->tmdlast = (p->tmdlast + 1) & (TMDNUM-1);
  918. if(p->tmdlast == p->tmdnum)
  919. p->xmit_queued = 0;
  920. }
  921. netif_wake_queue(dev);
  922. }
  923. /*
  924. * We have received a packet
  925. */
  926. static void ni65_recv_intr(struct net_device *dev,int csr0)
  927. {
  928. struct rmd *rmdp;
  929. int rmdstat,len;
  930. int cnt=0;
  931. struct priv *p = dev->ml_priv;
  932. rmdp = p->rmdhead + p->rmdnum;
  933. while(!( (rmdstat = rmdp->u.s.status) & RCV_OWN))
  934. {
  935. cnt++;
  936. if( (rmdstat & (RCV_START | RCV_END | RCV_ERR)) != (RCV_START | RCV_END) ) /* error or oversized? */
  937. {
  938. if(!(rmdstat & RCV_ERR)) {
  939. if(rmdstat & RCV_START)
  940. {
  941. dev->stats.rx_length_errors++;
  942. printk(KERN_ERR "%s: recv, packet too long: %d\n",dev->name,rmdp->mlen & 0x0fff);
  943. }
  944. }
  945. else {
  946. if(debuglevel > 2)
  947. printk(KERN_ERR "%s: receive-error: %04x, lance-status: %04x/%04x\n",
  948. dev->name,(int) rmdstat,csr0,(int) inw(PORT+L_DATAREG) );
  949. if(rmdstat & RCV_FRAM)
  950. dev->stats.rx_frame_errors++;
  951. if(rmdstat & RCV_OFLO)
  952. dev->stats.rx_over_errors++;
  953. if(rmdstat & RCV_CRC)
  954. dev->stats.rx_crc_errors++;
  955. if(rmdstat & RCV_BUF_ERR)
  956. dev->stats.rx_fifo_errors++;
  957. }
  958. if(!(csr0 & CSR0_MISS)) /* don't count errors twice */
  959. dev->stats.rx_errors++;
  960. }
  961. else if( (len = (rmdp->mlen & 0x0fff) - 4) >= 60)
  962. {
  963. #ifdef RCV_VIA_SKB
  964. struct sk_buff *skb = alloc_skb(R_BUF_SIZE+2+16,GFP_ATOMIC);
  965. if (skb)
  966. skb_reserve(skb,16);
  967. #else
  968. struct sk_buff *skb = netdev_alloc_skb(dev, len + 2);
  969. #endif
  970. if(skb)
  971. {
  972. skb_reserve(skb,2);
  973. #ifdef RCV_VIA_SKB
  974. if( (unsigned long) (skb->data + R_BUF_SIZE) > 0x1000000) {
  975. skb_put(skb,len);
  976. skb_copy_to_linear_data(skb, (unsigned char *)(p->recv_skb[p->rmdnum]->data),len);
  977. }
  978. else {
  979. struct sk_buff *skb1 = p->recv_skb[p->rmdnum];
  980. skb_put(skb,R_BUF_SIZE);
  981. p->recv_skb[p->rmdnum] = skb;
  982. rmdp->u.buffer = (u32) isa_virt_to_bus(skb->data);
  983. skb = skb1;
  984. skb_trim(skb,len);
  985. }
  986. #else
  987. skb_put(skb,len);
  988. skb_copy_to_linear_data(skb, (unsigned char *) p->recvbounce[p->rmdnum],len);
  989. #endif
  990. dev->stats.rx_packets++;
  991. dev->stats.rx_bytes += len;
  992. skb->protocol=eth_type_trans(skb,dev);
  993. netif_rx(skb);
  994. }
  995. else
  996. {
  997. printk(KERN_ERR "%s: can't alloc new sk_buff\n",dev->name);
  998. dev->stats.rx_dropped++;
  999. }
  1000. }
  1001. else {
  1002. printk(KERN_INFO "%s: received runt packet\n",dev->name);
  1003. dev->stats.rx_errors++;
  1004. }
  1005. rmdp->blen = -(R_BUF_SIZE-8);
  1006. rmdp->mlen = 0;
  1007. rmdp->u.s.status = RCV_OWN; /* change owner */
  1008. p->rmdnum = (p->rmdnum + 1) & (RMDNUM-1);
  1009. rmdp = p->rmdhead + p->rmdnum;
  1010. }
  1011. }
  1012. /*
  1013. * kick xmitter ..
  1014. */
  1015. static void ni65_timeout(struct net_device *dev)
  1016. {
  1017. int i;
  1018. struct priv *p = dev->ml_priv;
  1019. printk(KERN_ERR "%s: xmitter timed out, try to restart!\n",dev->name);
  1020. for(i=0;i<TMDNUM;i++)
  1021. printk("%02x ",p->tmdhead[i].u.s.status);
  1022. printk("\n");
  1023. ni65_lance_reinit(dev);
  1024. netif_trans_update(dev); /* prevent tx timeout */
  1025. netif_wake_queue(dev);
  1026. }
  1027. /*
  1028. * Send a packet
  1029. */
  1030. static netdev_tx_t ni65_send_packet(struct sk_buff *skb,
  1031. struct net_device *dev)
  1032. {
  1033. struct priv *p = dev->ml_priv;
  1034. netif_stop_queue(dev);
  1035. if (test_and_set_bit(0, (void*)&p->lock)) {
  1036. printk(KERN_ERR "%s: Queue was locked.\n", dev->name);
  1037. return NETDEV_TX_BUSY;
  1038. }
  1039. {
  1040. short len = ETH_ZLEN < skb->len ? skb->len : ETH_ZLEN;
  1041. struct tmd *tmdp;
  1042. unsigned long flags;
  1043. #ifdef XMT_VIA_SKB
  1044. if( (unsigned long) (skb->data + skb->len) > 0x1000000) {
  1045. #endif
  1046. skb_copy_from_linear_data(skb, p->tmdbounce[p->tmdbouncenum],
  1047. skb->len > T_BUF_SIZE ? T_BUF_SIZE :
  1048. skb->len);
  1049. if (len > skb->len)
  1050. memset((char *)p->tmdbounce[p->tmdbouncenum]+skb->len, 0, len-skb->len);
  1051. dev_kfree_skb (skb);
  1052. spin_lock_irqsave(&p->ring_lock, flags);
  1053. tmdp = p->tmdhead + p->tmdnum;
  1054. tmdp->u.buffer = (u32) isa_virt_to_bus(p->tmdbounce[p->tmdbouncenum]);
  1055. p->tmdbouncenum = (p->tmdbouncenum + 1) & (TMDNUM - 1);
  1056. #ifdef XMT_VIA_SKB
  1057. }
  1058. else {
  1059. spin_lock_irqsave(&p->ring_lock, flags);
  1060. tmdp = p->tmdhead + p->tmdnum;
  1061. tmdp->u.buffer = (u32) isa_virt_to_bus(skb->data);
  1062. p->tmd_skb[p->tmdnum] = skb;
  1063. }
  1064. #endif
  1065. tmdp->blen = -len;
  1066. tmdp->u.s.status = XMIT_OWN | XMIT_START | XMIT_END;
  1067. writedatareg(CSR0_TDMD | CSR0_INEA); /* enable xmit & interrupt */
  1068. p->xmit_queued = 1;
  1069. p->tmdnum = (p->tmdnum + 1) & (TMDNUM-1);
  1070. if(p->tmdnum != p->tmdlast)
  1071. netif_wake_queue(dev);
  1072. p->lock = 0;
  1073. spin_unlock_irqrestore(&p->ring_lock, flags);
  1074. }
  1075. return NETDEV_TX_OK;
  1076. }
  1077. static void set_multicast_list(struct net_device *dev)
  1078. {
  1079. if(!ni65_lance_reinit(dev))
  1080. printk(KERN_ERR "%s: Can't switch card into MC mode!\n",dev->name);
  1081. netif_wake_queue(dev);
  1082. }
  1083. #ifdef MODULE
  1084. static struct net_device *dev_ni65;
  1085. module_param_hw(irq, int, irq, 0);
  1086. module_param_hw(io, int, ioport, 0);
  1087. module_param_hw(dma, int, dma, 0);
  1088. MODULE_PARM_DESC(irq, "ni6510 IRQ number (ignored for some cards)");
  1089. MODULE_PARM_DESC(io, "ni6510 I/O base address");
  1090. MODULE_PARM_DESC(dma, "ni6510 ISA DMA channel (ignored for some cards)");
  1091. int __init init_module(void)
  1092. {
  1093. dev_ni65 = ni65_probe(-1);
  1094. return PTR_ERR_OR_ZERO(dev_ni65);
  1095. }
  1096. void __exit cleanup_module(void)
  1097. {
  1098. unregister_netdev(dev_ni65);
  1099. cleanup_card(dev_ni65);
  1100. free_netdev(dev_ni65);
  1101. }
  1102. #endif /* MODULE */
  1103. MODULE_LICENSE("GPL");