vitesse-vsc73xx-spi.c 4.6 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /* DSA driver for:
  3. * Vitesse VSC7385 SparX-G5 5+1-port Integrated Gigabit Ethernet Switch
  4. * Vitesse VSC7388 SparX-G8 8-port Integrated Gigabit Ethernet Switch
  5. * Vitesse VSC7395 SparX-G5e 5+1-port Integrated Gigabit Ethernet Switch
  6. * Vitesse VSC7398 SparX-G8e 8-port Integrated Gigabit Ethernet Switch
  7. *
  8. * This driver takes control of the switch chip over SPI and
  9. * configures it to route packages around when connected to a CPU port.
  10. *
  11. * Copyright (C) 2018 Linus Wallej <linus.walleij@linaro.org>
  12. * Includes portions of code from the firmware uploader by:
  13. * Copyright (C) 2009 Gabor Juhos <juhosg@openwrt.org>
  14. */
  15. #include <linux/kernel.h>
  16. #include <linux/module.h>
  17. #include <linux/of.h>
  18. #include <linux/spi/spi.h>
  19. #include "vitesse-vsc73xx.h"
  20. #define VSC73XX_CMD_SPI_MODE_READ 0
  21. #define VSC73XX_CMD_SPI_MODE_WRITE 1
  22. #define VSC73XX_CMD_SPI_MODE_SHIFT 4
  23. #define VSC73XX_CMD_SPI_BLOCK_SHIFT 5
  24. #define VSC73XX_CMD_SPI_BLOCK_MASK 0x7
  25. #define VSC73XX_CMD_SPI_SUBBLOCK_MASK 0xf
  26. /**
  27. * struct vsc73xx_spi - VSC73xx SPI state container
  28. */
  29. struct vsc73xx_spi {
  30. struct spi_device *spi;
  31. struct mutex lock; /* Protects SPI traffic */
  32. struct vsc73xx vsc;
  33. };
  34. static const struct vsc73xx_ops vsc73xx_spi_ops;
  35. static u8 vsc73xx_make_addr(u8 mode, u8 block, u8 subblock)
  36. {
  37. u8 ret;
  38. ret =
  39. (block & VSC73XX_CMD_SPI_BLOCK_MASK) << VSC73XX_CMD_SPI_BLOCK_SHIFT;
  40. ret |= (mode & 1) << VSC73XX_CMD_SPI_MODE_SHIFT;
  41. ret |= subblock & VSC73XX_CMD_SPI_SUBBLOCK_MASK;
  42. return ret;
  43. }
  44. static int vsc73xx_spi_read(struct vsc73xx *vsc, u8 block, u8 subblock, u8 reg,
  45. u32 *val)
  46. {
  47. struct vsc73xx_spi *vsc_spi = vsc->priv;
  48. struct spi_transfer t[2];
  49. struct spi_message m;
  50. u8 cmd[4];
  51. u8 buf[4];
  52. int ret;
  53. if (!vsc73xx_is_addr_valid(block, subblock))
  54. return -EINVAL;
  55. spi_message_init(&m);
  56. memset(&t, 0, sizeof(t));
  57. t[0].tx_buf = cmd;
  58. t[0].len = sizeof(cmd);
  59. spi_message_add_tail(&t[0], &m);
  60. t[1].rx_buf = buf;
  61. t[1].len = sizeof(buf);
  62. spi_message_add_tail(&t[1], &m);
  63. cmd[0] = vsc73xx_make_addr(VSC73XX_CMD_SPI_MODE_READ, block, subblock);
  64. cmd[1] = reg;
  65. cmd[2] = 0;
  66. cmd[3] = 0;
  67. mutex_lock(&vsc_spi->lock);
  68. ret = spi_sync(vsc_spi->spi, &m);
  69. mutex_unlock(&vsc_spi->lock);
  70. if (ret)
  71. return ret;
  72. *val = (buf[0] << 24) | (buf[1] << 16) | (buf[2] << 8) | buf[3];
  73. return 0;
  74. }
  75. static int vsc73xx_spi_write(struct vsc73xx *vsc, u8 block, u8 subblock, u8 reg,
  76. u32 val)
  77. {
  78. struct vsc73xx_spi *vsc_spi = vsc->priv;
  79. struct spi_transfer t[2];
  80. struct spi_message m;
  81. u8 cmd[2];
  82. u8 buf[4];
  83. int ret;
  84. if (!vsc73xx_is_addr_valid(block, subblock))
  85. return -EINVAL;
  86. spi_message_init(&m);
  87. memset(&t, 0, sizeof(t));
  88. t[0].tx_buf = cmd;
  89. t[0].len = sizeof(cmd);
  90. spi_message_add_tail(&t[0], &m);
  91. t[1].tx_buf = buf;
  92. t[1].len = sizeof(buf);
  93. spi_message_add_tail(&t[1], &m);
  94. cmd[0] = vsc73xx_make_addr(VSC73XX_CMD_SPI_MODE_WRITE, block, subblock);
  95. cmd[1] = reg;
  96. buf[0] = (val >> 24) & 0xff;
  97. buf[1] = (val >> 16) & 0xff;
  98. buf[2] = (val >> 8) & 0xff;
  99. buf[3] = val & 0xff;
  100. mutex_lock(&vsc_spi->lock);
  101. ret = spi_sync(vsc_spi->spi, &m);
  102. mutex_unlock(&vsc_spi->lock);
  103. return ret;
  104. }
  105. static int vsc73xx_spi_probe(struct spi_device *spi)
  106. {
  107. struct device *dev = &spi->dev;
  108. struct vsc73xx_spi *vsc_spi;
  109. int ret;
  110. vsc_spi = devm_kzalloc(dev, sizeof(*vsc_spi), GFP_KERNEL);
  111. if (!vsc_spi)
  112. return -ENOMEM;
  113. spi_set_drvdata(spi, vsc_spi);
  114. vsc_spi->spi = spi_dev_get(spi);
  115. vsc_spi->vsc.dev = dev;
  116. vsc_spi->vsc.priv = vsc_spi;
  117. vsc_spi->vsc.ops = &vsc73xx_spi_ops;
  118. mutex_init(&vsc_spi->lock);
  119. spi->mode = SPI_MODE_0;
  120. spi->bits_per_word = 8;
  121. ret = spi_setup(spi);
  122. if (ret < 0) {
  123. dev_err(dev, "spi setup failed.\n");
  124. return ret;
  125. }
  126. return vsc73xx_probe(&vsc_spi->vsc);
  127. }
  128. static int vsc73xx_spi_remove(struct spi_device *spi)
  129. {
  130. struct vsc73xx_spi *vsc_spi = spi_get_drvdata(spi);
  131. return vsc73xx_remove(&vsc_spi->vsc);
  132. }
  133. static const struct vsc73xx_ops vsc73xx_spi_ops = {
  134. .read = vsc73xx_spi_read,
  135. .write = vsc73xx_spi_write,
  136. };
  137. static const struct of_device_id vsc73xx_of_match[] = {
  138. {
  139. .compatible = "vitesse,vsc7385",
  140. },
  141. {
  142. .compatible = "vitesse,vsc7388",
  143. },
  144. {
  145. .compatible = "vitesse,vsc7395",
  146. },
  147. {
  148. .compatible = "vitesse,vsc7398",
  149. },
  150. { },
  151. };
  152. MODULE_DEVICE_TABLE(of, vsc73xx_of_match);
  153. static struct spi_driver vsc73xx_spi_driver = {
  154. .probe = vsc73xx_spi_probe,
  155. .remove = vsc73xx_spi_remove,
  156. .driver = {
  157. .name = "vsc73xx-spi",
  158. .of_match_table = vsc73xx_of_match,
  159. },
  160. };
  161. module_spi_driver(vsc73xx_spi_driver);
  162. MODULE_AUTHOR("Linus Walleij <linus.walleij@linaro.org>");
  163. MODULE_DESCRIPTION("Vitesse VSC7385/7388/7395/7398 SPI driver");
  164. MODULE_LICENSE("GPL v2");