sja1000_isa.c 7.6 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (C) 2009 Wolfgang Grandegger <wg@grandegger.com>
  4. */
  5. #include <linux/kernel.h>
  6. #include <linux/module.h>
  7. #include <linux/platform_device.h>
  8. #include <linux/interrupt.h>
  9. #include <linux/netdevice.h>
  10. #include <linux/delay.h>
  11. #include <linux/irq.h>
  12. #include <linux/io.h>
  13. #include <linux/can/dev.h>
  14. #include <linux/can/platform/sja1000.h>
  15. #include "sja1000.h"
  16. #define DRV_NAME "sja1000_isa"
  17. #define MAXDEV 8
  18. MODULE_AUTHOR("Wolfgang Grandegger <wg@grandegger.com>");
  19. MODULE_DESCRIPTION("Socket-CAN driver for SJA1000 on the ISA bus");
  20. MODULE_LICENSE("GPL v2");
  21. #define CLK_DEFAULT 16000000 /* 16 MHz */
  22. #define CDR_DEFAULT (CDR_CBP | CDR_CLK_OFF)
  23. #define OCR_DEFAULT OCR_TX0_PUSHPULL
  24. static unsigned long port[MAXDEV];
  25. static unsigned long mem[MAXDEV];
  26. static int irq[MAXDEV];
  27. static int clk[MAXDEV];
  28. static unsigned char cdr[MAXDEV] = {[0 ... (MAXDEV - 1)] = 0xff};
  29. static unsigned char ocr[MAXDEV] = {[0 ... (MAXDEV - 1)] = 0xff};
  30. static int indirect[MAXDEV] = {[0 ... (MAXDEV - 1)] = -1};
  31. static spinlock_t indirect_lock[MAXDEV]; /* lock for indirect access mode */
  32. module_param_hw_array(port, ulong, ioport, NULL, 0444);
  33. MODULE_PARM_DESC(port, "I/O port number");
  34. module_param_hw_array(mem, ulong, iomem, NULL, 0444);
  35. MODULE_PARM_DESC(mem, "I/O memory address");
  36. module_param_hw_array(indirect, int, ioport, NULL, 0444);
  37. MODULE_PARM_DESC(indirect, "Indirect access via address and data port");
  38. module_param_hw_array(irq, int, irq, NULL, 0444);
  39. MODULE_PARM_DESC(irq, "IRQ number");
  40. module_param_array(clk, int, NULL, 0444);
  41. MODULE_PARM_DESC(clk, "External oscillator clock frequency "
  42. "(default=16000000 [16 MHz])");
  43. module_param_array(cdr, byte, NULL, 0444);
  44. MODULE_PARM_DESC(cdr, "Clock divider register "
  45. "(default=0x48 [CDR_CBP | CDR_CLK_OFF])");
  46. module_param_array(ocr, byte, NULL, 0444);
  47. MODULE_PARM_DESC(ocr, "Output control register "
  48. "(default=0x18 [OCR_TX0_PUSHPULL])");
  49. #define SJA1000_IOSIZE 0x20
  50. #define SJA1000_IOSIZE_INDIRECT 0x02
  51. static struct platform_device *sja1000_isa_devs[MAXDEV];
  52. static u8 sja1000_isa_mem_read_reg(const struct sja1000_priv *priv, int reg)
  53. {
  54. return readb(priv->reg_base + reg);
  55. }
  56. static void sja1000_isa_mem_write_reg(const struct sja1000_priv *priv,
  57. int reg, u8 val)
  58. {
  59. writeb(val, priv->reg_base + reg);
  60. }
  61. static u8 sja1000_isa_port_read_reg(const struct sja1000_priv *priv, int reg)
  62. {
  63. return inb((unsigned long)priv->reg_base + reg);
  64. }
  65. static void sja1000_isa_port_write_reg(const struct sja1000_priv *priv,
  66. int reg, u8 val)
  67. {
  68. outb(val, (unsigned long)priv->reg_base + reg);
  69. }
  70. static u8 sja1000_isa_port_read_reg_indirect(const struct sja1000_priv *priv,
  71. int reg)
  72. {
  73. unsigned long flags, base = (unsigned long)priv->reg_base;
  74. u8 readval;
  75. spin_lock_irqsave(&indirect_lock[priv->dev->dev_id], flags);
  76. outb(reg, base);
  77. readval = inb(base + 1);
  78. spin_unlock_irqrestore(&indirect_lock[priv->dev->dev_id], flags);
  79. return readval;
  80. }
  81. static void sja1000_isa_port_write_reg_indirect(const struct sja1000_priv *priv,
  82. int reg, u8 val)
  83. {
  84. unsigned long flags, base = (unsigned long)priv->reg_base;
  85. spin_lock_irqsave(&indirect_lock[priv->dev->dev_id], flags);
  86. outb(reg, base);
  87. outb(val, base + 1);
  88. spin_unlock_irqrestore(&indirect_lock[priv->dev->dev_id], flags);
  89. }
  90. static int sja1000_isa_probe(struct platform_device *pdev)
  91. {
  92. struct net_device *dev;
  93. struct sja1000_priv *priv;
  94. void __iomem *base = NULL;
  95. int iosize = SJA1000_IOSIZE;
  96. int idx = pdev->id;
  97. int err;
  98. dev_dbg(&pdev->dev, "probing idx=%d: port=%#lx, mem=%#lx, irq=%d\n",
  99. idx, port[idx], mem[idx], irq[idx]);
  100. if (mem[idx]) {
  101. if (!request_mem_region(mem[idx], iosize, DRV_NAME)) {
  102. err = -EBUSY;
  103. goto exit;
  104. }
  105. base = ioremap_nocache(mem[idx], iosize);
  106. if (!base) {
  107. err = -ENOMEM;
  108. goto exit_release;
  109. }
  110. } else {
  111. if (indirect[idx] > 0 ||
  112. (indirect[idx] == -1 && indirect[0] > 0))
  113. iosize = SJA1000_IOSIZE_INDIRECT;
  114. if (!request_region(port[idx], iosize, DRV_NAME)) {
  115. err = -EBUSY;
  116. goto exit;
  117. }
  118. }
  119. dev = alloc_sja1000dev(0);
  120. if (!dev) {
  121. err = -ENOMEM;
  122. goto exit_unmap;
  123. }
  124. priv = netdev_priv(dev);
  125. dev->irq = irq[idx];
  126. priv->irq_flags = IRQF_SHARED;
  127. if (mem[idx]) {
  128. priv->reg_base = base;
  129. dev->base_addr = mem[idx];
  130. priv->read_reg = sja1000_isa_mem_read_reg;
  131. priv->write_reg = sja1000_isa_mem_write_reg;
  132. } else {
  133. priv->reg_base = (void __iomem *)port[idx];
  134. dev->base_addr = port[idx];
  135. if (iosize == SJA1000_IOSIZE_INDIRECT) {
  136. priv->read_reg = sja1000_isa_port_read_reg_indirect;
  137. priv->write_reg = sja1000_isa_port_write_reg_indirect;
  138. spin_lock_init(&indirect_lock[idx]);
  139. } else {
  140. priv->read_reg = sja1000_isa_port_read_reg;
  141. priv->write_reg = sja1000_isa_port_write_reg;
  142. }
  143. }
  144. if (clk[idx])
  145. priv->can.clock.freq = clk[idx] / 2;
  146. else if (clk[0])
  147. priv->can.clock.freq = clk[0] / 2;
  148. else
  149. priv->can.clock.freq = CLK_DEFAULT / 2;
  150. if (ocr[idx] != 0xff)
  151. priv->ocr = ocr[idx];
  152. else if (ocr[0] != 0xff)
  153. priv->ocr = ocr[0];
  154. else
  155. priv->ocr = OCR_DEFAULT;
  156. if (cdr[idx] != 0xff)
  157. priv->cdr = cdr[idx];
  158. else if (cdr[0] != 0xff)
  159. priv->cdr = cdr[0];
  160. else
  161. priv->cdr = CDR_DEFAULT;
  162. platform_set_drvdata(pdev, dev);
  163. SET_NETDEV_DEV(dev, &pdev->dev);
  164. dev->dev_id = idx;
  165. err = register_sja1000dev(dev);
  166. if (err) {
  167. dev_err(&pdev->dev, "registering %s failed (err=%d)\n",
  168. DRV_NAME, err);
  169. goto exit_unmap;
  170. }
  171. dev_info(&pdev->dev, "%s device registered (reg_base=0x%p, irq=%d)\n",
  172. DRV_NAME, priv->reg_base, dev->irq);
  173. return 0;
  174. exit_unmap:
  175. if (mem[idx])
  176. iounmap(base);
  177. exit_release:
  178. if (mem[idx])
  179. release_mem_region(mem[idx], iosize);
  180. else
  181. release_region(port[idx], iosize);
  182. exit:
  183. return err;
  184. }
  185. static int sja1000_isa_remove(struct platform_device *pdev)
  186. {
  187. struct net_device *dev = platform_get_drvdata(pdev);
  188. struct sja1000_priv *priv = netdev_priv(dev);
  189. int idx = pdev->id;
  190. unregister_sja1000dev(dev);
  191. if (mem[idx]) {
  192. iounmap(priv->reg_base);
  193. release_mem_region(mem[idx], SJA1000_IOSIZE);
  194. } else {
  195. if (priv->read_reg == sja1000_isa_port_read_reg_indirect)
  196. release_region(port[idx], SJA1000_IOSIZE_INDIRECT);
  197. else
  198. release_region(port[idx], SJA1000_IOSIZE);
  199. }
  200. free_sja1000dev(dev);
  201. return 0;
  202. }
  203. static struct platform_driver sja1000_isa_driver = {
  204. .probe = sja1000_isa_probe,
  205. .remove = sja1000_isa_remove,
  206. .driver = {
  207. .name = DRV_NAME,
  208. },
  209. };
  210. static int __init sja1000_isa_init(void)
  211. {
  212. int idx, err;
  213. for (idx = 0; idx < MAXDEV; idx++) {
  214. if ((port[idx] || mem[idx]) && irq[idx]) {
  215. sja1000_isa_devs[idx] =
  216. platform_device_alloc(DRV_NAME, idx);
  217. if (!sja1000_isa_devs[idx]) {
  218. err = -ENOMEM;
  219. goto exit_free_devices;
  220. }
  221. err = platform_device_add(sja1000_isa_devs[idx]);
  222. if (err) {
  223. platform_device_put(sja1000_isa_devs[idx]);
  224. goto exit_free_devices;
  225. }
  226. pr_debug("%s: platform device %d: port=%#lx, mem=%#lx, "
  227. "irq=%d\n",
  228. DRV_NAME, idx, port[idx], mem[idx], irq[idx]);
  229. } else if (idx == 0 || port[idx] || mem[idx]) {
  230. pr_err("%s: insufficient parameters supplied\n",
  231. DRV_NAME);
  232. err = -EINVAL;
  233. goto exit_free_devices;
  234. }
  235. }
  236. err = platform_driver_register(&sja1000_isa_driver);
  237. if (err)
  238. goto exit_free_devices;
  239. pr_info("Legacy %s driver for max. %d devices registered\n",
  240. DRV_NAME, MAXDEV);
  241. return 0;
  242. exit_free_devices:
  243. while (--idx >= 0) {
  244. if (sja1000_isa_devs[idx])
  245. platform_device_unregister(sja1000_isa_devs[idx]);
  246. }
  247. return err;
  248. }
  249. static void __exit sja1000_isa_exit(void)
  250. {
  251. int idx;
  252. platform_driver_unregister(&sja1000_isa_driver);
  253. for (idx = 0; idx < MAXDEV; idx++) {
  254. if (sja1000_isa_devs[idx])
  255. platform_device_unregister(sja1000_isa_devs[idx]);
  256. }
  257. }
  258. module_init(sja1000_isa_init);
  259. module_exit(sja1000_isa_exit);