mn88473.c 19 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770
  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * Panasonic MN88473 DVB-T/T2/C demodulator driver
  4. *
  5. * Copyright (C) 2014 Antti Palosaari <crope@iki.fi>
  6. */
  7. #include "mn88473_priv.h"
  8. static int mn88473_get_tune_settings(struct dvb_frontend *fe,
  9. struct dvb_frontend_tune_settings *s)
  10. {
  11. s->min_delay_ms = 1000;
  12. return 0;
  13. }
  14. static int mn88473_set_frontend(struct dvb_frontend *fe)
  15. {
  16. struct i2c_client *client = fe->demodulator_priv;
  17. struct mn88473_dev *dev = i2c_get_clientdata(client);
  18. struct dtv_frontend_properties *c = &fe->dtv_property_cache;
  19. int ret, i;
  20. unsigned int uitmp;
  21. u32 if_frequency;
  22. u8 delivery_system_val, if_val[3], *conf_val_ptr;
  23. u8 reg_bank2_2d_val, reg_bank0_d2_val;
  24. dev_dbg(&client->dev,
  25. "delivery_system=%u modulation=%u frequency=%u bandwidth_hz=%u symbol_rate=%u inversion=%d stream_id=%d\n",
  26. c->delivery_system, c->modulation, c->frequency,
  27. c->bandwidth_hz, c->symbol_rate, c->inversion, c->stream_id);
  28. if (!dev->active) {
  29. ret = -EAGAIN;
  30. goto err;
  31. }
  32. switch (c->delivery_system) {
  33. case SYS_DVBT:
  34. delivery_system_val = 0x02;
  35. reg_bank2_2d_val = 0x23;
  36. reg_bank0_d2_val = 0x2a;
  37. break;
  38. case SYS_DVBT2:
  39. delivery_system_val = 0x03;
  40. reg_bank2_2d_val = 0x3b;
  41. reg_bank0_d2_val = 0x29;
  42. break;
  43. case SYS_DVBC_ANNEX_A:
  44. delivery_system_val = 0x04;
  45. reg_bank2_2d_val = 0x3b;
  46. reg_bank0_d2_val = 0x29;
  47. break;
  48. default:
  49. ret = -EINVAL;
  50. goto err;
  51. }
  52. switch (c->delivery_system) {
  53. case SYS_DVBT:
  54. case SYS_DVBT2:
  55. switch (c->bandwidth_hz) {
  56. case 6000000:
  57. conf_val_ptr = "\xe9\x55\x55\x1c\x29\x1c\x29";
  58. break;
  59. case 7000000:
  60. conf_val_ptr = "\xc8\x00\x00\x17\x0a\x17\x0a";
  61. break;
  62. case 8000000:
  63. conf_val_ptr = "\xaf\x00\x00\x11\xec\x11\xec";
  64. break;
  65. default:
  66. ret = -EINVAL;
  67. goto err;
  68. }
  69. break;
  70. case SYS_DVBC_ANNEX_A:
  71. conf_val_ptr = "\x10\xab\x0d\xae\x1d\x9d";
  72. break;
  73. default:
  74. break;
  75. }
  76. /* Program tuner */
  77. if (fe->ops.tuner_ops.set_params) {
  78. ret = fe->ops.tuner_ops.set_params(fe);
  79. if (ret)
  80. goto err;
  81. }
  82. if (fe->ops.tuner_ops.get_if_frequency) {
  83. ret = fe->ops.tuner_ops.get_if_frequency(fe, &if_frequency);
  84. if (ret)
  85. goto err;
  86. dev_dbg(&client->dev, "get_if_frequency=%u\n", if_frequency);
  87. } else {
  88. ret = -EINVAL;
  89. goto err;
  90. }
  91. /* Calculate IF registers */
  92. uitmp = DIV_ROUND_CLOSEST_ULL((u64) if_frequency * 0x1000000, dev->clk);
  93. if_val[0] = (uitmp >> 16) & 0xff;
  94. if_val[1] = (uitmp >> 8) & 0xff;
  95. if_val[2] = (uitmp >> 0) & 0xff;
  96. ret = regmap_write(dev->regmap[2], 0x05, 0x00);
  97. if (ret)
  98. goto err;
  99. ret = regmap_write(dev->regmap[2], 0xfb, 0x13);
  100. if (ret)
  101. goto err;
  102. ret = regmap_write(dev->regmap[2], 0xef, 0x13);
  103. if (ret)
  104. goto err;
  105. ret = regmap_write(dev->regmap[2], 0xf9, 0x13);
  106. if (ret)
  107. goto err;
  108. ret = regmap_write(dev->regmap[2], 0x00, 0x18);
  109. if (ret)
  110. goto err;
  111. ret = regmap_write(dev->regmap[2], 0x01, 0x01);
  112. if (ret)
  113. goto err;
  114. ret = regmap_write(dev->regmap[2], 0x02, 0x21);
  115. if (ret)
  116. goto err;
  117. ret = regmap_write(dev->regmap[2], 0x03, delivery_system_val);
  118. if (ret)
  119. goto err;
  120. ret = regmap_write(dev->regmap[2], 0x0b, 0x00);
  121. if (ret)
  122. goto err;
  123. for (i = 0; i < sizeof(if_val); i++) {
  124. ret = regmap_write(dev->regmap[2], 0x10 + i, if_val[i]);
  125. if (ret)
  126. goto err;
  127. }
  128. switch (c->delivery_system) {
  129. case SYS_DVBT:
  130. case SYS_DVBT2:
  131. for (i = 0; i < 7; i++) {
  132. ret = regmap_write(dev->regmap[2], 0x13 + i,
  133. conf_val_ptr[i]);
  134. if (ret)
  135. goto err;
  136. }
  137. break;
  138. case SYS_DVBC_ANNEX_A:
  139. ret = regmap_bulk_write(dev->regmap[1], 0x10, conf_val_ptr, 6);
  140. if (ret)
  141. goto err;
  142. break;
  143. default:
  144. break;
  145. }
  146. ret = regmap_write(dev->regmap[2], 0x2d, reg_bank2_2d_val);
  147. if (ret)
  148. goto err;
  149. ret = regmap_write(dev->regmap[2], 0x2e, 0x00);
  150. if (ret)
  151. goto err;
  152. ret = regmap_write(dev->regmap[2], 0x56, 0x0d);
  153. if (ret)
  154. goto err;
  155. ret = regmap_bulk_write(dev->regmap[0], 0x01,
  156. "\xba\x13\x80\xba\x91\xdd\xe7\x28", 8);
  157. if (ret)
  158. goto err;
  159. ret = regmap_write(dev->regmap[0], 0x0a, 0x1a);
  160. if (ret)
  161. goto err;
  162. ret = regmap_write(dev->regmap[0], 0x13, 0x1f);
  163. if (ret)
  164. goto err;
  165. ret = regmap_write(dev->regmap[0], 0x19, 0x03);
  166. if (ret)
  167. goto err;
  168. ret = regmap_write(dev->regmap[0], 0x1d, 0xb0);
  169. if (ret)
  170. goto err;
  171. ret = regmap_write(dev->regmap[0], 0x2a, 0x72);
  172. if (ret)
  173. goto err;
  174. ret = regmap_write(dev->regmap[0], 0x2d, 0x00);
  175. if (ret)
  176. goto err;
  177. ret = regmap_write(dev->regmap[0], 0x3c, 0x00);
  178. if (ret)
  179. goto err;
  180. ret = regmap_write(dev->regmap[0], 0x3f, 0xf8);
  181. if (ret)
  182. goto err;
  183. ret = regmap_bulk_write(dev->regmap[0], 0x40, "\xf4\x08", 2);
  184. if (ret)
  185. goto err;
  186. ret = regmap_write(dev->regmap[0], 0xd2, reg_bank0_d2_val);
  187. if (ret)
  188. goto err;
  189. ret = regmap_write(dev->regmap[0], 0xd4, 0x55);
  190. if (ret)
  191. goto err;
  192. ret = regmap_write(dev->regmap[1], 0xbe, 0x08);
  193. if (ret)
  194. goto err;
  195. ret = regmap_write(dev->regmap[0], 0xb2, 0x37);
  196. if (ret)
  197. goto err;
  198. ret = regmap_write(dev->regmap[0], 0xd7, 0x04);
  199. if (ret)
  200. goto err;
  201. /* PLP */
  202. if (c->delivery_system == SYS_DVBT2) {
  203. ret = regmap_write(dev->regmap[2], 0x36,
  204. (c->stream_id == NO_STREAM_ID_FILTER) ? 0 :
  205. c->stream_id );
  206. if (ret)
  207. goto err;
  208. }
  209. /* Reset FSM */
  210. ret = regmap_write(dev->regmap[2], 0xf8, 0x9f);
  211. if (ret)
  212. goto err;
  213. return 0;
  214. err:
  215. dev_dbg(&client->dev, "failed=%d\n", ret);
  216. return ret;
  217. }
  218. static int mn88473_read_status(struct dvb_frontend *fe, enum fe_status *status)
  219. {
  220. struct i2c_client *client = fe->demodulator_priv;
  221. struct mn88473_dev *dev = i2c_get_clientdata(client);
  222. struct dtv_frontend_properties *c = &fe->dtv_property_cache;
  223. int ret, i, stmp;
  224. unsigned int utmp, utmp1, utmp2;
  225. u8 buf[5];
  226. if (!dev->active) {
  227. ret = -EAGAIN;
  228. goto err;
  229. }
  230. /* Lock detection */
  231. switch (c->delivery_system) {
  232. case SYS_DVBT:
  233. ret = regmap_read(dev->regmap[0], 0x62, &utmp);
  234. if (ret)
  235. goto err;
  236. if (!(utmp & 0xa0)) {
  237. if ((utmp & 0x0f) >= 0x09)
  238. *status = FE_HAS_SIGNAL | FE_HAS_CARRIER |
  239. FE_HAS_VITERBI | FE_HAS_SYNC |
  240. FE_HAS_LOCK;
  241. else if ((utmp & 0x0f) >= 0x03)
  242. *status = FE_HAS_SIGNAL | FE_HAS_CARRIER;
  243. } else {
  244. *status = 0;
  245. }
  246. break;
  247. case SYS_DVBT2:
  248. ret = regmap_read(dev->regmap[2], 0x8b, &utmp);
  249. if (ret)
  250. goto err;
  251. if (!(utmp & 0x40)) {
  252. if ((utmp & 0x0f) >= 0x0d)
  253. *status = FE_HAS_SIGNAL | FE_HAS_CARRIER |
  254. FE_HAS_VITERBI | FE_HAS_SYNC |
  255. FE_HAS_LOCK;
  256. else if ((utmp & 0x0f) >= 0x0a)
  257. *status = FE_HAS_SIGNAL | FE_HAS_CARRIER |
  258. FE_HAS_VITERBI;
  259. else if ((utmp & 0x0f) >= 0x07)
  260. *status = FE_HAS_SIGNAL | FE_HAS_CARRIER;
  261. } else {
  262. *status = 0;
  263. }
  264. break;
  265. case SYS_DVBC_ANNEX_A:
  266. ret = regmap_read(dev->regmap[1], 0x85, &utmp);
  267. if (ret)
  268. goto err;
  269. if (!(utmp & 0x40)) {
  270. ret = regmap_read(dev->regmap[1], 0x89, &utmp);
  271. if (ret)
  272. goto err;
  273. if (utmp & 0x01)
  274. *status = FE_HAS_SIGNAL | FE_HAS_CARRIER |
  275. FE_HAS_VITERBI | FE_HAS_SYNC |
  276. FE_HAS_LOCK;
  277. } else {
  278. *status = 0;
  279. }
  280. break;
  281. default:
  282. ret = -EINVAL;
  283. goto err;
  284. }
  285. /* Signal strength */
  286. if (*status & FE_HAS_SIGNAL) {
  287. for (i = 0; i < 2; i++) {
  288. ret = regmap_bulk_read(dev->regmap[2], 0x86 + i,
  289. &buf[i], 1);
  290. if (ret)
  291. goto err;
  292. }
  293. /* AGCRD[15:6] gives us a 10bit value ([5:0] are always 0) */
  294. utmp1 = buf[0] << 8 | buf[1] << 0 | buf[0] >> 2;
  295. dev_dbg(&client->dev, "strength=%u\n", utmp1);
  296. c->strength.stat[0].scale = FE_SCALE_RELATIVE;
  297. c->strength.stat[0].uvalue = utmp1;
  298. } else {
  299. c->strength.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
  300. }
  301. /* CNR */
  302. if (*status & FE_HAS_VITERBI && c->delivery_system == SYS_DVBT) {
  303. /* DVB-T CNR */
  304. ret = regmap_bulk_read(dev->regmap[0], 0x8f, buf, 2);
  305. if (ret)
  306. goto err;
  307. utmp = buf[0] << 8 | buf[1] << 0;
  308. if (utmp) {
  309. /* CNR[dB]: 10 * (log10(65536 / value) + 0.2) */
  310. /* log10(65536) = 80807124, 0.2 = 3355443 */
  311. stmp = div_u64(((u64)80807124 - intlog10(utmp)
  312. + 3355443) * 10000, 1 << 24);
  313. dev_dbg(&client->dev, "cnr=%d value=%u\n", stmp, utmp);
  314. } else {
  315. stmp = 0;
  316. }
  317. c->cnr.stat[0].svalue = stmp;
  318. c->cnr.stat[0].scale = FE_SCALE_DECIBEL;
  319. } else if (*status & FE_HAS_VITERBI &&
  320. c->delivery_system == SYS_DVBT2) {
  321. /* DVB-T2 CNR */
  322. for (i = 0; i < 3; i++) {
  323. ret = regmap_bulk_read(dev->regmap[2], 0xb7 + i,
  324. &buf[i], 1);
  325. if (ret)
  326. goto err;
  327. }
  328. utmp = buf[1] << 8 | buf[2] << 0;
  329. utmp1 = (buf[0] >> 2) & 0x01; /* 0=SISO, 1=MISO */
  330. if (utmp) {
  331. if (utmp1) {
  332. /* CNR[dB]: 10 * (log10(16384 / value) - 0.6) */
  333. /* log10(16384) = 70706234, 0.6 = 10066330 */
  334. stmp = div_u64(((u64)70706234 - intlog10(utmp)
  335. - 10066330) * 10000, 1 << 24);
  336. dev_dbg(&client->dev, "cnr=%d value=%u MISO\n",
  337. stmp, utmp);
  338. } else {
  339. /* CNR[dB]: 10 * (log10(65536 / value) + 0.2) */
  340. /* log10(65536) = 80807124, 0.2 = 3355443 */
  341. stmp = div_u64(((u64)80807124 - intlog10(utmp)
  342. + 3355443) * 10000, 1 << 24);
  343. dev_dbg(&client->dev, "cnr=%d value=%u SISO\n",
  344. stmp, utmp);
  345. }
  346. } else {
  347. stmp = 0;
  348. }
  349. c->cnr.stat[0].svalue = stmp;
  350. c->cnr.stat[0].scale = FE_SCALE_DECIBEL;
  351. } else if (*status & FE_HAS_VITERBI &&
  352. c->delivery_system == SYS_DVBC_ANNEX_A) {
  353. /* DVB-C CNR */
  354. ret = regmap_bulk_read(dev->regmap[1], 0xa1, buf, 4);
  355. if (ret)
  356. goto err;
  357. utmp1 = buf[0] << 8 | buf[1] << 0; /* signal */
  358. utmp2 = buf[2] << 8 | buf[3] << 0; /* noise */
  359. if (utmp1 && utmp2) {
  360. /* CNR[dB]: 10 * log10(8 * (signal / noise)) */
  361. /* log10(8) = 15151336 */
  362. stmp = div_u64(((u64)15151336 + intlog10(utmp1)
  363. - intlog10(utmp2)) * 10000, 1 << 24);
  364. dev_dbg(&client->dev, "cnr=%d signal=%u noise=%u\n",
  365. stmp, utmp1, utmp2);
  366. } else {
  367. stmp = 0;
  368. }
  369. c->cnr.stat[0].svalue = stmp;
  370. c->cnr.stat[0].scale = FE_SCALE_DECIBEL;
  371. } else {
  372. c->cnr.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
  373. }
  374. /* BER */
  375. if (*status & FE_HAS_LOCK && (c->delivery_system == SYS_DVBT ||
  376. c->delivery_system == SYS_DVBC_ANNEX_A)) {
  377. /* DVB-T & DVB-C BER */
  378. ret = regmap_bulk_read(dev->regmap[0], 0x92, buf, 5);
  379. if (ret)
  380. goto err;
  381. utmp1 = buf[0] << 16 | buf[1] << 8 | buf[2] << 0;
  382. utmp2 = buf[3] << 8 | buf[4] << 0;
  383. utmp2 = utmp2 * 8 * 204;
  384. dev_dbg(&client->dev, "post_bit_error=%u post_bit_count=%u\n",
  385. utmp1, utmp2);
  386. c->post_bit_error.stat[0].scale = FE_SCALE_COUNTER;
  387. c->post_bit_error.stat[0].uvalue += utmp1;
  388. c->post_bit_count.stat[0].scale = FE_SCALE_COUNTER;
  389. c->post_bit_count.stat[0].uvalue += utmp2;
  390. } else {
  391. c->post_bit_error.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
  392. c->post_bit_count.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
  393. }
  394. /* PER */
  395. if (*status & FE_HAS_LOCK) {
  396. ret = regmap_bulk_read(dev->regmap[0], 0xdd, buf, 4);
  397. if (ret)
  398. goto err;
  399. utmp1 = buf[0] << 8 | buf[1] << 0;
  400. utmp2 = buf[2] << 8 | buf[3] << 0;
  401. dev_dbg(&client->dev, "block_error=%u block_count=%u\n",
  402. utmp1, utmp2);
  403. c->block_error.stat[0].scale = FE_SCALE_COUNTER;
  404. c->block_error.stat[0].uvalue += utmp1;
  405. c->block_count.stat[0].scale = FE_SCALE_COUNTER;
  406. c->block_count.stat[0].uvalue += utmp2;
  407. } else {
  408. c->block_error.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
  409. c->block_count.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
  410. }
  411. return 0;
  412. err:
  413. dev_dbg(&client->dev, "failed=%d\n", ret);
  414. return ret;
  415. }
  416. static int mn88473_init(struct dvb_frontend *fe)
  417. {
  418. struct i2c_client *client = fe->demodulator_priv;
  419. struct mn88473_dev *dev = i2c_get_clientdata(client);
  420. struct dtv_frontend_properties *c = &fe->dtv_property_cache;
  421. int ret, len, remain;
  422. unsigned int uitmp;
  423. const struct firmware *fw;
  424. const char *name = MN88473_FIRMWARE;
  425. dev_dbg(&client->dev, "\n");
  426. /* Check if firmware is already running */
  427. ret = regmap_read(dev->regmap[0], 0xf5, &uitmp);
  428. if (ret)
  429. goto err;
  430. if (!(uitmp & 0x01))
  431. goto warm;
  432. /* Request the firmware, this will block and timeout */
  433. ret = request_firmware(&fw, name, &client->dev);
  434. if (ret) {
  435. dev_err(&client->dev, "firmware file '%s' not found\n", name);
  436. goto err;
  437. }
  438. dev_info(&client->dev, "downloading firmware from file '%s'\n", name);
  439. ret = regmap_write(dev->regmap[0], 0xf5, 0x03);
  440. if (ret)
  441. goto err_release_firmware;
  442. for (remain = fw->size; remain > 0; remain -= (dev->i2c_wr_max - 1)) {
  443. len = min(dev->i2c_wr_max - 1, remain);
  444. ret = regmap_bulk_write(dev->regmap[0], 0xf6,
  445. &fw->data[fw->size - remain], len);
  446. if (ret) {
  447. dev_err(&client->dev, "firmware download failed %d\n",
  448. ret);
  449. goto err_release_firmware;
  450. }
  451. }
  452. release_firmware(fw);
  453. /* Parity check of firmware */
  454. ret = regmap_read(dev->regmap[0], 0xf8, &uitmp);
  455. if (ret)
  456. goto err;
  457. if (uitmp & 0x10) {
  458. dev_err(&client->dev, "firmware parity check failed\n");
  459. ret = -EINVAL;
  460. goto err;
  461. }
  462. ret = regmap_write(dev->regmap[0], 0xf5, 0x00);
  463. if (ret)
  464. goto err;
  465. warm:
  466. /* TS config */
  467. ret = regmap_write(dev->regmap[2], 0x09, 0x08);
  468. if (ret)
  469. goto err;
  470. ret = regmap_write(dev->regmap[2], 0x08, 0x1d);
  471. if (ret)
  472. goto err;
  473. dev->active = true;
  474. /* init stats here to indicate which stats are supported */
  475. c->strength.len = 1;
  476. c->strength.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
  477. c->cnr.len = 1;
  478. c->cnr.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
  479. c->post_bit_error.len = 1;
  480. c->post_bit_error.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
  481. c->post_bit_count.len = 1;
  482. c->post_bit_count.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
  483. c->block_error.len = 1;
  484. c->block_error.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
  485. c->block_count.len = 1;
  486. c->block_count.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
  487. return 0;
  488. err_release_firmware:
  489. release_firmware(fw);
  490. err:
  491. dev_dbg(&client->dev, "failed=%d\n", ret);
  492. return ret;
  493. }
  494. static int mn88473_sleep(struct dvb_frontend *fe)
  495. {
  496. struct i2c_client *client = fe->demodulator_priv;
  497. struct mn88473_dev *dev = i2c_get_clientdata(client);
  498. int ret;
  499. dev_dbg(&client->dev, "\n");
  500. dev->active = false;
  501. ret = regmap_write(dev->regmap[2], 0x05, 0x3e);
  502. if (ret)
  503. goto err;
  504. return 0;
  505. err:
  506. dev_dbg(&client->dev, "failed=%d\n", ret);
  507. return ret;
  508. }
  509. static const struct dvb_frontend_ops mn88473_ops = {
  510. .delsys = {SYS_DVBT, SYS_DVBT2, SYS_DVBC_ANNEX_A},
  511. .info = {
  512. .name = "Panasonic MN88473",
  513. .symbol_rate_min = 1000000,
  514. .symbol_rate_max = 7200000,
  515. .caps = FE_CAN_FEC_1_2 |
  516. FE_CAN_FEC_2_3 |
  517. FE_CAN_FEC_3_4 |
  518. FE_CAN_FEC_5_6 |
  519. FE_CAN_FEC_7_8 |
  520. FE_CAN_FEC_AUTO |
  521. FE_CAN_QPSK |
  522. FE_CAN_QAM_16 |
  523. FE_CAN_QAM_32 |
  524. FE_CAN_QAM_64 |
  525. FE_CAN_QAM_128 |
  526. FE_CAN_QAM_256 |
  527. FE_CAN_QAM_AUTO |
  528. FE_CAN_TRANSMISSION_MODE_AUTO |
  529. FE_CAN_GUARD_INTERVAL_AUTO |
  530. FE_CAN_HIERARCHY_AUTO |
  531. FE_CAN_MUTE_TS |
  532. FE_CAN_2G_MODULATION |
  533. FE_CAN_MULTISTREAM
  534. },
  535. .get_tune_settings = mn88473_get_tune_settings,
  536. .init = mn88473_init,
  537. .sleep = mn88473_sleep,
  538. .set_frontend = mn88473_set_frontend,
  539. .read_status = mn88473_read_status,
  540. };
  541. static int mn88473_probe(struct i2c_client *client,
  542. const struct i2c_device_id *id)
  543. {
  544. struct mn88473_config *config = client->dev.platform_data;
  545. struct mn88473_dev *dev;
  546. int ret;
  547. unsigned int uitmp;
  548. static const struct regmap_config regmap_config = {
  549. .reg_bits = 8,
  550. .val_bits = 8,
  551. };
  552. dev_dbg(&client->dev, "\n");
  553. /* Caller really need to provide pointer for frontend we create */
  554. if (config->fe == NULL) {
  555. dev_err(&client->dev, "frontend pointer not defined\n");
  556. ret = -EINVAL;
  557. goto err;
  558. }
  559. dev = kzalloc(sizeof(*dev), GFP_KERNEL);
  560. if (dev == NULL) {
  561. ret = -ENOMEM;
  562. goto err;
  563. }
  564. if (config->i2c_wr_max)
  565. dev->i2c_wr_max = config->i2c_wr_max;
  566. else
  567. dev->i2c_wr_max = ~0;
  568. if (config->xtal)
  569. dev->clk = config->xtal;
  570. else
  571. dev->clk = 25000000;
  572. dev->client[0] = client;
  573. dev->regmap[0] = regmap_init_i2c(dev->client[0], &regmap_config);
  574. if (IS_ERR(dev->regmap[0])) {
  575. ret = PTR_ERR(dev->regmap[0]);
  576. goto err_kfree;
  577. }
  578. /*
  579. * Chip has three I2C addresses for different register banks. Used
  580. * addresses are 0x18, 0x1a and 0x1c. We register two dummy clients,
  581. * 0x1a and 0x1c, in order to get own I2C client for each register bank.
  582. *
  583. * Also, register bank 2 do not support sequential I/O. Only single
  584. * register write or read is allowed to that bank.
  585. */
  586. dev->client[1] = i2c_new_dummy_device(client->adapter, 0x1a);
  587. if (IS_ERR(dev->client[1])) {
  588. ret = PTR_ERR(dev->client[1]);
  589. dev_err(&client->dev, "I2C registration failed\n");
  590. goto err_regmap_0_regmap_exit;
  591. }
  592. dev->regmap[1] = regmap_init_i2c(dev->client[1], &regmap_config);
  593. if (IS_ERR(dev->regmap[1])) {
  594. ret = PTR_ERR(dev->regmap[1]);
  595. goto err_client_1_i2c_unregister_device;
  596. }
  597. i2c_set_clientdata(dev->client[1], dev);
  598. dev->client[2] = i2c_new_dummy_device(client->adapter, 0x1c);
  599. if (IS_ERR(dev->client[2])) {
  600. ret = PTR_ERR(dev->client[2]);
  601. dev_err(&client->dev, "2nd I2C registration failed\n");
  602. goto err_regmap_1_regmap_exit;
  603. }
  604. dev->regmap[2] = regmap_init_i2c(dev->client[2], &regmap_config);
  605. if (IS_ERR(dev->regmap[2])) {
  606. ret = PTR_ERR(dev->regmap[2]);
  607. goto err_client_2_i2c_unregister_device;
  608. }
  609. i2c_set_clientdata(dev->client[2], dev);
  610. /* Check demod answers with correct chip id */
  611. ret = regmap_read(dev->regmap[2], 0xff, &uitmp);
  612. if (ret)
  613. goto err_regmap_2_regmap_exit;
  614. dev_dbg(&client->dev, "chip id=%02x\n", uitmp);
  615. if (uitmp != 0x03) {
  616. ret = -ENODEV;
  617. goto err_regmap_2_regmap_exit;
  618. }
  619. /* Sleep because chip is active by default */
  620. ret = regmap_write(dev->regmap[2], 0x05, 0x3e);
  621. if (ret)
  622. goto err_regmap_2_regmap_exit;
  623. /* Create dvb frontend */
  624. memcpy(&dev->frontend.ops, &mn88473_ops, sizeof(dev->frontend.ops));
  625. dev->frontend.demodulator_priv = client;
  626. *config->fe = &dev->frontend;
  627. i2c_set_clientdata(client, dev);
  628. dev_info(&client->dev, "Panasonic MN88473 successfully identified\n");
  629. return 0;
  630. err_regmap_2_regmap_exit:
  631. regmap_exit(dev->regmap[2]);
  632. err_client_2_i2c_unregister_device:
  633. i2c_unregister_device(dev->client[2]);
  634. err_regmap_1_regmap_exit:
  635. regmap_exit(dev->regmap[1]);
  636. err_client_1_i2c_unregister_device:
  637. i2c_unregister_device(dev->client[1]);
  638. err_regmap_0_regmap_exit:
  639. regmap_exit(dev->regmap[0]);
  640. err_kfree:
  641. kfree(dev);
  642. err:
  643. dev_dbg(&client->dev, "failed=%d\n", ret);
  644. return ret;
  645. }
  646. static int mn88473_remove(struct i2c_client *client)
  647. {
  648. struct mn88473_dev *dev = i2c_get_clientdata(client);
  649. dev_dbg(&client->dev, "\n");
  650. regmap_exit(dev->regmap[2]);
  651. i2c_unregister_device(dev->client[2]);
  652. regmap_exit(dev->regmap[1]);
  653. i2c_unregister_device(dev->client[1]);
  654. regmap_exit(dev->regmap[0]);
  655. kfree(dev);
  656. return 0;
  657. }
  658. static const struct i2c_device_id mn88473_id_table[] = {
  659. {"mn88473", 0},
  660. {}
  661. };
  662. MODULE_DEVICE_TABLE(i2c, mn88473_id_table);
  663. static struct i2c_driver mn88473_driver = {
  664. .driver = {
  665. .name = "mn88473",
  666. .suppress_bind_attrs = true,
  667. },
  668. .probe = mn88473_probe,
  669. .remove = mn88473_remove,
  670. .id_table = mn88473_id_table,
  671. };
  672. module_i2c_driver(mn88473_driver);
  673. MODULE_AUTHOR("Antti Palosaari <crope@iki.fi>");
  674. MODULE_DESCRIPTION("Panasonic MN88473 DVB-T/T2/C demodulator driver");
  675. MODULE_LICENSE("GPL");
  676. MODULE_FIRMWARE(MN88473_FIRMWARE);