mtk-platform.h 6.1 KB

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  1. /* SPDX-License-Identifier: GPL-2.0-only */
  2. /*
  3. * Driver for EIP97 cryptographic accelerator.
  4. *
  5. * Copyright (c) 2016 Ryder Lee <ryder.lee@mediatek.com>
  6. */
  7. #ifndef __MTK_PLATFORM_H_
  8. #define __MTK_PLATFORM_H_
  9. #include <crypto/algapi.h>
  10. #include <crypto/internal/aead.h>
  11. #include <crypto/internal/hash.h>
  12. #include <crypto/scatterwalk.h>
  13. #include <crypto/skcipher.h>
  14. #include <linux/crypto.h>
  15. #include <linux/dma-mapping.h>
  16. #include <linux/interrupt.h>
  17. #include <linux/scatterlist.h>
  18. #include "mtk-regs.h"
  19. #define MTK_RDR_PROC_THRESH BIT(0)
  20. #define MTK_RDR_PROC_MODE BIT(23)
  21. #define MTK_CNT_RST BIT(31)
  22. #define MTK_IRQ_RDR0 BIT(1)
  23. #define MTK_IRQ_RDR1 BIT(3)
  24. #define MTK_IRQ_RDR2 BIT(5)
  25. #define MTK_IRQ_RDR3 BIT(7)
  26. #define SIZE_IN_WORDS(x) ((x) >> 2)
  27. /**
  28. * Ring 0/1 are used by AES encrypt and decrypt.
  29. * Ring 2/3 are used by SHA.
  30. */
  31. enum {
  32. MTK_RING0,
  33. MTK_RING1,
  34. MTK_RING2,
  35. MTK_RING3,
  36. MTK_RING_MAX
  37. };
  38. #define MTK_REC_NUM (MTK_RING_MAX / 2)
  39. #define MTK_IRQ_NUM 5
  40. /**
  41. * struct mtk_desc - DMA descriptor
  42. * @hdr: the descriptor control header
  43. * @buf: DMA address of input buffer segment
  44. * @ct: DMA address of command token that control operation flow
  45. * @ct_hdr: the command token control header
  46. * @tag: the user-defined field
  47. * @tfm: DMA address of transform state
  48. * @bound: align descriptors offset boundary
  49. *
  50. * Structure passed to the crypto engine to describe where source
  51. * data needs to be fetched and how it needs to be processed.
  52. */
  53. struct mtk_desc {
  54. __le32 hdr;
  55. __le32 buf;
  56. __le32 ct;
  57. __le32 ct_hdr;
  58. __le32 tag;
  59. __le32 tfm;
  60. __le32 bound[2];
  61. };
  62. #define MTK_DESC_NUM 512
  63. #define MTK_DESC_OFF SIZE_IN_WORDS(sizeof(struct mtk_desc))
  64. #define MTK_DESC_SZ (MTK_DESC_OFF - 2)
  65. #define MTK_DESC_RING_SZ ((sizeof(struct mtk_desc) * MTK_DESC_NUM))
  66. #define MTK_DESC_CNT(x) ((MTK_DESC_OFF * (x)) << 2)
  67. #define MTK_DESC_LAST cpu_to_le32(BIT(22))
  68. #define MTK_DESC_FIRST cpu_to_le32(BIT(23))
  69. #define MTK_DESC_BUF_LEN(x) cpu_to_le32(x)
  70. #define MTK_DESC_CT_LEN(x) cpu_to_le32((x) << 24)
  71. /**
  72. * struct mtk_ring - Descriptor ring
  73. * @cmd_base: pointer to command descriptor ring base
  74. * @cmd_next: pointer to the next command descriptor
  75. * @cmd_dma: DMA address of command descriptor ring
  76. * @res_base: pointer to result descriptor ring base
  77. * @res_next: pointer to the next result descriptor
  78. * @res_prev: pointer to the previous result descriptor
  79. * @res_dma: DMA address of result descriptor ring
  80. *
  81. * A descriptor ring is a circular buffer that is used to manage
  82. * one or more descriptors. There are two type of descriptor rings;
  83. * the command descriptor ring and result descriptor ring.
  84. */
  85. struct mtk_ring {
  86. struct mtk_desc *cmd_base;
  87. struct mtk_desc *cmd_next;
  88. dma_addr_t cmd_dma;
  89. struct mtk_desc *res_base;
  90. struct mtk_desc *res_next;
  91. struct mtk_desc *res_prev;
  92. dma_addr_t res_dma;
  93. };
  94. /**
  95. * struct mtk_aes_dma - Structure that holds sg list info
  96. * @sg: pointer to scatter-gather list
  97. * @nents: number of entries in the sg list
  98. * @remainder: remainder of sg list
  99. * @sg_len: number of entries in the sg mapped list
  100. */
  101. struct mtk_aes_dma {
  102. struct scatterlist *sg;
  103. int nents;
  104. u32 remainder;
  105. u32 sg_len;
  106. };
  107. struct mtk_aes_base_ctx;
  108. struct mtk_aes_rec;
  109. struct mtk_cryp;
  110. typedef int (*mtk_aes_fn)(struct mtk_cryp *cryp, struct mtk_aes_rec *aes);
  111. /**
  112. * struct mtk_aes_rec - AES operation record
  113. * @cryp: pointer to Cryptographic device
  114. * @queue: crypto request queue
  115. * @areq: pointer to async request
  116. * @done_task: the tasklet is use in AES interrupt
  117. * @queue_task: the tasklet is used to dequeue request
  118. * @ctx: pointer to current context
  119. * @src: the structure that holds source sg list info
  120. * @dst: the structure that holds destination sg list info
  121. * @aligned_sg: the scatter list is use to alignment
  122. * @real_dst: pointer to the destination sg list
  123. * @resume: pointer to resume function
  124. * @total: request buffer length
  125. * @buf: pointer to page buffer
  126. * @id: the current use of ring
  127. * @flags: it's describing AES operation state
  128. * @lock: the async queue lock
  129. *
  130. * Structure used to record AES execution state.
  131. */
  132. struct mtk_aes_rec {
  133. struct mtk_cryp *cryp;
  134. struct crypto_queue queue;
  135. struct crypto_async_request *areq;
  136. struct tasklet_struct done_task;
  137. struct tasklet_struct queue_task;
  138. struct mtk_aes_base_ctx *ctx;
  139. struct mtk_aes_dma src;
  140. struct mtk_aes_dma dst;
  141. struct scatterlist aligned_sg;
  142. struct scatterlist *real_dst;
  143. mtk_aes_fn resume;
  144. size_t total;
  145. void *buf;
  146. u8 id;
  147. unsigned long flags;
  148. /* queue lock */
  149. spinlock_t lock;
  150. };
  151. /**
  152. * struct mtk_sha_rec - SHA operation record
  153. * @cryp: pointer to Cryptographic device
  154. * @queue: crypto request queue
  155. * @req: pointer to ahash request
  156. * @done_task: the tasklet is use in SHA interrupt
  157. * @queue_task: the tasklet is used to dequeue request
  158. * @id: the current use of ring
  159. * @flags: it's describing SHA operation state
  160. * @lock: the async queue lock
  161. *
  162. * Structure used to record SHA execution state.
  163. */
  164. struct mtk_sha_rec {
  165. struct mtk_cryp *cryp;
  166. struct crypto_queue queue;
  167. struct ahash_request *req;
  168. struct tasklet_struct done_task;
  169. struct tasklet_struct queue_task;
  170. u8 id;
  171. unsigned long flags;
  172. /* queue lock */
  173. spinlock_t lock;
  174. };
  175. /**
  176. * struct mtk_cryp - Cryptographic device
  177. * @base: pointer to mapped register I/O base
  178. * @dev: pointer to device
  179. * @clk_cryp: pointer to crypto clock
  180. * @irq: global system and rings IRQ
  181. * @ring: pointer to descriptor rings
  182. * @aes: pointer to operation record of AES
  183. * @sha: pointer to operation record of SHA
  184. * @aes_list: device list of AES
  185. * @sha_list: device list of SHA
  186. * @rec: it's used to select SHA record for tfm
  187. *
  188. * Structure storing cryptographic device information.
  189. */
  190. struct mtk_cryp {
  191. void __iomem *base;
  192. struct device *dev;
  193. struct clk *clk_cryp;
  194. int irq[MTK_IRQ_NUM];
  195. struct mtk_ring *ring[MTK_RING_MAX];
  196. struct mtk_aes_rec *aes[MTK_REC_NUM];
  197. struct mtk_sha_rec *sha[MTK_REC_NUM];
  198. struct list_head aes_list;
  199. struct list_head sha_list;
  200. bool rec;
  201. };
  202. int mtk_cipher_alg_register(struct mtk_cryp *cryp);
  203. void mtk_cipher_alg_release(struct mtk_cryp *cryp);
  204. int mtk_hash_alg_register(struct mtk_cryp *cryp);
  205. void mtk_hash_alg_release(struct mtk_cryp *cryp);
  206. #endif /* __MTK_PLATFORM_H_ */