ftm-quaddec.c 8.5 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351
  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Flex Timer Module Quadrature decoder
  4. *
  5. * This module implements a driver for decoding the FTM quadrature
  6. * of ex. a LS1021A
  7. */
  8. #include <linux/fsl/ftm.h>
  9. #include <linux/module.h>
  10. #include <linux/platform_device.h>
  11. #include <linux/of.h>
  12. #include <linux/io.h>
  13. #include <linux/mutex.h>
  14. #include <linux/counter.h>
  15. #include <linux/bitfield.h>
  16. #define FTM_FIELD_UPDATE(ftm, offset, mask, val) \
  17. ({ \
  18. uint32_t flags; \
  19. ftm_read(ftm, offset, &flags); \
  20. flags &= ~mask; \
  21. flags |= FIELD_PREP(mask, val); \
  22. ftm_write(ftm, offset, flags); \
  23. })
  24. struct ftm_quaddec {
  25. struct counter_device counter;
  26. struct platform_device *pdev;
  27. void __iomem *ftm_base;
  28. bool big_endian;
  29. struct mutex ftm_quaddec_mutex;
  30. };
  31. static void ftm_read(struct ftm_quaddec *ftm, uint32_t offset, uint32_t *data)
  32. {
  33. if (ftm->big_endian)
  34. *data = ioread32be(ftm->ftm_base + offset);
  35. else
  36. *data = ioread32(ftm->ftm_base + offset);
  37. }
  38. static void ftm_write(struct ftm_quaddec *ftm, uint32_t offset, uint32_t data)
  39. {
  40. if (ftm->big_endian)
  41. iowrite32be(data, ftm->ftm_base + offset);
  42. else
  43. iowrite32(data, ftm->ftm_base + offset);
  44. }
  45. /* Hold mutex before modifying write protection state */
  46. static void ftm_clear_write_protection(struct ftm_quaddec *ftm)
  47. {
  48. uint32_t flag;
  49. /* First see if it is enabled */
  50. ftm_read(ftm, FTM_FMS, &flag);
  51. if (flag & FTM_FMS_WPEN)
  52. FTM_FIELD_UPDATE(ftm, FTM_MODE, FTM_MODE_WPDIS, 1);
  53. }
  54. static void ftm_set_write_protection(struct ftm_quaddec *ftm)
  55. {
  56. FTM_FIELD_UPDATE(ftm, FTM_FMS, FTM_FMS_WPEN, 1);
  57. }
  58. static void ftm_reset_counter(struct ftm_quaddec *ftm)
  59. {
  60. /* Reset hardware counter to CNTIN */
  61. ftm_write(ftm, FTM_CNT, 0x0);
  62. }
  63. static void ftm_quaddec_init(struct ftm_quaddec *ftm)
  64. {
  65. ftm_clear_write_protection(ftm);
  66. /*
  67. * Do not write in the region from the CNTIN register through the
  68. * PWMLOAD register when FTMEN = 0.
  69. * Also reset other fields to zero
  70. */
  71. ftm_write(ftm, FTM_MODE, FTM_MODE_FTMEN);
  72. ftm_write(ftm, FTM_CNTIN, 0x0000);
  73. ftm_write(ftm, FTM_MOD, 0xffff);
  74. ftm_write(ftm, FTM_CNT, 0x0);
  75. /* Set prescaler, reset other fields to zero */
  76. ftm_write(ftm, FTM_SC, FTM_SC_PS_1);
  77. /* Select quad mode, reset other fields to zero */
  78. ftm_write(ftm, FTM_QDCTRL, FTM_QDCTRL_QUADEN);
  79. /* Unused features and reset to default section */
  80. ftm_write(ftm, FTM_POL, 0x0);
  81. ftm_write(ftm, FTM_FLTCTRL, 0x0);
  82. ftm_write(ftm, FTM_SYNCONF, 0x0);
  83. ftm_write(ftm, FTM_SYNC, 0xffff);
  84. /* Lock the FTM */
  85. ftm_set_write_protection(ftm);
  86. }
  87. static void ftm_quaddec_disable(void *ftm)
  88. {
  89. struct ftm_quaddec *ftm_qua = ftm;
  90. ftm_clear_write_protection(ftm_qua);
  91. ftm_write(ftm_qua, FTM_MODE, 0);
  92. ftm_write(ftm_qua, FTM_QDCTRL, 0);
  93. /*
  94. * This is enough to disable the counter. No clock has been
  95. * selected by writing to FTM_SC in init()
  96. */
  97. ftm_set_write_protection(ftm_qua);
  98. }
  99. static int ftm_quaddec_get_prescaler(struct counter_device *counter,
  100. struct counter_count *count,
  101. size_t *cnt_mode)
  102. {
  103. struct ftm_quaddec *ftm = counter->priv;
  104. uint32_t scflags;
  105. ftm_read(ftm, FTM_SC, &scflags);
  106. *cnt_mode = FIELD_GET(FTM_SC_PS_MASK, scflags);
  107. return 0;
  108. }
  109. static int ftm_quaddec_set_prescaler(struct counter_device *counter,
  110. struct counter_count *count,
  111. size_t cnt_mode)
  112. {
  113. struct ftm_quaddec *ftm = counter->priv;
  114. mutex_lock(&ftm->ftm_quaddec_mutex);
  115. ftm_clear_write_protection(ftm);
  116. FTM_FIELD_UPDATE(ftm, FTM_SC, FTM_SC_PS_MASK, cnt_mode);
  117. ftm_set_write_protection(ftm);
  118. /* Also resets the counter as it is undefined anyway now */
  119. ftm_reset_counter(ftm);
  120. mutex_unlock(&ftm->ftm_quaddec_mutex);
  121. return 0;
  122. }
  123. static const char * const ftm_quaddec_prescaler[] = {
  124. "1", "2", "4", "8", "16", "32", "64", "128"
  125. };
  126. static struct counter_count_enum_ext ftm_quaddec_prescaler_enum = {
  127. .items = ftm_quaddec_prescaler,
  128. .num_items = ARRAY_SIZE(ftm_quaddec_prescaler),
  129. .get = ftm_quaddec_get_prescaler,
  130. .set = ftm_quaddec_set_prescaler
  131. };
  132. enum ftm_quaddec_synapse_action {
  133. FTM_QUADDEC_SYNAPSE_ACTION_BOTH_EDGES,
  134. };
  135. static enum counter_synapse_action ftm_quaddec_synapse_actions[] = {
  136. [FTM_QUADDEC_SYNAPSE_ACTION_BOTH_EDGES] =
  137. COUNTER_SYNAPSE_ACTION_BOTH_EDGES
  138. };
  139. enum ftm_quaddec_count_function {
  140. FTM_QUADDEC_COUNT_ENCODER_MODE_1,
  141. };
  142. static const enum counter_count_function ftm_quaddec_count_functions[] = {
  143. [FTM_QUADDEC_COUNT_ENCODER_MODE_1] =
  144. COUNTER_COUNT_FUNCTION_QUADRATURE_X4
  145. };
  146. static int ftm_quaddec_count_read(struct counter_device *counter,
  147. struct counter_count *count,
  148. struct counter_count_read_value *val)
  149. {
  150. struct ftm_quaddec *const ftm = counter->priv;
  151. uint32_t cntval;
  152. ftm_read(ftm, FTM_CNT, &cntval);
  153. counter_count_read_value_set(val, COUNTER_COUNT_POSITION, &cntval);
  154. return 0;
  155. }
  156. static int ftm_quaddec_count_write(struct counter_device *counter,
  157. struct counter_count *count,
  158. struct counter_count_write_value *val)
  159. {
  160. struct ftm_quaddec *const ftm = counter->priv;
  161. u32 cnt;
  162. int err;
  163. err = counter_count_write_value_get(&cnt, COUNTER_COUNT_POSITION, val);
  164. if (err)
  165. return err;
  166. if (cnt != 0) {
  167. dev_warn(&ftm->pdev->dev, "Can only accept '0' as new counter value\n");
  168. return -EINVAL;
  169. }
  170. ftm_reset_counter(ftm);
  171. return 0;
  172. }
  173. static int ftm_quaddec_count_function_get(struct counter_device *counter,
  174. struct counter_count *count,
  175. size_t *function)
  176. {
  177. *function = FTM_QUADDEC_COUNT_ENCODER_MODE_1;
  178. return 0;
  179. }
  180. static int ftm_quaddec_action_get(struct counter_device *counter,
  181. struct counter_count *count,
  182. struct counter_synapse *synapse,
  183. size_t *action)
  184. {
  185. *action = FTM_QUADDEC_SYNAPSE_ACTION_BOTH_EDGES;
  186. return 0;
  187. }
  188. static const struct counter_ops ftm_quaddec_cnt_ops = {
  189. .count_read = ftm_quaddec_count_read,
  190. .count_write = ftm_quaddec_count_write,
  191. .function_get = ftm_quaddec_count_function_get,
  192. .action_get = ftm_quaddec_action_get,
  193. };
  194. static struct counter_signal ftm_quaddec_signals[] = {
  195. {
  196. .id = 0,
  197. .name = "Channel 1 Phase A"
  198. },
  199. {
  200. .id = 1,
  201. .name = "Channel 1 Phase B"
  202. }
  203. };
  204. static struct counter_synapse ftm_quaddec_count_synapses[] = {
  205. {
  206. .actions_list = ftm_quaddec_synapse_actions,
  207. .num_actions = ARRAY_SIZE(ftm_quaddec_synapse_actions),
  208. .signal = &ftm_quaddec_signals[0]
  209. },
  210. {
  211. .actions_list = ftm_quaddec_synapse_actions,
  212. .num_actions = ARRAY_SIZE(ftm_quaddec_synapse_actions),
  213. .signal = &ftm_quaddec_signals[1]
  214. }
  215. };
  216. static const struct counter_count_ext ftm_quaddec_count_ext[] = {
  217. COUNTER_COUNT_ENUM("prescaler", &ftm_quaddec_prescaler_enum),
  218. COUNTER_COUNT_ENUM_AVAILABLE("prescaler", &ftm_quaddec_prescaler_enum),
  219. };
  220. static struct counter_count ftm_quaddec_counts = {
  221. .id = 0,
  222. .name = "Channel 1 Count",
  223. .functions_list = ftm_quaddec_count_functions,
  224. .num_functions = ARRAY_SIZE(ftm_quaddec_count_functions),
  225. .synapses = ftm_quaddec_count_synapses,
  226. .num_synapses = ARRAY_SIZE(ftm_quaddec_count_synapses),
  227. .ext = ftm_quaddec_count_ext,
  228. .num_ext = ARRAY_SIZE(ftm_quaddec_count_ext)
  229. };
  230. static int ftm_quaddec_probe(struct platform_device *pdev)
  231. {
  232. struct ftm_quaddec *ftm;
  233. struct device_node *node = pdev->dev.of_node;
  234. struct resource *io;
  235. int ret;
  236. ftm = devm_kzalloc(&pdev->dev, sizeof(*ftm), GFP_KERNEL);
  237. if (!ftm)
  238. return -ENOMEM;
  239. platform_set_drvdata(pdev, ftm);
  240. io = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  241. if (!io) {
  242. dev_err(&pdev->dev, "Failed to get memory region\n");
  243. return -ENODEV;
  244. }
  245. ftm->pdev = pdev;
  246. ftm->big_endian = of_property_read_bool(node, "big-endian");
  247. ftm->ftm_base = devm_ioremap(&pdev->dev, io->start, resource_size(io));
  248. if (!ftm->ftm_base) {
  249. dev_err(&pdev->dev, "Failed to map memory region\n");
  250. return -EINVAL;
  251. }
  252. ftm->counter.name = dev_name(&pdev->dev);
  253. ftm->counter.parent = &pdev->dev;
  254. ftm->counter.ops = &ftm_quaddec_cnt_ops;
  255. ftm->counter.counts = &ftm_quaddec_counts;
  256. ftm->counter.num_counts = 1;
  257. ftm->counter.signals = ftm_quaddec_signals;
  258. ftm->counter.num_signals = ARRAY_SIZE(ftm_quaddec_signals);
  259. ftm->counter.priv = ftm;
  260. mutex_init(&ftm->ftm_quaddec_mutex);
  261. ftm_quaddec_init(ftm);
  262. ret = devm_add_action_or_reset(&pdev->dev, ftm_quaddec_disable, ftm);
  263. if (ret)
  264. return ret;
  265. ret = devm_counter_register(&pdev->dev, &ftm->counter);
  266. if (ret)
  267. return ret;
  268. return 0;
  269. }
  270. static const struct of_device_id ftm_quaddec_match[] = {
  271. { .compatible = "fsl,ftm-quaddec" },
  272. {},
  273. };
  274. static struct platform_driver ftm_quaddec_driver = {
  275. .driver = {
  276. .name = "ftm-quaddec",
  277. .of_match_table = ftm_quaddec_match,
  278. },
  279. .probe = ftm_quaddec_probe,
  280. };
  281. module_platform_driver(ftm_quaddec_driver);
  282. MODULE_LICENSE("GPL");
  283. MODULE_AUTHOR("Kjeld Flarup <kfa@deif.com>");
  284. MODULE_AUTHOR("Patrick Havelange <patrick.havelange@essensium.com>");