omap_l3_smx.c 7.1 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * OMAP3XXX L3 Interconnect Driver
  4. *
  5. * Copyright (C) 2011 Texas Corporation
  6. * Felipe Balbi <balbi@ti.com>
  7. * Santosh Shilimkar <santosh.shilimkar@ti.com>
  8. * Sricharan <r.sricharan@ti.com>
  9. */
  10. #include <linux/kernel.h>
  11. #include <linux/slab.h>
  12. #include <linux/platform_device.h>
  13. #include <linux/interrupt.h>
  14. #include <linux/io.h>
  15. #include <linux/module.h>
  16. #include <linux/of.h>
  17. #include <linux/of_device.h>
  18. #include "omap_l3_smx.h"
  19. static inline u64 omap3_l3_readll(void __iomem *base, u16 reg)
  20. {
  21. return __raw_readll(base + reg);
  22. }
  23. static inline void omap3_l3_writell(void __iomem *base, u16 reg, u64 value)
  24. {
  25. __raw_writell(value, base + reg);
  26. }
  27. static inline enum omap3_l3_code omap3_l3_decode_error_code(u64 error)
  28. {
  29. return (error & 0x0f000000) >> L3_ERROR_LOG_CODE;
  30. }
  31. static inline u32 omap3_l3_decode_addr(u64 error_addr)
  32. {
  33. return error_addr & 0xffffffff;
  34. }
  35. static inline unsigned omap3_l3_decode_cmd(u64 error)
  36. {
  37. return (error & 0x07) >> L3_ERROR_LOG_CMD;
  38. }
  39. static inline enum omap3_l3_initiator_id omap3_l3_decode_initid(u64 error)
  40. {
  41. return (error & 0xff00) >> L3_ERROR_LOG_INITID;
  42. }
  43. static inline unsigned omap3_l3_decode_req_info(u64 error)
  44. {
  45. return (error >> 32) & 0xffff;
  46. }
  47. static char *omap3_l3_code_string(u8 code)
  48. {
  49. switch (code) {
  50. case OMAP_L3_CODE_NOERROR:
  51. return "No Error";
  52. case OMAP_L3_CODE_UNSUP_CMD:
  53. return "Unsupported Command";
  54. case OMAP_L3_CODE_ADDR_HOLE:
  55. return "Address Hole";
  56. case OMAP_L3_CODE_PROTECT_VIOLATION:
  57. return "Protection Violation";
  58. case OMAP_L3_CODE_IN_BAND_ERR:
  59. return "In-band Error";
  60. case OMAP_L3_CODE_REQ_TOUT_NOT_ACCEPT:
  61. return "Request Timeout Not Accepted";
  62. case OMAP_L3_CODE_REQ_TOUT_NO_RESP:
  63. return "Request Timeout, no response";
  64. default:
  65. return "UNKNOWN error";
  66. }
  67. }
  68. static char *omap3_l3_initiator_string(u8 initid)
  69. {
  70. switch (initid) {
  71. case OMAP_L3_LCD:
  72. return "LCD";
  73. case OMAP_L3_SAD2D:
  74. return "SAD2D";
  75. case OMAP_L3_IA_MPU_SS_1:
  76. case OMAP_L3_IA_MPU_SS_2:
  77. case OMAP_L3_IA_MPU_SS_3:
  78. case OMAP_L3_IA_MPU_SS_4:
  79. case OMAP_L3_IA_MPU_SS_5:
  80. return "MPU";
  81. case OMAP_L3_IA_IVA_SS_1:
  82. case OMAP_L3_IA_IVA_SS_2:
  83. case OMAP_L3_IA_IVA_SS_3:
  84. return "IVA_SS";
  85. case OMAP_L3_IA_IVA_SS_DMA_1:
  86. case OMAP_L3_IA_IVA_SS_DMA_2:
  87. case OMAP_L3_IA_IVA_SS_DMA_3:
  88. case OMAP_L3_IA_IVA_SS_DMA_4:
  89. case OMAP_L3_IA_IVA_SS_DMA_5:
  90. case OMAP_L3_IA_IVA_SS_DMA_6:
  91. return "IVA_SS_DMA";
  92. case OMAP_L3_IA_SGX:
  93. return "SGX";
  94. case OMAP_L3_IA_CAM_1:
  95. case OMAP_L3_IA_CAM_2:
  96. case OMAP_L3_IA_CAM_3:
  97. return "CAM";
  98. case OMAP_L3_IA_DAP:
  99. return "DAP";
  100. case OMAP_L3_SDMA_WR_1:
  101. case OMAP_L3_SDMA_WR_2:
  102. return "SDMA_WR";
  103. case OMAP_L3_SDMA_RD_1:
  104. case OMAP_L3_SDMA_RD_2:
  105. case OMAP_L3_SDMA_RD_3:
  106. case OMAP_L3_SDMA_RD_4:
  107. return "SDMA_RD";
  108. case OMAP_L3_USBOTG:
  109. return "USB_OTG";
  110. case OMAP_L3_USBHOST:
  111. return "USB_HOST";
  112. default:
  113. return "UNKNOWN Initiator";
  114. }
  115. }
  116. /*
  117. * omap3_l3_block_irq - handles a register block's irq
  118. * @l3: struct omap3_l3 *
  119. * @base: register block base address
  120. * @error: L3_ERROR_LOG register of our block
  121. *
  122. * Called in hard-irq context. Caller should take care of locking
  123. *
  124. * OMAP36xx TRM gives, on page 2001, Figure 9-10, the Typical Error
  125. * Analysis Sequence, we are following that sequence here, please
  126. * refer to that Figure for more information on the subject.
  127. */
  128. static irqreturn_t omap3_l3_block_irq(struct omap3_l3 *l3,
  129. u64 error, int error_addr)
  130. {
  131. u8 code = omap3_l3_decode_error_code(error);
  132. u8 initid = omap3_l3_decode_initid(error);
  133. u8 multi = error & L3_ERROR_LOG_MULTI;
  134. u32 address = omap3_l3_decode_addr(error_addr);
  135. pr_err("%s seen by %s %s at address %x\n",
  136. omap3_l3_code_string(code),
  137. omap3_l3_initiator_string(initid),
  138. multi ? "Multiple Errors" : "", address);
  139. WARN_ON(1);
  140. return IRQ_HANDLED;
  141. }
  142. static irqreturn_t omap3_l3_app_irq(int irq, void *_l3)
  143. {
  144. struct omap3_l3 *l3 = _l3;
  145. u64 status, clear;
  146. u64 error;
  147. u64 error_addr;
  148. u64 err_source = 0;
  149. void __iomem *base;
  150. int int_type;
  151. irqreturn_t ret = IRQ_NONE;
  152. int_type = irq == l3->app_irq ? L3_APPLICATION_ERROR : L3_DEBUG_ERROR;
  153. if (!int_type) {
  154. status = omap3_l3_readll(l3->rt, L3_SI_FLAG_STATUS_0);
  155. /*
  156. * if we have a timeout error, there's nothing we can
  157. * do besides rebooting the board. So let's BUG on any
  158. * of such errors and handle the others. timeout error
  159. * is severe and not expected to occur.
  160. */
  161. BUG_ON(status & L3_STATUS_0_TIMEOUT_MASK);
  162. } else {
  163. status = omap3_l3_readll(l3->rt, L3_SI_FLAG_STATUS_1);
  164. /* No timeout error for debug sources */
  165. }
  166. /* identify the error source */
  167. err_source = __ffs(status);
  168. base = l3->rt + omap3_l3_bases[int_type][err_source];
  169. error = omap3_l3_readll(base, L3_ERROR_LOG);
  170. if (error) {
  171. error_addr = omap3_l3_readll(base, L3_ERROR_LOG_ADDR);
  172. ret |= omap3_l3_block_irq(l3, error, error_addr);
  173. }
  174. /* Clear the status register */
  175. clear = (L3_AGENT_STATUS_CLEAR_IA << int_type) |
  176. L3_AGENT_STATUS_CLEAR_TA;
  177. omap3_l3_writell(base, L3_AGENT_STATUS, clear);
  178. /* clear the error log register */
  179. omap3_l3_writell(base, L3_ERROR_LOG, error);
  180. return ret;
  181. }
  182. #if IS_BUILTIN(CONFIG_OF)
  183. static const struct of_device_id omap3_l3_match[] = {
  184. {
  185. .compatible = "ti,omap3-l3-smx",
  186. },
  187. { },
  188. };
  189. MODULE_DEVICE_TABLE(of, omap3_l3_match);
  190. #endif
  191. static int omap3_l3_probe(struct platform_device *pdev)
  192. {
  193. struct omap3_l3 *l3;
  194. struct resource *res;
  195. int ret;
  196. l3 = kzalloc(sizeof(*l3), GFP_KERNEL);
  197. if (!l3)
  198. return -ENOMEM;
  199. platform_set_drvdata(pdev, l3);
  200. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  201. if (!res) {
  202. dev_err(&pdev->dev, "couldn't find resource\n");
  203. ret = -ENODEV;
  204. goto err0;
  205. }
  206. l3->rt = ioremap(res->start, resource_size(res));
  207. if (!l3->rt) {
  208. dev_err(&pdev->dev, "ioremap failed\n");
  209. ret = -ENOMEM;
  210. goto err0;
  211. }
  212. l3->debug_irq = platform_get_irq(pdev, 0);
  213. ret = request_irq(l3->debug_irq, omap3_l3_app_irq, IRQF_TRIGGER_RISING,
  214. "l3-debug-irq", l3);
  215. if (ret) {
  216. dev_err(&pdev->dev, "couldn't request debug irq\n");
  217. goto err1;
  218. }
  219. l3->app_irq = platform_get_irq(pdev, 1);
  220. ret = request_irq(l3->app_irq, omap3_l3_app_irq, IRQF_TRIGGER_RISING,
  221. "l3-app-irq", l3);
  222. if (ret) {
  223. dev_err(&pdev->dev, "couldn't request app irq\n");
  224. goto err2;
  225. }
  226. return 0;
  227. err2:
  228. free_irq(l3->debug_irq, l3);
  229. err1:
  230. iounmap(l3->rt);
  231. err0:
  232. kfree(l3);
  233. return ret;
  234. }
  235. static int omap3_l3_remove(struct platform_device *pdev)
  236. {
  237. struct omap3_l3 *l3 = platform_get_drvdata(pdev);
  238. free_irq(l3->app_irq, l3);
  239. free_irq(l3->debug_irq, l3);
  240. iounmap(l3->rt);
  241. kfree(l3);
  242. return 0;
  243. }
  244. static struct platform_driver omap3_l3_driver = {
  245. .probe = omap3_l3_probe,
  246. .remove = omap3_l3_remove,
  247. .driver = {
  248. .name = "omap_l3_smx",
  249. .of_match_table = of_match_ptr(omap3_l3_match),
  250. },
  251. };
  252. static int __init omap3_l3_init(void)
  253. {
  254. return platform_driver_register(&omap3_l3_driver);
  255. }
  256. postcore_initcall_sync(omap3_l3_init);
  257. static void __exit omap3_l3_exit(void)
  258. {
  259. platform_driver_unregister(&omap3_l3_driver);
  260. }
  261. module_exit(omap3_l3_exit);
  262. MODULE_AUTHOR("Felipe Balbi");
  263. MODULE_AUTHOR("Santosh Shilimkar");
  264. MODULE_AUTHOR("Sricharan R");
  265. MODULE_DESCRIPTION("OMAP3XXX L3 Interconnect Driver");
  266. MODULE_LICENSE("GPL");