moxtet.c 19 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Turris Mox module configuration bus driver
  4. *
  5. * Copyright (C) 2019 Marek Behun <marek.behun@nic.cz>
  6. */
  7. #include <dt-bindings/bus/moxtet.h>
  8. #include <linux/bitops.h>
  9. #include <linux/debugfs.h>
  10. #include <linux/interrupt.h>
  11. #include <linux/module.h>
  12. #include <linux/moxtet.h>
  13. #include <linux/mutex.h>
  14. #include <linux/of_device.h>
  15. #include <linux/of_irq.h>
  16. #include <linux/spi/spi.h>
  17. /*
  18. * @name: module name for sysfs
  19. * @hwirq_base: base index for IRQ for this module (-1 if no IRQs)
  20. * @nirqs: how many interrupts does the shift register provide
  21. * @desc: module description for kernel log
  22. */
  23. static const struct {
  24. const char *name;
  25. int hwirq_base;
  26. int nirqs;
  27. const char *desc;
  28. } mox_module_table[] = {
  29. /* do not change order of this array! */
  30. { NULL, 0, 0, NULL },
  31. { "sfp", -1, 0, "MOX D (SFP cage)" },
  32. { "pci", MOXTET_IRQ_PCI, 1, "MOX B (Mini-PCIe)" },
  33. { "topaz", MOXTET_IRQ_TOPAZ, 1, "MOX C (4 port switch)" },
  34. { "peridot", MOXTET_IRQ_PERIDOT(0), 1, "MOX E (8 port switch)" },
  35. { "usb3", MOXTET_IRQ_USB3, 2, "MOX F (USB 3.0)" },
  36. { "pci-bridge", -1, 0, "MOX G (Mini-PCIe bridge)" },
  37. };
  38. static inline bool mox_module_known(unsigned int id)
  39. {
  40. return id >= TURRIS_MOX_MODULE_FIRST && id <= TURRIS_MOX_MODULE_LAST;
  41. }
  42. static inline const char *mox_module_name(unsigned int id)
  43. {
  44. if (mox_module_known(id))
  45. return mox_module_table[id].name;
  46. else
  47. return "unknown";
  48. }
  49. #define DEF_MODULE_ATTR(name, fmt, ...) \
  50. static ssize_t \
  51. module_##name##_show(struct device *dev, struct device_attribute *a, \
  52. char *buf) \
  53. { \
  54. struct moxtet_device *mdev = to_moxtet_device(dev); \
  55. return sprintf(buf, (fmt), __VA_ARGS__); \
  56. } \
  57. static DEVICE_ATTR_RO(module_##name)
  58. DEF_MODULE_ATTR(id, "0x%x\n", mdev->id);
  59. DEF_MODULE_ATTR(name, "%s\n", mox_module_name(mdev->id));
  60. DEF_MODULE_ATTR(description, "%s\n",
  61. mox_module_known(mdev->id) ? mox_module_table[mdev->id].desc
  62. : "");
  63. static struct attribute *moxtet_dev_attrs[] = {
  64. &dev_attr_module_id.attr,
  65. &dev_attr_module_name.attr,
  66. &dev_attr_module_description.attr,
  67. NULL,
  68. };
  69. static const struct attribute_group moxtet_dev_group = {
  70. .attrs = moxtet_dev_attrs,
  71. };
  72. static const struct attribute_group *moxtet_dev_groups[] = {
  73. &moxtet_dev_group,
  74. NULL,
  75. };
  76. static int moxtet_match(struct device *dev, struct device_driver *drv)
  77. {
  78. struct moxtet_device *mdev = to_moxtet_device(dev);
  79. struct moxtet_driver *tdrv = to_moxtet_driver(drv);
  80. const enum turris_mox_module_id *t;
  81. if (of_driver_match_device(dev, drv))
  82. return 1;
  83. if (!tdrv->id_table)
  84. return 0;
  85. for (t = tdrv->id_table; *t; ++t)
  86. if (*t == mdev->id)
  87. return 1;
  88. return 0;
  89. }
  90. struct bus_type moxtet_bus_type = {
  91. .name = "moxtet",
  92. .dev_groups = moxtet_dev_groups,
  93. .match = moxtet_match,
  94. };
  95. EXPORT_SYMBOL_GPL(moxtet_bus_type);
  96. int __moxtet_register_driver(struct module *owner,
  97. struct moxtet_driver *mdrv)
  98. {
  99. mdrv->driver.owner = owner;
  100. mdrv->driver.bus = &moxtet_bus_type;
  101. return driver_register(&mdrv->driver);
  102. }
  103. EXPORT_SYMBOL_GPL(__moxtet_register_driver);
  104. static int moxtet_dev_check(struct device *dev, void *data)
  105. {
  106. struct moxtet_device *mdev = to_moxtet_device(dev);
  107. struct moxtet_device *new_dev = data;
  108. if (mdev->moxtet == new_dev->moxtet && mdev->id == new_dev->id &&
  109. mdev->idx == new_dev->idx)
  110. return -EBUSY;
  111. return 0;
  112. }
  113. static void moxtet_dev_release(struct device *dev)
  114. {
  115. struct moxtet_device *mdev = to_moxtet_device(dev);
  116. put_device(mdev->moxtet->dev);
  117. kfree(mdev);
  118. }
  119. static struct moxtet_device *
  120. moxtet_alloc_device(struct moxtet *moxtet)
  121. {
  122. struct moxtet_device *dev;
  123. if (!get_device(moxtet->dev))
  124. return NULL;
  125. dev = kzalloc(sizeof(*dev), GFP_KERNEL);
  126. if (!dev) {
  127. put_device(moxtet->dev);
  128. return NULL;
  129. }
  130. dev->moxtet = moxtet;
  131. dev->dev.parent = moxtet->dev;
  132. dev->dev.bus = &moxtet_bus_type;
  133. dev->dev.release = moxtet_dev_release;
  134. device_initialize(&dev->dev);
  135. return dev;
  136. }
  137. static int moxtet_add_device(struct moxtet_device *dev)
  138. {
  139. static DEFINE_MUTEX(add_mutex);
  140. int ret;
  141. if (dev->idx >= TURRIS_MOX_MAX_MODULES || dev->id > 0xf)
  142. return -EINVAL;
  143. dev_set_name(&dev->dev, "moxtet-%s.%u", mox_module_name(dev->id),
  144. dev->idx);
  145. mutex_lock(&add_mutex);
  146. ret = bus_for_each_dev(&moxtet_bus_type, NULL, dev,
  147. moxtet_dev_check);
  148. if (ret)
  149. goto done;
  150. ret = device_add(&dev->dev);
  151. if (ret < 0)
  152. dev_err(dev->moxtet->dev, "can't add %s, status %d\n",
  153. dev_name(dev->moxtet->dev), ret);
  154. done:
  155. mutex_unlock(&add_mutex);
  156. return ret;
  157. }
  158. static int __unregister(struct device *dev, void *null)
  159. {
  160. if (dev->of_node) {
  161. of_node_clear_flag(dev->of_node, OF_POPULATED);
  162. of_node_put(dev->of_node);
  163. }
  164. device_unregister(dev);
  165. return 0;
  166. }
  167. static struct moxtet_device *
  168. of_register_moxtet_device(struct moxtet *moxtet, struct device_node *nc)
  169. {
  170. struct moxtet_device *dev;
  171. u32 val;
  172. int ret;
  173. dev = moxtet_alloc_device(moxtet);
  174. if (!dev) {
  175. dev_err(moxtet->dev,
  176. "Moxtet device alloc error for %pOF\n", nc);
  177. return ERR_PTR(-ENOMEM);
  178. }
  179. ret = of_property_read_u32(nc, "reg", &val);
  180. if (ret) {
  181. dev_err(moxtet->dev, "%pOF has no valid 'reg' property (%d)\n",
  182. nc, ret);
  183. goto err_put;
  184. }
  185. dev->idx = val;
  186. if (dev->idx >= TURRIS_MOX_MAX_MODULES) {
  187. dev_err(moxtet->dev, "%pOF Moxtet address 0x%x out of range\n",
  188. nc, dev->idx);
  189. ret = -EINVAL;
  190. goto err_put;
  191. }
  192. dev->id = moxtet->modules[dev->idx];
  193. if (!dev->id) {
  194. dev_err(moxtet->dev, "%pOF Moxtet address 0x%x is empty\n", nc,
  195. dev->idx);
  196. ret = -ENODEV;
  197. goto err_put;
  198. }
  199. of_node_get(nc);
  200. dev->dev.of_node = nc;
  201. ret = moxtet_add_device(dev);
  202. if (ret) {
  203. dev_err(moxtet->dev,
  204. "Moxtet device register error for %pOF\n", nc);
  205. of_node_put(nc);
  206. goto err_put;
  207. }
  208. return dev;
  209. err_put:
  210. put_device(&dev->dev);
  211. return ERR_PTR(ret);
  212. }
  213. static void of_register_moxtet_devices(struct moxtet *moxtet)
  214. {
  215. struct moxtet_device *dev;
  216. struct device_node *nc;
  217. if (!moxtet->dev->of_node)
  218. return;
  219. for_each_available_child_of_node(moxtet->dev->of_node, nc) {
  220. if (of_node_test_and_set_flag(nc, OF_POPULATED))
  221. continue;
  222. dev = of_register_moxtet_device(moxtet, nc);
  223. if (IS_ERR(dev)) {
  224. dev_warn(moxtet->dev,
  225. "Failed to create Moxtet device for %pOF\n",
  226. nc);
  227. of_node_clear_flag(nc, OF_POPULATED);
  228. }
  229. }
  230. }
  231. static void
  232. moxtet_register_devices_from_topology(struct moxtet *moxtet)
  233. {
  234. struct moxtet_device *dev;
  235. int i, ret;
  236. for (i = 0; i < moxtet->count; ++i) {
  237. dev = moxtet_alloc_device(moxtet);
  238. if (!dev) {
  239. dev_err(moxtet->dev, "Moxtet device %u alloc error\n",
  240. i);
  241. continue;
  242. }
  243. dev->idx = i;
  244. dev->id = moxtet->modules[i];
  245. ret = moxtet_add_device(dev);
  246. if (ret && ret != -EBUSY) {
  247. put_device(&dev->dev);
  248. dev_err(moxtet->dev,
  249. "Moxtet device %u register error: %i\n", i,
  250. ret);
  251. }
  252. }
  253. }
  254. /*
  255. * @nsame: how many modules with same id are already in moxtet->modules
  256. */
  257. static int moxtet_set_irq(struct moxtet *moxtet, int idx, int id, int nsame)
  258. {
  259. int i, first;
  260. struct moxtet_irqpos *pos;
  261. first = mox_module_table[id].hwirq_base +
  262. nsame * mox_module_table[id].nirqs;
  263. if (first + mox_module_table[id].nirqs > MOXTET_NIRQS)
  264. return -EINVAL;
  265. for (i = 0; i < mox_module_table[id].nirqs; ++i) {
  266. pos = &moxtet->irq.position[first + i];
  267. pos->idx = idx;
  268. pos->bit = i;
  269. moxtet->irq.exists |= BIT(first + i);
  270. }
  271. return 0;
  272. }
  273. static int moxtet_find_topology(struct moxtet *moxtet)
  274. {
  275. u8 buf[TURRIS_MOX_MAX_MODULES];
  276. int cnts[TURRIS_MOX_MODULE_LAST];
  277. int i, ret;
  278. memset(cnts, 0, sizeof(cnts));
  279. ret = spi_read(to_spi_device(moxtet->dev), buf, TURRIS_MOX_MAX_MODULES);
  280. if (ret < 0)
  281. return ret;
  282. if (buf[0] == TURRIS_MOX_CPU_ID_EMMC) {
  283. dev_info(moxtet->dev, "Found MOX A (eMMC CPU) module\n");
  284. } else if (buf[0] == TURRIS_MOX_CPU_ID_SD) {
  285. dev_info(moxtet->dev, "Found MOX A (CPU) module\n");
  286. } else {
  287. dev_err(moxtet->dev, "Invalid Turris MOX A CPU module 0x%02x\n",
  288. buf[0]);
  289. return -ENODEV;
  290. }
  291. moxtet->count = 0;
  292. for (i = 1; i < TURRIS_MOX_MAX_MODULES; ++i) {
  293. int id;
  294. if (buf[i] == 0xff)
  295. break;
  296. id = buf[i] & 0xf;
  297. moxtet->modules[i-1] = id;
  298. ++moxtet->count;
  299. if (mox_module_known(id)) {
  300. dev_info(moxtet->dev, "Found %s module\n",
  301. mox_module_table[id].desc);
  302. if (moxtet_set_irq(moxtet, i-1, id, cnts[id]++) < 0)
  303. dev_err(moxtet->dev,
  304. " Cannot set IRQ for module %s\n",
  305. mox_module_table[id].desc);
  306. } else {
  307. dev_warn(moxtet->dev,
  308. "Unknown Moxtet module found (ID 0x%02x)\n",
  309. id);
  310. }
  311. }
  312. return 0;
  313. }
  314. static int moxtet_spi_read(struct moxtet *moxtet, u8 *buf)
  315. {
  316. struct spi_transfer xfer = {
  317. .rx_buf = buf,
  318. .tx_buf = moxtet->tx,
  319. .len = moxtet->count + 1
  320. };
  321. int ret;
  322. mutex_lock(&moxtet->lock);
  323. ret = spi_sync_transfer(to_spi_device(moxtet->dev), &xfer, 1);
  324. mutex_unlock(&moxtet->lock);
  325. return ret;
  326. }
  327. int moxtet_device_read(struct device *dev)
  328. {
  329. struct moxtet_device *mdev = to_moxtet_device(dev);
  330. struct moxtet *moxtet = mdev->moxtet;
  331. u8 buf[TURRIS_MOX_MAX_MODULES];
  332. int ret;
  333. if (mdev->idx >= moxtet->count)
  334. return -EINVAL;
  335. ret = moxtet_spi_read(moxtet, buf);
  336. if (ret < 0)
  337. return ret;
  338. return buf[mdev->idx + 1] >> 4;
  339. }
  340. EXPORT_SYMBOL_GPL(moxtet_device_read);
  341. int moxtet_device_write(struct device *dev, u8 val)
  342. {
  343. struct moxtet_device *mdev = to_moxtet_device(dev);
  344. struct moxtet *moxtet = mdev->moxtet;
  345. int ret;
  346. if (mdev->idx >= moxtet->count)
  347. return -EINVAL;
  348. mutex_lock(&moxtet->lock);
  349. moxtet->tx[moxtet->count - mdev->idx] = val;
  350. ret = spi_write(to_spi_device(moxtet->dev), moxtet->tx,
  351. moxtet->count + 1);
  352. mutex_unlock(&moxtet->lock);
  353. return ret;
  354. }
  355. EXPORT_SYMBOL_GPL(moxtet_device_write);
  356. int moxtet_device_written(struct device *dev)
  357. {
  358. struct moxtet_device *mdev = to_moxtet_device(dev);
  359. struct moxtet *moxtet = mdev->moxtet;
  360. if (mdev->idx >= moxtet->count)
  361. return -EINVAL;
  362. return moxtet->tx[moxtet->count - mdev->idx];
  363. }
  364. EXPORT_SYMBOL_GPL(moxtet_device_written);
  365. #ifdef CONFIG_DEBUG_FS
  366. static int moxtet_debug_open(struct inode *inode, struct file *file)
  367. {
  368. file->private_data = inode->i_private;
  369. return nonseekable_open(inode, file);
  370. }
  371. static ssize_t input_read(struct file *file, char __user *buf, size_t len,
  372. loff_t *ppos)
  373. {
  374. struct moxtet *moxtet = file->private_data;
  375. u8 bin[TURRIS_MOX_MAX_MODULES];
  376. u8 hex[sizeof(bin) * 2 + 1];
  377. int ret, n;
  378. ret = moxtet_spi_read(moxtet, bin);
  379. if (ret < 0)
  380. return ret;
  381. n = moxtet->count + 1;
  382. bin2hex(hex, bin, n);
  383. hex[2*n] = '\n';
  384. return simple_read_from_buffer(buf, len, ppos, hex, 2*n + 1);
  385. }
  386. static const struct file_operations input_fops = {
  387. .owner = THIS_MODULE,
  388. .open = moxtet_debug_open,
  389. .read = input_read,
  390. .llseek = no_llseek,
  391. };
  392. static ssize_t output_read(struct file *file, char __user *buf, size_t len,
  393. loff_t *ppos)
  394. {
  395. struct moxtet *moxtet = file->private_data;
  396. u8 hex[TURRIS_MOX_MAX_MODULES * 2 + 1];
  397. u8 *p = hex;
  398. int i;
  399. mutex_lock(&moxtet->lock);
  400. for (i = 0; i < moxtet->count; ++i)
  401. p = hex_byte_pack(p, moxtet->tx[moxtet->count - i]);
  402. mutex_unlock(&moxtet->lock);
  403. *p++ = '\n';
  404. return simple_read_from_buffer(buf, len, ppos, hex, p - hex);
  405. }
  406. static ssize_t output_write(struct file *file, const char __user *buf,
  407. size_t len, loff_t *ppos)
  408. {
  409. struct moxtet *moxtet = file->private_data;
  410. u8 bin[TURRIS_MOX_MAX_MODULES];
  411. u8 hex[sizeof(bin) * 2 + 1];
  412. ssize_t res;
  413. loff_t dummy = 0;
  414. int err, i;
  415. if (len > 2 * moxtet->count + 1 || len < 2 * moxtet->count)
  416. return -EINVAL;
  417. res = simple_write_to_buffer(hex, sizeof(hex), &dummy, buf, len);
  418. if (res < 0)
  419. return res;
  420. if (len % 2 == 1 && hex[len - 1] != '\n')
  421. return -EINVAL;
  422. err = hex2bin(bin, hex, moxtet->count);
  423. if (err < 0)
  424. return -EINVAL;
  425. mutex_lock(&moxtet->lock);
  426. for (i = 0; i < moxtet->count; ++i)
  427. moxtet->tx[moxtet->count - i] = bin[i];
  428. err = spi_write(to_spi_device(moxtet->dev), moxtet->tx,
  429. moxtet->count + 1);
  430. mutex_unlock(&moxtet->lock);
  431. return err < 0 ? err : len;
  432. }
  433. static const struct file_operations output_fops = {
  434. .owner = THIS_MODULE,
  435. .open = moxtet_debug_open,
  436. .read = output_read,
  437. .write = output_write,
  438. .llseek = no_llseek,
  439. };
  440. static int moxtet_register_debugfs(struct moxtet *moxtet)
  441. {
  442. struct dentry *root, *entry;
  443. root = debugfs_create_dir("moxtet", NULL);
  444. if (IS_ERR(root))
  445. return PTR_ERR(root);
  446. entry = debugfs_create_file_unsafe("input", 0444, root, moxtet,
  447. &input_fops);
  448. if (IS_ERR(entry))
  449. goto err_remove;
  450. entry = debugfs_create_file_unsafe("output", 0644, root, moxtet,
  451. &output_fops);
  452. if (IS_ERR(entry))
  453. goto err_remove;
  454. moxtet->debugfs_root = root;
  455. return 0;
  456. err_remove:
  457. debugfs_remove_recursive(root);
  458. return PTR_ERR(entry);
  459. }
  460. static void moxtet_unregister_debugfs(struct moxtet *moxtet)
  461. {
  462. debugfs_remove_recursive(moxtet->debugfs_root);
  463. }
  464. #else
  465. static inline int moxtet_register_debugfs(struct moxtet *moxtet)
  466. {
  467. return 0;
  468. }
  469. static inline void moxtet_unregister_debugfs(struct moxtet *moxtet)
  470. {
  471. }
  472. #endif
  473. static int moxtet_irq_domain_map(struct irq_domain *d, unsigned int irq,
  474. irq_hw_number_t hw)
  475. {
  476. struct moxtet *moxtet = d->host_data;
  477. if (hw >= MOXTET_NIRQS || !(moxtet->irq.exists & BIT(hw))) {
  478. dev_err(moxtet->dev, "Invalid hw irq number\n");
  479. return -EINVAL;
  480. }
  481. irq_set_chip_data(irq, d->host_data);
  482. irq_set_chip_and_handler(irq, &moxtet->irq.chip, handle_level_irq);
  483. return 0;
  484. }
  485. static int moxtet_irq_domain_xlate(struct irq_domain *d,
  486. struct device_node *ctrlr,
  487. const u32 *intspec, unsigned int intsize,
  488. unsigned long *out_hwirq,
  489. unsigned int *out_type)
  490. {
  491. struct moxtet *moxtet = d->host_data;
  492. int irq;
  493. if (WARN_ON(intsize < 1))
  494. return -EINVAL;
  495. irq = intspec[0];
  496. if (irq >= MOXTET_NIRQS || !(moxtet->irq.exists & BIT(irq)))
  497. return -EINVAL;
  498. *out_hwirq = irq;
  499. *out_type = IRQ_TYPE_NONE;
  500. return 0;
  501. }
  502. static const struct irq_domain_ops moxtet_irq_domain = {
  503. .map = moxtet_irq_domain_map,
  504. .xlate = moxtet_irq_domain_xlate,
  505. };
  506. static void moxtet_irq_mask(struct irq_data *d)
  507. {
  508. struct moxtet *moxtet = irq_data_get_irq_chip_data(d);
  509. moxtet->irq.masked |= BIT(d->hwirq);
  510. }
  511. static void moxtet_irq_unmask(struct irq_data *d)
  512. {
  513. struct moxtet *moxtet = irq_data_get_irq_chip_data(d);
  514. moxtet->irq.masked &= ~BIT(d->hwirq);
  515. }
  516. static void moxtet_irq_print_chip(struct irq_data *d, struct seq_file *p)
  517. {
  518. struct moxtet *moxtet = irq_data_get_irq_chip_data(d);
  519. struct moxtet_irqpos *pos = &moxtet->irq.position[d->hwirq];
  520. int id;
  521. id = moxtet->modules[pos->idx];
  522. seq_printf(p, " moxtet-%s.%i#%i", mox_module_name(id), pos->idx,
  523. pos->bit);
  524. }
  525. static const struct irq_chip moxtet_irq_chip = {
  526. .name = "moxtet",
  527. .irq_mask = moxtet_irq_mask,
  528. .irq_unmask = moxtet_irq_unmask,
  529. .irq_print_chip = moxtet_irq_print_chip,
  530. };
  531. static int moxtet_irq_read(struct moxtet *moxtet, unsigned long *map)
  532. {
  533. struct moxtet_irqpos *pos = moxtet->irq.position;
  534. u8 buf[TURRIS_MOX_MAX_MODULES];
  535. int i, ret;
  536. ret = moxtet_spi_read(moxtet, buf);
  537. if (ret < 0)
  538. return ret;
  539. *map = 0;
  540. for_each_set_bit(i, &moxtet->irq.exists, MOXTET_NIRQS) {
  541. if (!(buf[pos[i].idx + 1] & BIT(4 + pos[i].bit)))
  542. set_bit(i, map);
  543. }
  544. return 0;
  545. }
  546. static irqreturn_t moxtet_irq_thread_fn(int irq, void *data)
  547. {
  548. struct moxtet *moxtet = data;
  549. unsigned long set;
  550. int nhandled = 0, i, sub_irq, ret;
  551. ret = moxtet_irq_read(moxtet, &set);
  552. if (ret < 0)
  553. goto out;
  554. set &= ~moxtet->irq.masked;
  555. do {
  556. for_each_set_bit(i, &set, MOXTET_NIRQS) {
  557. sub_irq = irq_find_mapping(moxtet->irq.domain, i);
  558. handle_nested_irq(sub_irq);
  559. dev_dbg(moxtet->dev, "%i irq\n", i);
  560. ++nhandled;
  561. }
  562. ret = moxtet_irq_read(moxtet, &set);
  563. if (ret < 0)
  564. goto out;
  565. set &= ~moxtet->irq.masked;
  566. } while (set);
  567. out:
  568. return (nhandled > 0 ? IRQ_HANDLED : IRQ_NONE);
  569. }
  570. static void moxtet_irq_free(struct moxtet *moxtet)
  571. {
  572. int i, irq;
  573. for (i = 0; i < MOXTET_NIRQS; ++i) {
  574. if (moxtet->irq.exists & BIT(i)) {
  575. irq = irq_find_mapping(moxtet->irq.domain, i);
  576. irq_dispose_mapping(irq);
  577. }
  578. }
  579. irq_domain_remove(moxtet->irq.domain);
  580. }
  581. static int moxtet_irq_setup(struct moxtet *moxtet)
  582. {
  583. int i, ret;
  584. moxtet->irq.domain = irq_domain_add_simple(moxtet->dev->of_node,
  585. MOXTET_NIRQS, 0,
  586. &moxtet_irq_domain, moxtet);
  587. if (moxtet->irq.domain == NULL) {
  588. dev_err(moxtet->dev, "Could not add IRQ domain\n");
  589. return -ENOMEM;
  590. }
  591. for (i = 0; i < MOXTET_NIRQS; ++i)
  592. if (moxtet->irq.exists & BIT(i))
  593. irq_create_mapping(moxtet->irq.domain, i);
  594. moxtet->irq.chip = moxtet_irq_chip;
  595. moxtet->irq.masked = ~0;
  596. ret = request_threaded_irq(moxtet->dev_irq, NULL, moxtet_irq_thread_fn,
  597. IRQF_ONESHOT, "moxtet", moxtet);
  598. if (ret < 0)
  599. goto err_free;
  600. return 0;
  601. err_free:
  602. moxtet_irq_free(moxtet);
  603. return ret;
  604. }
  605. static int moxtet_probe(struct spi_device *spi)
  606. {
  607. struct moxtet *moxtet;
  608. int ret;
  609. ret = spi_setup(spi);
  610. if (ret < 0)
  611. return ret;
  612. moxtet = devm_kzalloc(&spi->dev, sizeof(struct moxtet),
  613. GFP_KERNEL);
  614. if (!moxtet)
  615. return -ENOMEM;
  616. moxtet->dev = &spi->dev;
  617. spi_set_drvdata(spi, moxtet);
  618. mutex_init(&moxtet->lock);
  619. moxtet->dev_irq = of_irq_get(moxtet->dev->of_node, 0);
  620. if (moxtet->dev_irq == -EPROBE_DEFER)
  621. return -EPROBE_DEFER;
  622. if (moxtet->dev_irq <= 0) {
  623. dev_err(moxtet->dev, "No IRQ resource found\n");
  624. return -ENXIO;
  625. }
  626. ret = moxtet_find_topology(moxtet);
  627. if (ret < 0)
  628. return ret;
  629. if (moxtet->irq.exists) {
  630. ret = moxtet_irq_setup(moxtet);
  631. if (ret < 0)
  632. return ret;
  633. }
  634. of_register_moxtet_devices(moxtet);
  635. moxtet_register_devices_from_topology(moxtet);
  636. ret = moxtet_register_debugfs(moxtet);
  637. if (ret < 0)
  638. dev_warn(moxtet->dev, "Failed creating debugfs entries: %i\n",
  639. ret);
  640. return 0;
  641. }
  642. static int moxtet_remove(struct spi_device *spi)
  643. {
  644. struct moxtet *moxtet = spi_get_drvdata(spi);
  645. free_irq(moxtet->dev_irq, moxtet);
  646. moxtet_irq_free(moxtet);
  647. moxtet_unregister_debugfs(moxtet);
  648. device_for_each_child(moxtet->dev, NULL, __unregister);
  649. mutex_destroy(&moxtet->lock);
  650. return 0;
  651. }
  652. static const struct of_device_id moxtet_dt_ids[] = {
  653. { .compatible = "cznic,moxtet" },
  654. {},
  655. };
  656. MODULE_DEVICE_TABLE(of, moxtet_dt_ids);
  657. static struct spi_driver moxtet_spi_driver = {
  658. .driver = {
  659. .name = "moxtet",
  660. .of_match_table = moxtet_dt_ids,
  661. },
  662. .probe = moxtet_probe,
  663. .remove = moxtet_remove,
  664. };
  665. static int __init moxtet_init(void)
  666. {
  667. int ret;
  668. ret = bus_register(&moxtet_bus_type);
  669. if (ret < 0) {
  670. pr_err("moxtet bus registration failed: %d\n", ret);
  671. goto error;
  672. }
  673. ret = spi_register_driver(&moxtet_spi_driver);
  674. if (ret < 0) {
  675. pr_err("moxtet spi driver registration failed: %d\n", ret);
  676. goto error_bus;
  677. }
  678. return 0;
  679. error_bus:
  680. bus_unregister(&moxtet_bus_type);
  681. error:
  682. return ret;
  683. }
  684. postcore_initcall_sync(moxtet_init);
  685. static void __exit moxtet_exit(void)
  686. {
  687. spi_unregister_driver(&moxtet_spi_driver);
  688. bus_unregister(&moxtet_bus_type);
  689. }
  690. module_exit(moxtet_exit);
  691. MODULE_AUTHOR("Marek Behun <marek.behun@nic.cz>");
  692. MODULE_DESCRIPTION("CZ.NIC's Turris Mox module configuration bus");
  693. MODULE_LICENSE("GPL v2");