zatm.h 3.6 KB

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  1. /* SPDX-License-Identifier: GPL-2.0 */
  2. /* drivers/atm/zatm.h - ZeitNet ZN122x device driver declarations */
  3. /* Written 1995-1998 by Werner Almesberger, EPFL LRC/ICA */
  4. #ifndef DRIVER_ATM_ZATM_H
  5. #define DRIVER_ATM_ZATM_H
  6. #include <linux/skbuff.h>
  7. #include <linux/atm.h>
  8. #include <linux/atmdev.h>
  9. #include <linux/sonet.h>
  10. #include <linux/pci.h>
  11. #define DEV_LABEL "zatm"
  12. #define MAX_AAL5_PDU 10240 /* allocate for AAL5 PDUs of this size */
  13. #define MAX_RX_SIZE_LD 14 /* ceil(log2((MAX_AAL5_PDU+47)/48)) */
  14. #define LOW_MARK 12 /* start adding new buffers if less than 12 */
  15. #define HIGH_MARK 30 /* stop adding buffers after reaching 30 */
  16. #define OFF_CNG_THRES 5 /* threshold for offset changes */
  17. #define RX_SIZE 2 /* RX lookup entry size (in bytes) */
  18. #define NR_POOLS 32 /* number of free buffer pointers */
  19. #define POOL_SIZE 8 /* buffer entry size (in bytes) */
  20. #define NR_SHAPERS 16 /* number of shapers */
  21. #define SHAPER_SIZE 4 /* shaper entry size (in bytes) */
  22. #define VC_SIZE 32 /* VC dsc (TX or RX) size (in bytes) */
  23. #define RING_ENTRIES 32 /* ring entries (without back pointer) */
  24. #define RING_WORDS 4 /* ring element size */
  25. #define RING_SIZE (sizeof(unsigned long)*(RING_ENTRIES+1)*RING_WORDS)
  26. #define NR_MBX 4 /* four mailboxes */
  27. #define MBX_RX_0 0 /* mailbox indices */
  28. #define MBX_RX_1 1
  29. #define MBX_TX_0 2
  30. #define MBX_TX_1 3
  31. struct zatm_vcc {
  32. /*-------------------------------- RX part */
  33. int rx_chan; /* RX channel, 0 if none */
  34. int pool; /* free buffer pool */
  35. /*-------------------------------- TX part */
  36. int tx_chan; /* TX channel, 0 if none */
  37. int shaper; /* shaper, <0 if none */
  38. struct sk_buff_head tx_queue; /* list of buffers in transit */
  39. wait_queue_head_t tx_wait; /* for close */
  40. u32 *ring; /* transmit ring */
  41. int ring_curr; /* current write position */
  42. int txing; /* number of transmits in progress */
  43. struct sk_buff_head backlog; /* list of buffers waiting for ring */
  44. };
  45. struct zatm_dev {
  46. /*-------------------------------- TX part */
  47. int tx_bw; /* remaining bandwidth */
  48. u32 free_shapers; /* bit set */
  49. int ubr; /* UBR shaper; -1 if none */
  50. int ubr_ref_cnt; /* number of VCs using UBR shaper */
  51. /*-------------------------------- RX part */
  52. int pool_ref[NR_POOLS]; /* free buffer pool usage counters */
  53. volatile struct sk_buff *last_free[NR_POOLS];
  54. /* last entry in respective pool */
  55. struct sk_buff_head pool[NR_POOLS];/* free buffer pools */
  56. struct zatm_pool_info pool_info[NR_POOLS]; /* pool information */
  57. /*-------------------------------- maps */
  58. struct atm_vcc **tx_map; /* TX VCCs */
  59. struct atm_vcc **rx_map; /* RX VCCs */
  60. int chans; /* map size, must be 2^n */
  61. /*-------------------------------- mailboxes */
  62. unsigned long mbx_start[NR_MBX];/* start addresses */
  63. dma_addr_t mbx_dma[NR_MBX];
  64. u16 mbx_end[NR_MBX]; /* end offset (in bytes) */
  65. /*-------------------------------- other pointers */
  66. u32 pool_base; /* Free buffer pool dsc (word addr) */
  67. /*-------------------------------- ZATM links */
  68. struct atm_dev *more; /* other ZATM devices */
  69. /*-------------------------------- general information */
  70. int mem; /* RAM on board (in bytes) */
  71. int khz; /* timer clock */
  72. int copper; /* PHY type */
  73. unsigned char irq; /* IRQ */
  74. unsigned int base; /* IO base address */
  75. struct pci_dev *pci_dev; /* PCI stuff */
  76. spinlock_t lock;
  77. };
  78. #define ZATM_DEV(d) ((struct zatm_dev *) (d)->dev_data)
  79. #define ZATM_VCC(d) ((struct zatm_vcc *) (d)->dev_data)
  80. struct zatm_skb_prv {
  81. struct atm_skb_data _; /* reserved */
  82. u32 *dsc; /* pointer to skb's descriptor */
  83. };
  84. #define ZATM_PRV_DSC(skb) (((struct zatm_skb_prv *) (skb)->cb)->dsc)
  85. #endif