viper.c 22 KB

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  1. /*
  2. * linux/arch/arm/mach-pxa/viper.c
  3. *
  4. * Support for the Arcom VIPER SBC.
  5. *
  6. * Author: Ian Campbell
  7. * Created: Feb 03, 2003
  8. * Copyright: Arcom Control Systems
  9. *
  10. * Maintained by Marc Zyngier <maz@misterjones.org>
  11. * <marc.zyngier@altran.com>
  12. *
  13. * Based on lubbock.c:
  14. * Author: Nicolas Pitre
  15. * Created: Jun 15, 2001
  16. * Copyright: MontaVista Software Inc.
  17. *
  18. * This program is free software; you can redistribute it and/or modify
  19. * it under the terms of the GNU General Public License version 2 as
  20. * published by the Free Software Foundation.
  21. */
  22. #include <linux/types.h>
  23. #include <linux/memory.h>
  24. #include <linux/cpu.h>
  25. #include <linux/cpufreq.h>
  26. #include <linux/delay.h>
  27. #include <linux/fs.h>
  28. #include <linux/init.h>
  29. #include <linux/slab.h>
  30. #include <linux/interrupt.h>
  31. #include <linux/major.h>
  32. #include <linux/module.h>
  33. #include <linux/pm.h>
  34. #include <linux/sched.h>
  35. #include <linux/gpio.h>
  36. #include <linux/jiffies.h>
  37. #include <linux/i2c-gpio.h>
  38. #include <linux/i2c/pxa-i2c.h>
  39. #include <linux/serial_8250.h>
  40. #include <linux/smc91x.h>
  41. #include <linux/pwm.h>
  42. #include <linux/pwm_backlight.h>
  43. #include <linux/usb/isp116x.h>
  44. #include <linux/mtd/mtd.h>
  45. #include <linux/mtd/partitions.h>
  46. #include <linux/mtd/physmap.h>
  47. #include <linux/syscore_ops.h>
  48. #include "pxa25x.h"
  49. #include <mach/audio.h>
  50. #include <linux/platform_data/video-pxafb.h>
  51. #include <mach/regs-uart.h>
  52. #include <linux/platform_data/pcmcia-pxa2xx_viper.h>
  53. #include "viper.h"
  54. #include <asm/setup.h>
  55. #include <asm/mach-types.h>
  56. #include <asm/irq.h>
  57. #include <asm/sizes.h>
  58. #include <asm/system_info.h>
  59. #include <asm/mach/arch.h>
  60. #include <asm/mach/map.h>
  61. #include <asm/mach/irq.h>
  62. #include "generic.h"
  63. #include "devices.h"
  64. static unsigned int icr;
  65. static void viper_icr_set_bit(unsigned int bit)
  66. {
  67. icr |= bit;
  68. VIPER_ICR = icr;
  69. }
  70. static void viper_icr_clear_bit(unsigned int bit)
  71. {
  72. icr &= ~bit;
  73. VIPER_ICR = icr;
  74. }
  75. /* This function is used from the pcmcia module to reset the CF */
  76. static void viper_cf_reset(int state)
  77. {
  78. if (state)
  79. viper_icr_set_bit(VIPER_ICR_CF_RST);
  80. else
  81. viper_icr_clear_bit(VIPER_ICR_CF_RST);
  82. }
  83. static struct arcom_pcmcia_pdata viper_pcmcia_info = {
  84. .cd_gpio = VIPER_CF_CD_GPIO,
  85. .rdy_gpio = VIPER_CF_RDY_GPIO,
  86. .pwr_gpio = VIPER_CF_POWER_GPIO,
  87. .reset = viper_cf_reset,
  88. };
  89. static struct platform_device viper_pcmcia_device = {
  90. .name = "viper-pcmcia",
  91. .id = -1,
  92. .dev = {
  93. .platform_data = &viper_pcmcia_info,
  94. },
  95. };
  96. /*
  97. * The CPLD version register was not present on VIPER boards prior to
  98. * v2i1. On v1 boards where the version register is not present we
  99. * will just read back the previous value from the databus.
  100. *
  101. * Therefore we do two reads. The first time we write 0 to the
  102. * (read-only) register before reading and the second time we write
  103. * 0xff first. If the two reads do not match or they read back as 0xff
  104. * or 0x00 then we have version 1 hardware.
  105. */
  106. static u8 viper_hw_version(void)
  107. {
  108. u8 v1, v2;
  109. unsigned long flags;
  110. local_irq_save(flags);
  111. VIPER_VERSION = 0;
  112. v1 = VIPER_VERSION;
  113. VIPER_VERSION = 0xff;
  114. v2 = VIPER_VERSION;
  115. v1 = (v1 != v2 || v1 == 0xff) ? 0 : v1;
  116. local_irq_restore(flags);
  117. return v1;
  118. }
  119. /* CPU system core operations. */
  120. static int viper_cpu_suspend(void)
  121. {
  122. viper_icr_set_bit(VIPER_ICR_R_DIS);
  123. return 0;
  124. }
  125. static void viper_cpu_resume(void)
  126. {
  127. viper_icr_clear_bit(VIPER_ICR_R_DIS);
  128. }
  129. static struct syscore_ops viper_cpu_syscore_ops = {
  130. .suspend = viper_cpu_suspend,
  131. .resume = viper_cpu_resume,
  132. };
  133. static unsigned int current_voltage_divisor;
  134. /*
  135. * If force is not true then step from existing to new divisor. If
  136. * force is true then jump straight to the new divisor. Stepping is
  137. * used because if the jump in voltage is too large, the VCC can dip
  138. * too low and the regulator cuts out.
  139. *
  140. * force can be used to initialize the divisor to a know state by
  141. * setting the value for the current clock speed, since we are already
  142. * running at that speed we know the voltage should be pretty close so
  143. * the jump won't be too large
  144. */
  145. static void viper_set_core_cpu_voltage(unsigned long khz, int force)
  146. {
  147. int i = 0;
  148. unsigned int divisor = 0;
  149. const char *v;
  150. if (khz < 200000) {
  151. v = "1.0"; divisor = 0xfff;
  152. } else if (khz < 300000) {
  153. v = "1.1"; divisor = 0xde5;
  154. } else {
  155. v = "1.3"; divisor = 0x325;
  156. }
  157. pr_debug("viper: setting CPU core voltage to %sV at %d.%03dMHz\n",
  158. v, (int)khz / 1000, (int)khz % 1000);
  159. #define STEP 0x100
  160. do {
  161. int step;
  162. if (force)
  163. step = divisor;
  164. else if (current_voltage_divisor < divisor - STEP)
  165. step = current_voltage_divisor + STEP;
  166. else if (current_voltage_divisor > divisor + STEP)
  167. step = current_voltage_divisor - STEP;
  168. else
  169. step = divisor;
  170. force = 0;
  171. gpio_set_value(VIPER_PSU_CLK_GPIO, 0);
  172. gpio_set_value(VIPER_PSU_nCS_LD_GPIO, 0);
  173. for (i = 1 << 11 ; i > 0 ; i >>= 1) {
  174. udelay(1);
  175. gpio_set_value(VIPER_PSU_DATA_GPIO, step & i);
  176. udelay(1);
  177. gpio_set_value(VIPER_PSU_CLK_GPIO, 1);
  178. udelay(1);
  179. gpio_set_value(VIPER_PSU_CLK_GPIO, 0);
  180. }
  181. udelay(1);
  182. gpio_set_value(VIPER_PSU_nCS_LD_GPIO, 1);
  183. udelay(1);
  184. gpio_set_value(VIPER_PSU_nCS_LD_GPIO, 0);
  185. current_voltage_divisor = step;
  186. } while (current_voltage_divisor != divisor);
  187. }
  188. /* Interrupt handling */
  189. static unsigned long viper_irq_enabled_mask;
  190. static const int viper_isa_irqs[] = { 3, 4, 5, 6, 7, 10, 11, 12, 9, 14, 15 };
  191. static const int viper_isa_irq_map[] = {
  192. 0, /* ISA irq #0, invalid */
  193. 0, /* ISA irq #1, invalid */
  194. 0, /* ISA irq #2, invalid */
  195. 1 << 0, /* ISA irq #3 */
  196. 1 << 1, /* ISA irq #4 */
  197. 1 << 2, /* ISA irq #5 */
  198. 1 << 3, /* ISA irq #6 */
  199. 1 << 4, /* ISA irq #7 */
  200. 0, /* ISA irq #8, invalid */
  201. 1 << 8, /* ISA irq #9 */
  202. 1 << 5, /* ISA irq #10 */
  203. 1 << 6, /* ISA irq #11 */
  204. 1 << 7, /* ISA irq #12 */
  205. 0, /* ISA irq #13, invalid */
  206. 1 << 9, /* ISA irq #14 */
  207. 1 << 10, /* ISA irq #15 */
  208. };
  209. static inline int viper_irq_to_bitmask(unsigned int irq)
  210. {
  211. return viper_isa_irq_map[irq - PXA_ISA_IRQ(0)];
  212. }
  213. static inline int viper_bit_to_irq(int bit)
  214. {
  215. return viper_isa_irqs[bit] + PXA_ISA_IRQ(0);
  216. }
  217. static void viper_ack_irq(struct irq_data *d)
  218. {
  219. int viper_irq = viper_irq_to_bitmask(d->irq);
  220. if (viper_irq & 0xff)
  221. VIPER_LO_IRQ_STATUS = viper_irq;
  222. else
  223. VIPER_HI_IRQ_STATUS = (viper_irq >> 8);
  224. }
  225. static void viper_mask_irq(struct irq_data *d)
  226. {
  227. viper_irq_enabled_mask &= ~(viper_irq_to_bitmask(d->irq));
  228. }
  229. static void viper_unmask_irq(struct irq_data *d)
  230. {
  231. viper_irq_enabled_mask |= viper_irq_to_bitmask(d->irq);
  232. }
  233. static inline unsigned long viper_irq_pending(void)
  234. {
  235. return (VIPER_HI_IRQ_STATUS << 8 | VIPER_LO_IRQ_STATUS) &
  236. viper_irq_enabled_mask;
  237. }
  238. static void viper_irq_handler(struct irq_desc *desc)
  239. {
  240. unsigned int irq;
  241. unsigned long pending;
  242. pending = viper_irq_pending();
  243. do {
  244. /* we're in a chained irq handler,
  245. * so ack the interrupt by hand */
  246. desc->irq_data.chip->irq_ack(&desc->irq_data);
  247. if (likely(pending)) {
  248. irq = viper_bit_to_irq(__ffs(pending));
  249. generic_handle_irq(irq);
  250. }
  251. pending = viper_irq_pending();
  252. } while (pending);
  253. }
  254. static struct irq_chip viper_irq_chip = {
  255. .name = "ISA",
  256. .irq_ack = viper_ack_irq,
  257. .irq_mask = viper_mask_irq,
  258. .irq_unmask = viper_unmask_irq
  259. };
  260. static void __init viper_init_irq(void)
  261. {
  262. int level;
  263. int isa_irq;
  264. pxa25x_init_irq();
  265. /* setup ISA IRQs */
  266. for (level = 0; level < ARRAY_SIZE(viper_isa_irqs); level++) {
  267. isa_irq = viper_bit_to_irq(level);
  268. irq_set_chip_and_handler(isa_irq, &viper_irq_chip,
  269. handle_edge_irq);
  270. irq_clear_status_flags(isa_irq, IRQ_NOREQUEST | IRQ_NOPROBE);
  271. }
  272. irq_set_chained_handler(gpio_to_irq(VIPER_CPLD_GPIO),
  273. viper_irq_handler);
  274. irq_set_irq_type(gpio_to_irq(VIPER_CPLD_GPIO), IRQ_TYPE_EDGE_BOTH);
  275. }
  276. /* Flat Panel */
  277. static struct pxafb_mode_info fb_mode_info[] = {
  278. {
  279. .pixclock = 157500,
  280. .xres = 320,
  281. .yres = 240,
  282. .bpp = 16,
  283. .hsync_len = 63,
  284. .left_margin = 7,
  285. .right_margin = 13,
  286. .vsync_len = 20,
  287. .upper_margin = 0,
  288. .lower_margin = 0,
  289. .sync = 0,
  290. },
  291. };
  292. static struct pxafb_mach_info fb_info = {
  293. .modes = fb_mode_info,
  294. .num_modes = 1,
  295. .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL,
  296. };
  297. static struct pwm_lookup viper_pwm_lookup[] = {
  298. PWM_LOOKUP("pxa25x-pwm.0", 0, "pwm-backlight.0", NULL, 1000000,
  299. PWM_POLARITY_NORMAL),
  300. };
  301. static int viper_backlight_init(struct device *dev)
  302. {
  303. int ret;
  304. /* GPIO9 and 10 control FB backlight. Initialise to off */
  305. ret = gpio_request(VIPER_BCKLIGHT_EN_GPIO, "Backlight");
  306. if (ret)
  307. goto err_request_bckl;
  308. ret = gpio_request(VIPER_LCD_EN_GPIO, "LCD");
  309. if (ret)
  310. goto err_request_lcd;
  311. ret = gpio_direction_output(VIPER_BCKLIGHT_EN_GPIO, 0);
  312. if (ret)
  313. goto err_dir;
  314. ret = gpio_direction_output(VIPER_LCD_EN_GPIO, 0);
  315. if (ret)
  316. goto err_dir;
  317. return 0;
  318. err_dir:
  319. gpio_free(VIPER_LCD_EN_GPIO);
  320. err_request_lcd:
  321. gpio_free(VIPER_BCKLIGHT_EN_GPIO);
  322. err_request_bckl:
  323. dev_err(dev, "Failed to setup LCD GPIOs\n");
  324. return ret;
  325. }
  326. static int viper_backlight_notify(struct device *dev, int brightness)
  327. {
  328. gpio_set_value(VIPER_LCD_EN_GPIO, !!brightness);
  329. gpio_set_value(VIPER_BCKLIGHT_EN_GPIO, !!brightness);
  330. return brightness;
  331. }
  332. static void viper_backlight_exit(struct device *dev)
  333. {
  334. gpio_free(VIPER_LCD_EN_GPIO);
  335. gpio_free(VIPER_BCKLIGHT_EN_GPIO);
  336. }
  337. static struct platform_pwm_backlight_data viper_backlight_data = {
  338. .max_brightness = 100,
  339. .dft_brightness = 100,
  340. .enable_gpio = -1,
  341. .init = viper_backlight_init,
  342. .notify = viper_backlight_notify,
  343. .exit = viper_backlight_exit,
  344. };
  345. static struct platform_device viper_backlight_device = {
  346. .name = "pwm-backlight",
  347. .dev = {
  348. .parent = &pxa25x_device_pwm0.dev,
  349. .platform_data = &viper_backlight_data,
  350. },
  351. };
  352. /* Ethernet */
  353. static struct resource smc91x_resources[] = {
  354. [0] = {
  355. .name = "smc91x-regs",
  356. .start = VIPER_ETH_PHYS + 0x300,
  357. .end = VIPER_ETH_PHYS + 0x30f,
  358. .flags = IORESOURCE_MEM,
  359. },
  360. [1] = {
  361. .start = PXA_GPIO_TO_IRQ(VIPER_ETH_GPIO),
  362. .end = PXA_GPIO_TO_IRQ(VIPER_ETH_GPIO),
  363. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
  364. },
  365. [2] = {
  366. .name = "smc91x-data32",
  367. .start = VIPER_ETH_DATA_PHYS,
  368. .end = VIPER_ETH_DATA_PHYS + 3,
  369. .flags = IORESOURCE_MEM,
  370. },
  371. };
  372. static struct smc91x_platdata viper_smc91x_info = {
  373. .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
  374. .leda = RPC_LED_100_10,
  375. .ledb = RPC_LED_TX_RX,
  376. };
  377. static struct platform_device smc91x_device = {
  378. .name = "smc91x",
  379. .id = -1,
  380. .num_resources = ARRAY_SIZE(smc91x_resources),
  381. .resource = smc91x_resources,
  382. .dev = {
  383. .platform_data = &viper_smc91x_info,
  384. },
  385. };
  386. /* i2c */
  387. static struct i2c_gpio_platform_data i2c_bus_data = {
  388. .sda_pin = VIPER_RTC_I2C_SDA_GPIO,
  389. .scl_pin = VIPER_RTC_I2C_SCL_GPIO,
  390. .udelay = 10,
  391. .timeout = HZ,
  392. };
  393. static struct platform_device i2c_bus_device = {
  394. .name = "i2c-gpio",
  395. .id = 1, /* pxa2xx-i2c is bus 0, so start at 1 */
  396. .dev = {
  397. .platform_data = &i2c_bus_data,
  398. }
  399. };
  400. static struct i2c_board_info __initdata viper_i2c_devices[] = {
  401. {
  402. I2C_BOARD_INFO("ds1338", 0x68),
  403. },
  404. };
  405. /*
  406. * Serial configuration:
  407. * You can either have the standard PXA ports driven by the PXA driver,
  408. * or all the ports (PXA + 16850) driven by the 8250 driver.
  409. * Choose your poison.
  410. */
  411. static struct resource viper_serial_resources[] = {
  412. #ifndef CONFIG_SERIAL_PXA
  413. {
  414. .start = 0x40100000,
  415. .end = 0x4010001f,
  416. .flags = IORESOURCE_MEM,
  417. },
  418. {
  419. .start = 0x40200000,
  420. .end = 0x4020001f,
  421. .flags = IORESOURCE_MEM,
  422. },
  423. {
  424. .start = 0x40700000,
  425. .end = 0x4070001f,
  426. .flags = IORESOURCE_MEM,
  427. },
  428. {
  429. .start = VIPER_UARTA_PHYS,
  430. .end = VIPER_UARTA_PHYS + 0xf,
  431. .flags = IORESOURCE_MEM,
  432. },
  433. {
  434. .start = VIPER_UARTB_PHYS,
  435. .end = VIPER_UARTB_PHYS + 0xf,
  436. .flags = IORESOURCE_MEM,
  437. },
  438. #else
  439. {
  440. 0,
  441. },
  442. #endif
  443. };
  444. static struct plat_serial8250_port serial_platform_data[] = {
  445. #ifndef CONFIG_SERIAL_PXA
  446. /* Internal UARTs */
  447. {
  448. .membase = (void *)&FFUART,
  449. .mapbase = __PREG(FFUART),
  450. .irq = IRQ_FFUART,
  451. .uartclk = 921600 * 16,
  452. .regshift = 2,
  453. .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
  454. .iotype = UPIO_MEM,
  455. },
  456. {
  457. .membase = (void *)&BTUART,
  458. .mapbase = __PREG(BTUART),
  459. .irq = IRQ_BTUART,
  460. .uartclk = 921600 * 16,
  461. .regshift = 2,
  462. .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
  463. .iotype = UPIO_MEM,
  464. },
  465. {
  466. .membase = (void *)&STUART,
  467. .mapbase = __PREG(STUART),
  468. .irq = IRQ_STUART,
  469. .uartclk = 921600 * 16,
  470. .regshift = 2,
  471. .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
  472. .iotype = UPIO_MEM,
  473. },
  474. /* External UARTs */
  475. {
  476. .mapbase = VIPER_UARTA_PHYS,
  477. .irq = PXA_GPIO_TO_IRQ(VIPER_UARTA_GPIO),
  478. .irqflags = IRQF_TRIGGER_RISING,
  479. .uartclk = 1843200,
  480. .regshift = 1,
  481. .iotype = UPIO_MEM,
  482. .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP |
  483. UPF_SKIP_TEST,
  484. },
  485. {
  486. .mapbase = VIPER_UARTB_PHYS,
  487. .irq = PXA_GPIO_TO_IRQ(VIPER_UARTB_GPIO),
  488. .irqflags = IRQF_TRIGGER_RISING,
  489. .uartclk = 1843200,
  490. .regshift = 1,
  491. .iotype = UPIO_MEM,
  492. .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP |
  493. UPF_SKIP_TEST,
  494. },
  495. #endif
  496. { },
  497. };
  498. static struct platform_device serial_device = {
  499. .name = "serial8250",
  500. .id = 0,
  501. .dev = {
  502. .platform_data = serial_platform_data,
  503. },
  504. .num_resources = ARRAY_SIZE(viper_serial_resources),
  505. .resource = viper_serial_resources,
  506. };
  507. /* USB */
  508. static void isp116x_delay(struct device *dev, int delay)
  509. {
  510. ndelay(delay);
  511. }
  512. static struct resource isp116x_resources[] = {
  513. [0] = { /* DATA */
  514. .start = VIPER_USB_PHYS + 0,
  515. .end = VIPER_USB_PHYS + 1,
  516. .flags = IORESOURCE_MEM,
  517. },
  518. [1] = { /* ADDR */
  519. .start = VIPER_USB_PHYS + 2,
  520. .end = VIPER_USB_PHYS + 3,
  521. .flags = IORESOURCE_MEM,
  522. },
  523. [2] = {
  524. .start = PXA_GPIO_TO_IRQ(VIPER_USB_GPIO),
  525. .end = PXA_GPIO_TO_IRQ(VIPER_USB_GPIO),
  526. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
  527. },
  528. };
  529. /* (DataBusWidth16|AnalogOCEnable|DREQOutputPolarity|DownstreamPort15KRSel ) */
  530. static struct isp116x_platform_data isp116x_platform_data = {
  531. /* Enable internal resistors on downstream ports */
  532. .sel15Kres = 1,
  533. /* On-chip overcurrent protection */
  534. .oc_enable = 1,
  535. /* INT output polarity */
  536. .int_act_high = 1,
  537. /* INT edge or level triggered */
  538. .int_edge_triggered = 0,
  539. /* WAKEUP pin connected - NOT SUPPORTED */
  540. /* .remote_wakeup_connected = 0, */
  541. /* Wakeup by devices on usb bus enabled */
  542. .remote_wakeup_enable = 0,
  543. .delay = isp116x_delay,
  544. };
  545. static struct platform_device isp116x_device = {
  546. .name = "isp116x-hcd",
  547. .id = -1,
  548. .num_resources = ARRAY_SIZE(isp116x_resources),
  549. .resource = isp116x_resources,
  550. .dev = {
  551. .platform_data = &isp116x_platform_data,
  552. },
  553. };
  554. /* MTD */
  555. static struct resource mtd_resources[] = {
  556. [0] = { /* RedBoot config + filesystem flash */
  557. .start = VIPER_FLASH_PHYS,
  558. .end = VIPER_FLASH_PHYS + SZ_32M - 1,
  559. .flags = IORESOURCE_MEM,
  560. },
  561. [1] = { /* Boot flash */
  562. .start = VIPER_BOOT_PHYS,
  563. .end = VIPER_BOOT_PHYS + SZ_1M - 1,
  564. .flags = IORESOURCE_MEM,
  565. },
  566. [2] = { /*
  567. * SRAM size is actually 256KB, 8bits, with a sparse mapping
  568. * (each byte is on a 16bit boundary).
  569. */
  570. .start = _VIPER_SRAM_BASE,
  571. .end = _VIPER_SRAM_BASE + SZ_512K - 1,
  572. .flags = IORESOURCE_MEM,
  573. },
  574. };
  575. static struct mtd_partition viper_boot_flash_partition = {
  576. .name = "RedBoot",
  577. .size = SZ_1M,
  578. .offset = 0,
  579. .mask_flags = MTD_WRITEABLE, /* force R/O */
  580. };
  581. static struct physmap_flash_data viper_flash_data[] = {
  582. [0] = {
  583. .width = 2,
  584. .parts = NULL,
  585. .nr_parts = 0,
  586. },
  587. [1] = {
  588. .width = 2,
  589. .parts = &viper_boot_flash_partition,
  590. .nr_parts = 1,
  591. },
  592. };
  593. static struct platform_device viper_mtd_devices[] = {
  594. [0] = {
  595. .name = "physmap-flash",
  596. .id = 0,
  597. .dev = {
  598. .platform_data = &viper_flash_data[0],
  599. },
  600. .resource = &mtd_resources[0],
  601. .num_resources = 1,
  602. },
  603. [1] = {
  604. .name = "physmap-flash",
  605. .id = 1,
  606. .dev = {
  607. .platform_data = &viper_flash_data[1],
  608. },
  609. .resource = &mtd_resources[1],
  610. .num_resources = 1,
  611. },
  612. };
  613. static struct platform_device *viper_devs[] __initdata = {
  614. &smc91x_device,
  615. &i2c_bus_device,
  616. &serial_device,
  617. &isp116x_device,
  618. &viper_mtd_devices[0],
  619. &viper_mtd_devices[1],
  620. &viper_backlight_device,
  621. &viper_pcmcia_device,
  622. };
  623. static mfp_cfg_t viper_pin_config[] __initdata = {
  624. /* Chip selects */
  625. GPIO15_nCS_1,
  626. GPIO78_nCS_2,
  627. GPIO79_nCS_3,
  628. GPIO80_nCS_4,
  629. GPIO33_nCS_5,
  630. /* AC97 */
  631. GPIO28_AC97_BITCLK,
  632. GPIO29_AC97_SDATA_IN_0,
  633. GPIO30_AC97_SDATA_OUT,
  634. GPIO31_AC97_SYNC,
  635. /* FP Backlight */
  636. GPIO9_GPIO, /* VIPER_BCKLIGHT_EN_GPIO */
  637. GPIO10_GPIO, /* VIPER_LCD_EN_GPIO */
  638. GPIO16_PWM0_OUT,
  639. /* Ethernet PHY Ready */
  640. GPIO18_RDY,
  641. /* Serial shutdown */
  642. GPIO12_GPIO | MFP_LPM_DRIVE_HIGH, /* VIPER_UART_SHDN_GPIO */
  643. /* Compact-Flash / PC104 */
  644. GPIO48_nPOE,
  645. GPIO49_nPWE,
  646. GPIO50_nPIOR,
  647. GPIO51_nPIOW,
  648. GPIO52_nPCE_1,
  649. GPIO53_nPCE_2,
  650. GPIO54_nPSKTSEL,
  651. GPIO55_nPREG,
  652. GPIO56_nPWAIT,
  653. GPIO57_nIOIS16,
  654. GPIO8_GPIO, /* VIPER_CF_RDY_GPIO */
  655. GPIO32_GPIO, /* VIPER_CF_CD_GPIO */
  656. GPIO82_GPIO, /* VIPER_CF_POWER_GPIO */
  657. /* Integrated UPS control */
  658. GPIO20_GPIO, /* VIPER_UPS_GPIO */
  659. /* Vcc regulator control */
  660. GPIO6_GPIO, /* VIPER_PSU_DATA_GPIO */
  661. GPIO11_GPIO, /* VIPER_PSU_CLK_GPIO */
  662. GPIO19_GPIO, /* VIPER_PSU_nCS_LD_GPIO */
  663. /* i2c busses */
  664. GPIO26_GPIO, /* VIPER_TPM_I2C_SDA_GPIO */
  665. GPIO27_GPIO, /* VIPER_TPM_I2C_SCL_GPIO */
  666. GPIO83_GPIO, /* VIPER_RTC_I2C_SDA_GPIO */
  667. GPIO84_GPIO, /* VIPER_RTC_I2C_SCL_GPIO */
  668. /* PC/104 Interrupt */
  669. GPIO1_GPIO | WAKEUP_ON_EDGE_RISE, /* VIPER_CPLD_GPIO */
  670. };
  671. static unsigned long viper_tpm;
  672. static int __init viper_tpm_setup(char *str)
  673. {
  674. return kstrtoul(str, 10, &viper_tpm) >= 0;
  675. }
  676. __setup("tpm=", viper_tpm_setup);
  677. static void __init viper_tpm_init(void)
  678. {
  679. struct platform_device *tpm_device;
  680. struct i2c_gpio_platform_data i2c_tpm_data = {
  681. .sda_pin = VIPER_TPM_I2C_SDA_GPIO,
  682. .scl_pin = VIPER_TPM_I2C_SCL_GPIO,
  683. .udelay = 10,
  684. .timeout = HZ,
  685. };
  686. char *errstr;
  687. /* Allocate TPM i2c bus if requested */
  688. if (!viper_tpm)
  689. return;
  690. tpm_device = platform_device_alloc("i2c-gpio", 2);
  691. if (tpm_device) {
  692. if (!platform_device_add_data(tpm_device,
  693. &i2c_tpm_data,
  694. sizeof(i2c_tpm_data))) {
  695. if (platform_device_add(tpm_device)) {
  696. errstr = "register TPM i2c bus";
  697. goto error_free_tpm;
  698. }
  699. } else {
  700. errstr = "allocate TPM i2c bus data";
  701. goto error_free_tpm;
  702. }
  703. } else {
  704. errstr = "allocate TPM i2c device";
  705. goto error_tpm;
  706. }
  707. return;
  708. error_free_tpm:
  709. kfree(tpm_device);
  710. error_tpm:
  711. pr_err("viper: Couldn't %s, giving up\n", errstr);
  712. }
  713. static void __init viper_init_vcore_gpios(void)
  714. {
  715. if (gpio_request(VIPER_PSU_DATA_GPIO, "PSU data"))
  716. goto err_request_data;
  717. if (gpio_request(VIPER_PSU_CLK_GPIO, "PSU clock"))
  718. goto err_request_clk;
  719. if (gpio_request(VIPER_PSU_nCS_LD_GPIO, "PSU cs"))
  720. goto err_request_cs;
  721. if (gpio_direction_output(VIPER_PSU_DATA_GPIO, 0) ||
  722. gpio_direction_output(VIPER_PSU_CLK_GPIO, 0) ||
  723. gpio_direction_output(VIPER_PSU_nCS_LD_GPIO, 0))
  724. goto err_dir;
  725. /* c/should assume redboot set the correct level ??? */
  726. viper_set_core_cpu_voltage(get_clk_frequency_khz(0), 1);
  727. return;
  728. err_dir:
  729. gpio_free(VIPER_PSU_nCS_LD_GPIO);
  730. err_request_cs:
  731. gpio_free(VIPER_PSU_CLK_GPIO);
  732. err_request_clk:
  733. gpio_free(VIPER_PSU_DATA_GPIO);
  734. err_request_data:
  735. pr_err("viper: Failed to setup vcore control GPIOs\n");
  736. }
  737. static void __init viper_init_serial_gpio(void)
  738. {
  739. if (gpio_request(VIPER_UART_SHDN_GPIO, "UARTs shutdown"))
  740. goto err_request;
  741. if (gpio_direction_output(VIPER_UART_SHDN_GPIO, 0))
  742. goto err_dir;
  743. return;
  744. err_dir:
  745. gpio_free(VIPER_UART_SHDN_GPIO);
  746. err_request:
  747. pr_err("viper: Failed to setup UART shutdown GPIO\n");
  748. }
  749. #ifdef CONFIG_CPU_FREQ
  750. static int viper_cpufreq_notifier(struct notifier_block *nb,
  751. unsigned long val, void *data)
  752. {
  753. struct cpufreq_freqs *freq = data;
  754. /* TODO: Adjust timings??? */
  755. switch (val) {
  756. case CPUFREQ_PRECHANGE:
  757. if (freq->old < freq->new) {
  758. /* we are getting faster so raise the voltage
  759. * before we change freq */
  760. viper_set_core_cpu_voltage(freq->new, 0);
  761. }
  762. break;
  763. case CPUFREQ_POSTCHANGE:
  764. if (freq->old > freq->new) {
  765. /* we are slowing down so drop the power
  766. * after we change freq */
  767. viper_set_core_cpu_voltage(freq->new, 0);
  768. }
  769. break;
  770. default:
  771. /* ignore */
  772. break;
  773. }
  774. return 0;
  775. }
  776. static struct notifier_block viper_cpufreq_notifier_block = {
  777. .notifier_call = viper_cpufreq_notifier
  778. };
  779. static void __init viper_init_cpufreq(void)
  780. {
  781. if (cpufreq_register_notifier(&viper_cpufreq_notifier_block,
  782. CPUFREQ_TRANSITION_NOTIFIER))
  783. pr_err("viper: Failed to setup cpufreq notifier\n");
  784. }
  785. #else
  786. static inline void viper_init_cpufreq(void) {}
  787. #endif
  788. static void viper_power_off(void)
  789. {
  790. pr_notice("Shutting off UPS\n");
  791. gpio_set_value(VIPER_UPS_GPIO, 1);
  792. /* Spin to death... */
  793. while (1);
  794. }
  795. static void __init viper_init(void)
  796. {
  797. u8 version;
  798. pm_power_off = viper_power_off;
  799. pxa2xx_mfp_config(ARRAY_AND_SIZE(viper_pin_config));
  800. pxa_set_ffuart_info(NULL);
  801. pxa_set_btuart_info(NULL);
  802. pxa_set_stuart_info(NULL);
  803. /* Wake-up serial console */
  804. viper_init_serial_gpio();
  805. pxa_set_fb_info(NULL, &fb_info);
  806. /* v1 hardware cannot use the datacs line */
  807. version = viper_hw_version();
  808. if (version == 0)
  809. smc91x_device.num_resources--;
  810. pxa_set_i2c_info(NULL);
  811. pwm_add_table(viper_pwm_lookup, ARRAY_SIZE(viper_pwm_lookup));
  812. platform_add_devices(viper_devs, ARRAY_SIZE(viper_devs));
  813. viper_init_vcore_gpios();
  814. viper_init_cpufreq();
  815. register_syscore_ops(&viper_cpu_syscore_ops);
  816. if (version) {
  817. pr_info("viper: hardware v%di%d detected. "
  818. "CPLD revision %d.\n",
  819. VIPER_BOARD_VERSION(version),
  820. VIPER_BOARD_ISSUE(version),
  821. VIPER_CPLD_REVISION(version));
  822. system_rev = (VIPER_BOARD_VERSION(version) << 8) |
  823. (VIPER_BOARD_ISSUE(version) << 4) |
  824. VIPER_CPLD_REVISION(version);
  825. } else {
  826. pr_info("viper: No version register.\n");
  827. }
  828. i2c_register_board_info(1, ARRAY_AND_SIZE(viper_i2c_devices));
  829. viper_tpm_init();
  830. pxa_set_ac97_info(NULL);
  831. }
  832. static struct map_desc viper_io_desc[] __initdata = {
  833. {
  834. .virtual = VIPER_CPLD_BASE,
  835. .pfn = __phys_to_pfn(VIPER_CPLD_PHYS),
  836. .length = 0x00300000,
  837. .type = MT_DEVICE,
  838. },
  839. {
  840. .virtual = VIPER_PC104IO_BASE,
  841. .pfn = __phys_to_pfn(0x30000000),
  842. .length = 0x00800000,
  843. .type = MT_DEVICE,
  844. },
  845. };
  846. static void __init viper_map_io(void)
  847. {
  848. pxa25x_map_io();
  849. iotable_init(viper_io_desc, ARRAY_SIZE(viper_io_desc));
  850. PCFR |= PCFR_OPDE;
  851. }
  852. MACHINE_START(VIPER, "Arcom/Eurotech VIPER SBC")
  853. /* Maintainer: Marc Zyngier <maz@misterjones.org> */
  854. .atag_offset = 0x100,
  855. .map_io = viper_map_io,
  856. .nr_irqs = PXA_NR_IRQS,
  857. .init_irq = viper_init_irq,
  858. .handle_irq = pxa25x_handle_irq,
  859. .init_time = pxa_timer_init,
  860. .init_machine = viper_init,
  861. .restart = pxa_restart,
  862. MACHINE_END