pxa25x.c 4.7 KB

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  1. /*
  2. * linux/arch/arm/mach-pxa/pxa25x.c
  3. *
  4. * Author: Nicolas Pitre
  5. * Created: Jun 15, 2001
  6. * Copyright: MontaVista Software Inc.
  7. *
  8. * Code specific to PXA21x/25x/26x variants.
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License version 2 as
  12. * published by the Free Software Foundation.
  13. *
  14. * Since this file should be linked before any other machine specific file,
  15. * the __initcall() here will be executed first. This serves as default
  16. * initialization stuff for PXA machines which can be overridden later if
  17. * need be.
  18. */
  19. #include <linux/gpio.h>
  20. #include <linux/gpio-pxa.h>
  21. #include <linux/module.h>
  22. #include <linux/kernel.h>
  23. #include <linux/init.h>
  24. #include <linux/platform_device.h>
  25. #include <linux/suspend.h>
  26. #include <linux/syscore_ops.h>
  27. #include <linux/irq.h>
  28. #include <linux/irqchip.h>
  29. #include <asm/mach/map.h>
  30. #include <asm/suspend.h>
  31. #include <mach/hardware.h>
  32. #include <mach/irqs.h>
  33. #include "pxa25x.h"
  34. #include <mach/reset.h>
  35. #include "pm.h"
  36. #include <mach/dma.h>
  37. #include <mach/smemc.h>
  38. #include "generic.h"
  39. #include "devices.h"
  40. /*
  41. * Various clock factors driven by the CCCR register.
  42. */
  43. #ifdef CONFIG_PM
  44. #define SAVE(x) sleep_save[SLEEP_SAVE_##x] = x
  45. #define RESTORE(x) x = sleep_save[SLEEP_SAVE_##x]
  46. /*
  47. * List of global PXA peripheral registers to preserve.
  48. * More ones like CP and general purpose register values are preserved
  49. * with the stack pointer in sleep.S.
  50. */
  51. enum {
  52. SLEEP_SAVE_PSTR,
  53. SLEEP_SAVE_COUNT
  54. };
  55. static void pxa25x_cpu_pm_save(unsigned long *sleep_save)
  56. {
  57. SAVE(PSTR);
  58. }
  59. static void pxa25x_cpu_pm_restore(unsigned long *sleep_save)
  60. {
  61. RESTORE(PSTR);
  62. }
  63. static void pxa25x_cpu_pm_enter(suspend_state_t state)
  64. {
  65. /* Clear reset status */
  66. RCSR = RCSR_HWR | RCSR_WDR | RCSR_SMR | RCSR_GPR;
  67. switch (state) {
  68. case PM_SUSPEND_MEM:
  69. cpu_suspend(PWRMODE_SLEEP, pxa25x_finish_suspend);
  70. break;
  71. }
  72. }
  73. static int pxa25x_cpu_pm_prepare(void)
  74. {
  75. /* set resume return address */
  76. PSPR = virt_to_phys(cpu_resume);
  77. return 0;
  78. }
  79. static void pxa25x_cpu_pm_finish(void)
  80. {
  81. /* ensure not to come back here if it wasn't intended */
  82. PSPR = 0;
  83. }
  84. static struct pxa_cpu_pm_fns pxa25x_cpu_pm_fns = {
  85. .save_count = SLEEP_SAVE_COUNT,
  86. .valid = suspend_valid_only_mem,
  87. .save = pxa25x_cpu_pm_save,
  88. .restore = pxa25x_cpu_pm_restore,
  89. .enter = pxa25x_cpu_pm_enter,
  90. .prepare = pxa25x_cpu_pm_prepare,
  91. .finish = pxa25x_cpu_pm_finish,
  92. };
  93. static void __init pxa25x_init_pm(void)
  94. {
  95. pxa_cpu_pm_fns = &pxa25x_cpu_pm_fns;
  96. }
  97. #else
  98. static inline void pxa25x_init_pm(void) {}
  99. #endif
  100. /* PXA25x: supports wakeup from GPIO0..GPIO15 and RTC alarm
  101. */
  102. static int pxa25x_set_wake(struct irq_data *d, unsigned int on)
  103. {
  104. int gpio = pxa_irq_to_gpio(d->irq);
  105. uint32_t mask = 0;
  106. if (gpio >= 0 && gpio < 85)
  107. return gpio_set_wake(gpio, on);
  108. if (d->irq == IRQ_RTCAlrm) {
  109. mask = PWER_RTC;
  110. goto set_pwer;
  111. }
  112. return -EINVAL;
  113. set_pwer:
  114. if (on)
  115. PWER |= mask;
  116. else
  117. PWER &=~mask;
  118. return 0;
  119. }
  120. void __init pxa25x_init_irq(void)
  121. {
  122. pxa_init_irq(32, pxa25x_set_wake);
  123. }
  124. #ifdef CONFIG_CPU_PXA26x
  125. void __init pxa26x_init_irq(void)
  126. {
  127. pxa_init_irq(32, pxa25x_set_wake);
  128. }
  129. #endif
  130. static int __init __init
  131. pxa25x_dt_init_irq(struct device_node *node, struct device_node *parent)
  132. {
  133. pxa_dt_irq_init(pxa25x_set_wake);
  134. set_handle_irq(icip_handle_irq);
  135. return 0;
  136. }
  137. IRQCHIP_DECLARE(pxa25x_intc, "marvell,pxa-intc", pxa25x_dt_init_irq);
  138. static struct map_desc pxa25x_io_desc[] __initdata = {
  139. { /* Mem Ctl */
  140. .virtual = (unsigned long)SMEMC_VIRT,
  141. .pfn = __phys_to_pfn(PXA2XX_SMEMC_BASE),
  142. .length = SMEMC_SIZE,
  143. .type = MT_DEVICE
  144. }, { /* UNCACHED_PHYS_0 */
  145. .virtual = UNCACHED_PHYS_0,
  146. .pfn = __phys_to_pfn(0x00000000),
  147. .length = UNCACHED_PHYS_0_SIZE,
  148. .type = MT_DEVICE
  149. },
  150. };
  151. void __init pxa25x_map_io(void)
  152. {
  153. pxa_map_io();
  154. iotable_init(ARRAY_AND_SIZE(pxa25x_io_desc));
  155. pxa25x_get_clk_frequency_khz(1);
  156. }
  157. static struct pxa_gpio_platform_data pxa25x_gpio_info __initdata = {
  158. .irq_base = PXA_GPIO_TO_IRQ(0),
  159. .gpio_set_wake = gpio_set_wake,
  160. };
  161. static struct platform_device *pxa25x_devices[] __initdata = {
  162. &pxa25x_device_udc,
  163. &pxa_device_pmu,
  164. &pxa_device_i2s,
  165. &sa1100_device_rtc,
  166. &pxa25x_device_ssp,
  167. &pxa25x_device_nssp,
  168. &pxa25x_device_assp,
  169. &pxa25x_device_pwm0,
  170. &pxa25x_device_pwm1,
  171. &pxa_device_asoc_platform,
  172. };
  173. static int __init pxa25x_init(void)
  174. {
  175. int ret = 0;
  176. if (cpu_is_pxa25x()) {
  177. reset_status = RCSR;
  178. pxa25x_init_pm();
  179. register_syscore_ops(&pxa_irq_syscore_ops);
  180. register_syscore_ops(&pxa2xx_mfp_syscore_ops);
  181. if (!of_have_populated_dt()) {
  182. pxa2xx_set_dmac_info(16, 40);
  183. pxa_register_device(&pxa25x_device_gpio, &pxa25x_gpio_info);
  184. ret = platform_add_devices(pxa25x_devices,
  185. ARRAY_SIZE(pxa25x_devices));
  186. }
  187. }
  188. return ret;
  189. }
  190. postcore_initcall(pxa25x_init);