svml.h 389 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130113111321133113411351136113711381139114011411142114311441145114611471148114911501151115211531154115511561157115811591160116111621163116411651166116711681169117011711172117311741175117611771178117911801181118211831184118511861187118811891190119111921193119411951196119711981199120012011202120312041205120612071208120912101211121212131214121512161217121812191220122112221223122412251226122712281229123012311232123312341235123612371238123912401241124212431244124512461247124812491250125112521253125412551256125712581259126012611262126312641265126612671268126912701271127212731274127512761277127812791280128112821283128412851286128712881289129012911292129312941295129612971298129913001301130213031304130513061307130813091310131113121313131413151316131713181319132013211322132313241325132613271328132913301331133213331334133513361337133813391340134113421343134413451346134713481349135013511352135313541355135613571358135913601361136213631364136513661367136813691370137113721373137413751376137713781379138013811382138313841385138613871388138913901391139213931394139513961397139813991400140114021403140414051406140714081409141014111412141314141415141614171418141914201421142214231424142514261427142814291430143114321433143414351436143714381439144014411442144314441445144614471448144914501451145214531454145514561457145814591460146114621463146414651466146714681469147014711472147314741475147614771478147914801481148214831484148514861487148814891490149114921493149414951496149714981499150015011502150315041505150615071508150915101511151215131514151515161517151815191520152115221523152415251526152715281529153015311532153315341535153615371538153915401541154215431544154515461547154815491550155115521553155415551556155715581559156015611562156315641565156615671568156915701571157215731574157515761577157815791580158115821583158415851586158715881589159015911592159315941595159615971598159916001601160216031604160516061607160816091610161116121613161416151616161716181619162016211622162316241625162616271628162916301631163216331634163516361637163816391640164116421643164416451646164716481649165016511652165316541655165616571658165916601661166216631664166516661667166816691670167116721673167416751676167716781679168016811682168316841685168616871688168916901691169216931694169516961697169816991700170117021703170417051706170717081709171017111712171317141715171617171718171917201721172217231724172517261727172817291730173117321733173417351736173717381739174017411742174317441745174617471748174917501751175217531754175517561757175817591760176117621763176417651766176717681769177017711772177317741775177617771778177917801781178217831784178517861787178817891790179117921793179417951796179717981799180018011802180318041805180618071808180918101811181218131814181518161817181818191820182118221823182418251826182718281829183018311832183318341835183618371838183918401841184218431844184518461847184818491850185118521853185418551856185718581859186018611862186318641865186618671868186918701871187218731874187518761877187818791880188118821883188418851886188718881889189018911892189318941895189618971898189919001901190219031904190519061907190819091910191119121913191419151916191719181919192019211922192319241925192619271928192919301931193219331934193519361937193819391940194119421943194419451946194719481949195019511952195319541955195619571958195919601961196219631964196519661967196819691970197119721973197419751976197719781979198019811982198319841985198619871988198919901991199219931994199519961997199819992000200120022003200420052006200720082009201020112012201320142015201620172018201920202021202220232024202520262027202820292030203120322033203420352036203720382039204020412042204320442045204620472048204920502051205220532054205520562057205820592060206120622063206420652066206720682069207020712072207320742075207620772078207920802081208220832084208520862087208820892090209120922093209420952096209720982099210021012102210321042105210621072108210921102111211221132114211521162117211821192120212121222123212421252126212721282129213021312132213321342135213621372138213921402141214221432144214521462147214821492150215121522153215421552156215721582159216021612162216321642165216621672168216921702171217221732174217521762177217821792180218121822183218421852186218721882189219021912192219321942195219621972198219922002201220222032204220522062207220822092210221122122213221422152216221722182219222022212222222322242225222622272228222922302231223222332234223522362237223822392240224122422243224422452246224722482249225022512252225322542255225622572258225922602261226222632264226522662267226822692270227122722273227422752276227722782279228022812282228322842285228622872288228922902291229222932294229522962297229822992300230123022303230423052306230723082309231023112312231323142315231623172318231923202321232223232324232523262327232823292330233123322333233423352336233723382339234023412342234323442345234623472348234923502351235223532354235523562357235823592360236123622363236423652366236723682369237023712372237323742375237623772378237923802381238223832384238523862387238823892390239123922393239423952396239723982399240024012402240324042405240624072408240924102411241224132414241524162417241824192420242124222423242424252426242724282429243024312432243324342435243624372438243924402441244224432444244524462447244824492450245124522453245424552456245724582459246024612462246324642465246624672468246924702471247224732474247524762477247824792480248124822483248424852486248724882489249024912492249324942495249624972498249925002501250225032504250525062507250825092510251125122513251425152516251725182519252025212522252325242525252625272528252925302531253225332534253525362537253825392540254125422543254425452546254725482549255025512552255325542555255625572558255925602561256225632564256525662567256825692570257125722573257425752576257725782579258025812582258325842585258625872588258925902591259225932594259525962597259825992600260126022603260426052606260726082609261026112612261326142615261626172618261926202621262226232624262526262627262826292630263126322633263426352636263726382639264026412642264326442645264626472648264926502651265226532654265526562657265826592660266126622663266426652666266726682669267026712672267326742675267626772678267926802681268226832684268526862687268826892690269126922693269426952696269726982699270027012702270327042705270627072708270927102711271227132714271527162717271827192720272127222723272427252726272727282729273027312732273327342735273627372738273927402741274227432744274527462747274827492750275127522753275427552756275727582759276027612762276327642765276627672768276927702771277227732774277527762777277827792780278127822783278427852786278727882789279027912792279327942795279627972798279928002801280228032804280528062807280828092810281128122813281428152816281728182819282028212822282328242825282628272828282928302831283228332834283528362837283828392840284128422843284428452846284728482849285028512852285328542855285628572858285928602861286228632864286528662867286828692870287128722873287428752876287728782879288028812882288328842885288628872888288928902891289228932894289528962897289828992900290129022903290429052906290729082909291029112912291329142915291629172918291929202921292229232924292529262927292829292930293129322933293429352936293729382939294029412942294329442945294629472948294929502951295229532954295529562957295829592960296129622963296429652966296729682969297029712972297329742975297629772978297929802981298229832984298529862987298829892990299129922993299429952996299729982999300030013002300330043005300630073008300930103011301230133014301530163017301830193020302130223023302430253026302730283029303030313032303330343035303630373038303930403041304230433044304530463047304830493050305130523053305430553056305730583059306030613062306330643065306630673068306930703071307230733074307530763077307830793080308130823083308430853086308730883089309030913092309330943095309630973098309931003101310231033104310531063107310831093110311131123113311431153116311731183119312031213122312331243125312631273128312931303131313231333134313531363137313831393140314131423143314431453146314731483149315031513152315331543155315631573158315931603161316231633164316531663167316831693170317131723173317431753176317731783179318031813182318331843185318631873188318931903191319231933194319531963197319831993200320132023203320432053206320732083209321032113212321332143215321632173218321932203221322232233224322532263227322832293230323132323233323432353236323732383239324032413242324332443245324632473248324932503251325232533254325532563257325832593260326132623263326432653266326732683269327032713272327332743275327632773278327932803281328232833284328532863287328832893290329132923293329432953296329732983299330033013302330333043305330633073308330933103311331233133314331533163317331833193320332133223323332433253326332733283329333033313332333333343335333633373338333933403341334233433344334533463347334833493350335133523353335433553356335733583359336033613362336333643365336633673368336933703371337233733374337533763377337833793380338133823383338433853386338733883389339033913392339333943395339633973398339934003401340234033404340534063407340834093410341134123413341434153416341734183419342034213422342334243425342634273428342934303431343234333434343534363437343834393440344134423443344434453446344734483449345034513452345334543455345634573458345934603461346234633464346534663467346834693470347134723473347434753476347734783479348034813482348334843485348634873488348934903491349234933494349534963497349834993500350135023503350435053506350735083509351035113512351335143515351635173518351935203521352235233524352535263527352835293530353135323533353435353536353735383539354035413542354335443545354635473548354935503551355235533554355535563557355835593560356135623563356435653566356735683569357035713572357335743575357635773578357935803581358235833584358535863587358835893590359135923593359435953596359735983599360036013602360336043605360636073608360936103611361236133614361536163617361836193620362136223623362436253626362736283629363036313632363336343635363636373638363936403641364236433644364536463647364836493650365136523653365436553656365736583659366036613662366336643665366636673668366936703671367236733674367536763677367836793680368136823683368436853686368736883689369036913692369336943695369636973698369937003701370237033704370537063707370837093710371137123713371437153716371737183719372037213722372337243725372637273728372937303731373237333734373537363737373837393740374137423743374437453746374737483749375037513752375337543755375637573758375937603761376237633764376537663767376837693770377137723773377437753776377737783779378037813782378337843785378637873788378937903791379237933794379537963797379837993800380138023803380438053806380738083809381038113812381338143815381638173818381938203821382238233824382538263827382838293830383138323833383438353836383738383839384038413842384338443845384638473848384938503851385238533854385538563857385838593860386138623863386438653866386738683869387038713872387338743875387638773878387938803881388238833884388538863887388838893890389138923893389438953896389738983899390039013902390339043905390639073908390939103911391239133914391539163917391839193920392139223923392439253926392739283929393039313932393339343935393639373938393939403941394239433944394539463947394839493950395139523953395439553956395739583959396039613962396339643965396639673968396939703971397239733974397539763977397839793980398139823983398439853986398739883989399039913992399339943995399639973998399940004001400240034004400540064007400840094010401140124013401440154016401740184019402040214022402340244025402640274028402940304031403240334034403540364037403840394040404140424043404440454046404740484049405040514052405340544055405640574058405940604061406240634064406540664067406840694070407140724073407440754076407740784079408040814082408340844085408640874088408940904091409240934094409540964097409840994100410141024103410441054106410741084109411041114112411341144115411641174118411941204121412241234124412541264127412841294130413141324133413441354136413741384139414041414142414341444145414641474148414941504151415241534154415541564157415841594160416141624163416441654166416741684169417041714172417341744175417641774178417941804181418241834184418541864187418841894190419141924193419441954196419741984199420042014202420342044205420642074208420942104211421242134214421542164217421842194220422142224223422442254226422742284229423042314232423342344235423642374238423942404241424242434244424542464247424842494250425142524253425442554256425742584259426042614262426342644265426642674268426942704271427242734274427542764277427842794280428142824283428442854286428742884289429042914292429342944295429642974298429943004301430243034304430543064307430843094310431143124313431443154316431743184319432043214322432343244325432643274328432943304331433243334334433543364337433843394340434143424343434443454346434743484349435043514352435343544355435643574358435943604361436243634364436543664367436843694370437143724373437443754376437743784379438043814382438343844385438643874388438943904391439243934394439543964397439843994400440144024403440444054406440744084409441044114412441344144415441644174418441944204421442244234424442544264427442844294430443144324433443444354436443744384439444044414442444344444445444644474448444944504451445244534454445544564457445844594460446144624463446444654466446744684469447044714472447344744475447644774478447944804481448244834484448544864487448844894490449144924493449444954496449744984499450045014502450345044505450645074508450945104511451245134514451545164517451845194520452145224523452445254526452745284529453045314532453345344535453645374538453945404541454245434544454545464547454845494550455145524553455445554556455745584559456045614562456345644565456645674568456945704571457245734574457545764577457845794580458145824583458445854586458745884589459045914592459345944595459645974598459946004601460246034604460546064607460846094610461146124613461446154616461746184619462046214622462346244625462646274628462946304631463246334634463546364637463846394640464146424643464446454646464746484649465046514652465346544655465646574658465946604661466246634664466546664667466846694670467146724673467446754676467746784679468046814682468346844685468646874688468946904691469246934694469546964697469846994700470147024703470447054706470747084709471047114712471347144715471647174718471947204721472247234724472547264727472847294730473147324733473447354736473747384739474047414742474347444745474647474748474947504751475247534754475547564757475847594760476147624763476447654766476747684769477047714772477347744775477647774778477947804781478247834784478547864787478847894790479147924793479447954796479747984799480048014802480348044805480648074808480948104811481248134814481548164817481848194820482148224823482448254826482748284829483048314832483348344835483648374838483948404841484248434844484548464847484848494850485148524853485448554856485748584859486048614862486348644865486648674868486948704871487248734874487548764877487848794880488148824883488448854886488748884889489048914892489348944895489648974898489949004901490249034904490549064907490849094910491149124913491449154916491749184919492049214922492349244925492649274928492949304931493249334934493549364937493849394940494149424943494449454946494749484949495049514952495349544955495649574958495949604961496249634964496549664967496849694970497149724973497449754976497749784979498049814982498349844985498649874988498949904991499249934994499549964997499849995000500150025003500450055006500750085009501050115012501350145015501650175018501950205021502250235024502550265027502850295030503150325033503450355036503750385039504050415042504350445045504650475048504950505051505250535054505550565057505850595060506150625063506450655066506750685069507050715072507350745075507650775078507950805081508250835084508550865087508850895090509150925093509450955096509750985099510051015102510351045105510651075108510951105111511251135114511551165117511851195120512151225123512451255126512751285129513051315132513351345135513651375138513951405141514251435144514551465147514851495150515151525153515451555156515751585159516051615162516351645165516651675168516951705171517251735174517551765177517851795180518151825183518451855186518751885189519051915192519351945195519651975198519952005201520252035204520552065207520852095210521152125213521452155216521752185219522052215222522352245225522652275228522952305231523252335234523552365237523852395240524152425243524452455246524752485249525052515252525352545255525652575258525952605261526252635264526552665267526852695270527152725273527452755276527752785279528052815282528352845285528652875288528952905291529252935294529552965297529852995300530153025303530453055306530753085309531053115312531353145315531653175318531953205321532253235324532553265327532853295330533153325333533453355336533753385339534053415342534353445345534653475348534953505351535253535354535553565357535853595360536153625363536453655366536753685369537053715372537353745375537653775378537953805381538253835384538553865387538853895390539153925393539453955396539753985399540054015402540354045405540654075408540954105411541254135414541554165417541854195420542154225423542454255426542754285429543054315432543354345435543654375438543954405441544254435444544554465447544854495450545154525453545454555456545754585459546054615462546354645465546654675468546954705471547254735474547554765477547854795480548154825483548454855486548754885489549054915492549354945495549654975498549955005501550255035504550555065507550855095510551155125513551455155516551755185519552055215522552355245525552655275528552955305531553255335534553555365537553855395540554155425543554455455546554755485549555055515552555355545555555655575558555955605561556255635564556555665567556855695570557155725573557455755576557755785579558055815582558355845585558655875588558955905591559255935594559555965597559855995600560156025603560456055606560756085609561056115612561356145615561656175618561956205621562256235624562556265627562856295630563156325633563456355636563756385639564056415642564356445645564656475648564956505651565256535654565556565657565856595660566156625663566456655666566756685669567056715672567356745675567656775678567956805681568256835684568556865687568856895690569156925693569456955696569756985699570057015702570357045705570657075708570957105711571257135714571557165717571857195720572157225723572457255726572757285729573057315732573357345735573657375738573957405741574257435744574557465747574857495750575157525753575457555756575757585759576057615762576357645765576657675768576957705771577257735774577557765777577857795780578157825783578457855786578757885789579057915792579357945795579657975798579958005801580258035804580558065807580858095810581158125813581458155816581758185819582058215822582358245825582658275828582958305831583258335834583558365837583858395840584158425843584458455846584758485849585058515852585358545855585658575858585958605861586258635864586558665867586858695870587158725873587458755876587758785879588058815882588358845885588658875888588958905891589258935894589558965897589858995900590159025903590459055906590759085909591059115912591359145915591659175918591959205921592259235924592559265927592859295930593159325933593459355936593759385939594059415942594359445945594659475948594959505951595259535954595559565957595859595960596159625963596459655966596759685969597059715972597359745975597659775978597959805981598259835984598559865987598859895990599159925993599459955996599759985999600060016002600360046005600660076008600960106011601260136014601560166017601860196020602160226023602460256026602760286029603060316032603360346035603660376038603960406041604260436044604560466047604860496050605160526053605460556056605760586059606060616062606360646065606660676068606960706071607260736074607560766077607860796080608160826083608460856086608760886089609060916092609360946095609660976098609961006101610261036104610561066107610861096110611161126113611461156116611761186119612061216122612361246125612661276128612961306131613261336134613561366137613861396140614161426143614461456146614761486149615061516152615361546155615661576158615961606161616261636164616561666167616861696170617161726173617461756176617761786179618061816182618361846185618661876188618961906191619261936194619561966197619861996200620162026203620462056206620762086209621062116212621362146215621662176218621962206221622262236224622562266227622862296230623162326233623462356236623762386239624062416242624362446245624662476248624962506251625262536254625562566257625862596260626162626263626462656266626762686269627062716272627362746275627662776278627962806281628262836284628562866287628862896290629162926293629462956296629762986299630063016302630363046305630663076308630963106311631263136314631563166317631863196320632163226323632463256326632763286329633063316332633363346335633663376338633963406341634263436344634563466347634863496350635163526353635463556356635763586359636063616362636363646365636663676368636963706371637263736374637563766377637863796380638163826383638463856386638763886389639063916392639363946395639663976398639964006401640264036404640564066407640864096410641164126413641464156416641764186419642064216422642364246425642664276428642964306431643264336434643564366437643864396440644164426443644464456446644764486449645064516452645364546455645664576458645964606461646264636464646564666467646864696470647164726473647464756476647764786479648064816482648364846485648664876488648964906491649264936494649564966497649864996500650165026503650465056506650765086509651065116512651365146515651665176518651965206521652265236524652565266527652865296530653165326533653465356536653765386539654065416542654365446545654665476548654965506551655265536554655565566557655865596560656165626563656465656566656765686569657065716572657365746575657665776578657965806581658265836584658565866587658865896590659165926593659465956596659765986599660066016602660366046605660666076608660966106611661266136614661566166617661866196620662166226623662466256626662766286629663066316632663366346635663666376638663966406641664266436644664566466647664866496650665166526653665466556656665766586659666066616662666366646665666666676668666966706671667266736674667566766677667866796680668166826683668466856686668766886689669066916692669366946695669666976698669967006701670267036704670567066707670867096710671167126713671467156716671767186719672067216722672367246725672667276728672967306731673267336734673567366737673867396740674167426743674467456746674767486749675067516752675367546755675667576758675967606761676267636764676567666767676867696770677167726773677467756776677767786779678067816782678367846785678667876788678967906791679267936794679567966797679867996800680168026803680468056806680768086809681068116812681368146815681668176818681968206821682268236824682568266827682868296830683168326833683468356836683768386839684068416842684368446845684668476848684968506851685268536854685568566857685868596860686168626863686468656866686768686869687068716872687368746875687668776878687968806881688268836884688568866887688868896890689168926893689468956896689768986899690069016902690369046905690669076908690969106911691269136914691569166917691869196920692169226923692469256926692769286929693069316932693369346935693669376938693969406941694269436944694569466947694869496950695169526953695469556956695769586959696069616962696369646965696669676968696969706971697269736974697569766977697869796980698169826983698469856986698769886989699069916992699369946995699669976998699970007001700270037004700570067007700870097010701170127013701470157016701770187019702070217022702370247025702670277028702970307031703270337034703570367037703870397040704170427043704470457046704770487049705070517052705370547055705670577058705970607061706270637064706570667067706870697070707170727073707470757076707770787079708070817082708370847085708670877088708970907091709270937094709570967097709870997100710171027103710471057106710771087109711071117112711371147115711671177118711971207121712271237124712571267127712871297130713171327133713471357136713771387139714071417142714371447145714671477148714971507151715271537154715571567157715871597160716171627163716471657166716771687169717071717172717371747175717671777178717971807181718271837184718571867187718871897190719171927193719471957196719771987199720072017202720372047205720672077208720972107211721272137214721572167217721872197220722172227223722472257226722772287229723072317232723372347235723672377238723972407241724272437244724572467247724872497250725172527253725472557256725772587259726072617262726372647265726672677268726972707271727272737274727572767277727872797280728172827283728472857286728772887289729072917292729372947295729672977298729973007301730273037304730573067307730873097310731173127313731473157316731773187319732073217322732373247325732673277328732973307331733273337334733573367337733873397340734173427343734473457346734773487349735073517352735373547355735673577358735973607361736273637364736573667367736873697370737173727373737473757376737773787379738073817382738373847385738673877388738973907391739273937394739573967397739873997400740174027403740474057406740774087409741074117412741374147415741674177418741974207421742274237424742574267427742874297430743174327433743474357436743774387439744074417442744374447445744674477448744974507451745274537454745574567457745874597460746174627463746474657466746774687469747074717472747374747475747674777478747974807481748274837484748574867487748874897490749174927493749474957496749774987499750075017502750375047505750675077508750975107511751275137514751575167517751875197520752175227523752475257526752775287529753075317532753375347535753675377538753975407541754275437544754575467547754875497550755175527553755475557556755775587559756075617562756375647565756675677568756975707571757275737574757575767577757875797580758175827583758475857586758775887589759075917592759375947595759675977598759976007601760276037604760576067607760876097610761176127613761476157616761776187619762076217622762376247625762676277628762976307631763276337634763576367637763876397640764176427643764476457646764776487649765076517652765376547655765676577658765976607661766276637664766576667667766876697670767176727673767476757676767776787679768076817682768376847685768676877688768976907691769276937694769576967697769876997700770177027703770477057706770777087709771077117712771377147715771677177718771977207721772277237724772577267727772877297730773177327733773477357736773777387739774077417742774377447745774677477748774977507751775277537754775577567757775877597760776177627763776477657766776777687769777077717772777377747775777677777778777977807781778277837784778577867787778877897790779177927793779477957796779777987799780078017802780378047805780678077808780978107811781278137814781578167817781878197820782178227823782478257826782778287829783078317832783378347835783678377838783978407841784278437844784578467847784878497850785178527853785478557856785778587859786078617862786378647865786678677868786978707871787278737874787578767877787878797880788178827883788478857886788778887889789078917892789378947895789678977898789979007901790279037904790579067907790879097910791179127913791479157916791779187919792079217922792379247925792679277928792979307931793279337934793579367937793879397940794179427943794479457946794779487949795079517952795379547955795679577958795979607961796279637964796579667967796879697970797179727973797479757976797779787979798079817982798379847985798679877988798979907991799279937994799579967997799879998000800180028003800480058006800780088009801080118012801380148015801680178018801980208021802280238024802580268027802880298030803180328033803480358036803780388039804080418042804380448045804680478048804980508051805280538054805580568057805880598060806180628063806480658066806780688069807080718072807380748075807680778078807980808081808280838084808580868087808880898090809180928093809480958096809780988099810081018102810381048105810681078108810981108111811281138114811581168117811881198120812181228123812481258126812781288129813081318132813381348135813681378138813981408141814281438144814581468147814881498150815181528153815481558156815781588159816081618162816381648165816681678168816981708171817281738174817581768177817881798180818181828183818481858186818781888189819081918192819381948195819681978198819982008201820282038204820582068207820882098210821182128213821482158216821782188219822082218222822382248225822682278228822982308231823282338234823582368237823882398240824182428243824482458246824782488249825082518252825382548255825682578258825982608261826282638264826582668267826882698270827182728273827482758276827782788279828082818282828382848285828682878288828982908291829282938294829582968297829882998300830183028303830483058306830783088309831083118312831383148315831683178318831983208321832283238324832583268327832883298330833183328333833483358336833783388339834083418342834383448345834683478348834983508351835283538354835583568357835883598360836183628363836483658366836783688369837083718372837383748375837683778378837983808381838283838384838583868387838883898390839183928393839483958396839783988399840084018402840384048405840684078408840984108411841284138414841584168417841884198420842184228423842484258426842784288429843084318432843384348435843684378438843984408441844284438444844584468447844884498450845184528453845484558456845784588459846084618462846384648465846684678468846984708471847284738474847584768477847884798480848184828483848484858486848784888489849084918492849384948495849684978498849985008501850285038504850585068507850885098510851185128513851485158516851785188519852085218522852385248525852685278528852985308531853285338534853585368537853885398540854185428543854485458546854785488549855085518552855385548555855685578558855985608561856285638564856585668567856885698570857185728573857485758576857785788579858085818582858385848585858685878588858985908591859285938594859585968597859885998600860186028603860486058606860786088609861086118612861386148615861686178618861986208621862286238624862586268627862886298630863186328633863486358636863786388639864086418642864386448645864686478648864986508651865286538654865586568657865886598660866186628663866486658666866786688669867086718672867386748675867686778678867986808681868286838684868586868687868886898690869186928693869486958696869786988699870087018702870387048705870687078708870987108711871287138714871587168717871887198720872187228723872487258726872787288729873087318732873387348735873687378738873987408741874287438744874587468747874887498750875187528753875487558756875787588759876087618762876387648765876687678768876987708771877287738774877587768777877887798780878187828783878487858786878787888789879087918792879387948795879687978798879988008801880288038804880588068807880888098810881188128813881488158816881788188819882088218822882388248825882688278828882988308831883288338834883588368837883888398840884188428843884488458846884788488849885088518852885388548855885688578858885988608861886288638864886588668867886888698870887188728873887488758876887788788879888088818882888388848885888688878888888988908891889288938894889588968897889888998900890189028903890489058906890789088909891089118912891389148915891689178918891989208921892289238924892589268927892889298930893189328933893489358936893789388939894089418942894389448945894689478948894989508951895289538954895589568957895889598960896189628963896489658966896789688969897089718972897389748975897689778978897989808981898289838984898589868987898889898990899189928993899489958996899789988999900090019002900390049005900690079008900990109011901290139014901590169017901890199020902190229023902490259026902790289029903090319032903390349035903690379038903990409041904290439044904590469047904890499050905190529053905490559056905790589059906090619062906390649065906690679068906990709071907290739074907590769077907890799080908190829083908490859086908790889089909090919092909390949095909690979098909991009101910291039104910591069107910891099110911191129113911491159116911791189119912091219122912391249125912691279128912991309131913291339134913591369137913891399140914191429143914491459146914791489149915091519152915391549155915691579158915991609161916291639164916591669167916891699170917191729173917491759176917791789179918091819182918391849185918691879188918991909191919291939194919591969197919891999200920192029203920492059206920792089209921092119212921392149215921692179218921992209221922292239224922592269227922892299230923192329233923492359236923792389239924092419242924392449245924692479248924992509251925292539254925592569257925892599260926192629263926492659266926792689269927092719272927392749275927692779278927992809281928292839284928592869287928892899290929192929293929492959296929792989299930093019302930393049305930693079308930993109311931293139314931593169317931893199320932193229323932493259326932793289329933093319332933393349335933693379338933993409341934293439344934593469347934893499350935193529353935493559356935793589359936093619362936393649365936693679368936993709371937293739374937593769377937893799380938193829383938493859386938793889389939093919392939393949395939693979398939994009401940294039404940594069407940894099410941194129413941494159416941794189419942094219422942394249425942694279428942994309431943294339434943594369437943894399440944194429443944494459446944794489449945094519452945394549455945694579458945994609461946294639464946594669467946894699470947194729473947494759476947794789479948094819482948394849485948694879488948994909491949294939494949594969497949894999500950195029503950495059506950795089509951095119512951395149515951695179518951995209521952295239524952595269527952895299530953195329533953495359536953795389539954095419542954395449545954695479548954995509551955295539554955595569557955895599560956195629563956495659566956795689569957095719572957395749575957695779578957995809581958295839584958595869587958895899590959195929593959495959596959795989599960096019602960396049605960696079608960996109611961296139614961596169617961896199620962196229623962496259626962796289629963096319632963396349635963696379638963996409641964296439644964596469647964896499650965196529653965496559656965796589659966096619662966396649665966696679668966996709671967296739674967596769677967896799680968196829683968496859686968796889689969096919692969396949695969696979698969997009701970297039704970597069707970897099710971197129713971497159716971797189719972097219722972397249725972697279728972997309731973297339734973597369737973897399740974197429743974497459746974797489749975097519752975397549755975697579758975997609761976297639764976597669767976897699770977197729773977497759776977797789779978097819782978397849785978697879788978997909791979297939794979597969797979897999800980198029803980498059806980798089809981098119812981398149815981698179818981998209821982298239824982598269827982898299830983198329833983498359836983798389839984098419842984398449845984698479848984998509851985298539854985598569857985898599860986198629863986498659866986798689869987098719872987398749875987698779878987998809881988298839884988598869887988898899890989198929893989498959896989798989899990099019902990399049905990699079908990999109911991299139914991599169917991899199920992199229923992499259926992799289929993099319932993399349935993699379938993999409941994299439944994599469947994899499950995199529953995499559956995799589959996099619962996399649965996699679968996999709971997299739974997599769977997899799980998199829983998499859986998799889989999099919992999399949995999699979998999910000100011000210003100041000510006100071000810009100101001110012100131001410015100161001710018100191002010021100221002310024100251002610027100281002910030100311003210033100341003510036100371003810039100401004110042100431004410045100461004710048100491005010051100521005310054100551005610057100581005910060100611006210063100641006510066100671006810069100701007110072100731007410075100761007710078100791008010081100821008310084100851008610087100881008910090100911009210093100941009510096100971009810099101001010110102101031010410105101061010710108101091011010111101121011310114101151011610117101181011910120101211012210123101241012510126101271012810129101301013110132101331013410135101361013710138101391014010141101421014310144101451014610147101481014910150101511015210153101541015510156101571015810159101601016110162101631016410165101661016710168101691017010171101721017310174101751017610177101781017910180101811018210183101841018510186101871018810189101901019110192101931019410195101961019710198101991020010201102021020310204102051020610207102081020910210102111021210213102141021510216102171021810219102201022110222102231022410225102261022710228102291023010231102321023310234102351023610237102381023910240102411024210243102441024510246102471024810249102501025110252102531025410255102561025710258102591026010261102621026310264102651026610267102681026910270102711027210273102741027510276102771027810279102801028110282102831028410285102861028710288102891029010291102921029310294102951029610297102981029910300103011030210303103041030510306103071030810309103101031110312103131031410315103161031710318103191032010321103221032310324103251032610327103281032910330103311033210333103341033510336103371033810339103401034110342103431034410345103461034710348103491035010351103521035310354103551035610357103581035910360103611036210363103641036510366103671036810369103701037110372103731037410375103761037710378103791038010381103821038310384103851038610387103881038910390103911039210393103941039510396103971039810399104001040110402104031040410405104061040710408104091041010411104121041310414104151041610417104181041910420104211042210423104241042510426104271042810429104301043110432104331043410435104361043710438104391044010441104421044310444104451044610447104481044910450104511045210453104541045510456104571045810459104601046110462104631046410465104661046710468104691047010471104721047310474104751047610477104781047910480104811048210483104841048510486104871048810489104901049110492104931049410495104961049710498104991050010501105021050310504105051050610507105081050910510105111051210513105141051510516105171051810519105201052110522105231052410525105261052710528105291053010531105321053310534105351053610537105381053910540105411054210543105441054510546105471054810549105501055110552105531055410555105561055710558105591056010561105621056310564105651056610567105681056910570105711057210573105741057510576105771057810579105801058110582105831058410585105861058710588105891059010591105921059310594105951059610597105981059910600106011060210603106041060510606106071060810609106101061110612106131061410615106161061710618106191062010621106221062310624106251062610627106281062910630106311063210633106341063510636106371063810639106401064110642106431064410645106461064710648106491065010651106521065310654106551065610657106581065910660106611066210663106641066510666106671066810669106701067110672106731067410675106761067710678106791068010681106821068310684106851068610687106881068910690106911069210693106941069510696106971069810699107001070110702107031070410705107061070710708107091071010711107121071310714107151071610717107181071910720107211072210723107241072510726107271072810729107301073110732107331073410735107361073710738107391074010741107421074310744107451074610747107481074910750107511075210753107541075510756107571075810759107601076110762107631076410765107661076710768107691077010771107721077310774107751077610777107781077910780107811078210783107841078510786107871078810789107901079110792107931079410795107961079710798107991080010801108021080310804108051080610807108081080910810108111081210813108141081510816108171081810819108201082110822108231082410825108261082710828108291083010831108321083310834108351083610837108381083910840108411084210843108441084510846108471084810849108501085110852108531085410855108561085710858108591086010861108621086310864108651086610867108681086910870108711087210873108741087510876108771087810879108801088110882108831088410885108861088710888108891089010891108921089310894108951089610897108981089910900109011090210903109041090510906109071090810909109101091110912109131091410915109161091710918109191092010921109221092310924109251092610927109281092910930109311093210933109341093510936109371093810939109401094110942109431094410945109461094710948109491095010951109521095310954109551095610957109581095910960109611096210963109641096510966109671096810969109701097110972109731097410975109761097710978109791098010981109821098310984109851098610987109881098910990109911099210993109941099510996109971099810999110001100111002110031100411005110061100711008110091101011011110121101311014110151101611017110181101911020110211102211023110241102511026110271102811029110301103111032110331103411035110361103711038110391104011041110421104311044110451104611047110481104911050110511105211053110541105511056110571105811059110601106111062110631106411065110661106711068110691107011071110721107311074110751107611077110781107911080110811108211083110841108511086110871108811089110901109111092110931109411095110961109711098110991110011101111021110311104111051110611107111081110911110111111111211113111141111511116111171111811119111201112111122111231112411125111261112711128111291113011131111321113311134111351113611137111381113911140111411114211143111441114511146111471114811149111501115111152111531115411155111561115711158111591116011161111621116311164111651116611167111681116911170111711117211173111741117511176111771117811179111801118111182111831118411185111861118711188111891119011191111921119311194111951119611197111981119911200112011120211203112041120511206112071120811209112101121111212112131121411215112161121711218112191122011221112221122311224112251122611227112281122911230112311123211233112341123511236112371123811239112401124111242112431124411245112461124711248112491125011251112521125311254112551125611257112581125911260112611126211263112641126511266112671126811269112701127111272112731127411275112761127711278112791128011281112821128311284112851128611287112881128911290112911129211293112941129511296112971129811299113001130111302113031130411305113061130711308113091131011311113121131311314113151131611317113181131911320113211132211323113241132511326113271132811329113301133111332113331133411335113361133711338113391134011341113421134311344113451134611347113481134911350113511135211353113541135511356113571135811359113601136111362113631136411365113661136711368113691137011371113721137311374113751137611377113781137911380113811138211383113841138511386113871138811389113901139111392113931139411395113961139711398113991140011401114021140311404114051140611407114081140911410114111141211413114141141511416114171141811419114201142111422114231142411425114261142711428114291143011431114321143311434114351143611437114381143911440114411144211443114441144511446114471144811449114501145111452114531145411455114561145711458114591146011461114621146311464114651146611467114681146911470114711147211473114741147511476114771147811479114801148111482114831148411485114861148711488114891149011491114921149311494114951149611497114981149911500115011150211503115041150511506115071150811509115101151111512115131151411515115161151711518115191152011521115221152311524115251152611527115281152911530115311153211533115341153511536115371153811539115401154111542115431154411545115461154711548115491155011551115521155311554115551155611557115581155911560115611156211563115641156511566115671156811569115701157111572115731157411575115761157711578115791158011581115821158311584115851158611587115881158911590115911159211593115941159511596115971159811599116001160111602116031160411605116061160711608116091161011611116121161311614116151161611617116181161911620116211162211623116241162511626116271162811629116301163111632116331163411635116361163711638116391164011641116421164311644116451164611647116481164911650116511165211653116541165511656116571165811659116601166111662116631166411665116661166711668116691167011671116721167311674116751167611677116781167911680116811168211683116841168511686116871168811689116901169111692116931169411695116961169711698116991170011701117021170311704117051170611707117081170911710117111171211713117141171511716117171171811719117201172111722117231172411725117261172711728117291173011731117321173311734117351173611737117381173911740117411174211743117441174511746117471174811749117501175111752117531175411755117561175711758117591176011761117621176311764117651176611767117681176911770117711177211773117741177511776117771177811779117801178111782117831178411785117861178711788117891179011791117921179311794117951179611797117981179911800118011180211803118041180511806118071180811809118101181111812118131181411815118161181711818118191182011821118221182311824118251182611827118281182911830118311183211833118341183511836118371183811839118401184111842118431184411845118461184711848118491185011851118521185311854118551185611857118581185911860118611186211863118641186511866118671186811869118701187111872118731187411875118761187711878118791188011881118821188311884118851188611887118881188911890118911189211893118941189511896118971189811899119001190111902119031190411905119061190711908119091191011911119121191311914119151191611917119181191911920119211192211923119241192511926119271192811929119301193111932119331193411935119361193711938119391194011941119421194311944119451194611947119481194911950119511195211953119541195511956119571195811959119601196111962119631196411965119661196711968119691197011971119721197311974119751197611977119781197911980119811198211983119841198511986119871198811989119901199111992119931199411995119961199711998119991200012001120021200312004120051200612007120081200912010120111201212013120141201512016120171201812019120201202112022120231202412025120261202712028120291203012031120321203312034120351203612037120381203912040120411204212043120441204512046120471204812049120501205112052120531205412055120561205712058120591206012061120621206312064120651206612067120681206912070120711207212073120741207512076120771207812079120801208112082120831208412085120861208712088120891209012091120921209312094120951209612097120981209912100121011210212103121041210512106121071210812109121101211112112121131211412115121161211712118121191212012121121221212312124121251212612127121281212912130
  1. /* SPDX-License-Identifier: MIT
  2. *
  3. * Permission is hereby granted, free of charge, to any person
  4. * obtaining a copy of this software and associated documentation
  5. * files (the "Software"), to deal in the Software without
  6. * restriction, including without limitation the rights to use, copy,
  7. * modify, merge, publish, distribute, sublicense, and/or sell copies
  8. * of the Software, and to permit persons to whom the Software is
  9. * furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice shall be
  12. * included in all copies or substantial portions of the Software.
  13. *
  14. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  15. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  16. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  17. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  18. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  19. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  20. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  21. * SOFTWARE.
  22. *
  23. * Copyright:
  24. * 2020 Evan Nemerson <evan@nemerson.com>
  25. * 2020 Himanshi Mathur <himanshi18037@iiitd.ac.in>
  26. */
  27. #if !defined(SIMDE_X86_SVML_H)
  28. #define SIMDE_X86_SVML_H
  29. #include "fma.h"
  30. #include "avx2.h"
  31. #include "avx512/abs.h"
  32. #include "avx512/add.h"
  33. #include "avx512/cmp.h"
  34. #include "avx512/copysign.h"
  35. #include "avx512/xorsign.h"
  36. #include "avx512/div.h"
  37. #include "avx512/fmadd.h"
  38. #include "avx512/mov.h"
  39. #include "avx512/mul.h"
  40. #include "avx512/negate.h"
  41. #include "avx512/or.h"
  42. #include "avx512/set1.h"
  43. #include "avx512/setone.h"
  44. #include "avx512/setzero.h"
  45. #include "avx512/sqrt.h"
  46. #include "avx512/sub.h"
  47. #include "../simde-complex.h"
  48. HEDLEY_DIAGNOSTIC_PUSH
  49. SIMDE_DISABLE_UNWANTED_DIAGNOSTICS
  50. SIMDE_BEGIN_DECLS_
  51. SIMDE_FUNCTION_ATTRIBUTES
  52. simde__m128
  53. simde_mm_acos_ps (simde__m128 a) {
  54. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
  55. return _mm_acos_ps(a);
  56. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
  57. #if SIMDE_ACCURACY_PREFERENCE > 1
  58. return Sleef_acosf4_u10(a);
  59. #else
  60. return Sleef_acosf4_u35(a);
  61. #endif
  62. #else
  63. simde__m128_private
  64. r_,
  65. a_ = simde__m128_to_private(a);
  66. SIMDE_VECTORIZE
  67. for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
  68. r_.f32[i] = simde_math_acosf(a_.f32[i]);
  69. }
  70. return simde__m128_from_private(r_);
  71. #endif
  72. }
  73. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  74. #undef _mm_acos_ps
  75. #define _mm_acos_ps(a) simde_mm_acos_ps(a)
  76. #endif
  77. SIMDE_FUNCTION_ATTRIBUTES
  78. simde__m128d
  79. simde_mm_acos_pd (simde__m128d a) {
  80. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
  81. return _mm_acos_pd(a);
  82. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
  83. #if SIMDE_ACCURACY_PREFERENCE > 1
  84. return Sleef_acosd2_u10(a);
  85. #else
  86. return Sleef_acosd2_u35(a);
  87. #endif
  88. #else
  89. simde__m128d_private
  90. r_,
  91. a_ = simde__m128d_to_private(a);
  92. SIMDE_VECTORIZE
  93. for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
  94. r_.f64[i] = simde_math_acos(a_.f64[i]);
  95. }
  96. return simde__m128d_from_private(r_);
  97. #endif
  98. }
  99. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  100. #undef _mm_acos_pd
  101. #define _mm_acos_pd(a) simde_mm_acos_pd(a)
  102. #endif
  103. SIMDE_FUNCTION_ATTRIBUTES
  104. simde__m256
  105. simde_mm256_acos_ps (simde__m256 a) {
  106. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
  107. return _mm256_acos_ps(a);
  108. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
  109. #if SIMDE_ACCURACY_PREFERENCE > 1
  110. return Sleef_acosf8_u10(a);
  111. #else
  112. return Sleef_acosf8_u35(a);
  113. #endif
  114. #else
  115. simde__m256_private
  116. r_,
  117. a_ = simde__m256_to_private(a);
  118. #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
  119. for (size_t i = 0 ; i < (sizeof(r_.m128) / sizeof(r_.m128[0])) ; i++) {
  120. r_.m128[i] = simde_mm_acos_ps(a_.m128[i]);
  121. }
  122. #else
  123. SIMDE_VECTORIZE
  124. for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
  125. r_.f32[i] = simde_math_acosf(a_.f32[i]);
  126. }
  127. #endif
  128. return simde__m256_from_private(r_);
  129. #endif
  130. }
  131. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  132. #undef _mm256_acos_ps
  133. #define _mm256_acos_ps(a) simde_mm256_acos_ps(a)
  134. #endif
  135. SIMDE_FUNCTION_ATTRIBUTES
  136. simde__m256d
  137. simde_mm256_acos_pd (simde__m256d a) {
  138. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
  139. return _mm256_acos_pd(a);
  140. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
  141. #if SIMDE_ACCURACY_PREFERENCE > 1
  142. return Sleef_acosd4_u10(a);
  143. #else
  144. return Sleef_acosd4_u35(a);
  145. #endif
  146. #else
  147. simde__m256d_private
  148. r_,
  149. a_ = simde__m256d_to_private(a);
  150. #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
  151. for (size_t i = 0 ; i < (sizeof(r_.m128d) / sizeof(r_.m128d[0])) ; i++) {
  152. r_.m128d[i] = simde_mm_acos_pd(a_.m128d[i]);
  153. }
  154. #else
  155. SIMDE_VECTORIZE
  156. for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
  157. r_.f64[i] = simde_math_acos(a_.f64[i]);
  158. }
  159. #endif
  160. return simde__m256d_from_private(r_);
  161. #endif
  162. }
  163. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  164. #undef _mm256_acos_pd
  165. #define _mm256_acos_pd(a) simde_mm256_acos_pd(a)
  166. #endif
  167. SIMDE_FUNCTION_ATTRIBUTES
  168. simde__m512
  169. simde_mm512_acos_ps (simde__m512 a) {
  170. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  171. return _mm512_acos_ps(a);
  172. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
  173. #if SIMDE_ACCURACY_PREFERENCE > 1
  174. return Sleef_acosf16_u10(a);
  175. #else
  176. return Sleef_acosf16_u35(a);
  177. #endif
  178. #else
  179. simde__m512_private
  180. r_,
  181. a_ = simde__m512_to_private(a);
  182. #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
  183. for (size_t i = 0 ; i < (sizeof(r_.m256) / sizeof(r_.m256[0])) ; i++) {
  184. r_.m256[i] = simde_mm256_acos_ps(a_.m256[i]);
  185. }
  186. #else
  187. SIMDE_VECTORIZE
  188. for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
  189. r_.f32[i] = simde_math_acosf(a_.f32[i]);
  190. }
  191. #endif
  192. return simde__m512_from_private(r_);
  193. #endif
  194. }
  195. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  196. #undef _mm512_acos_ps
  197. #define _mm512_acos_ps(a) simde_mm512_acos_ps(a)
  198. #endif
  199. SIMDE_FUNCTION_ATTRIBUTES
  200. simde__m512d
  201. simde_mm512_acos_pd (simde__m512d a) {
  202. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  203. return _mm512_acos_pd(a);
  204. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
  205. #if SIMDE_ACCURACY_PREFERENCE > 1
  206. return Sleef_acosd8_u10(a);
  207. #else
  208. return Sleef_acosd8_u35(a);
  209. #endif
  210. #else
  211. simde__m512d_private
  212. r_,
  213. a_ = simde__m512d_to_private(a);
  214. #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
  215. for (size_t i = 0 ; i < (sizeof(r_.m256d) / sizeof(r_.m256d[0])) ; i++) {
  216. r_.m256d[i] = simde_mm256_acos_pd(a_.m256d[i]);
  217. }
  218. #else
  219. SIMDE_VECTORIZE
  220. for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
  221. r_.f64[i] = simde_math_acos(a_.f64[i]);
  222. }
  223. #endif
  224. return simde__m512d_from_private(r_);
  225. #endif
  226. }
  227. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  228. #undef _mm512_acos_pd
  229. #define _mm512_acos_pd(a) simde_mm512_acos_pd(a)
  230. #endif
  231. SIMDE_FUNCTION_ATTRIBUTES
  232. simde__m512
  233. simde_mm512_mask_acos_ps(simde__m512 src, simde__mmask16 k, simde__m512 a) {
  234. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  235. return _mm512_mask_acos_ps(src, k, a);
  236. #else
  237. return simde_mm512_mask_mov_ps(src, k, simde_mm512_acos_ps(a));
  238. #endif
  239. }
  240. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  241. #undef _mm512_mask_acos_ps
  242. #define _mm512_mask_acos_ps(src, k, a) simde_mm512_mask_acos_ps(src, k, a)
  243. #endif
  244. SIMDE_FUNCTION_ATTRIBUTES
  245. simde__m512d
  246. simde_mm512_mask_acos_pd(simde__m512d src, simde__mmask8 k, simde__m512d a) {
  247. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  248. return _mm512_mask_acos_pd(src, k, a);
  249. #else
  250. return simde_mm512_mask_mov_pd(src, k, simde_mm512_acos_pd(a));
  251. #endif
  252. }
  253. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  254. #undef _mm512_mask_acos_pd
  255. #define _mm512_mask_acos_pd(src, k, a) simde_mm512_mask_acos_pd(src, k, a)
  256. #endif
  257. SIMDE_FUNCTION_ATTRIBUTES
  258. simde__m128
  259. simde_mm_acosh_ps (simde__m128 a) {
  260. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
  261. return _mm_acosh_ps(a);
  262. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
  263. return Sleef_acoshf4_u10(a);
  264. #else
  265. simde__m128_private
  266. r_,
  267. a_ = simde__m128_to_private(a);
  268. SIMDE_VECTORIZE
  269. for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
  270. r_.f32[i] = simde_math_acoshf(a_.f32[i]);
  271. }
  272. return simde__m128_from_private(r_);
  273. #endif
  274. }
  275. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  276. #undef _mm_acosh_ps
  277. #define _mm_acosh_ps(a) simde_mm_acosh_ps(a)
  278. #endif
  279. SIMDE_FUNCTION_ATTRIBUTES
  280. simde__m128d
  281. simde_mm_acosh_pd (simde__m128d a) {
  282. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
  283. return _mm_acosh_pd(a);
  284. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
  285. return Sleef_acoshd2_u10(a);
  286. #else
  287. simde__m128d_private
  288. r_,
  289. a_ = simde__m128d_to_private(a);
  290. SIMDE_VECTORIZE
  291. for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
  292. r_.f64[i] = simde_math_acosh(a_.f64[i]);
  293. }
  294. return simde__m128d_from_private(r_);
  295. #endif
  296. }
  297. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  298. #undef _mm_acosh_pd
  299. #define _mm_acosh_pd(a) simde_mm_acosh_pd(a)
  300. #endif
  301. SIMDE_FUNCTION_ATTRIBUTES
  302. simde__m256
  303. simde_mm256_acosh_ps (simde__m256 a) {
  304. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
  305. return _mm256_acosh_ps(a);
  306. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
  307. return Sleef_acoshf8_u10(a);
  308. #else
  309. simde__m256_private
  310. r_,
  311. a_ = simde__m256_to_private(a);
  312. #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
  313. for (size_t i = 0 ; i < (sizeof(r_.m128) / sizeof(r_.m128[0])) ; i++) {
  314. r_.m128[i] = simde_mm_acosh_ps(a_.m128[i]);
  315. }
  316. #else
  317. SIMDE_VECTORIZE
  318. for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
  319. r_.f32[i] = simde_math_acoshf(a_.f32[i]);
  320. }
  321. #endif
  322. return simde__m256_from_private(r_);
  323. #endif
  324. }
  325. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  326. #undef _mm256_acosh_ps
  327. #define _mm256_acosh_ps(a) simde_mm256_acosh_ps(a)
  328. #endif
  329. SIMDE_FUNCTION_ATTRIBUTES
  330. simde__m256d
  331. simde_mm256_acosh_pd (simde__m256d a) {
  332. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
  333. return _mm256_acosh_pd(a);
  334. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
  335. return Sleef_acoshd4_u10(a);
  336. #else
  337. simde__m256d_private
  338. r_,
  339. a_ = simde__m256d_to_private(a);
  340. #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
  341. for (size_t i = 0 ; i < (sizeof(r_.m128d) / sizeof(r_.m128d[0])) ; i++) {
  342. r_.m128d[i] = simde_mm_acosh_pd(a_.m128d[i]);
  343. }
  344. #else
  345. SIMDE_VECTORIZE
  346. for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
  347. r_.f64[i] = simde_math_acosh(a_.f64[i]);
  348. }
  349. #endif
  350. return simde__m256d_from_private(r_);
  351. #endif
  352. }
  353. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  354. #undef _mm256_acosh_pd
  355. #define _mm256_acosh_pd(a) simde_mm256_acosh_pd(a)
  356. #endif
  357. SIMDE_FUNCTION_ATTRIBUTES
  358. simde__m512
  359. simde_mm512_acosh_ps (simde__m512 a) {
  360. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  361. return _mm512_acosh_ps(a);
  362. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
  363. return Sleef_acoshf16_u10(a);
  364. #else
  365. simde__m512_private
  366. r_,
  367. a_ = simde__m512_to_private(a);
  368. #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
  369. for (size_t i = 0 ; i < (sizeof(r_.m256) / sizeof(r_.m256[0])) ; i++) {
  370. r_.m256[i] = simde_mm256_acosh_ps(a_.m256[i]);
  371. }
  372. #else
  373. SIMDE_VECTORIZE
  374. for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
  375. r_.f32[i] = simde_math_acoshf(a_.f32[i]);
  376. }
  377. #endif
  378. return simde__m512_from_private(r_);
  379. #endif
  380. }
  381. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  382. #undef _mm512_acosh_ps
  383. #define _mm512_acosh_ps(a) simde_mm512_acosh_ps(a)
  384. #endif
  385. SIMDE_FUNCTION_ATTRIBUTES
  386. simde__m512d
  387. simde_mm512_acosh_pd (simde__m512d a) {
  388. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  389. return _mm512_acosh_pd(a);
  390. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
  391. return Sleef_acoshd8_u10(a);
  392. #else
  393. simde__m512d_private
  394. r_,
  395. a_ = simde__m512d_to_private(a);
  396. #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
  397. for (size_t i = 0 ; i < (sizeof(r_.m256d) / sizeof(r_.m256d[0])) ; i++) {
  398. r_.m256d[i] = simde_mm256_acosh_pd(a_.m256d[i]);
  399. }
  400. #else
  401. SIMDE_VECTORIZE
  402. for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
  403. r_.f64[i] = simde_math_acosh(a_.f64[i]);
  404. }
  405. #endif
  406. return simde__m512d_from_private(r_);
  407. #endif
  408. }
  409. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  410. #undef _mm512_acosh_pd
  411. #define _mm512_acosh_pd(a) simde_mm512_acosh_pd(a)
  412. #endif
  413. SIMDE_FUNCTION_ATTRIBUTES
  414. simde__m512
  415. simde_mm512_mask_acosh_ps(simde__m512 src, simde__mmask16 k, simde__m512 a) {
  416. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  417. return _mm512_mask_acosh_ps(src, k, a);
  418. #else
  419. return simde_mm512_mask_mov_ps(src, k, simde_mm512_acosh_ps(a));
  420. #endif
  421. }
  422. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  423. #undef _mm512_mask_acosh_ps
  424. #define _mm512_mask_acosh_ps(src, k, a) simde_mm512_mask_acosh_ps(src, k, a)
  425. #endif
  426. SIMDE_FUNCTION_ATTRIBUTES
  427. simde__m512d
  428. simde_mm512_mask_acosh_pd(simde__m512d src, simde__mmask8 k, simde__m512d a) {
  429. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  430. return _mm512_mask_acosh_pd(src, k, a);
  431. #else
  432. return simde_mm512_mask_mov_pd(src, k, simde_mm512_acosh_pd(a));
  433. #endif
  434. }
  435. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  436. #undef _mm512_mask_acosh_pd
  437. #define _mm512_mask_acosh_pd(src, k, a) simde_mm512_mask_acosh_pd(src, k, a)
  438. #endif
  439. SIMDE_FUNCTION_ATTRIBUTES
  440. simde__m128
  441. simde_mm_asin_ps (simde__m128 a) {
  442. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
  443. return _mm_asin_ps(a);
  444. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
  445. #if SIMDE_ACCURACY_PREFERENCE > 1
  446. return Sleef_asinf4_u10(a);
  447. #else
  448. return Sleef_asinf4_u35(a);
  449. #endif
  450. #else
  451. simde__m128_private
  452. r_,
  453. a_ = simde__m128_to_private(a);
  454. SIMDE_VECTORIZE
  455. for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
  456. r_.f32[i] = simde_math_asinf(a_.f32[i]);
  457. }
  458. return simde__m128_from_private(r_);
  459. #endif
  460. }
  461. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  462. #undef _mm_asin_ps
  463. #define _mm_asin_ps(a) simde_mm_asin_ps(a)
  464. #endif
  465. SIMDE_FUNCTION_ATTRIBUTES
  466. simde__m128d
  467. simde_mm_asin_pd (simde__m128d a) {
  468. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
  469. return _mm_asin_pd(a);
  470. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
  471. #if SIMDE_ACCURACY_PREFERENCE > 1
  472. return Sleef_asind2_u10(a);
  473. #else
  474. return Sleef_asind2_u35(a);
  475. #endif
  476. #else
  477. simde__m128d_private
  478. r_,
  479. a_ = simde__m128d_to_private(a);
  480. SIMDE_VECTORIZE
  481. for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
  482. r_.f64[i] = simde_math_asin(a_.f64[i]);
  483. }
  484. return simde__m128d_from_private(r_);
  485. #endif
  486. }
  487. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  488. #undef _mm_asin_pd
  489. #define _mm_asin_pd(a) simde_mm_asin_pd(a)
  490. #endif
  491. SIMDE_FUNCTION_ATTRIBUTES
  492. simde__m256
  493. simde_mm256_asin_ps (simde__m256 a) {
  494. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
  495. return _mm256_asin_ps(a);
  496. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
  497. #if SIMDE_ACCURACY_PREFERENCE > 1
  498. return Sleef_asinf8_u10(a);
  499. #else
  500. return Sleef_asinf8_u35(a);
  501. #endif
  502. #else
  503. simde__m256_private
  504. r_,
  505. a_ = simde__m256_to_private(a);
  506. #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
  507. for (size_t i = 0 ; i < (sizeof(r_.m128) / sizeof(r_.m128[0])) ; i++) {
  508. r_.m128[i] = simde_mm_asin_ps(a_.m128[i]);
  509. }
  510. #else
  511. SIMDE_VECTORIZE
  512. for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
  513. r_.f32[i] = simde_math_asinf(a_.f32[i]);
  514. }
  515. #endif
  516. return simde__m256_from_private(r_);
  517. #endif
  518. }
  519. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  520. #undef _mm256_asin_ps
  521. #define _mm256_asin_ps(a) simde_mm256_asin_ps(a)
  522. #endif
  523. SIMDE_FUNCTION_ATTRIBUTES
  524. simde__m256d
  525. simde_mm256_asin_pd (simde__m256d a) {
  526. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
  527. return _mm256_asin_pd(a);
  528. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
  529. #if SIMDE_ACCURACY_PREFERENCE > 1
  530. return Sleef_asind4_u10(a);
  531. #else
  532. return Sleef_asind4_u35(a);
  533. #endif
  534. #else
  535. simde__m256d_private
  536. r_,
  537. a_ = simde__m256d_to_private(a);
  538. #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
  539. for (size_t i = 0 ; i < (sizeof(r_.m128d) / sizeof(r_.m128d[0])) ; i++) {
  540. r_.m128d[i] = simde_mm_asin_pd(a_.m128d[i]);
  541. }
  542. #else
  543. SIMDE_VECTORIZE
  544. for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
  545. r_.f64[i] = simde_math_asin(a_.f64[i]);
  546. }
  547. #endif
  548. return simde__m256d_from_private(r_);
  549. #endif
  550. }
  551. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  552. #undef _mm256_asin_pd
  553. #define _mm256_asin_pd(a) simde_mm256_asin_pd(a)
  554. #endif
  555. SIMDE_FUNCTION_ATTRIBUTES
  556. simde__m512
  557. simde_mm512_asin_ps (simde__m512 a) {
  558. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  559. return _mm512_asin_ps(a);
  560. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
  561. #if SIMDE_ACCURACY_PREFERENCE > 1
  562. return Sleef_asinf16_u10(a);
  563. #else
  564. return Sleef_asinf16_u35(a);
  565. #endif
  566. #else
  567. simde__m512_private
  568. r_,
  569. a_ = simde__m512_to_private(a);
  570. #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
  571. for (size_t i = 0 ; i < (sizeof(r_.m256) / sizeof(r_.m256[0])) ; i++) {
  572. r_.m256[i] = simde_mm256_asin_ps(a_.m256[i]);
  573. }
  574. #else
  575. SIMDE_VECTORIZE
  576. for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
  577. r_.f32[i] = simde_math_asinf(a_.f32[i]);
  578. }
  579. #endif
  580. return simde__m512_from_private(r_);
  581. #endif
  582. }
  583. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  584. #undef _mm512_asin_ps
  585. #define _mm512_asin_ps(a) simde_mm512_asin_ps(a)
  586. #endif
  587. SIMDE_FUNCTION_ATTRIBUTES
  588. simde__m512d
  589. simde_mm512_asin_pd (simde__m512d a) {
  590. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  591. return _mm512_asin_pd(a);
  592. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
  593. #if SIMDE_ACCURACY_PREFERENCE > 1
  594. return Sleef_asind8_u10(a);
  595. #else
  596. return Sleef_asind8_u35(a);
  597. #endif
  598. #else
  599. simde__m512d_private
  600. r_,
  601. a_ = simde__m512d_to_private(a);
  602. #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
  603. for (size_t i = 0 ; i < (sizeof(r_.m256d) / sizeof(r_.m256d[0])) ; i++) {
  604. r_.m256d[i] = simde_mm256_asin_pd(a_.m256d[i]);
  605. }
  606. #else
  607. SIMDE_VECTORIZE
  608. for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
  609. r_.f64[i] = simde_math_asin(a_.f64[i]);
  610. }
  611. #endif
  612. return simde__m512d_from_private(r_);
  613. #endif
  614. }
  615. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  616. #undef _mm512_asin_pd
  617. #define _mm512_asin_pd(a) simde_mm512_asin_pd(a)
  618. #endif
  619. SIMDE_FUNCTION_ATTRIBUTES
  620. simde__m512
  621. simde_mm512_mask_asin_ps(simde__m512 src, simde__mmask16 k, simde__m512 a) {
  622. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  623. return _mm512_mask_asin_ps(src, k, a);
  624. #else
  625. return simde_mm512_mask_mov_ps(src, k, simde_mm512_asin_ps(a));
  626. #endif
  627. }
  628. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  629. #undef _mm512_mask_asin_ps
  630. #define _mm512_mask_asin_ps(src, k, a) simde_mm512_mask_asin_ps(src, k, a)
  631. #endif
  632. SIMDE_FUNCTION_ATTRIBUTES
  633. simde__m512d
  634. simde_mm512_mask_asin_pd(simde__m512d src, simde__mmask8 k, simde__m512d a) {
  635. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  636. return _mm512_mask_asin_pd(src, k, a);
  637. #else
  638. return simde_mm512_mask_mov_pd(src, k, simde_mm512_asin_pd(a));
  639. #endif
  640. }
  641. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  642. #undef _mm512_mask_asin_pd
  643. #define _mm512_mask_asin_pd(src, k, a) simde_mm512_mask_asin_pd(src, k, a)
  644. #endif
  645. SIMDE_FUNCTION_ATTRIBUTES
  646. simde__m128
  647. simde_mm_asinh_ps (simde__m128 a) {
  648. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
  649. return _mm_asinh_ps(a);
  650. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
  651. return Sleef_asinhf4_u10(a);
  652. #else
  653. simde__m128_private
  654. r_,
  655. a_ = simde__m128_to_private(a);
  656. SIMDE_VECTORIZE
  657. for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
  658. r_.f32[i] = simde_math_asinhf(a_.f32[i]);
  659. }
  660. return simde__m128_from_private(r_);
  661. #endif
  662. }
  663. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  664. #undef _mm_asinh_ps
  665. #define _mm_asinh_ps(a) simde_mm_asinh_ps(a)
  666. #endif
  667. SIMDE_FUNCTION_ATTRIBUTES
  668. simde__m128d
  669. simde_mm_asinh_pd (simde__m128d a) {
  670. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
  671. return _mm_asinh_pd(a);
  672. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
  673. return Sleef_asinhd2_u10(a);
  674. #else
  675. simde__m128d_private
  676. r_,
  677. a_ = simde__m128d_to_private(a);
  678. SIMDE_VECTORIZE
  679. for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
  680. r_.f64[i] = simde_math_asinh(a_.f64[i]);
  681. }
  682. return simde__m128d_from_private(r_);
  683. #endif
  684. }
  685. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  686. #undef _mm_asinh_pd
  687. #define _mm_asinh_pd(a) simde_mm_asinh_pd(a)
  688. #endif
  689. SIMDE_FUNCTION_ATTRIBUTES
  690. simde__m256
  691. simde_mm256_asinh_ps (simde__m256 a) {
  692. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
  693. return _mm256_asinh_ps(a);
  694. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
  695. return Sleef_asinhf8_u10(a);
  696. #else
  697. simde__m256_private
  698. r_,
  699. a_ = simde__m256_to_private(a);
  700. #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
  701. for (size_t i = 0 ; i < (sizeof(r_.m128) / sizeof(r_.m128[0])) ; i++) {
  702. r_.m128[i] = simde_mm_asinh_ps(a_.m128[i]);
  703. }
  704. #else
  705. SIMDE_VECTORIZE
  706. for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
  707. r_.f32[i] = simde_math_asinhf(a_.f32[i]);
  708. }
  709. #endif
  710. return simde__m256_from_private(r_);
  711. #endif
  712. }
  713. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  714. #undef _mm256_asinh_ps
  715. #define _mm256_asinh_ps(a) simde_mm256_asinh_ps(a)
  716. #endif
  717. SIMDE_FUNCTION_ATTRIBUTES
  718. simde__m256d
  719. simde_mm256_asinh_pd (simde__m256d a) {
  720. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
  721. return _mm256_asinh_pd(a);
  722. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
  723. return Sleef_asinhd4_u10(a);
  724. #else
  725. simde__m256d_private
  726. r_,
  727. a_ = simde__m256d_to_private(a);
  728. #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
  729. for (size_t i = 0 ; i < (sizeof(r_.m128d) / sizeof(r_.m128d[0])) ; i++) {
  730. r_.m128d[i] = simde_mm_asinh_pd(a_.m128d[i]);
  731. }
  732. #else
  733. SIMDE_VECTORIZE
  734. for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
  735. r_.f64[i] = simde_math_asinh(a_.f64[i]);
  736. }
  737. #endif
  738. return simde__m256d_from_private(r_);
  739. #endif
  740. }
  741. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  742. #undef _mm256_asinh_pd
  743. #define _mm256_asinh_pd(a) simde_mm256_asinh_pd(a)
  744. #endif
  745. SIMDE_FUNCTION_ATTRIBUTES
  746. simde__m512
  747. simde_mm512_asinh_ps (simde__m512 a) {
  748. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  749. return _mm512_asinh_ps(a);
  750. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
  751. return Sleef_asinhf16_u10(a);
  752. #else
  753. simde__m512_private
  754. r_,
  755. a_ = simde__m512_to_private(a);
  756. #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
  757. for (size_t i = 0 ; i < (sizeof(r_.m256) / sizeof(r_.m256[0])) ; i++) {
  758. r_.m256[i] = simde_mm256_asinh_ps(a_.m256[i]);
  759. }
  760. #else
  761. SIMDE_VECTORIZE
  762. for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
  763. r_.f32[i] = simde_math_asinhf(a_.f32[i]);
  764. }
  765. #endif
  766. return simde__m512_from_private(r_);
  767. #endif
  768. }
  769. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  770. #undef _mm512_asinh_ps
  771. #define _mm512_asinh_ps(a) simde_mm512_asinh_ps(a)
  772. #endif
  773. SIMDE_FUNCTION_ATTRIBUTES
  774. simde__m512d
  775. simde_mm512_asinh_pd (simde__m512d a) {
  776. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  777. return _mm512_asinh_pd(a);
  778. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
  779. return Sleef_asinhd8_u10(a);
  780. #else
  781. simde__m512d_private
  782. r_,
  783. a_ = simde__m512d_to_private(a);
  784. #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
  785. for (size_t i = 0 ; i < (sizeof(r_.m256d) / sizeof(r_.m256d[0])) ; i++) {
  786. r_.m256d[i] = simde_mm256_asinh_pd(a_.m256d[i]);
  787. }
  788. #else
  789. SIMDE_VECTORIZE
  790. for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
  791. r_.f64[i] = simde_math_asinh(a_.f64[i]);
  792. }
  793. #endif
  794. return simde__m512d_from_private(r_);
  795. #endif
  796. }
  797. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  798. #undef _mm512_asinh_pd
  799. #define _mm512_asinh_pd(a) simde_mm512_asinh_pd(a)
  800. #endif
  801. SIMDE_FUNCTION_ATTRIBUTES
  802. simde__m512
  803. simde_mm512_mask_asinh_ps(simde__m512 src, simde__mmask16 k, simde__m512 a) {
  804. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  805. return _mm512_mask_asinh_ps(src, k, a);
  806. #else
  807. return simde_mm512_mask_mov_ps(src, k, simde_mm512_asinh_ps(a));
  808. #endif
  809. }
  810. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  811. #undef _mm512_mask_asinh_ps
  812. #define _mm512_mask_asinh_ps(src, k, a) simde_mm512_mask_asinh_ps(src, k, a)
  813. #endif
  814. SIMDE_FUNCTION_ATTRIBUTES
  815. simde__m512d
  816. simde_mm512_mask_asinh_pd(simde__m512d src, simde__mmask8 k, simde__m512d a) {
  817. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  818. return _mm512_mask_asinh_pd(src, k, a);
  819. #else
  820. return simde_mm512_mask_mov_pd(src, k, simde_mm512_asinh_pd(a));
  821. #endif
  822. }
  823. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  824. #undef _mm512_mask_asinh_pd
  825. #define _mm512_mask_asinh_pd(src, k, a) simde_mm512_mask_asinh_pd(src, k, a)
  826. #endif
  827. SIMDE_FUNCTION_ATTRIBUTES
  828. simde__m128
  829. simde_mm_atan_ps (simde__m128 a) {
  830. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
  831. return _mm_atan_ps(a);
  832. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
  833. #if SIMDE_ACCURACY_PREFERENCE > 1
  834. return Sleef_atanf4_u10(a);
  835. #else
  836. return Sleef_atanf4_u35(a);
  837. #endif
  838. #else
  839. simde__m128_private
  840. r_,
  841. a_ = simde__m128_to_private(a);
  842. SIMDE_VECTORIZE
  843. for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
  844. r_.f32[i] = simde_math_atanf(a_.f32[i]);
  845. }
  846. return simde__m128_from_private(r_);
  847. #endif
  848. }
  849. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  850. #undef _mm_atan_ps
  851. #define _mm_atan_ps(a) simde_mm_atan_ps(a)
  852. #endif
  853. SIMDE_FUNCTION_ATTRIBUTES
  854. simde__m128d
  855. simde_mm_atan_pd (simde__m128d a) {
  856. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
  857. return _mm_atan_pd(a);
  858. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
  859. #if SIMDE_ACCURACY_PREFERENCE > 1
  860. return Sleef_atand2_u10(a);
  861. #else
  862. return Sleef_atand2_u35(a);
  863. #endif
  864. #else
  865. simde__m128d_private
  866. r_,
  867. a_ = simde__m128d_to_private(a);
  868. SIMDE_VECTORIZE
  869. for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
  870. r_.f64[i] = simde_math_atan(a_.f64[i]);
  871. }
  872. return simde__m128d_from_private(r_);
  873. #endif
  874. }
  875. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  876. #undef _mm_atan_pd
  877. #define _mm_atan_pd(a) simde_mm_atan_pd(a)
  878. #endif
  879. SIMDE_FUNCTION_ATTRIBUTES
  880. simde__m256
  881. simde_mm256_atan_ps (simde__m256 a) {
  882. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
  883. return _mm256_atan_ps(a);
  884. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
  885. #if SIMDE_ACCURACY_PREFERENCE > 1
  886. return Sleef_atanf8_u10(a);
  887. #else
  888. return Sleef_atanf8_u35(a);
  889. #endif
  890. #else
  891. simde__m256_private
  892. r_,
  893. a_ = simde__m256_to_private(a);
  894. #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
  895. for (size_t i = 0 ; i < (sizeof(r_.m128) / sizeof(r_.m128[0])) ; i++) {
  896. r_.m128[i] = simde_mm_atan_ps(a_.m128[i]);
  897. }
  898. #else
  899. SIMDE_VECTORIZE
  900. for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
  901. r_.f32[i] = simde_math_atanf(a_.f32[i]);
  902. }
  903. #endif
  904. return simde__m256_from_private(r_);
  905. #endif
  906. }
  907. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  908. #undef _mm256_atan_ps
  909. #define _mm256_atan_ps(a) simde_mm256_atan_ps(a)
  910. #endif
  911. SIMDE_FUNCTION_ATTRIBUTES
  912. simde__m256d
  913. simde_mm256_atan_pd (simde__m256d a) {
  914. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
  915. return _mm256_atan_pd(a);
  916. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
  917. #if SIMDE_ACCURACY_PREFERENCE > 1
  918. return Sleef_atand4_u10(a);
  919. #else
  920. return Sleef_atand4_u35(a);
  921. #endif
  922. #else
  923. simde__m256d_private
  924. r_,
  925. a_ = simde__m256d_to_private(a);
  926. #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
  927. for (size_t i = 0 ; i < (sizeof(r_.m128d) / sizeof(r_.m128d[0])) ; i++) {
  928. r_.m128d[i] = simde_mm_atan_pd(a_.m128d[i]);
  929. }
  930. #else
  931. SIMDE_VECTORIZE
  932. for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
  933. r_.f64[i] = simde_math_atan(a_.f64[i]);
  934. }
  935. #endif
  936. return simde__m256d_from_private(r_);
  937. #endif
  938. }
  939. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  940. #undef _mm256_atan_pd
  941. #define _mm256_atan_pd(a) simde_mm256_atan_pd(a)
  942. #endif
  943. SIMDE_FUNCTION_ATTRIBUTES
  944. simde__m512
  945. simde_mm512_atan_ps (simde__m512 a) {
  946. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  947. return _mm512_atan_ps(a);
  948. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
  949. #if SIMDE_ACCURACY_PREFERENCE > 1
  950. return Sleef_atanf16_u10(a);
  951. #else
  952. return Sleef_atanf16_u35(a);
  953. #endif
  954. #else
  955. simde__m512_private
  956. r_,
  957. a_ = simde__m512_to_private(a);
  958. #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
  959. for (size_t i = 0 ; i < (sizeof(r_.m256) / sizeof(r_.m256[0])) ; i++) {
  960. r_.m256[i] = simde_mm256_atan_ps(a_.m256[i]);
  961. }
  962. #else
  963. SIMDE_VECTORIZE
  964. for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
  965. r_.f32[i] = simde_math_atanf(a_.f32[i]);
  966. }
  967. #endif
  968. return simde__m512_from_private(r_);
  969. #endif
  970. }
  971. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  972. #undef _mm512_atan_ps
  973. #define _mm512_atan_ps(a) simde_mm512_atan_ps(a)
  974. #endif
  975. SIMDE_FUNCTION_ATTRIBUTES
  976. simde__m512d
  977. simde_mm512_atan_pd (simde__m512d a) {
  978. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  979. return _mm512_atan_pd(a);
  980. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
  981. #if SIMDE_ACCURACY_PREFERENCE > 1
  982. return Sleef_atand8_u10(a);
  983. #else
  984. return Sleef_atand8_u35(a);
  985. #endif
  986. #else
  987. simde__m512d_private
  988. r_,
  989. a_ = simde__m512d_to_private(a);
  990. #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
  991. for (size_t i = 0 ; i < (sizeof(r_.m256d) / sizeof(r_.m256d[0])) ; i++) {
  992. r_.m256d[i] = simde_mm256_atan_pd(a_.m256d[i]);
  993. }
  994. #else
  995. SIMDE_VECTORIZE
  996. for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
  997. r_.f64[i] = simde_math_atan(a_.f64[i]);
  998. }
  999. #endif
  1000. return simde__m512d_from_private(r_);
  1001. #endif
  1002. }
  1003. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  1004. #undef _mm512_atan_pd
  1005. #define _mm512_atan_pd(a) simde_mm512_atan_pd(a)
  1006. #endif
  1007. SIMDE_FUNCTION_ATTRIBUTES
  1008. simde__m512
  1009. simde_mm512_mask_atan_ps(simde__m512 src, simde__mmask16 k, simde__m512 a) {
  1010. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  1011. return _mm512_mask_atan_ps(src, k, a);
  1012. #else
  1013. return simde_mm512_mask_mov_ps(src, k, simde_mm512_atan_ps(a));
  1014. #endif
  1015. }
  1016. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  1017. #undef _mm512_mask_atan_ps
  1018. #define _mm512_mask_atan_ps(src, k, a) simde_mm512_mask_atan_ps(src, k, a)
  1019. #endif
  1020. SIMDE_FUNCTION_ATTRIBUTES
  1021. simde__m512d
  1022. simde_mm512_mask_atan_pd(simde__m512d src, simde__mmask8 k, simde__m512d a) {
  1023. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  1024. return _mm512_mask_atan_pd(src, k, a);
  1025. #else
  1026. return simde_mm512_mask_mov_pd(src, k, simde_mm512_atan_pd(a));
  1027. #endif
  1028. }
  1029. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  1030. #undef _mm512_mask_atan_pd
  1031. #define _mm512_mask_atan_pd(src, k, a) simde_mm512_mask_atan_pd(src, k, a)
  1032. #endif
  1033. SIMDE_FUNCTION_ATTRIBUTES
  1034. simde__m128
  1035. simde_mm_atan2_ps (simde__m128 a, simde__m128 b) {
  1036. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
  1037. return _mm_atan2_ps(a, b);
  1038. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
  1039. #if SIMDE_ACCURACY_PREFERENCE > 1
  1040. return Sleef_atan2f4_u10(a, b);
  1041. #else
  1042. return Sleef_atan2f4_u35(a, b);
  1043. #endif
  1044. #else
  1045. simde__m128_private
  1046. r_,
  1047. a_ = simde__m128_to_private(a),
  1048. b_ = simde__m128_to_private(b);
  1049. SIMDE_VECTORIZE
  1050. for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
  1051. r_.f32[i] = simde_math_atan2f(a_.f32[i], b_.f32[i]);
  1052. }
  1053. return simde__m128_from_private(r_);
  1054. #endif
  1055. }
  1056. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  1057. #undef _mm_atan2_ps
  1058. #define _mm_atan2_ps(a, b) simde_mm_atan2_ps(a, b)
  1059. #endif
  1060. SIMDE_FUNCTION_ATTRIBUTES
  1061. simde__m128d
  1062. simde_mm_atan2_pd (simde__m128d a, simde__m128d b) {
  1063. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
  1064. return _mm_atan2_pd(a, b);
  1065. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
  1066. #if SIMDE_ACCURACY_PREFERENCE > 1
  1067. return Sleef_atan2d2_u10(a, b);
  1068. #else
  1069. return Sleef_atan2d2_u35(a, b);
  1070. #endif
  1071. #else
  1072. simde__m128d_private
  1073. r_,
  1074. a_ = simde__m128d_to_private(a),
  1075. b_ = simde__m128d_to_private(b);
  1076. SIMDE_VECTORIZE
  1077. for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
  1078. r_.f64[i] = simde_math_atan2(a_.f64[i], b_.f64[i]);
  1079. }
  1080. return simde__m128d_from_private(r_);
  1081. #endif
  1082. }
  1083. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  1084. #undef _mm_atan2_pd
  1085. #define _mm_atan2_pd(a, b) simde_mm_atan2_pd(a, b)
  1086. #endif
  1087. SIMDE_FUNCTION_ATTRIBUTES
  1088. simde__m256
  1089. simde_mm256_atan2_ps (simde__m256 a, simde__m256 b) {
  1090. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
  1091. return _mm256_atan2_ps(a, b);
  1092. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
  1093. #if SIMDE_ACCURACY_PREFERENCE > 1
  1094. return Sleef_atan2f8_u10(a, b);
  1095. #else
  1096. return Sleef_atan2f8_u35(a, b);
  1097. #endif
  1098. #else
  1099. simde__m256_private
  1100. r_,
  1101. a_ = simde__m256_to_private(a),
  1102. b_ = simde__m256_to_private(b);
  1103. #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
  1104. for (size_t i = 0 ; i < (sizeof(r_.m128) / sizeof(r_.m128[0])) ; i++) {
  1105. r_.m128[i] = simde_mm_atan2_ps(a_.m128[i], b_.m128[i]);
  1106. }
  1107. #else
  1108. SIMDE_VECTORIZE
  1109. for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
  1110. r_.f32[i] = simde_math_atan2f(a_.f32[i], b_.f32[i]);
  1111. }
  1112. #endif
  1113. return simde__m256_from_private(r_);
  1114. #endif
  1115. }
  1116. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  1117. #undef _mm256_atan2_ps
  1118. #define _mm256_atan2_ps(a, b) simde_mm256_atan2_ps(a, b)
  1119. #endif
  1120. SIMDE_FUNCTION_ATTRIBUTES
  1121. simde__m256d
  1122. simde_mm256_atan2_pd (simde__m256d a, simde__m256d b) {
  1123. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
  1124. return _mm256_atan2_pd(a, b);
  1125. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
  1126. #if SIMDE_ACCURACY_PREFERENCE > 1
  1127. return Sleef_atan2d4_u10(a, b);
  1128. #else
  1129. return Sleef_atan2d4_u35(a, b);
  1130. #endif
  1131. #else
  1132. simde__m256d_private
  1133. r_,
  1134. a_ = simde__m256d_to_private(a),
  1135. b_ = simde__m256d_to_private(b);
  1136. #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
  1137. for (size_t i = 0 ; i < (sizeof(r_.m128d) / sizeof(r_.m128d[0])) ; i++) {
  1138. r_.m128d[i] = simde_mm_atan2_pd(a_.m128d[i], b_.m128d[i]);
  1139. }
  1140. #else
  1141. SIMDE_VECTORIZE
  1142. for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
  1143. r_.f64[i] = simde_math_atan2(a_.f64[i], b_.f64[i]);
  1144. }
  1145. #endif
  1146. return simde__m256d_from_private(r_);
  1147. #endif
  1148. }
  1149. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  1150. #undef _mm256_atan2_pd
  1151. #define _mm256_atan2_pd(a, b) simde_mm256_atan2_pd(a, b)
  1152. #endif
  1153. SIMDE_FUNCTION_ATTRIBUTES
  1154. simde__m512
  1155. simde_mm512_atan2_ps (simde__m512 a, simde__m512 b) {
  1156. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  1157. return _mm512_atan2_ps(a, b);
  1158. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
  1159. #if SIMDE_ACCURACY_PREFERENCE > 1
  1160. return Sleef_atan2f16_u10(a, b);
  1161. #else
  1162. return Sleef_atan2f16_u35(a, b);
  1163. #endif
  1164. #else
  1165. simde__m512_private
  1166. r_,
  1167. a_ = simde__m512_to_private(a),
  1168. b_ = simde__m512_to_private(b);
  1169. #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
  1170. for (size_t i = 0 ; i < (sizeof(r_.m256) / sizeof(r_.m256[0])) ; i++) {
  1171. r_.m256[i] = simde_mm256_atan2_ps(a_.m256[i], b_.m256[i]);
  1172. }
  1173. #else
  1174. SIMDE_VECTORIZE
  1175. for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
  1176. r_.f32[i] = simde_math_atan2f(a_.f32[i], b_.f32[i]);
  1177. }
  1178. #endif
  1179. return simde__m512_from_private(r_);
  1180. #endif
  1181. }
  1182. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  1183. #undef _mm512_atan2_ps
  1184. #define _mm512_atan2_ps(a, b) simde_mm512_atan2_ps(a, b)
  1185. #endif
  1186. SIMDE_FUNCTION_ATTRIBUTES
  1187. simde__m512d
  1188. simde_mm512_atan2_pd (simde__m512d a, simde__m512d b) {
  1189. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  1190. return _mm512_atan2_pd(a, b);
  1191. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
  1192. #if SIMDE_ACCURACY_PREFERENCE > 1
  1193. return Sleef_atan2d8_u10(a, b);
  1194. #else
  1195. return Sleef_atan2d8_u35(a, b);
  1196. #endif
  1197. #else
  1198. simde__m512d_private
  1199. r_,
  1200. a_ = simde__m512d_to_private(a),
  1201. b_ = simde__m512d_to_private(b);
  1202. #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
  1203. for (size_t i = 0 ; i < (sizeof(r_.m256d) / sizeof(r_.m256d[0])) ; i++) {
  1204. r_.m256d[i] = simde_mm256_atan2_pd(a_.m256d[i], b_.m256d[i]);
  1205. }
  1206. #else
  1207. SIMDE_VECTORIZE
  1208. for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
  1209. r_.f64[i] = simde_math_atan2(a_.f64[i], b_.f64[i]);
  1210. }
  1211. #endif
  1212. return simde__m512d_from_private(r_);
  1213. #endif
  1214. }
  1215. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  1216. #undef _mm512_atan2_pd
  1217. #define _mm512_atan2_pd(a, b) simde_mm512_atan2_pd(a, b)
  1218. #endif
  1219. SIMDE_FUNCTION_ATTRIBUTES
  1220. simde__m512
  1221. simde_mm512_mask_atan2_ps(simde__m512 src, simde__mmask16 k, simde__m512 a, simde__m512 b) {
  1222. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  1223. return _mm512_mask_atan2_ps(src, k, a, b);
  1224. #else
  1225. return simde_mm512_mask_mov_ps(src, k, simde_mm512_atan2_ps(a, b));
  1226. #endif
  1227. }
  1228. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  1229. #undef _mm512_mask_atan2_ps
  1230. #define _mm512_mask_atan2_ps(src, k, a, b) simde_mm512_mask_atan2_ps(src, k, a, b)
  1231. #endif
  1232. SIMDE_FUNCTION_ATTRIBUTES
  1233. simde__m512d
  1234. simde_mm512_mask_atan2_pd(simde__m512d src, simde__mmask8 k, simde__m512d a, simde__m512d b) {
  1235. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  1236. return _mm512_mask_atan2_pd(src, k, a, b);
  1237. #else
  1238. return simde_mm512_mask_mov_pd(src, k, simde_mm512_atan2_pd(a, b));
  1239. #endif
  1240. }
  1241. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  1242. #undef _mm512_mask_atan2_pd
  1243. #define _mm512_mask_atan2_pd(src, k, a, b) simde_mm512_mask_atan2_pd(src, k, a, b)
  1244. #endif
  1245. SIMDE_FUNCTION_ATTRIBUTES
  1246. simde__m128
  1247. simde_mm_atanh_ps (simde__m128 a) {
  1248. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
  1249. return _mm_atanh_ps(a);
  1250. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
  1251. return Sleef_atanhf4_u10(a);
  1252. #else
  1253. simde__m128_private
  1254. r_,
  1255. a_ = simde__m128_to_private(a);
  1256. SIMDE_VECTORIZE
  1257. for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
  1258. r_.f32[i] = simde_math_atanhf(a_.f32[i]);
  1259. }
  1260. return simde__m128_from_private(r_);
  1261. #endif
  1262. }
  1263. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  1264. #undef _mm_atanh_ps
  1265. #define _mm_atanh_ps(a) simde_mm_atanh_ps(a)
  1266. #endif
  1267. SIMDE_FUNCTION_ATTRIBUTES
  1268. simde__m128d
  1269. simde_mm_atanh_pd (simde__m128d a) {
  1270. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
  1271. return _mm_atanh_pd(a);
  1272. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
  1273. return Sleef_atanhd2_u10(a);
  1274. #else
  1275. simde__m128d_private
  1276. r_,
  1277. a_ = simde__m128d_to_private(a);
  1278. SIMDE_VECTORIZE
  1279. for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
  1280. r_.f64[i] = simde_math_atanh(a_.f64[i]);
  1281. }
  1282. return simde__m128d_from_private(r_);
  1283. #endif
  1284. }
  1285. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  1286. #undef _mm_atanh_pd
  1287. #define _mm_atanh_pd(a) simde_mm_atanh_pd(a)
  1288. #endif
  1289. SIMDE_FUNCTION_ATTRIBUTES
  1290. simde__m256
  1291. simde_mm256_atanh_ps (simde__m256 a) {
  1292. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
  1293. return _mm256_atanh_ps(a);
  1294. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
  1295. return Sleef_atanhf8_u10(a);
  1296. #else
  1297. simde__m256_private
  1298. r_,
  1299. a_ = simde__m256_to_private(a);
  1300. #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
  1301. for (size_t i = 0 ; i < (sizeof(r_.m128) / sizeof(r_.m128[0])) ; i++) {
  1302. r_.m128[i] = simde_mm_atanh_ps(a_.m128[i]);
  1303. }
  1304. #else
  1305. SIMDE_VECTORIZE
  1306. for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
  1307. r_.f32[i] = simde_math_atanhf(a_.f32[i]);
  1308. }
  1309. #endif
  1310. return simde__m256_from_private(r_);
  1311. #endif
  1312. }
  1313. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  1314. #undef _mm256_atanh_ps
  1315. #define _mm256_atanh_ps(a) simde_mm256_atanh_ps(a)
  1316. #endif
  1317. SIMDE_FUNCTION_ATTRIBUTES
  1318. simde__m256d
  1319. simde_mm256_atanh_pd (simde__m256d a) {
  1320. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
  1321. return _mm256_atanh_pd(a);
  1322. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
  1323. return Sleef_atanhd4_u10(a);
  1324. #else
  1325. simde__m256d_private
  1326. r_,
  1327. a_ = simde__m256d_to_private(a);
  1328. #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
  1329. for (size_t i = 0 ; i < (sizeof(r_.m128d) / sizeof(r_.m128d[0])) ; i++) {
  1330. r_.m128d[i] = simde_mm_atanh_pd(a_.m128d[i]);
  1331. }
  1332. #else
  1333. SIMDE_VECTORIZE
  1334. for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
  1335. r_.f64[i] = simde_math_atanh(a_.f64[i]);
  1336. }
  1337. #endif
  1338. return simde__m256d_from_private(r_);
  1339. #endif
  1340. }
  1341. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  1342. #undef _mm256_atanh_pd
  1343. #define _mm256_atanh_pd(a) simde_mm256_atanh_pd(a)
  1344. #endif
  1345. SIMDE_FUNCTION_ATTRIBUTES
  1346. simde__m512
  1347. simde_mm512_atanh_ps (simde__m512 a) {
  1348. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  1349. return _mm512_atanh_ps(a);
  1350. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
  1351. return Sleef_atanhf16_u10(a);
  1352. #else
  1353. simde__m512_private
  1354. r_,
  1355. a_ = simde__m512_to_private(a);
  1356. #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
  1357. for (size_t i = 0 ; i < (sizeof(r_.m256) / sizeof(r_.m256[0])) ; i++) {
  1358. r_.m256[i] = simde_mm256_atanh_ps(a_.m256[i]);
  1359. }
  1360. #else
  1361. SIMDE_VECTORIZE
  1362. for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
  1363. r_.f32[i] = simde_math_atanhf(a_.f32[i]);
  1364. }
  1365. #endif
  1366. return simde__m512_from_private(r_);
  1367. #endif
  1368. }
  1369. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  1370. #undef _mm512_atanh_ps
  1371. #define _mm512_atanh_ps(a) simde_mm512_atanh_ps(a)
  1372. #endif
  1373. SIMDE_FUNCTION_ATTRIBUTES
  1374. simde__m512d
  1375. simde_mm512_atanh_pd (simde__m512d a) {
  1376. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  1377. return _mm512_atanh_pd(a);
  1378. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
  1379. return Sleef_atanhd8_u10(a);
  1380. #else
  1381. simde__m512d_private
  1382. r_,
  1383. a_ = simde__m512d_to_private(a);
  1384. #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
  1385. for (size_t i = 0 ; i < (sizeof(r_.m256d) / sizeof(r_.m256d[0])) ; i++) {
  1386. r_.m256d[i] = simde_mm256_atanh_pd(a_.m256d[i]);
  1387. }
  1388. #else
  1389. SIMDE_VECTORIZE
  1390. for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
  1391. r_.f64[i] = simde_math_atanh(a_.f64[i]);
  1392. }
  1393. #endif
  1394. return simde__m512d_from_private(r_);
  1395. #endif
  1396. }
  1397. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  1398. #undef _mm512_atanh_pd
  1399. #define _mm512_atanh_pd(a) simde_mm512_atanh_pd(a)
  1400. #endif
  1401. SIMDE_FUNCTION_ATTRIBUTES
  1402. simde__m512
  1403. simde_mm512_mask_atanh_ps(simde__m512 src, simde__mmask16 k, simde__m512 a) {
  1404. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  1405. return _mm512_mask_atanh_ps(src, k, a);
  1406. #else
  1407. return simde_mm512_mask_mov_ps(src, k, simde_mm512_atanh_ps(a));
  1408. #endif
  1409. }
  1410. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  1411. #undef _mm512_mask_atanh_ps
  1412. #define _mm512_mask_atanh_ps(src, k, a) simde_mm512_mask_atanh_ps(src, k, a)
  1413. #endif
  1414. SIMDE_FUNCTION_ATTRIBUTES
  1415. simde__m512d
  1416. simde_mm512_mask_atanh_pd(simde__m512d src, simde__mmask8 k, simde__m512d a) {
  1417. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  1418. return _mm512_mask_atanh_pd(src, k, a);
  1419. #else
  1420. return simde_mm512_mask_mov_pd(src, k, simde_mm512_atanh_pd(a));
  1421. #endif
  1422. }
  1423. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  1424. #undef _mm512_mask_atanh_pd
  1425. #define _mm512_mask_atanh_pd(src, k, a) simde_mm512_mask_atanh_pd(src, k, a)
  1426. #endif
  1427. SIMDE_FUNCTION_ATTRIBUTES
  1428. simde__m128
  1429. simde_mm_cbrt_ps (simde__m128 a) {
  1430. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
  1431. return _mm_cbrt_ps(a);
  1432. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
  1433. return Sleef_cbrtf4_u10(a);
  1434. #else
  1435. simde__m128_private
  1436. r_,
  1437. a_ = simde__m128_to_private(a);
  1438. SIMDE_VECTORIZE
  1439. for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
  1440. r_.f32[i] = simde_math_cbrtf(a_.f32[i]);
  1441. }
  1442. return simde__m128_from_private(r_);
  1443. #endif
  1444. }
  1445. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  1446. #undef _mm_cbrt_ps
  1447. #define _mm_cbrt_ps(a) simde_mm_cbrt_ps(a)
  1448. #endif
  1449. SIMDE_FUNCTION_ATTRIBUTES
  1450. simde__m128d
  1451. simde_mm_cbrt_pd (simde__m128d a) {
  1452. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
  1453. return _mm_cbrt_pd(a);
  1454. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
  1455. return Sleef_cbrtd2_u10(a);
  1456. #else
  1457. simde__m128d_private
  1458. r_,
  1459. a_ = simde__m128d_to_private(a);
  1460. SIMDE_VECTORIZE
  1461. for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
  1462. r_.f64[i] = simde_math_cbrt(a_.f64[i]);
  1463. }
  1464. return simde__m128d_from_private(r_);
  1465. #endif
  1466. }
  1467. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  1468. #undef _mm_cbrt_pd
  1469. #define _mm_cbrt_pd(a) simde_mm_cbrt_pd(a)
  1470. #endif
  1471. SIMDE_FUNCTION_ATTRIBUTES
  1472. simde__m256
  1473. simde_mm256_cbrt_ps (simde__m256 a) {
  1474. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
  1475. return _mm256_cbrt_ps(a);
  1476. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
  1477. return Sleef_cbrtf8_u10(a);
  1478. #else
  1479. simde__m256_private
  1480. r_,
  1481. a_ = simde__m256_to_private(a);
  1482. #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
  1483. for (size_t i = 0 ; i < (sizeof(r_.m128) / sizeof(r_.m128[0])) ; i++) {
  1484. r_.m128[i] = simde_mm_cbrt_ps(a_.m128[i]);
  1485. }
  1486. #else
  1487. SIMDE_VECTORIZE
  1488. for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
  1489. r_.f32[i] = simde_math_cbrtf(a_.f32[i]);
  1490. }
  1491. #endif
  1492. return simde__m256_from_private(r_);
  1493. #endif
  1494. }
  1495. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  1496. #undef _mm256_cbrt_ps
  1497. #define _mm256_cbrt_ps(a) simde_mm256_cbrt_ps(a)
  1498. #endif
  1499. SIMDE_FUNCTION_ATTRIBUTES
  1500. simde__m256d
  1501. simde_mm256_cbrt_pd (simde__m256d a) {
  1502. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
  1503. return _mm256_cbrt_pd(a);
  1504. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
  1505. return Sleef_cbrtd4_u10(a);
  1506. #else
  1507. simde__m256d_private
  1508. r_,
  1509. a_ = simde__m256d_to_private(a);
  1510. #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
  1511. for (size_t i = 0 ; i < (sizeof(r_.m128d) / sizeof(r_.m128d[0])) ; i++) {
  1512. r_.m128d[i] = simde_mm_cbrt_pd(a_.m128d[i]);
  1513. }
  1514. #else
  1515. SIMDE_VECTORIZE
  1516. for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
  1517. r_.f64[i] = simde_math_cbrt(a_.f64[i]);
  1518. }
  1519. #endif
  1520. return simde__m256d_from_private(r_);
  1521. #endif
  1522. }
  1523. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  1524. #undef _mm256_cbrt_pd
  1525. #define _mm256_cbrt_pd(a) simde_mm256_cbrt_pd(a)
  1526. #endif
  1527. SIMDE_FUNCTION_ATTRIBUTES
  1528. simde__m512
  1529. simde_mm512_cbrt_ps (simde__m512 a) {
  1530. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  1531. return _mm512_cbrt_ps(a);
  1532. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
  1533. return Sleef_cbrtf16_u10(a);
  1534. #else
  1535. simde__m512_private
  1536. r_,
  1537. a_ = simde__m512_to_private(a);
  1538. #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
  1539. for (size_t i = 0 ; i < (sizeof(r_.m256) / sizeof(r_.m256[0])) ; i++) {
  1540. r_.m256[i] = simde_mm256_cbrt_ps(a_.m256[i]);
  1541. }
  1542. #else
  1543. SIMDE_VECTORIZE
  1544. for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
  1545. r_.f32[i] = simde_math_cbrtf(a_.f32[i]);
  1546. }
  1547. #endif
  1548. return simde__m512_from_private(r_);
  1549. #endif
  1550. }
  1551. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  1552. #undef _mm512_cbrt_ps
  1553. #define _mm512_cbrt_ps(a) simde_mm512_cbrt_ps(a)
  1554. #endif
  1555. SIMDE_FUNCTION_ATTRIBUTES
  1556. simde__m512d
  1557. simde_mm512_cbrt_pd (simde__m512d a) {
  1558. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  1559. return _mm512_cbrt_pd(a);
  1560. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
  1561. return Sleef_cbrtd8_u10(a);
  1562. #else
  1563. simde__m512d_private
  1564. r_,
  1565. a_ = simde__m512d_to_private(a);
  1566. #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
  1567. for (size_t i = 0 ; i < (sizeof(r_.m256d) / sizeof(r_.m256d[0])) ; i++) {
  1568. r_.m256d[i] = simde_mm256_cbrt_pd(a_.m256d[i]);
  1569. }
  1570. #else
  1571. SIMDE_VECTORIZE
  1572. for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
  1573. r_.f64[i] = simde_math_cbrt(a_.f64[i]);
  1574. }
  1575. #endif
  1576. return simde__m512d_from_private(r_);
  1577. #endif
  1578. }
  1579. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  1580. #undef _mm512_cbrt_pd
  1581. #define _mm512_cbrt_pd(a) simde_mm512_cbrt_pd(a)
  1582. #endif
  1583. SIMDE_FUNCTION_ATTRIBUTES
  1584. simde__m512
  1585. simde_mm512_mask_cbrt_ps(simde__m512 src, simde__mmask16 k, simde__m512 a) {
  1586. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  1587. return _mm512_mask_cbrt_ps(src, k, a);
  1588. #else
  1589. return simde_mm512_mask_mov_ps(src, k, simde_mm512_cbrt_ps(a));
  1590. #endif
  1591. }
  1592. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  1593. #undef _mm512_mask_cbrt_ps
  1594. #define _mm512_mask_cbrt_ps(src, k, a) simde_mm512_mask_cbrt_ps(src, k, a)
  1595. #endif
  1596. SIMDE_FUNCTION_ATTRIBUTES
  1597. simde__m512d
  1598. simde_mm512_mask_cbrt_pd(simde__m512d src, simde__mmask8 k, simde__m512d a) {
  1599. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  1600. return _mm512_mask_cbrt_pd(src, k, a);
  1601. #else
  1602. return simde_mm512_mask_mov_pd(src, k, simde_mm512_cbrt_pd(a));
  1603. #endif
  1604. }
  1605. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  1606. #undef _mm512_mask_cbrt_pd
  1607. #define _mm512_mask_cbrt_pd(src, k, a) simde_mm512_mask_cbrt_pd(src, k, a)
  1608. #endif
  1609. SIMDE_FUNCTION_ATTRIBUTES
  1610. simde__m128
  1611. simde_mm_cexp_ps (simde__m128 a) {
  1612. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
  1613. return _mm_cexp_ps(a);
  1614. #else
  1615. simde__m128_private
  1616. r_,
  1617. a_ = simde__m128_to_private(a);
  1618. SIMDE_VECTORIZE
  1619. for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i+=2) {
  1620. simde_cfloat32 val = simde_math_cexpf(SIMDE_MATH_CMPLXF(a_.f32[i], a_.f32[i+1]));
  1621. r_.f32[ i ] = simde_math_crealf(val);
  1622. r_.f32[i + 1] = simde_math_cimagf(val);
  1623. }
  1624. return simde__m128_from_private(r_);
  1625. #endif
  1626. }
  1627. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  1628. #undef _mm_cexp_ps
  1629. #define _mm_cexp_ps(a) simde_mm_cexp_ps(a)
  1630. #endif
  1631. SIMDE_FUNCTION_ATTRIBUTES
  1632. simde__m256
  1633. simde_mm256_cexp_ps (simde__m256 a) {
  1634. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
  1635. return _mm256_cexp_ps(a);
  1636. #else
  1637. simde__m256_private
  1638. r_,
  1639. a_ = simde__m256_to_private(a);
  1640. SIMDE_VECTORIZE
  1641. for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i+=2) {
  1642. simde_cfloat32 val = simde_math_cexpf(SIMDE_MATH_CMPLXF(a_.f32[i], a_.f32[i+1]));
  1643. r_.f32[ i ] = simde_math_crealf(val);
  1644. r_.f32[i + 1] = simde_math_cimagf(val);
  1645. }
  1646. return simde__m256_from_private(r_);
  1647. #endif
  1648. }
  1649. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  1650. #undef _mm256_cexp_ps
  1651. #define _mm256_cexp_ps(a) simde_mm256_cexp_ps(a)
  1652. #endif
  1653. SIMDE_FUNCTION_ATTRIBUTES
  1654. simde__m128
  1655. simde_mm_cos_ps (simde__m128 a) {
  1656. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
  1657. return _mm_cos_ps(a);
  1658. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
  1659. #if SIMDE_ACCURACY_PREFERENCE > 1
  1660. return Sleef_cosf4_u10(a);
  1661. #else
  1662. return Sleef_cosf4_u35(a);
  1663. #endif
  1664. #else
  1665. simde__m128_private
  1666. r_,
  1667. a_ = simde__m128_to_private(a);
  1668. SIMDE_VECTORIZE
  1669. for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
  1670. r_.f32[i] = simde_math_cosf(a_.f32[i]);
  1671. }
  1672. return simde__m128_from_private(r_);
  1673. #endif
  1674. }
  1675. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  1676. #undef _mm_cos_ps
  1677. #define _mm_cos_ps(a) simde_mm_cos_ps(a)
  1678. #endif
  1679. SIMDE_FUNCTION_ATTRIBUTES
  1680. simde__m128d
  1681. simde_mm_cos_pd (simde__m128d a) {
  1682. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
  1683. return _mm_cos_pd(a);
  1684. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
  1685. #if SIMDE_ACCURACY_PREFERENCE > 1
  1686. return Sleef_cosd2_u10(a);
  1687. #else
  1688. return Sleef_cosd2_u35(a);
  1689. #endif
  1690. #else
  1691. simde__m128d_private
  1692. r_,
  1693. a_ = simde__m128d_to_private(a);
  1694. SIMDE_VECTORIZE
  1695. for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
  1696. r_.f64[i] = simde_math_cos(a_.f64[i]);
  1697. }
  1698. return simde__m128d_from_private(r_);
  1699. #endif
  1700. }
  1701. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  1702. #undef _mm_cos_pd
  1703. #define _mm_cos_pd(a) simde_mm_cos_pd(a)
  1704. #endif
  1705. SIMDE_FUNCTION_ATTRIBUTES
  1706. simde__m256
  1707. simde_mm256_cos_ps (simde__m256 a) {
  1708. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
  1709. return _mm256_cos_ps(a);
  1710. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
  1711. #if SIMDE_ACCURACY_PREFERENCE > 1
  1712. return Sleef_cosf8_u10(a);
  1713. #else
  1714. return Sleef_cosf8_u35(a);
  1715. #endif
  1716. #else
  1717. simde__m256_private
  1718. r_,
  1719. a_ = simde__m256_to_private(a);
  1720. #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
  1721. for (size_t i = 0 ; i < (sizeof(r_.m128) / sizeof(r_.m128[0])) ; i++) {
  1722. r_.m128[i] = simde_mm_cos_ps(a_.m128[i]);
  1723. }
  1724. #else
  1725. SIMDE_VECTORIZE
  1726. for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
  1727. r_.f32[i] = simde_math_cosf(a_.f32[i]);
  1728. }
  1729. #endif
  1730. return simde__m256_from_private(r_);
  1731. #endif
  1732. }
  1733. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  1734. #undef _mm256_cos_ps
  1735. #define _mm256_cos_ps(a) simde_mm256_cos_ps(a)
  1736. #endif
  1737. SIMDE_FUNCTION_ATTRIBUTES
  1738. simde__m256d
  1739. simde_mm256_cos_pd (simde__m256d a) {
  1740. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
  1741. return _mm256_cos_pd(a);
  1742. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
  1743. #if SIMDE_ACCURACY_PREFERENCE > 1
  1744. return Sleef_cosd4_u10(a);
  1745. #else
  1746. return Sleef_cosd4_u35(a);
  1747. #endif
  1748. #else
  1749. simde__m256d_private
  1750. r_,
  1751. a_ = simde__m256d_to_private(a);
  1752. #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
  1753. for (size_t i = 0 ; i < (sizeof(r_.m128d) / sizeof(r_.m128d[0])) ; i++) {
  1754. r_.m128d[i] = simde_mm_cos_pd(a_.m128d[i]);
  1755. }
  1756. #else
  1757. SIMDE_VECTORIZE
  1758. for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
  1759. r_.f64[i] = simde_math_cos(a_.f64[i]);
  1760. }
  1761. #endif
  1762. return simde__m256d_from_private(r_);
  1763. #endif
  1764. }
  1765. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  1766. #undef _mm256_cos_pd
  1767. #define _mm256_cos_pd(a) simde_mm256_cos_pd(a)
  1768. #endif
  1769. SIMDE_FUNCTION_ATTRIBUTES
  1770. simde__m512
  1771. simde_mm512_cos_ps (simde__m512 a) {
  1772. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  1773. return _mm512_cos_ps(a);
  1774. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
  1775. #if SIMDE_ACCURACY_PREFERENCE > 1
  1776. return Sleef_cosf16_u10(a);
  1777. #else
  1778. return Sleef_cosf16_u35(a);
  1779. #endif
  1780. #else
  1781. simde__m512_private
  1782. r_,
  1783. a_ = simde__m512_to_private(a);
  1784. #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
  1785. for (size_t i = 0 ; i < (sizeof(r_.m256) / sizeof(r_.m256[0])) ; i++) {
  1786. r_.m256[i] = simde_mm256_cos_ps(a_.m256[i]);
  1787. }
  1788. #else
  1789. SIMDE_VECTORIZE
  1790. for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
  1791. r_.f32[i] = simde_math_cosf(a_.f32[i]);
  1792. }
  1793. #endif
  1794. return simde__m512_from_private(r_);
  1795. #endif
  1796. }
  1797. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  1798. #undef _mm512_cos_ps
  1799. #define _mm512_cos_ps(a) simde_mm512_cos_ps(a)
  1800. #endif
  1801. SIMDE_FUNCTION_ATTRIBUTES
  1802. simde__m512d
  1803. simde_mm512_cos_pd (simde__m512d a) {
  1804. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  1805. return _mm512_cos_pd(a);
  1806. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
  1807. #if SIMDE_ACCURACY_PREFERENCE > 1
  1808. return Sleef_cosd8_u10(a);
  1809. #else
  1810. return Sleef_cosd8_u35(a);
  1811. #endif
  1812. #else
  1813. simde__m512d_private
  1814. r_,
  1815. a_ = simde__m512d_to_private(a);
  1816. #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
  1817. for (size_t i = 0 ; i < (sizeof(r_.m256d) / sizeof(r_.m256d[0])) ; i++) {
  1818. r_.m256d[i] = simde_mm256_cos_pd(a_.m256d[i]);
  1819. }
  1820. #else
  1821. SIMDE_VECTORIZE
  1822. for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
  1823. r_.f64[i] = simde_math_cos(a_.f64[i]);
  1824. }
  1825. #endif
  1826. return simde__m512d_from_private(r_);
  1827. #endif
  1828. }
  1829. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  1830. #undef _mm512_cos_pd
  1831. #define _mm512_cos_pd(a) simde_mm512_cos_pd(a)
  1832. #endif
  1833. SIMDE_FUNCTION_ATTRIBUTES
  1834. simde__m512
  1835. simde_mm512_mask_cos_ps(simde__m512 src, simde__mmask16 k, simde__m512 a) {
  1836. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  1837. return _mm512_mask_cos_ps(src, k, a);
  1838. #else
  1839. return simde_mm512_mask_mov_ps(src, k, simde_mm512_cos_ps(a));
  1840. #endif
  1841. }
  1842. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  1843. #undef _mm512_mask_cos_ps
  1844. #define _mm512_mask_cos_ps(src, k, a) simde_mm512_mask_cos_ps(src, k, a)
  1845. #endif
  1846. SIMDE_FUNCTION_ATTRIBUTES
  1847. simde__m512d
  1848. simde_mm512_mask_cos_pd(simde__m512d src, simde__mmask8 k, simde__m512d a) {
  1849. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  1850. return _mm512_mask_cos_pd(src, k, a);
  1851. #else
  1852. return simde_mm512_mask_mov_pd(src, k, simde_mm512_cos_pd(a));
  1853. #endif
  1854. }
  1855. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  1856. #undef _mm512_mask_cos_pd
  1857. #define _mm512_mask_cos_pd(src, k, a) simde_mm512_mask_cos_pd(src, k, a)
  1858. #endif
  1859. SIMDE_FUNCTION_ATTRIBUTES
  1860. simde__m128
  1861. simde_x_mm_deg2rad_ps(simde__m128 a) {
  1862. #if SIMDE_NATURAL_VECTOR_SIZE_GE(128)
  1863. return simde_mm_mul_ps(a, simde_mm_set1_ps(SIMDE_MATH_PI_OVER_180F));
  1864. #else
  1865. simde__m128_private
  1866. r_,
  1867. a_ = simde__m128_to_private(a);
  1868. #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
  1869. r_.neon_f32 = vmulq_n_f32(a_.neon_i32, SIMDE_MATH_PI_OVER_180F);
  1870. #elif defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR) && !defined(SIMDE_BUG_GCC_53784)
  1871. r_.f32 = a_.f32 * SIMDE_MATH_PI_OVER_180F;
  1872. #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
  1873. const __typeof__(r_.f32) tmp = { SIMDE_MATH_PI_OVER_180F, SIMDE_MATH_PI_OVER_180F, SIMDE_MATH_PI_OVER_180F, SIMDE_MATH_PI_OVER_180F };
  1874. r_.f32 = a_.f32 * tmp;
  1875. #else
  1876. SIMDE_VECTORIZE
  1877. for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
  1878. r_.f32[i] = simde_math_deg2radf(a_.f32[i]);
  1879. }
  1880. #endif
  1881. return simde__m128_from_private(r_);
  1882. #endif
  1883. }
  1884. SIMDE_FUNCTION_ATTRIBUTES
  1885. simde__m128d
  1886. simde_x_mm_deg2rad_pd(simde__m128d a) {
  1887. #if SIMDE_NATURAL_VECTOR_SIZE_GE(128)
  1888. return simde_mm_mul_pd(a, simde_mm_set1_pd(SIMDE_MATH_PI_OVER_180));
  1889. #else
  1890. simde__m128d_private
  1891. r_,
  1892. a_ = simde__m128d_to_private(a);
  1893. #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
  1894. r_.neon_f64 = vmulq_n_f64(a_.neon_i64, SIMDE_MATH_PI_OVER_180);
  1895. #elif defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR) && !defined(SIMDE_BUG_GCC_53784)
  1896. r_.f64 = a_.f64 * SIMDE_MATH_PI_OVER_180;
  1897. #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
  1898. const __typeof__(r_.f64) tmp = { SIMDE_MATH_PI_OVER_180, SIMDE_MATH_PI_OVER_180 };
  1899. r_.f64 = a_.f64 * tmp;
  1900. #else
  1901. SIMDE_VECTORIZE
  1902. for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
  1903. r_.f64[i] = simde_math_deg2rad(a_.f64[i]);
  1904. }
  1905. #endif
  1906. return simde__m128d_from_private(r_);
  1907. #endif
  1908. }
  1909. SIMDE_FUNCTION_ATTRIBUTES
  1910. simde__m256
  1911. simde_x_mm256_deg2rad_ps(simde__m256 a) {
  1912. #if SIMDE_NATURAL_VECTOR_SIZE_GE(256)
  1913. return simde_mm256_mul_ps(a, simde_mm256_set1_ps(SIMDE_MATH_PI_OVER_180F));
  1914. #else
  1915. simde__m256_private
  1916. r_,
  1917. a_ = simde__m256_to_private(a);
  1918. #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
  1919. for (size_t i = 0 ; i < (sizeof(r_.m128) / sizeof(r_.m128[0])) ; i++) {
  1920. r_.m128[i] = simde_x_mm_deg2rad_ps(a_.m128[i]);
  1921. }
  1922. #elif defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR) && !defined(SIMDE_BUG_GCC_53784)
  1923. r_.f32 = a_.f32 * SIMDE_MATH_PI_OVER_180F;
  1924. #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
  1925. const __typeof__(r_.f32) tmp = {
  1926. SIMDE_MATH_PI_OVER_180F, SIMDE_MATH_PI_OVER_180F, SIMDE_MATH_PI_OVER_180F, SIMDE_MATH_PI_OVER_180F,
  1927. SIMDE_MATH_PI_OVER_180F, SIMDE_MATH_PI_OVER_180F, SIMDE_MATH_PI_OVER_180F, SIMDE_MATH_PI_OVER_180F
  1928. };
  1929. r_.f32 = a_.f32 * tmp;
  1930. #else
  1931. SIMDE_VECTORIZE
  1932. for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
  1933. r_.f32[i] = simde_math_deg2radf(a_.f32[i]);
  1934. }
  1935. #endif
  1936. return simde__m256_from_private(r_);
  1937. #endif
  1938. }
  1939. SIMDE_FUNCTION_ATTRIBUTES
  1940. simde__m256d
  1941. simde_x_mm256_deg2rad_pd(simde__m256d a) {
  1942. #if SIMDE_NATURAL_VECTOR_SIZE_GE(256)
  1943. return simde_mm256_mul_pd(a, simde_mm256_set1_pd(SIMDE_MATH_PI_OVER_180));
  1944. #else
  1945. simde__m256d_private
  1946. r_,
  1947. a_ = simde__m256d_to_private(a);
  1948. #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
  1949. for (size_t i = 0 ; i < (sizeof(r_.m128d) / sizeof(r_.m128d[0])) ; i++) {
  1950. r_.m128d[i] = simde_x_mm_deg2rad_pd(a_.m128d[i]);
  1951. }
  1952. #elif defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR) && !defined(SIMDE_BUG_GCC_53784)
  1953. r_.f64 = a_.f64 * SIMDE_MATH_PI_OVER_180;
  1954. #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
  1955. const __typeof__(r_.f64) tmp = { SIMDE_MATH_PI_OVER_180, SIMDE_MATH_PI_OVER_180, SIMDE_MATH_PI_OVER_180, SIMDE_MATH_PI_OVER_180 };
  1956. r_.f64 = a_.f64 * tmp;
  1957. #else
  1958. SIMDE_VECTORIZE
  1959. for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
  1960. r_.f64[i] = simde_math_deg2rad(a_.f64[i]);
  1961. }
  1962. #endif
  1963. return simde__m256d_from_private(r_);
  1964. #endif
  1965. }
  1966. SIMDE_FUNCTION_ATTRIBUTES
  1967. simde__m512
  1968. simde_x_mm512_deg2rad_ps(simde__m512 a) {
  1969. #if SIMDE_NATURAL_VECTOR_SIZE_GE(512)
  1970. return simde_mm512_mul_ps(a, simde_mm512_set1_ps(SIMDE_MATH_PI_OVER_180F));
  1971. #else
  1972. simde__m512_private
  1973. r_,
  1974. a_ = simde__m512_to_private(a);
  1975. #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
  1976. for (size_t i = 0 ; i < (sizeof(r_.m256) / sizeof(r_.m256[0])) ; i++) {
  1977. r_.m256[i] = simde_x_mm256_deg2rad_ps(a_.m256[i]);
  1978. }
  1979. #elif defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR) && !defined(SIMDE_BUG_GCC_53784)
  1980. r_.f32 = a_.f32 * SIMDE_MATH_PI_OVER_180F;
  1981. #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
  1982. const __typeof__(r_.f32) tmp = {
  1983. SIMDE_MATH_PI_OVER_180F, SIMDE_MATH_PI_OVER_180F, SIMDE_MATH_PI_OVER_180F, SIMDE_MATH_PI_OVER_180F,
  1984. SIMDE_MATH_PI_OVER_180F, SIMDE_MATH_PI_OVER_180F, SIMDE_MATH_PI_OVER_180F, SIMDE_MATH_PI_OVER_180F,
  1985. SIMDE_MATH_PI_OVER_180F, SIMDE_MATH_PI_OVER_180F, SIMDE_MATH_PI_OVER_180F, SIMDE_MATH_PI_OVER_180F,
  1986. SIMDE_MATH_PI_OVER_180F, SIMDE_MATH_PI_OVER_180F, SIMDE_MATH_PI_OVER_180F, SIMDE_MATH_PI_OVER_180F
  1987. };
  1988. r_.f32 = a_.f32 * tmp;
  1989. #else
  1990. SIMDE_VECTORIZE
  1991. for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
  1992. r_.f32[i] = simde_math_deg2radf(a_.f32[i]);
  1993. }
  1994. #endif
  1995. return simde__m512_from_private(r_);
  1996. #endif
  1997. }
  1998. SIMDE_FUNCTION_ATTRIBUTES
  1999. simde__m512d
  2000. simde_x_mm512_deg2rad_pd(simde__m512d a) {
  2001. #if SIMDE_NATURAL_VECTOR_SIZE_GE(512)
  2002. return simde_mm512_mul_pd(a, simde_mm512_set1_pd(SIMDE_MATH_PI_OVER_180));
  2003. #else
  2004. simde__m512d_private
  2005. r_,
  2006. a_ = simde__m512d_to_private(a);
  2007. #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
  2008. for (size_t i = 0 ; i < (sizeof(r_.m256d) / sizeof(r_.m256d[0])) ; i++) {
  2009. r_.m256d[i] = simde_x_mm256_deg2rad_pd(a_.m256d[i]);
  2010. }
  2011. #elif defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR) && !defined(SIMDE_BUG_GCC_53784)
  2012. r_.f64 = a_.f64 * SIMDE_MATH_PI_OVER_180;
  2013. #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
  2014. const __typeof__(r_.f64) tmp = {
  2015. SIMDE_MATH_PI_OVER_180, SIMDE_MATH_PI_OVER_180, SIMDE_MATH_PI_OVER_180, SIMDE_MATH_PI_OVER_180,
  2016. SIMDE_MATH_PI_OVER_180, SIMDE_MATH_PI_OVER_180, SIMDE_MATH_PI_OVER_180, SIMDE_MATH_PI_OVER_180
  2017. };
  2018. r_.f64 = a_.f64 * tmp;
  2019. #else
  2020. SIMDE_VECTORIZE
  2021. for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
  2022. r_.f64[i] = simde_math_deg2rad(a_.f64[i]);
  2023. }
  2024. #endif
  2025. return simde__m512d_from_private(r_);
  2026. #endif
  2027. }
  2028. SIMDE_FUNCTION_ATTRIBUTES
  2029. simde__m128
  2030. simde_mm_cosd_ps (simde__m128 a) {
  2031. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
  2032. return _mm_cosd_ps(a);
  2033. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
  2034. #if SIMDE_ACCURACY_PREFERENCE > 1
  2035. return Sleef_cosf4_u10(simde_x_mm_deg2rad_ps(a));
  2036. #else
  2037. return Sleef_cosf4_u35(simde_x_mm_deg2rad_ps(a));
  2038. #endif
  2039. #else
  2040. simde__m128_private
  2041. r_,
  2042. a_ = simde__m128_to_private(a);
  2043. SIMDE_VECTORIZE
  2044. for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
  2045. r_.f32[i] = simde_math_cosf(simde_math_deg2radf(a_.f32[i]));
  2046. }
  2047. return simde__m128_from_private(r_);
  2048. #endif
  2049. }
  2050. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  2051. #undef _mm_cosd_ps
  2052. #define _mm_cosd_ps(a) simde_mm_cosd_ps(a)
  2053. #endif
  2054. SIMDE_FUNCTION_ATTRIBUTES
  2055. simde__m128d
  2056. simde_mm_cosd_pd (simde__m128d a) {
  2057. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
  2058. return _mm_cosd_pd(a);
  2059. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
  2060. #if SIMDE_ACCURACY_PREFERENCE > 1
  2061. return Sleef_cosd2_u10(simde_x_mm_deg2rad_pd(a));
  2062. #else
  2063. return Sleef_cosd2_u35(simde_x_mm_deg2rad_pd(a));
  2064. #endif
  2065. #else
  2066. simde__m128d_private
  2067. r_,
  2068. a_ = simde__m128d_to_private(a);
  2069. SIMDE_VECTORIZE
  2070. for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
  2071. r_.f64[i] = simde_math_cos(simde_math_deg2rad(a_.f64[i]));
  2072. }
  2073. return simde__m128d_from_private(r_);
  2074. #endif
  2075. }
  2076. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  2077. #undef _mm_cosd_pd
  2078. #define _mm_cosd_pd(a) simde_mm_cosd_pd(a)
  2079. #endif
  2080. SIMDE_FUNCTION_ATTRIBUTES
  2081. simde__m256
  2082. simde_mm256_cosd_ps (simde__m256 a) {
  2083. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
  2084. return _mm256_cosd_ps(a);
  2085. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
  2086. #if SIMDE_ACCURACY_PREFERENCE > 1
  2087. return Sleef_cosf8_u10(simde_x_mm256_deg2rad_ps(a));
  2088. #else
  2089. return Sleef_cosf8_u35(simde_x_mm256_deg2rad_ps(a));
  2090. #endif
  2091. #else
  2092. simde__m256_private
  2093. r_,
  2094. a_ = simde__m256_to_private(a);
  2095. #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
  2096. for (size_t i = 0 ; i < (sizeof(r_.m128) / sizeof(r_.m128[0])) ; i++) {
  2097. r_.m128[i] = simde_mm_cosd_ps(a_.m128[i]);
  2098. }
  2099. #else
  2100. SIMDE_VECTORIZE
  2101. for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
  2102. r_.f32[i] = simde_math_cosf(simde_math_deg2radf(a_.f32[i]));
  2103. }
  2104. #endif
  2105. return simde__m256_from_private(r_);
  2106. #endif
  2107. }
  2108. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  2109. #undef _mm256_cosd_ps
  2110. #define _mm256_cosd_ps(a) simde_mm256_cosd_ps(a)
  2111. #endif
  2112. SIMDE_FUNCTION_ATTRIBUTES
  2113. simde__m256d
  2114. simde_mm256_cosd_pd (simde__m256d a) {
  2115. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
  2116. return _mm256_cosd_pd(a);
  2117. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
  2118. #if SIMDE_ACCURACY_PREFERENCE > 1
  2119. return Sleef_cosd4_u10(simde_x_mm256_deg2rad_pd(a));
  2120. #else
  2121. return Sleef_cosd4_u35(simde_x_mm256_deg2rad_pd(a));
  2122. #endif
  2123. #else
  2124. simde__m256d_private
  2125. r_,
  2126. a_ = simde__m256d_to_private(a);
  2127. #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
  2128. for (size_t i = 0 ; i < (sizeof(r_.m128d) / sizeof(r_.m128d[0])) ; i++) {
  2129. r_.m128d[i] = simde_mm_cosd_pd(a_.m128d[i]);
  2130. }
  2131. #else
  2132. SIMDE_VECTORIZE
  2133. for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
  2134. r_.f64[i] = simde_math_cos(simde_math_deg2rad(a_.f64[i]));
  2135. }
  2136. #endif
  2137. return simde__m256d_from_private(r_);
  2138. #endif
  2139. }
  2140. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  2141. #undef _mm256_cosd_pd
  2142. #define _mm256_cosd_pd(a) simde_mm256_cosd_pd(a)
  2143. #endif
  2144. SIMDE_FUNCTION_ATTRIBUTES
  2145. simde__m512
  2146. simde_mm512_cosd_ps (simde__m512 a) {
  2147. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  2148. return _mm512_cosd_ps(a);
  2149. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
  2150. #if SIMDE_ACCURACY_PREFERENCE > 1
  2151. return Sleef_cosf16_u10(simde_x_mm512_deg2rad_ps(a));
  2152. #else
  2153. return Sleef_cosf16_u35(simde_x_mm512_deg2rad_ps(a));
  2154. #endif
  2155. #else
  2156. simde__m512_private
  2157. r_,
  2158. a_ = simde__m512_to_private(a);
  2159. #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
  2160. for (size_t i = 0 ; i < (sizeof(r_.m256) / sizeof(r_.m256[0])) ; i++) {
  2161. r_.m256[i] = simde_mm256_cosd_ps(a_.m256[i]);
  2162. }
  2163. #else
  2164. SIMDE_VECTORIZE
  2165. for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
  2166. r_.f32[i] = simde_math_cosf(simde_math_deg2radf(a_.f32[i]));
  2167. }
  2168. #endif
  2169. return simde__m512_from_private(r_);
  2170. #endif
  2171. }
  2172. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  2173. #undef _mm512_cosd_ps
  2174. #define _mm512_cosd_ps(a) simde_mm512_cosd_ps(a)
  2175. #endif
  2176. SIMDE_FUNCTION_ATTRIBUTES
  2177. simde__m512d
  2178. simde_mm512_cosd_pd (simde__m512d a) {
  2179. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  2180. return _mm512_cosd_pd(a);
  2181. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
  2182. #if SIMDE_ACCURACY_PREFERENCE > 1
  2183. return Sleef_cosd8_u10(simde_x_mm512_deg2rad_pd(a));
  2184. #else
  2185. return Sleef_cosd8_u35(simde_x_mm512_deg2rad_pd(a));
  2186. #endif
  2187. #else
  2188. simde__m512d_private
  2189. r_,
  2190. a_ = simde__m512d_to_private(a);
  2191. #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
  2192. for (size_t i = 0 ; i < (sizeof(r_.m256d) / sizeof(r_.m256d[0])) ; i++) {
  2193. r_.m256d[i] = simde_mm256_cosd_pd(a_.m256d[i]);
  2194. }
  2195. #else
  2196. SIMDE_VECTORIZE
  2197. for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
  2198. r_.f64[i] = simde_math_cos(simde_math_deg2rad(a_.f64[i]));
  2199. }
  2200. #endif
  2201. return simde__m512d_from_private(r_);
  2202. #endif
  2203. }
  2204. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  2205. #undef _mm512_cosd_pd
  2206. #define _mm512_cosd_pd(a) simde_mm512_cosd_pd(a)
  2207. #endif
  2208. SIMDE_FUNCTION_ATTRIBUTES
  2209. simde__m512
  2210. simde_mm512_mask_cosd_ps(simde__m512 src, simde__mmask16 k, simde__m512 a) {
  2211. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  2212. return _mm512_mask_cosd_ps(src, k, a);
  2213. #else
  2214. return simde_mm512_mask_mov_ps(src, k, simde_mm512_cosd_ps(a));
  2215. #endif
  2216. }
  2217. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  2218. #undef _mm512_mask_cosd_ps
  2219. #define _mm512_mask_cosd_ps(src, k, a) simde_mm512_mask_cosd_ps(src, k, a)
  2220. #endif
  2221. SIMDE_FUNCTION_ATTRIBUTES
  2222. simde__m512d
  2223. simde_mm512_mask_cosd_pd(simde__m512d src, simde__mmask8 k, simde__m512d a) {
  2224. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  2225. return _mm512_mask_cosd_pd(src, k, a);
  2226. #else
  2227. return simde_mm512_mask_mov_pd(src, k, simde_mm512_cosd_pd(a));
  2228. #endif
  2229. }
  2230. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  2231. #undef _mm512_mask_cosd_pd
  2232. #define _mm512_mask_cosd_pd(src, k, a) simde_mm512_mask_cosd_pd(src, k, a)
  2233. #endif
  2234. SIMDE_FUNCTION_ATTRIBUTES
  2235. simde__m128
  2236. simde_mm_cosh_ps (simde__m128 a) {
  2237. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
  2238. return _mm_cosh_ps(a);
  2239. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
  2240. return Sleef_coshf4_u10(a);
  2241. #else
  2242. simde__m128_private
  2243. r_,
  2244. a_ = simde__m128_to_private(a);
  2245. SIMDE_VECTORIZE
  2246. for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
  2247. r_.f32[i] = simde_math_coshf(a_.f32[i]);
  2248. }
  2249. return simde__m128_from_private(r_);
  2250. #endif
  2251. }
  2252. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  2253. #undef _mm_cosh_ps
  2254. #define _mm_cosh_ps(a) simde_mm_cosh_ps(a)
  2255. #endif
  2256. SIMDE_FUNCTION_ATTRIBUTES
  2257. simde__m128d
  2258. simde_mm_cosh_pd (simde__m128d a) {
  2259. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
  2260. return _mm_cosh_pd(a);
  2261. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
  2262. return Sleef_coshd2_u10(a);
  2263. #else
  2264. simde__m128d_private
  2265. r_,
  2266. a_ = simde__m128d_to_private(a);
  2267. SIMDE_VECTORIZE
  2268. for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
  2269. r_.f64[i] = simde_math_cosh(a_.f64[i]);
  2270. }
  2271. return simde__m128d_from_private(r_);
  2272. #endif
  2273. }
  2274. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  2275. #undef _mm_cosh_pd
  2276. #define _mm_cosh_pd(a) simde_mm_cosh_pd(a)
  2277. #endif
  2278. SIMDE_FUNCTION_ATTRIBUTES
  2279. simde__m256
  2280. simde_mm256_cosh_ps (simde__m256 a) {
  2281. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
  2282. return _mm256_cosh_ps(a);
  2283. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
  2284. return Sleef_coshf8_u10(a);
  2285. #else
  2286. simde__m256_private
  2287. r_,
  2288. a_ = simde__m256_to_private(a);
  2289. #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
  2290. for (size_t i = 0 ; i < (sizeof(r_.m128) / sizeof(r_.m128[0])) ; i++) {
  2291. r_.m128[i] = simde_mm_cosh_ps(a_.m128[i]);
  2292. }
  2293. #else
  2294. SIMDE_VECTORIZE
  2295. for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
  2296. r_.f32[i] = simde_math_coshf(a_.f32[i]);
  2297. }
  2298. #endif
  2299. return simde__m256_from_private(r_);
  2300. #endif
  2301. }
  2302. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  2303. #undef _mm256_cosh_ps
  2304. #define _mm256_cosh_ps(a) simde_mm256_cosh_ps(a)
  2305. #endif
  2306. SIMDE_FUNCTION_ATTRIBUTES
  2307. simde__m256d
  2308. simde_mm256_cosh_pd (simde__m256d a) {
  2309. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
  2310. return _mm256_cosh_pd(a);
  2311. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
  2312. return Sleef_coshd4_u10(a);
  2313. #else
  2314. simde__m256d_private
  2315. r_,
  2316. a_ = simde__m256d_to_private(a);
  2317. #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
  2318. for (size_t i = 0 ; i < (sizeof(r_.m128d) / sizeof(r_.m128d[0])) ; i++) {
  2319. r_.m128d[i] = simde_mm_cosh_pd(a_.m128d[i]);
  2320. }
  2321. #else
  2322. SIMDE_VECTORIZE
  2323. for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
  2324. r_.f64[i] = simde_math_cosh(a_.f64[i]);
  2325. }
  2326. #endif
  2327. return simde__m256d_from_private(r_);
  2328. #endif
  2329. }
  2330. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  2331. #undef _mm256_cosh_pd
  2332. #define _mm256_cosh_pd(a) simde_mm256_cosh_pd(a)
  2333. #endif
  2334. SIMDE_FUNCTION_ATTRIBUTES
  2335. simde__m512
  2336. simde_mm512_cosh_ps (simde__m512 a) {
  2337. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  2338. return _mm512_cosh_ps(a);
  2339. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
  2340. return Sleef_coshf16_u10(a);
  2341. #else
  2342. simde__m512_private
  2343. r_,
  2344. a_ = simde__m512_to_private(a);
  2345. #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
  2346. for (size_t i = 0 ; i < (sizeof(r_.m256) / sizeof(r_.m256[0])) ; i++) {
  2347. r_.m256[i] = simde_mm256_cosh_ps(a_.m256[i]);
  2348. }
  2349. #else
  2350. SIMDE_VECTORIZE
  2351. for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
  2352. r_.f32[i] = simde_math_coshf(a_.f32[i]);
  2353. }
  2354. #endif
  2355. return simde__m512_from_private(r_);
  2356. #endif
  2357. }
  2358. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  2359. #undef _mm512_cosh_ps
  2360. #define _mm512_cosh_ps(a) simde_mm512_cosh_ps(a)
  2361. #endif
  2362. SIMDE_FUNCTION_ATTRIBUTES
  2363. simde__m512d
  2364. simde_mm512_cosh_pd (simde__m512d a) {
  2365. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  2366. return _mm512_cosh_pd(a);
  2367. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
  2368. return Sleef_coshd8_u10(a);
  2369. #else
  2370. simde__m512d_private
  2371. r_,
  2372. a_ = simde__m512d_to_private(a);
  2373. #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
  2374. for (size_t i = 0 ; i < (sizeof(r_.m256d) / sizeof(r_.m256d[0])) ; i++) {
  2375. r_.m256d[i] = simde_mm256_cosh_pd(a_.m256d[i]);
  2376. }
  2377. #else
  2378. SIMDE_VECTORIZE
  2379. for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
  2380. r_.f64[i] = simde_math_cosh(a_.f64[i]);
  2381. }
  2382. #endif
  2383. return simde__m512d_from_private(r_);
  2384. #endif
  2385. }
  2386. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  2387. #undef _mm512_cosh_pd
  2388. #define _mm512_cosh_pd(a) simde_mm512_cosh_pd(a)
  2389. #endif
  2390. SIMDE_FUNCTION_ATTRIBUTES
  2391. simde__m512
  2392. simde_mm512_mask_cosh_ps(simde__m512 src, simde__mmask16 k, simde__m512 a) {
  2393. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  2394. return _mm512_mask_cosh_ps(src, k, a);
  2395. #else
  2396. return simde_mm512_mask_mov_ps(src, k, simde_mm512_cosh_ps(a));
  2397. #endif
  2398. }
  2399. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  2400. #undef _mm512_mask_cosh_ps
  2401. #define _mm512_mask_cosh_ps(src, k, a) simde_mm512_mask_cosh_ps(src, k, a)
  2402. #endif
  2403. SIMDE_FUNCTION_ATTRIBUTES
  2404. simde__m512d
  2405. simde_mm512_mask_cosh_pd(simde__m512d src, simde__mmask8 k, simde__m512d a) {
  2406. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  2407. return _mm512_mask_cosh_pd(src, k, a);
  2408. #else
  2409. return simde_mm512_mask_mov_pd(src, k, simde_mm512_cosh_pd(a));
  2410. #endif
  2411. }
  2412. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  2413. #undef _mm512_mask_cosh_pd
  2414. #define _mm512_mask_cosh_pd(src, k, a) simde_mm512_mask_cosh_pd(src, k, a)
  2415. #endif
  2416. SIMDE_FUNCTION_ATTRIBUTES
  2417. simde__m128i
  2418. simde_mm_div_epi8 (simde__m128i a, simde__m128i b) {
  2419. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
  2420. return _mm_div_epi8(a, b);
  2421. #else
  2422. simde__m128i_private
  2423. r_,
  2424. a_ = simde__m128i_to_private(a),
  2425. b_ = simde__m128i_to_private(b);
  2426. #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
  2427. r_.i8 = a_.i8 / b_.i8;
  2428. #elif defined(SIMDE_WASM_SIMD128_NATIVE)
  2429. r_.wasm_v128 = wasm_i8x4_div(a_.wasm_v128, b_.wasm_v128);
  2430. #else
  2431. SIMDE_VECTORIZE
  2432. for (size_t i = 0 ; i < (sizeof(r_.i8) / sizeof(r_.i8[0])) ; i++) {
  2433. r_.i8[i] = a_.i8[i] / b_.i8[i];
  2434. }
  2435. #endif
  2436. return simde__m128i_from_private(r_);
  2437. #endif
  2438. }
  2439. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  2440. #undef _mm_div_epi8
  2441. #define _mm_div_epi8(a, b) simde_mm_div_epi8((a), (b))
  2442. #endif
  2443. SIMDE_FUNCTION_ATTRIBUTES
  2444. simde__m128i
  2445. simde_mm_div_epi16 (simde__m128i a, simde__m128i b) {
  2446. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
  2447. return _mm_div_epi16(a, b);
  2448. #else
  2449. simde__m128i_private
  2450. r_,
  2451. a_ = simde__m128i_to_private(a),
  2452. b_ = simde__m128i_to_private(b);
  2453. #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
  2454. r_.i16 = a_.i16 / b_.i16;
  2455. #elif defined(SIMDE_WASM_SIMD128_NATIVE)
  2456. r_.wasm_v128 = wasm_i16x4_div(a_.wasm_v128, b_.wasm_v128);
  2457. #else
  2458. SIMDE_VECTORIZE
  2459. for (size_t i = 0 ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) {
  2460. r_.i16[i] = a_.i16[i] / b_.i16[i];
  2461. }
  2462. #endif
  2463. return simde__m128i_from_private(r_);
  2464. #endif
  2465. }
  2466. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  2467. #undef _mm_div_epi16
  2468. #define _mm_div_epi16(a, b) simde_mm_div_epi16((a), (b))
  2469. #endif
  2470. SIMDE_FUNCTION_ATTRIBUTES
  2471. simde__m128i
  2472. simde_mm_div_epi32 (simde__m128i a, simde__m128i b) {
  2473. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
  2474. return _mm_div_epi32(a, b);
  2475. #else
  2476. simde__m128i_private
  2477. r_,
  2478. a_ = simde__m128i_to_private(a),
  2479. b_ = simde__m128i_to_private(b);
  2480. #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
  2481. r_.i32 = a_.i32 / b_.i32;
  2482. #elif defined(SIMDE_WASM_SIMD128_NATIVE)
  2483. r_.wasm_v128 = wasm_i32x4_div(a_.wasm_v128, b_.wasm_v128);
  2484. #else
  2485. SIMDE_VECTORIZE
  2486. for (size_t i = 0 ; i < (sizeof(r_.i32) / sizeof(r_.i32[0])) ; i++) {
  2487. r_.i32[i] = a_.i32[i] / b_.i32[i];
  2488. }
  2489. #endif
  2490. return simde__m128i_from_private(r_);
  2491. #endif
  2492. }
  2493. #define simde_mm_idiv_epi32(a, b) simde_mm_div_epi32(a, b)
  2494. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  2495. #undef _mm_div_epi32
  2496. #define _mm_div_epi32(a, b) simde_mm_div_epi32(a, b)
  2497. #undef _mm_idiv_epi32
  2498. #define _mm_idiv_epi32(a, b) simde_mm_div_epi32(a, b)
  2499. #endif
  2500. SIMDE_FUNCTION_ATTRIBUTES
  2501. simde__m128i
  2502. simde_mm_div_epi64 (simde__m128i a, simde__m128i b) {
  2503. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
  2504. return _mm_div_epi64(a, b);
  2505. #else
  2506. simde__m128i_private
  2507. r_,
  2508. a_ = simde__m128i_to_private(a),
  2509. b_ = simde__m128i_to_private(b);
  2510. #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
  2511. r_.i64 = a_.i64 / b_.i64;
  2512. #elif defined(SIMDE_WASM_SIMD128_NATIVE)
  2513. r_.wasm_v128 = wasm_i64x4_div(a_.wasm_v128, b_.wasm_v128);
  2514. #else
  2515. SIMDE_VECTORIZE
  2516. for (size_t i = 0 ; i < (sizeof(r_.i64) / sizeof(r_.i64[0])) ; i++) {
  2517. r_.i64[i] = a_.i64[i] / b_.i64[i];
  2518. }
  2519. #endif
  2520. return simde__m128i_from_private(r_);
  2521. #endif
  2522. }
  2523. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  2524. #undef _mm_div_epi64
  2525. #define _mm_div_epi64(a, b) simde_mm_div_epi64((a), (b))
  2526. #endif
  2527. SIMDE_FUNCTION_ATTRIBUTES
  2528. simde__m128i
  2529. simde_mm_div_epu8 (simde__m128i a, simde__m128i b) {
  2530. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
  2531. return _mm_div_epu8(a, b);
  2532. #else
  2533. simde__m128i_private
  2534. r_,
  2535. a_ = simde__m128i_to_private(a),
  2536. b_ = simde__m128i_to_private(b);
  2537. #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
  2538. r_.u8 = a_.u8 / b_.u8;
  2539. #elif defined(SIMDE_WASM_SIMD128_NATIVE)
  2540. r_.wasm_v128 = wasm_u8x16_div(a_.wasm_v128, b_.wasm_v128);
  2541. #else
  2542. SIMDE_VECTORIZE
  2543. for (size_t i = 0 ; i < (sizeof(r_.u8) / sizeof(r_.u8[0])) ; i++) {
  2544. r_.u8[i] = a_.u8[i] / b_.u8[i];
  2545. }
  2546. #endif
  2547. return simde__m128i_from_private(r_);
  2548. #endif
  2549. }
  2550. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  2551. #undef _mm_div_epu8
  2552. #define _mm_div_epu8(a, b) simde_mm_div_epu8((a), (b))
  2553. #endif
  2554. SIMDE_FUNCTION_ATTRIBUTES
  2555. simde__m128i
  2556. simde_mm_div_epu16 (simde__m128i a, simde__m128i b) {
  2557. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
  2558. return _mm_div_epu16(a, b);
  2559. #else
  2560. simde__m128i_private
  2561. r_,
  2562. a_ = simde__m128i_to_private(a),
  2563. b_ = simde__m128i_to_private(b);
  2564. #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
  2565. r_.u16 = a_.u16 / b_.u16;
  2566. #elif defined(SIMDE_WASM_SIMD128_NATIVE)
  2567. r_.wasm_v128 = wasm_u16x16_div(a_.wasm_v128, b_.wasm_v128);
  2568. #else
  2569. SIMDE_VECTORIZE
  2570. for (size_t i = 0 ; i < (sizeof(r_.u16) / sizeof(r_.u16[0])) ; i++) {
  2571. r_.u16[i] = a_.u16[i] / b_.u16[i];
  2572. }
  2573. #endif
  2574. return simde__m128i_from_private(r_);
  2575. #endif
  2576. }
  2577. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  2578. #undef _mm_div_epu16
  2579. #define _mm_div_epu16(a, b) simde_mm_div_epu16((a), (b))
  2580. #endif
  2581. SIMDE_FUNCTION_ATTRIBUTES
  2582. simde__m128i
  2583. simde_mm_div_epu32 (simde__m128i a, simde__m128i b) {
  2584. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
  2585. return _mm_div_epu32(a, b);
  2586. #else
  2587. simde__m128i_private
  2588. r_,
  2589. a_ = simde__m128i_to_private(a),
  2590. b_ = simde__m128i_to_private(b);
  2591. #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
  2592. r_.u32 = a_.u32 / b_.u32;
  2593. #elif defined(SIMDE_WASM_SIMD128_NATIVE)
  2594. r_.wasm_v128 = wasm_u32x16_div(a_.wasm_v128, b_.wasm_v128);
  2595. #else
  2596. SIMDE_VECTORIZE
  2597. for (size_t i = 0 ; i < (sizeof(r_.u32) / sizeof(r_.u32[0])) ; i++) {
  2598. r_.u32[i] = a_.u32[i] / b_.u32[i];
  2599. }
  2600. #endif
  2601. return simde__m128i_from_private(r_);
  2602. #endif
  2603. }
  2604. #define simde_mm_udiv_epi32(a, b) simde_mm_div_epu32(a, b)
  2605. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  2606. #undef _mm_div_epu32
  2607. #define _mm_div_epu32(a, b) simde_mm_div_epu32(a, b)
  2608. #undef _mm_udiv_epi32
  2609. #define _mm_udiv_epi32(a, b) simde_mm_div_epu32(a, b)
  2610. #endif
  2611. SIMDE_FUNCTION_ATTRIBUTES
  2612. simde__m128i
  2613. simde_mm_div_epu64 (simde__m128i a, simde__m128i b) {
  2614. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
  2615. return _mm_div_epu64(a, b);
  2616. #else
  2617. simde__m128i_private
  2618. r_,
  2619. a_ = simde__m128i_to_private(a),
  2620. b_ = simde__m128i_to_private(b);
  2621. #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
  2622. r_.u64 = a_.u64 / b_.u64;
  2623. #elif defined(SIMDE_WASM_SIMD128_NATIVE)
  2624. r_.wasm_v128 = wasm_u64x16_div(a_.wasm_v128, b_.wasm_v128);
  2625. #else
  2626. SIMDE_VECTORIZE
  2627. for (size_t i = 0 ; i < (sizeof(r_.u64) / sizeof(r_.u64[0])) ; i++) {
  2628. r_.u64[i] = a_.u64[i] / b_.u64[i];
  2629. }
  2630. #endif
  2631. return simde__m128i_from_private(r_);
  2632. #endif
  2633. }
  2634. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  2635. #undef _mm_div_epu64
  2636. #define _mm_div_epu64(a, b) simde_mm_div_epu64((a), (b))
  2637. #endif
  2638. SIMDE_FUNCTION_ATTRIBUTES
  2639. simde__m256i
  2640. simde_mm256_div_epi8 (simde__m256i a, simde__m256i b) {
  2641. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
  2642. return _mm256_div_epi8(a, b);
  2643. #else
  2644. simde__m256i_private
  2645. r_,
  2646. a_ = simde__m256i_to_private(a),
  2647. b_ = simde__m256i_to_private(b);
  2648. #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
  2649. r_.i8 = a_.i8 / b_.i8;
  2650. #else
  2651. #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
  2652. for (size_t i = 0 ; i < (sizeof(r_.m128i) / sizeof(r_.m128i[0])) ; i++) {
  2653. r_.m128i[i] = simde_mm_div_epi8(a_.m128i[i], b_.m128i[i]);
  2654. }
  2655. #else
  2656. SIMDE_VECTORIZE
  2657. for (size_t i = 0 ; i < (sizeof(r_.i8) / sizeof(r_.i8[0])) ; i++) {
  2658. r_.i8[i] = a_.i8[i] / b_.i8[i];
  2659. }
  2660. #endif
  2661. #endif
  2662. return simde__m256i_from_private(r_);
  2663. #endif
  2664. }
  2665. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  2666. #undef _mm256_div_epi8
  2667. #define _mm256_div_epi8(a, b) simde_mm256_div_epi8((a), (b))
  2668. #endif
  2669. SIMDE_FUNCTION_ATTRIBUTES
  2670. simde__m256i
  2671. simde_mm256_div_epi16 (simde__m256i a, simde__m256i b) {
  2672. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
  2673. return _mm256_div_epi16(a, b);
  2674. #else
  2675. simde__m256i_private
  2676. r_,
  2677. a_ = simde__m256i_to_private(a),
  2678. b_ = simde__m256i_to_private(b);
  2679. #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
  2680. r_.i16 = a_.i16 / b_.i16;
  2681. #else
  2682. #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
  2683. for (size_t i = 0 ; i < (sizeof(r_.m128i) / sizeof(r_.m128i[0])) ; i++) {
  2684. r_.m128i[i] = simde_mm_div_epi16(a_.m128i[i], b_.m128i[i]);
  2685. }
  2686. #else
  2687. SIMDE_VECTORIZE
  2688. for (size_t i = 0 ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) {
  2689. r_.i16[i] = a_.i16[i] / b_.i16[i];
  2690. }
  2691. #endif
  2692. #endif
  2693. return simde__m256i_from_private(r_);
  2694. #endif
  2695. }
  2696. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  2697. #undef _mm256_div_epi16
  2698. #define _mm256_div_epi16(a, b) simde_mm256_div_epi16((a), (b))
  2699. #endif
  2700. SIMDE_FUNCTION_ATTRIBUTES
  2701. simde__m256i
  2702. simde_mm256_div_epi32 (simde__m256i a, simde__m256i b) {
  2703. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
  2704. return _mm256_div_epi32(a, b);
  2705. #else
  2706. simde__m256i_private
  2707. r_,
  2708. a_ = simde__m256i_to_private(a),
  2709. b_ = simde__m256i_to_private(b);
  2710. #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
  2711. r_.i32 = a_.i32 / b_.i32;
  2712. #else
  2713. #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
  2714. for (size_t i = 0 ; i < (sizeof(r_.m128i) / sizeof(r_.m128i[0])) ; i++) {
  2715. r_.m128i[i] = simde_mm_div_epi32(a_.m128i[i], b_.m128i[i]);
  2716. }
  2717. #else
  2718. SIMDE_VECTORIZE
  2719. for (size_t i = 0 ; i < (sizeof(r_.i32) / sizeof(r_.i32[0])) ; i++) {
  2720. r_.i32[i] = a_.i32[i] / b_.i32[i];
  2721. }
  2722. #endif
  2723. #endif
  2724. return simde__m256i_from_private(r_);
  2725. #endif
  2726. }
  2727. #define simde_mm256_idiv_epi32(a, b) simde_mm256_div_epi32(a, b)
  2728. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  2729. #undef _mm256_div_epi32
  2730. #define _mm256_div_epi32(a, b) simde_mm256_div_epi32(a, b)
  2731. #undef _mm256_idiv_epi32
  2732. #define _mm256_idiv_epi32(a, b) simde_mm256_div_epi32(a, b)
  2733. #endif
  2734. SIMDE_FUNCTION_ATTRIBUTES
  2735. simde__m256i
  2736. simde_mm256_div_epi64 (simde__m256i a, simde__m256i b) {
  2737. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
  2738. return _mm256_div_epi64(a, b);
  2739. #else
  2740. simde__m256i_private
  2741. r_,
  2742. a_ = simde__m256i_to_private(a),
  2743. b_ = simde__m256i_to_private(b);
  2744. #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
  2745. r_.i64 = a_.i64 / b_.i64;
  2746. #else
  2747. #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
  2748. for (size_t i = 0 ; i < (sizeof(r_.m128i) / sizeof(r_.m128i[0])) ; i++) {
  2749. r_.m128i[i] = simde_mm_div_epi64(a_.m128i[i], b_.m128i[i]);
  2750. }
  2751. #else
  2752. SIMDE_VECTORIZE
  2753. for (size_t i = 0 ; i < (sizeof(r_.i64) / sizeof(r_.i64[0])) ; i++) {
  2754. r_.i64[i] = a_.i64[i] / b_.i64[i];
  2755. }
  2756. #endif
  2757. #endif
  2758. return simde__m256i_from_private(r_);
  2759. #endif
  2760. }
  2761. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  2762. #undef _mm256_div_epi64
  2763. #define _mm256_div_epi64(a, b) simde_mm256_div_epi64((a), (b))
  2764. #endif
  2765. SIMDE_FUNCTION_ATTRIBUTES
  2766. simde__m256i
  2767. simde_mm256_div_epu8 (simde__m256i a, simde__m256i b) {
  2768. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
  2769. return _mm256_div_epu8(a, b);
  2770. #else
  2771. simde__m256i_private
  2772. r_,
  2773. a_ = simde__m256i_to_private(a),
  2774. b_ = simde__m256i_to_private(b);
  2775. #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
  2776. r_.u8 = a_.u8 / b_.u8;
  2777. #else
  2778. #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
  2779. for (size_t i = 0 ; i < (sizeof(r_.m128i) / sizeof(r_.m128i[0])) ; i++) {
  2780. r_.m128i[i] = simde_mm_div_epu8(a_.m128i[i], b_.m128i[i]);
  2781. }
  2782. #else
  2783. SIMDE_VECTORIZE
  2784. for (size_t i = 0 ; i < (sizeof(r_.u8) / sizeof(r_.u8[0])) ; i++) {
  2785. r_.u8[i] = a_.u8[i] / b_.u8[i];
  2786. }
  2787. #endif
  2788. #endif
  2789. return simde__m256i_from_private(r_);
  2790. #endif
  2791. }
  2792. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  2793. #undef _mm256_div_epu8
  2794. #define _mm256_div_epu8(a, b) simde_mm256_div_epu8((a), (b))
  2795. #endif
  2796. SIMDE_FUNCTION_ATTRIBUTES
  2797. simde__m256i
  2798. simde_mm256_div_epu16 (simde__m256i a, simde__m256i b) {
  2799. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
  2800. return _mm256_div_epu16(a, b);
  2801. #else
  2802. simde__m256i_private
  2803. r_,
  2804. a_ = simde__m256i_to_private(a),
  2805. b_ = simde__m256i_to_private(b);
  2806. #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
  2807. r_.u16 = a_.u16 / b_.u16;
  2808. #else
  2809. #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
  2810. for (size_t i = 0 ; i < (sizeof(r_.m128i) / sizeof(r_.m128i[0])) ; i++) {
  2811. r_.m128i[i] = simde_mm_div_epu16(a_.m128i[i], b_.m128i[i]);
  2812. }
  2813. #else
  2814. SIMDE_VECTORIZE
  2815. for (size_t i = 0 ; i < (sizeof(r_.u16) / sizeof(r_.u16[0])) ; i++) {
  2816. r_.u16[i] = a_.u16[i] / b_.u16[i];
  2817. }
  2818. #endif
  2819. #endif
  2820. return simde__m256i_from_private(r_);
  2821. #endif
  2822. }
  2823. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  2824. #undef _mm256_div_epu16
  2825. #define _mm256_div_epu16(a, b) simde_mm256_div_epu16((a), (b))
  2826. #endif
  2827. SIMDE_FUNCTION_ATTRIBUTES
  2828. simde__m256i
  2829. simde_mm256_div_epu32 (simde__m256i a, simde__m256i b) {
  2830. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
  2831. return _mm256_div_epu32(a, b);
  2832. #else
  2833. simde__m256i_private
  2834. r_,
  2835. a_ = simde__m256i_to_private(a),
  2836. b_ = simde__m256i_to_private(b);
  2837. #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
  2838. r_.u32 = a_.u32 / b_.u32;
  2839. #else
  2840. #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
  2841. for (size_t i = 0 ; i < (sizeof(r_.m128i) / sizeof(r_.m128i[0])) ; i++) {
  2842. r_.m128i[i] = simde_mm_div_epu32(a_.m128i[i], b_.m128i[i]);
  2843. }
  2844. #else
  2845. SIMDE_VECTORIZE
  2846. for (size_t i = 0 ; i < (sizeof(r_.u32) / sizeof(r_.u32[0])) ; i++) {
  2847. r_.u32[i] = a_.u32[i] / b_.u32[i];
  2848. }
  2849. #endif
  2850. #endif
  2851. return simde__m256i_from_private(r_);
  2852. #endif
  2853. }
  2854. #define simde_mm256_udiv_epi32(a, b) simde_mm256_div_epu32(a, b)
  2855. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  2856. #undef _mm256_div_epu32
  2857. #define _mm256_div_epu32(a, b) simde_mm256_div_epu32(a, b)
  2858. #undef _mm256_udiv_epi32
  2859. #define _mm256_udiv_epi32(a, b) simde_mm256_div_epu32(a, b)
  2860. #endif
  2861. SIMDE_FUNCTION_ATTRIBUTES
  2862. simde__m256i
  2863. simde_mm256_div_epu64 (simde__m256i a, simde__m256i b) {
  2864. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
  2865. return _mm256_div_epu64(a, b);
  2866. #else
  2867. simde__m256i_private
  2868. r_,
  2869. a_ = simde__m256i_to_private(a),
  2870. b_ = simde__m256i_to_private(b);
  2871. #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
  2872. r_.u64 = a_.u64 / b_.u64;
  2873. #else
  2874. #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
  2875. for (size_t i = 0 ; i < (sizeof(r_.m128i) / sizeof(r_.m128i[0])) ; i++) {
  2876. r_.m128i[i] = simde_mm_div_epu64(a_.m128i[i], b_.m128i[i]);
  2877. }
  2878. #else
  2879. SIMDE_VECTORIZE
  2880. for (size_t i = 0 ; i < (sizeof(r_.u64) / sizeof(r_.u64[0])) ; i++) {
  2881. r_.u64[i] = a_.u64[i] / b_.u64[i];
  2882. }
  2883. #endif
  2884. #endif
  2885. return simde__m256i_from_private(r_);
  2886. #endif
  2887. }
  2888. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  2889. #undef _mm256_div_epu64
  2890. #define _mm256_div_epu64(a, b) simde_mm256_div_epu64((a), (b))
  2891. #endif
  2892. SIMDE_FUNCTION_ATTRIBUTES
  2893. simde__m512i
  2894. simde_mm512_div_epi8 (simde__m512i a, simde__m512i b) {
  2895. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  2896. return _mm512_div_epi8(a, b);
  2897. #else
  2898. simde__m512i_private
  2899. r_,
  2900. a_ = simde__m512i_to_private(a),
  2901. b_ = simde__m512i_to_private(b);
  2902. #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
  2903. r_.i8 = a_.i8 / b_.i8;
  2904. #else
  2905. #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
  2906. for (size_t i = 0 ; i < (sizeof(r_.m256i) / sizeof(r_.m256i[0])) ; i++) {
  2907. r_.m256i[i] = simde_mm256_div_epi8(a_.m256i[i], b_.m256i[i]);
  2908. }
  2909. #else
  2910. SIMDE_VECTORIZE
  2911. for (size_t i = 0 ; i < (sizeof(r_.i8) / sizeof(r_.i8[0])) ; i++) {
  2912. r_.i8[i] = a_.i8[i] / b_.i8[i];
  2913. }
  2914. #endif
  2915. #endif
  2916. return simde__m512i_from_private(r_);
  2917. #endif
  2918. }
  2919. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  2920. #undef _mm512_div_epi8
  2921. #define _mm512_div_epi8(a, b) simde_mm512_div_epi8((a), (b))
  2922. #endif
  2923. SIMDE_FUNCTION_ATTRIBUTES
  2924. simde__m512i
  2925. simde_mm512_div_epi16 (simde__m512i a, simde__m512i b) {
  2926. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  2927. return _mm512_div_epi16(a, b);
  2928. #else
  2929. simde__m512i_private
  2930. r_,
  2931. a_ = simde__m512i_to_private(a),
  2932. b_ = simde__m512i_to_private(b);
  2933. #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
  2934. r_.i16 = a_.i16 / b_.i16;
  2935. #else
  2936. #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
  2937. for (size_t i = 0 ; i < (sizeof(r_.m256i) / sizeof(r_.m256i[0])) ; i++) {
  2938. r_.m256i[i] = simde_mm256_div_epi16(a_.m256i[i], b_.m256i[i]);
  2939. }
  2940. #else
  2941. SIMDE_VECTORIZE
  2942. for (size_t i = 0 ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) {
  2943. r_.i16[i] = a_.i16[i] / b_.i16[i];
  2944. }
  2945. #endif
  2946. #endif
  2947. return simde__m512i_from_private(r_);
  2948. #endif
  2949. }
  2950. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  2951. #undef _mm512_div_epi16
  2952. #define _mm512_div_epi16(a, b) simde_mm512_div_epi16((a), (b))
  2953. #endif
  2954. SIMDE_FUNCTION_ATTRIBUTES
  2955. simde__m512i
  2956. simde_mm512_div_epi32 (simde__m512i a, simde__m512i b) {
  2957. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  2958. return _mm512_div_epi32(a, b);
  2959. #else
  2960. simde__m512i_private
  2961. r_,
  2962. a_ = simde__m512i_to_private(a),
  2963. b_ = simde__m512i_to_private(b);
  2964. #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
  2965. r_.i32 = a_.i32 / b_.i32;
  2966. #else
  2967. #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
  2968. for (size_t i = 0 ; i < (sizeof(r_.m256i) / sizeof(r_.m256i[0])) ; i++) {
  2969. r_.m256i[i] = simde_mm256_div_epi32(a_.m256i[i], b_.m256i[i]);
  2970. }
  2971. #else
  2972. SIMDE_VECTORIZE
  2973. for (size_t i = 0 ; i < (sizeof(r_.i32) / sizeof(r_.i32[0])) ; i++) {
  2974. r_.i32[i] = a_.i32[i] / b_.i32[i];
  2975. }
  2976. #endif
  2977. #endif
  2978. return simde__m512i_from_private(r_);
  2979. #endif
  2980. }
  2981. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  2982. #undef _mm512_div_epi32
  2983. #define _mm512_div_epi32(a, b) simde_mm512_div_epi32((a), (b))
  2984. #endif
  2985. SIMDE_FUNCTION_ATTRIBUTES
  2986. simde__m512i
  2987. simde_mm512_mask_div_epi32(simde__m512i src, simde__mmask16 k, simde__m512i a, simde__m512i b) {
  2988. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  2989. return _mm512_mask_div_epi32(src, k, a, b);
  2990. #else
  2991. return simde_mm512_mask_mov_epi32(src, k, simde_mm512_div_epi32(a, b));
  2992. #endif
  2993. }
  2994. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  2995. #undef _mm512_mask_div_epi32
  2996. #define _mm512_mask_div_epi32(src, k, a, b) simde_mm512_mask_div_epi32(src, k, a, b)
  2997. #endif
  2998. SIMDE_FUNCTION_ATTRIBUTES
  2999. simde__m512i
  3000. simde_mm512_div_epi64 (simde__m512i a, simde__m512i b) {
  3001. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  3002. return _mm512_div_epi64(a, b);
  3003. #else
  3004. simde__m512i_private
  3005. r_,
  3006. a_ = simde__m512i_to_private(a),
  3007. b_ = simde__m512i_to_private(b);
  3008. #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
  3009. r_.i64 = a_.i64 / b_.i64;
  3010. #else
  3011. #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
  3012. for (size_t i = 0 ; i < (sizeof(r_.m256i) / sizeof(r_.m256i[0])) ; i++) {
  3013. r_.m256i[i] = simde_mm256_div_epi64(a_.m256i[i], b_.m256i[i]);
  3014. }
  3015. #else
  3016. SIMDE_VECTORIZE
  3017. for (size_t i = 0 ; i < (sizeof(r_.i64) / sizeof(r_.i64[0])) ; i++) {
  3018. r_.i64[i] = a_.i64[i] / b_.i64[i];
  3019. }
  3020. #endif
  3021. #endif
  3022. return simde__m512i_from_private(r_);
  3023. #endif
  3024. }
  3025. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  3026. #undef _mm512_div_epi64
  3027. #define _mm512_div_epi64(a, b) simde_mm512_div_epi64((a), (b))
  3028. #endif
  3029. SIMDE_FUNCTION_ATTRIBUTES
  3030. simde__m512i
  3031. simde_mm512_div_epu8 (simde__m512i a, simde__m512i b) {
  3032. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  3033. return _mm512_div_epu8(a, b);
  3034. #else
  3035. simde__m512i_private
  3036. r_,
  3037. a_ = simde__m512i_to_private(a),
  3038. b_ = simde__m512i_to_private(b);
  3039. #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
  3040. r_.u8 = a_.u8 / b_.u8;
  3041. #else
  3042. #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
  3043. for (size_t i = 0 ; i < (sizeof(r_.m256i) / sizeof(r_.m256i[0])) ; i++) {
  3044. r_.m256i[i] = simde_mm256_div_epu8(a_.m256i[i], b_.m256i[i]);
  3045. }
  3046. #else
  3047. SIMDE_VECTORIZE
  3048. for (size_t i = 0 ; i < (sizeof(r_.u8) / sizeof(r_.u8[0])) ; i++) {
  3049. r_.u8[i] = a_.u8[i] / b_.u8[i];
  3050. }
  3051. #endif
  3052. #endif
  3053. return simde__m512i_from_private(r_);
  3054. #endif
  3055. }
  3056. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  3057. #undef _mm512_div_epu8
  3058. #define _mm512_div_epu8(a, b) simde_mm512_div_epu8((a), (b))
  3059. #endif
  3060. SIMDE_FUNCTION_ATTRIBUTES
  3061. simde__m512i
  3062. simde_mm512_div_epu16 (simde__m512i a, simde__m512i b) {
  3063. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  3064. return _mm512_div_epu16(a, b);
  3065. #else
  3066. simde__m512i_private
  3067. r_,
  3068. a_ = simde__m512i_to_private(a),
  3069. b_ = simde__m512i_to_private(b);
  3070. #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
  3071. r_.u16 = a_.u16 / b_.u16;
  3072. #else
  3073. #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
  3074. for (size_t i = 0 ; i < (sizeof(r_.m256i) / sizeof(r_.m256i[0])) ; i++) {
  3075. r_.m256i[i] = simde_mm256_div_epu16(a_.m256i[i], b_.m256i[i]);
  3076. }
  3077. #else
  3078. SIMDE_VECTORIZE
  3079. for (size_t i = 0 ; i < (sizeof(r_.u16) / sizeof(r_.u16[0])) ; i++) {
  3080. r_.u16[i] = a_.u16[i] / b_.u16[i];
  3081. }
  3082. #endif
  3083. #endif
  3084. return simde__m512i_from_private(r_);
  3085. #endif
  3086. }
  3087. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  3088. #undef _mm512_div_epu16
  3089. #define _mm512_div_epu16(a, b) simde_mm512_div_epu16((a), (b))
  3090. #endif
  3091. SIMDE_FUNCTION_ATTRIBUTES
  3092. simde__m512i
  3093. simde_mm512_div_epu32 (simde__m512i a, simde__m512i b) {
  3094. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  3095. return _mm512_div_epu32(a, b);
  3096. #else
  3097. simde__m512i_private
  3098. r_,
  3099. a_ = simde__m512i_to_private(a),
  3100. b_ = simde__m512i_to_private(b);
  3101. #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
  3102. r_.u32 = a_.u32 / b_.u32;
  3103. #else
  3104. #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
  3105. for (size_t i = 0 ; i < (sizeof(r_.m256i) / sizeof(r_.m256i[0])) ; i++) {
  3106. r_.m256i[i] = simde_mm256_div_epu32(a_.m256i[i], b_.m256i[i]);
  3107. }
  3108. #else
  3109. SIMDE_VECTORIZE
  3110. for (size_t i = 0 ; i < (sizeof(r_.u32) / sizeof(r_.u32[0])) ; i++) {
  3111. r_.u32[i] = a_.u32[i] / b_.u32[i];
  3112. }
  3113. #endif
  3114. #endif
  3115. return simde__m512i_from_private(r_);
  3116. #endif
  3117. }
  3118. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  3119. #undef _mm512_div_epu32
  3120. #define _mm512_div_epu32(a, b) simde_mm512_div_epu32((a), (b))
  3121. #endif
  3122. SIMDE_FUNCTION_ATTRIBUTES
  3123. simde__m512i
  3124. simde_mm512_mask_div_epu32(simde__m512i src, simde__mmask16 k, simde__m512i a, simde__m512i b) {
  3125. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  3126. return _mm512_mask_div_epu32(src, k, a, b);
  3127. #else
  3128. return simde_mm512_mask_mov_epi32(src, k, simde_mm512_div_epu32(a, b));
  3129. #endif
  3130. }
  3131. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  3132. #undef _mm512_mask_div_epu32
  3133. #define _mm512_mask_div_epu32(src, k, a, b) simde_mm512_mask_div_epu32(src, k, a, b)
  3134. #endif
  3135. SIMDE_FUNCTION_ATTRIBUTES
  3136. simde__m512i
  3137. simde_mm512_div_epu64 (simde__m512i a, simde__m512i b) {
  3138. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  3139. return _mm512_div_epu64(a, b);
  3140. #else
  3141. simde__m512i_private
  3142. r_,
  3143. a_ = simde__m512i_to_private(a),
  3144. b_ = simde__m512i_to_private(b);
  3145. #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
  3146. r_.u64 = a_.u64 / b_.u64;
  3147. #else
  3148. #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
  3149. for (size_t i = 0 ; i < (sizeof(r_.m256i) / sizeof(r_.m256i[0])) ; i++) {
  3150. r_.m256i[i] = simde_mm256_div_epu64(a_.m256i[i], b_.m256i[i]);
  3151. }
  3152. #else
  3153. SIMDE_VECTORIZE
  3154. for (size_t i = 0 ; i < (sizeof(r_.u64) / sizeof(r_.u64[0])) ; i++) {
  3155. r_.u64[i] = a_.u64[i] / b_.u64[i];
  3156. }
  3157. #endif
  3158. #endif
  3159. return simde__m512i_from_private(r_);
  3160. #endif
  3161. }
  3162. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  3163. #undef _mm512_div_epu64
  3164. #define _mm512_div_epu64(a, b) simde_mm512_div_epu64((a), (b))
  3165. #endif
  3166. SIMDE_FUNCTION_ATTRIBUTES
  3167. simde__m128
  3168. simde_mm_erf_ps (simde__m128 a) {
  3169. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
  3170. return _mm_erf_ps(a);
  3171. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
  3172. return Sleef_erff4_u10(a);
  3173. #else
  3174. simde__m128_private
  3175. r_,
  3176. a_ = simde__m128_to_private(a);
  3177. SIMDE_VECTORIZE
  3178. for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
  3179. r_.f32[i] = simde_math_erff(a_.f32[i]);
  3180. }
  3181. return simde__m128_from_private(r_);
  3182. #endif
  3183. }
  3184. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  3185. #undef _mm_erf_ps
  3186. #define _mm_erf_ps(a) simde_mm_erf_ps(a)
  3187. #endif
  3188. SIMDE_FUNCTION_ATTRIBUTES
  3189. simde__m128d
  3190. simde_mm_erf_pd (simde__m128d a) {
  3191. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
  3192. return _mm_erf_pd(a);
  3193. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
  3194. return Sleef_erfd2_u10(a);
  3195. #else
  3196. simde__m128d_private
  3197. r_,
  3198. a_ = simde__m128d_to_private(a);
  3199. SIMDE_VECTORIZE
  3200. for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
  3201. r_.f64[i] = simde_math_erf(a_.f64[i]);
  3202. }
  3203. return simde__m128d_from_private(r_);
  3204. #endif
  3205. }
  3206. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  3207. #undef _mm_erf_pd
  3208. #define _mm_erf_pd(a) simde_mm_erf_pd(a)
  3209. #endif
  3210. SIMDE_FUNCTION_ATTRIBUTES
  3211. simde__m256
  3212. simde_mm256_erf_ps (simde__m256 a) {
  3213. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
  3214. return _mm256_erf_ps(a);
  3215. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
  3216. return Sleef_erff8_u10(a);
  3217. #else
  3218. simde__m256_private
  3219. r_,
  3220. a_ = simde__m256_to_private(a);
  3221. #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
  3222. for (size_t i = 0 ; i < (sizeof(r_.m128) / sizeof(r_.m128[0])) ; i++) {
  3223. r_.m128[i] = simde_mm_erf_ps(a_.m128[i]);
  3224. }
  3225. #else
  3226. SIMDE_VECTORIZE
  3227. for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
  3228. r_.f32[i] = simde_math_erff(a_.f32[i]);
  3229. }
  3230. #endif
  3231. return simde__m256_from_private(r_);
  3232. #endif
  3233. }
  3234. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  3235. #undef _mm256_erf_ps
  3236. #define _mm256_erf_ps(a) simde_mm256_erf_ps(a)
  3237. #endif
  3238. SIMDE_FUNCTION_ATTRIBUTES
  3239. simde__m256d
  3240. simde_mm256_erf_pd (simde__m256d a) {
  3241. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
  3242. return _mm256_erf_pd(a);
  3243. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
  3244. return Sleef_erfd4_u10(a);
  3245. #else
  3246. simde__m256d_private
  3247. r_,
  3248. a_ = simde__m256d_to_private(a);
  3249. #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
  3250. for (size_t i = 0 ; i < (sizeof(r_.m128d) / sizeof(r_.m128d[0])) ; i++) {
  3251. r_.m128d[i] = simde_mm_erf_pd(a_.m128d[i]);
  3252. }
  3253. #else
  3254. SIMDE_VECTORIZE
  3255. for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
  3256. r_.f64[i] = simde_math_erf(a_.f64[i]);
  3257. }
  3258. #endif
  3259. return simde__m256d_from_private(r_);
  3260. #endif
  3261. }
  3262. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  3263. #undef _mm256_erf_pd
  3264. #define _mm256_erf_pd(a) simde_mm256_erf_pd(a)
  3265. #endif
  3266. SIMDE_FUNCTION_ATTRIBUTES
  3267. simde__m512
  3268. simde_mm512_erf_ps (simde__m512 a) {
  3269. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  3270. return _mm512_erf_ps(a);
  3271. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
  3272. return Sleef_erff16_u10(a);
  3273. #else
  3274. simde__m512_private
  3275. r_,
  3276. a_ = simde__m512_to_private(a);
  3277. #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
  3278. for (size_t i = 0 ; i < (sizeof(r_.m256) / sizeof(r_.m256[0])) ; i++) {
  3279. r_.m256[i] = simde_mm256_erf_ps(a_.m256[i]);
  3280. }
  3281. #else
  3282. SIMDE_VECTORIZE
  3283. for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
  3284. r_.f32[i] = simde_math_erff(a_.f32[i]);
  3285. }
  3286. #endif
  3287. return simde__m512_from_private(r_);
  3288. #endif
  3289. }
  3290. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  3291. #undef _mm512_erf_ps
  3292. #define _mm512_erf_ps(a) simde_mm512_erf_ps(a)
  3293. #endif
  3294. SIMDE_FUNCTION_ATTRIBUTES
  3295. simde__m512d
  3296. simde_mm512_erf_pd (simde__m512d a) {
  3297. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  3298. return _mm512_erf_pd(a);
  3299. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
  3300. return Sleef_erfd8_u10(a);
  3301. #else
  3302. simde__m512d_private
  3303. r_,
  3304. a_ = simde__m512d_to_private(a);
  3305. #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
  3306. for (size_t i = 0 ; i < (sizeof(r_.m256d) / sizeof(r_.m256d[0])) ; i++) {
  3307. r_.m256d[i] = simde_mm256_erf_pd(a_.m256d[i]);
  3308. }
  3309. #else
  3310. SIMDE_VECTORIZE
  3311. for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
  3312. r_.f64[i] = simde_math_erf(a_.f64[i]);
  3313. }
  3314. #endif
  3315. return simde__m512d_from_private(r_);
  3316. #endif
  3317. }
  3318. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  3319. #undef _mm512_erf_pd
  3320. #define _mm512_erf_pd(a) simde_mm512_erf_pd(a)
  3321. #endif
  3322. SIMDE_FUNCTION_ATTRIBUTES
  3323. simde__m512
  3324. simde_mm512_mask_erf_ps(simde__m512 src, simde__mmask16 k, simde__m512 a) {
  3325. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  3326. return _mm512_mask_erf_ps(src, k, a);
  3327. #else
  3328. return simde_mm512_mask_mov_ps(src, k, simde_mm512_erf_ps(a));
  3329. #endif
  3330. }
  3331. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  3332. #undef _mm512_mask_erf_ps
  3333. #define _mm512_mask_erf_ps(src, k, a) simde_mm512_mask_erf_ps(src, k, a)
  3334. #endif
  3335. SIMDE_FUNCTION_ATTRIBUTES
  3336. simde__m512d
  3337. simde_mm512_mask_erf_pd(simde__m512d src, simde__mmask8 k, simde__m512d a) {
  3338. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  3339. return _mm512_mask_erf_pd(src, k, a);
  3340. #else
  3341. return simde_mm512_mask_mov_pd(src, k, simde_mm512_erf_pd(a));
  3342. #endif
  3343. }
  3344. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  3345. #undef _mm512_mask_erf_pd
  3346. #define _mm512_mask_erf_pd(src, k, a) simde_mm512_mask_erf_pd(src, k, a)
  3347. #endif
  3348. SIMDE_FUNCTION_ATTRIBUTES
  3349. simde__m128
  3350. simde_mm_erfc_ps (simde__m128 a) {
  3351. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
  3352. return _mm_erfc_ps(a);
  3353. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
  3354. return Sleef_erfcf4_u15(a);
  3355. #else
  3356. simde__m128_private
  3357. r_,
  3358. a_ = simde__m128_to_private(a);
  3359. SIMDE_VECTORIZE
  3360. for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
  3361. r_.f32[i] = simde_math_erfcf(a_.f32[i]);
  3362. }
  3363. return simde__m128_from_private(r_);
  3364. #endif
  3365. }
  3366. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  3367. #undef _mm_erfc_ps
  3368. #define _mm_erfc_ps(a) simde_mm_erfc_ps(a)
  3369. #endif
  3370. SIMDE_FUNCTION_ATTRIBUTES
  3371. simde__m128d
  3372. simde_mm_erfc_pd (simde__m128d a) {
  3373. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
  3374. return _mm_erfc_pd(a);
  3375. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
  3376. return Sleef_erfcd2_u15(a);
  3377. #else
  3378. simde__m128d_private
  3379. r_,
  3380. a_ = simde__m128d_to_private(a);
  3381. SIMDE_VECTORIZE
  3382. for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
  3383. r_.f64[i] = simde_math_erfc(a_.f64[i]);
  3384. }
  3385. return simde__m128d_from_private(r_);
  3386. #endif
  3387. }
  3388. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  3389. #undef _mm_erfc_pd
  3390. #define _mm_erfc_pd(a) simde_mm_erfc_pd(a)
  3391. #endif
  3392. SIMDE_FUNCTION_ATTRIBUTES
  3393. simde__m256
  3394. simde_mm256_erfc_ps (simde__m256 a) {
  3395. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
  3396. return _mm256_erfc_ps(a);
  3397. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
  3398. return Sleef_erfcf8_u15(a);
  3399. #else
  3400. simde__m256_private
  3401. r_,
  3402. a_ = simde__m256_to_private(a);
  3403. #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
  3404. for (size_t i = 0 ; i < (sizeof(r_.m128) / sizeof(r_.m128[0])) ; i++) {
  3405. r_.m128[i] = simde_mm_erfc_ps(a_.m128[i]);
  3406. }
  3407. #else
  3408. SIMDE_VECTORIZE
  3409. for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
  3410. r_.f32[i] = simde_math_erfcf(a_.f32[i]);
  3411. }
  3412. #endif
  3413. return simde__m256_from_private(r_);
  3414. #endif
  3415. }
  3416. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  3417. #undef _mm256_erfc_ps
  3418. #define _mm256_erfc_ps(a) simde_mm256_erfc_ps(a)
  3419. #endif
  3420. SIMDE_FUNCTION_ATTRIBUTES
  3421. simde__m256d
  3422. simde_mm256_erfc_pd (simde__m256d a) {
  3423. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
  3424. return _mm256_erfc_pd(a);
  3425. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
  3426. return Sleef_erfcd4_u15(a);
  3427. #else
  3428. simde__m256d_private
  3429. r_,
  3430. a_ = simde__m256d_to_private(a);
  3431. #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
  3432. for (size_t i = 0 ; i < (sizeof(r_.m128d) / sizeof(r_.m128d[0])) ; i++) {
  3433. r_.m128d[i] = simde_mm_erfc_pd(a_.m128d[i]);
  3434. }
  3435. #else
  3436. SIMDE_VECTORIZE
  3437. for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
  3438. r_.f64[i] = simde_math_erfc(a_.f64[i]);
  3439. }
  3440. #endif
  3441. return simde__m256d_from_private(r_);
  3442. #endif
  3443. }
  3444. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  3445. #undef _mm256_erfc_pd
  3446. #define _mm256_erfc_pd(a) simde_mm256_erfc_pd(a)
  3447. #endif
  3448. SIMDE_FUNCTION_ATTRIBUTES
  3449. simde__m512
  3450. simde_mm512_erfc_ps (simde__m512 a) {
  3451. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  3452. return _mm512_erfc_ps(a);
  3453. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
  3454. return Sleef_erfcf16_u15(a);
  3455. #else
  3456. simde__m512_private
  3457. r_,
  3458. a_ = simde__m512_to_private(a);
  3459. #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
  3460. for (size_t i = 0 ; i < (sizeof(r_.m256) / sizeof(r_.m256[0])) ; i++) {
  3461. r_.m256[i] = simde_mm256_erfc_ps(a_.m256[i]);
  3462. }
  3463. #else
  3464. SIMDE_VECTORIZE
  3465. for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
  3466. r_.f32[i] = simde_math_erfcf(a_.f32[i]);
  3467. }
  3468. #endif
  3469. return simde__m512_from_private(r_);
  3470. #endif
  3471. }
  3472. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  3473. #undef _mm512_erfc_ps
  3474. #define _mm512_erfc_ps(a) simde_mm512_erfc_ps(a)
  3475. #endif
  3476. SIMDE_FUNCTION_ATTRIBUTES
  3477. simde__m512d
  3478. simde_mm512_erfc_pd (simde__m512d a) {
  3479. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  3480. return _mm512_erfc_pd(a);
  3481. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
  3482. return Sleef_erfcd8_u15(a);
  3483. #else
  3484. simde__m512d_private
  3485. r_,
  3486. a_ = simde__m512d_to_private(a);
  3487. #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
  3488. for (size_t i = 0 ; i < (sizeof(r_.m256d) / sizeof(r_.m256d[0])) ; i++) {
  3489. r_.m256d[i] = simde_mm256_erfc_pd(a_.m256d[i]);
  3490. }
  3491. #else
  3492. SIMDE_VECTORIZE
  3493. for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
  3494. r_.f64[i] = simde_math_erfc(a_.f64[i]);
  3495. }
  3496. #endif
  3497. return simde__m512d_from_private(r_);
  3498. #endif
  3499. }
  3500. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  3501. #undef _mm512_erfc_pd
  3502. #define _mm512_erfc_pd(a) simde_mm512_erfc_pd(a)
  3503. #endif
  3504. SIMDE_FUNCTION_ATTRIBUTES
  3505. simde__m512
  3506. simde_mm512_mask_erfc_ps(simde__m512 src, simde__mmask16 k, simde__m512 a) {
  3507. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  3508. return _mm512_mask_erfc_ps(src, k, a);
  3509. #else
  3510. return simde_mm512_mask_mov_ps(src, k, simde_mm512_erfc_ps(a));
  3511. #endif
  3512. }
  3513. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  3514. #undef _mm512_mask_erfc_ps
  3515. #define _mm512_mask_erfc_ps(src, k, a) simde_mm512_mask_erfc_ps(src, k, a)
  3516. #endif
  3517. SIMDE_FUNCTION_ATTRIBUTES
  3518. simde__m512d
  3519. simde_mm512_mask_erfc_pd(simde__m512d src, simde__mmask8 k, simde__m512d a) {
  3520. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  3521. return _mm512_mask_erfc_pd(src, k, a);
  3522. #else
  3523. return simde_mm512_mask_mov_pd(src, k, simde_mm512_erfc_pd(a));
  3524. #endif
  3525. }
  3526. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  3527. #undef _mm512_mask_erfc_pd
  3528. #define _mm512_mask_erfc_pd(src, k, a) simde_mm512_mask_erfc_pd(src, k, a)
  3529. #endif
  3530. SIMDE_FUNCTION_ATTRIBUTES
  3531. simde__m128
  3532. simde_mm_exp_ps (simde__m128 a) {
  3533. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
  3534. return _mm_exp_ps(a);
  3535. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
  3536. return Sleef_expf4_u10(a);
  3537. #else
  3538. simde__m128_private
  3539. r_,
  3540. a_ = simde__m128_to_private(a);
  3541. SIMDE_VECTORIZE
  3542. for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
  3543. r_.f32[i] = simde_math_expf(a_.f32[i]);
  3544. }
  3545. return simde__m128_from_private(r_);
  3546. #endif
  3547. }
  3548. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  3549. #undef _mm_exp_ps
  3550. #define _mm_exp_ps(a) simde_mm_exp_ps(a)
  3551. #endif
  3552. SIMDE_FUNCTION_ATTRIBUTES
  3553. simde__m128d
  3554. simde_mm_exp_pd (simde__m128d a) {
  3555. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
  3556. return _mm_exp_pd(a);
  3557. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
  3558. return Sleef_expd2_u10(a);
  3559. #else
  3560. simde__m128d_private
  3561. r_,
  3562. a_ = simde__m128d_to_private(a);
  3563. SIMDE_VECTORIZE
  3564. for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
  3565. r_.f64[i] = simde_math_exp(a_.f64[i]);
  3566. }
  3567. return simde__m128d_from_private(r_);
  3568. #endif
  3569. }
  3570. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  3571. #undef _mm_exp_pd
  3572. #define _mm_exp_pd(a) simde_mm_exp_pd(a)
  3573. #endif
  3574. SIMDE_FUNCTION_ATTRIBUTES
  3575. simde__m256
  3576. simde_mm256_exp_ps (simde__m256 a) {
  3577. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
  3578. return _mm256_exp_ps(a);
  3579. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
  3580. return Sleef_expf8_u10(a);
  3581. #else
  3582. simde__m256_private
  3583. r_,
  3584. a_ = simde__m256_to_private(a);
  3585. #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
  3586. for (size_t i = 0 ; i < (sizeof(r_.m128) / sizeof(r_.m128[0])) ; i++) {
  3587. r_.m128[i] = simde_mm_exp_ps(a_.m128[i]);
  3588. }
  3589. #else
  3590. SIMDE_VECTORIZE
  3591. for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
  3592. r_.f32[i] = simde_math_expf(a_.f32[i]);
  3593. }
  3594. #endif
  3595. return simde__m256_from_private(r_);
  3596. #endif
  3597. }
  3598. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  3599. #undef _mm256_exp_ps
  3600. #define _mm256_exp_ps(a) simde_mm256_exp_ps(a)
  3601. #endif
  3602. SIMDE_FUNCTION_ATTRIBUTES
  3603. simde__m256d
  3604. simde_mm256_exp_pd (simde__m256d a) {
  3605. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
  3606. return _mm256_exp_pd(a);
  3607. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
  3608. return Sleef_expd4_u10(a);
  3609. #else
  3610. simde__m256d_private
  3611. r_,
  3612. a_ = simde__m256d_to_private(a);
  3613. #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
  3614. for (size_t i = 0 ; i < (sizeof(r_.m128d) / sizeof(r_.m128d[0])) ; i++) {
  3615. r_.m128d[i] = simde_mm_exp_pd(a_.m128d[i]);
  3616. }
  3617. #else
  3618. SIMDE_VECTORIZE
  3619. for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
  3620. r_.f64[i] = simde_math_exp(a_.f64[i]);
  3621. }
  3622. #endif
  3623. return simde__m256d_from_private(r_);
  3624. #endif
  3625. }
  3626. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  3627. #undef _mm256_exp_pd
  3628. #define _mm256_exp_pd(a) simde_mm256_exp_pd(a)
  3629. #endif
  3630. SIMDE_FUNCTION_ATTRIBUTES
  3631. simde__m512
  3632. simde_mm512_exp_ps (simde__m512 a) {
  3633. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  3634. return _mm512_exp_ps(a);
  3635. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
  3636. return Sleef_expf16_u10(a);
  3637. #else
  3638. simde__m512_private
  3639. r_,
  3640. a_ = simde__m512_to_private(a);
  3641. #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
  3642. for (size_t i = 0 ; i < (sizeof(r_.m256) / sizeof(r_.m256[0])) ; i++) {
  3643. r_.m256[i] = simde_mm256_exp_ps(a_.m256[i]);
  3644. }
  3645. #else
  3646. SIMDE_VECTORIZE
  3647. for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
  3648. r_.f32[i] = simde_math_expf(a_.f32[i]);
  3649. }
  3650. #endif
  3651. return simde__m512_from_private(r_);
  3652. #endif
  3653. }
  3654. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  3655. #undef _mm512_exp_ps
  3656. #define _mm512_exp_ps(a) simde_mm512_exp_ps(a)
  3657. #endif
  3658. SIMDE_FUNCTION_ATTRIBUTES
  3659. simde__m512d
  3660. simde_mm512_exp_pd (simde__m512d a) {
  3661. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  3662. return _mm512_exp_pd(a);
  3663. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
  3664. return Sleef_expd8_u10(a);
  3665. #else
  3666. simde__m512d_private
  3667. r_,
  3668. a_ = simde__m512d_to_private(a);
  3669. #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
  3670. for (size_t i = 0 ; i < (sizeof(r_.m256d) / sizeof(r_.m256d[0])) ; i++) {
  3671. r_.m256d[i] = simde_mm256_exp_pd(a_.m256d[i]);
  3672. }
  3673. #else
  3674. SIMDE_VECTORIZE
  3675. for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
  3676. r_.f64[i] = simde_math_exp(a_.f64[i]);
  3677. }
  3678. #endif
  3679. return simde__m512d_from_private(r_);
  3680. #endif
  3681. }
  3682. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  3683. #undef _mm512_exp_pd
  3684. #define _mm512_exp_pd(a) simde_mm512_exp_pd(a)
  3685. #endif
  3686. SIMDE_FUNCTION_ATTRIBUTES
  3687. simde__m512
  3688. simde_mm512_mask_exp_ps(simde__m512 src, simde__mmask16 k, simde__m512 a) {
  3689. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  3690. return _mm512_mask_exp_ps(src, k, a);
  3691. #else
  3692. return simde_mm512_mask_mov_ps(src, k, simde_mm512_exp_ps(a));
  3693. #endif
  3694. }
  3695. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  3696. #undef _mm512_mask_exp_ps
  3697. #define _mm512_mask_exp_ps(src, k, a) simde_mm512_mask_exp_ps(src, k, a)
  3698. #endif
  3699. SIMDE_FUNCTION_ATTRIBUTES
  3700. simde__m512d
  3701. simde_mm512_mask_exp_pd(simde__m512d src, simde__mmask8 k, simde__m512d a) {
  3702. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  3703. return _mm512_mask_exp_pd(src, k, a);
  3704. #else
  3705. return simde_mm512_mask_mov_pd(src, k, simde_mm512_exp_pd(a));
  3706. #endif
  3707. }
  3708. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  3709. #undef _mm512_mask_exp_pd
  3710. #define _mm512_mask_exp_pd(src, k, a) simde_mm512_mask_exp_pd(src, k, a)
  3711. #endif
  3712. SIMDE_FUNCTION_ATTRIBUTES
  3713. simde__m128
  3714. simde_mm_expm1_ps (simde__m128 a) {
  3715. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
  3716. return _mm_expm1_ps(a);
  3717. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
  3718. return Sleef_expm1f4_u10(a);
  3719. #else
  3720. simde__m128_private
  3721. r_,
  3722. a_ = simde__m128_to_private(a);
  3723. SIMDE_VECTORIZE
  3724. for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
  3725. r_.f32[i] = simde_math_expm1f(a_.f32[i]);
  3726. }
  3727. return simde__m128_from_private(r_);
  3728. #endif
  3729. }
  3730. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  3731. #undef _mm_expm1_ps
  3732. #define _mm_expm1_ps(a) simde_mm_expm1_ps(a)
  3733. #endif
  3734. SIMDE_FUNCTION_ATTRIBUTES
  3735. simde__m128d
  3736. simde_mm_expm1_pd (simde__m128d a) {
  3737. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
  3738. return _mm_expm1_pd(a);
  3739. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
  3740. return Sleef_expm1d2_u10(a);
  3741. #else
  3742. simde__m128d_private
  3743. r_,
  3744. a_ = simde__m128d_to_private(a);
  3745. SIMDE_VECTORIZE
  3746. for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
  3747. r_.f64[i] = simde_math_expm1(a_.f64[i]);
  3748. }
  3749. return simde__m128d_from_private(r_);
  3750. #endif
  3751. }
  3752. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  3753. #undef _mm_expm1_pd
  3754. #define _mm_expm1_pd(a) simde_mm_expm1_pd(a)
  3755. #endif
  3756. SIMDE_FUNCTION_ATTRIBUTES
  3757. simde__m256
  3758. simde_mm256_expm1_ps (simde__m256 a) {
  3759. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
  3760. return _mm256_expm1_ps(a);
  3761. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
  3762. return Sleef_expm1f8_u10(a);
  3763. #else
  3764. simde__m256_private
  3765. r_,
  3766. a_ = simde__m256_to_private(a);
  3767. #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
  3768. for (size_t i = 0 ; i < (sizeof(r_.m128) / sizeof(r_.m128[0])) ; i++) {
  3769. r_.m128[i] = simde_mm_expm1_ps(a_.m128[i]);
  3770. }
  3771. #else
  3772. SIMDE_VECTORIZE
  3773. for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
  3774. r_.f32[i] = simde_math_expm1f(a_.f32[i]);
  3775. }
  3776. #endif
  3777. return simde__m256_from_private(r_);
  3778. #endif
  3779. }
  3780. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  3781. #undef _mm256_expm1_ps
  3782. #define _mm256_expm1_ps(a) simde_mm256_expm1_ps(a)
  3783. #endif
  3784. SIMDE_FUNCTION_ATTRIBUTES
  3785. simde__m256d
  3786. simde_mm256_expm1_pd (simde__m256d a) {
  3787. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
  3788. return _mm256_expm1_pd(a);
  3789. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
  3790. return Sleef_expm1d4_u10(a);
  3791. #else
  3792. simde__m256d_private
  3793. r_,
  3794. a_ = simde__m256d_to_private(a);
  3795. #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
  3796. for (size_t i = 0 ; i < (sizeof(r_.m128d) / sizeof(r_.m128d[0])) ; i++) {
  3797. r_.m128d[i] = simde_mm_expm1_pd(a_.m128d[i]);
  3798. }
  3799. #else
  3800. SIMDE_VECTORIZE
  3801. for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
  3802. r_.f64[i] = simde_math_expm1(a_.f64[i]);
  3803. }
  3804. #endif
  3805. return simde__m256d_from_private(r_);
  3806. #endif
  3807. }
  3808. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  3809. #undef _mm256_expm1_pd
  3810. #define _mm256_expm1_pd(a) simde_mm256_expm1_pd(a)
  3811. #endif
  3812. SIMDE_FUNCTION_ATTRIBUTES
  3813. simde__m512
  3814. simde_mm512_expm1_ps (simde__m512 a) {
  3815. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  3816. return _mm512_expm1_ps(a);
  3817. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
  3818. return Sleef_expm1f16_u10(a);
  3819. #else
  3820. simde__m512_private
  3821. r_,
  3822. a_ = simde__m512_to_private(a);
  3823. #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
  3824. for (size_t i = 0 ; i < (sizeof(r_.m256) / sizeof(r_.m256[0])) ; i++) {
  3825. r_.m256[i] = simde_mm256_expm1_ps(a_.m256[i]);
  3826. }
  3827. #else
  3828. SIMDE_VECTORIZE
  3829. for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
  3830. r_.f32[i] = simde_math_expm1f(a_.f32[i]);
  3831. }
  3832. #endif
  3833. return simde__m512_from_private(r_);
  3834. #endif
  3835. }
  3836. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  3837. #undef _mm512_expm1_ps
  3838. #define _mm512_expm1_ps(a) simde_mm512_expm1_ps(a)
  3839. #endif
  3840. SIMDE_FUNCTION_ATTRIBUTES
  3841. simde__m512d
  3842. simde_mm512_expm1_pd (simde__m512d a) {
  3843. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  3844. return _mm512_expm1_pd(a);
  3845. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
  3846. return Sleef_expm1d8_u10(a);
  3847. #else
  3848. simde__m512d_private
  3849. r_,
  3850. a_ = simde__m512d_to_private(a);
  3851. #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
  3852. for (size_t i = 0 ; i < (sizeof(r_.m256d) / sizeof(r_.m256d[0])) ; i++) {
  3853. r_.m256d[i] = simde_mm256_expm1_pd(a_.m256d[i]);
  3854. }
  3855. #else
  3856. SIMDE_VECTORIZE
  3857. for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
  3858. r_.f64[i] = simde_math_expm1(a_.f64[i]);
  3859. }
  3860. #endif
  3861. return simde__m512d_from_private(r_);
  3862. #endif
  3863. }
  3864. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  3865. #undef _mm512_expm1_pd
  3866. #define _mm512_expm1_pd(a) simde_mm512_expm1_pd(a)
  3867. #endif
  3868. SIMDE_FUNCTION_ATTRIBUTES
  3869. simde__m512
  3870. simde_mm512_mask_expm1_ps(simde__m512 src, simde__mmask16 k, simde__m512 a) {
  3871. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  3872. return _mm512_mask_expm1_ps(src, k, a);
  3873. #else
  3874. return simde_mm512_mask_mov_ps(src, k, simde_mm512_expm1_ps(a));
  3875. #endif
  3876. }
  3877. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  3878. #undef _mm512_mask_expm1_ps
  3879. #define _mm512_mask_expm1_ps(src, k, a) simde_mm512_mask_expm1_ps(src, k, a)
  3880. #endif
  3881. SIMDE_FUNCTION_ATTRIBUTES
  3882. simde__m512d
  3883. simde_mm512_mask_expm1_pd(simde__m512d src, simde__mmask8 k, simde__m512d a) {
  3884. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  3885. return _mm512_mask_expm1_pd(src, k, a);
  3886. #else
  3887. return simde_mm512_mask_mov_pd(src, k, simde_mm512_expm1_pd(a));
  3888. #endif
  3889. }
  3890. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  3891. #undef _mm512_mask_expm1_pd
  3892. #define _mm512_mask_expm1_pd(src, k, a) simde_mm512_mask_expm1_pd(src, k, a)
  3893. #endif
  3894. SIMDE_FUNCTION_ATTRIBUTES
  3895. simde__m128
  3896. simde_mm_exp2_ps (simde__m128 a) {
  3897. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
  3898. return _mm_exp2_ps(a);
  3899. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
  3900. return Sleef_exp2f4_u10(a);
  3901. #else
  3902. simde__m128_private
  3903. r_,
  3904. a_ = simde__m128_to_private(a);
  3905. SIMDE_VECTORIZE
  3906. for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
  3907. r_.f32[i] = simde_math_exp2f(a_.f32[i]);
  3908. }
  3909. return simde__m128_from_private(r_);
  3910. #endif
  3911. }
  3912. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  3913. #undef _mm_exp2_ps
  3914. #define _mm_exp2_ps(a) simde_mm_exp2_ps(a)
  3915. #endif
  3916. SIMDE_FUNCTION_ATTRIBUTES
  3917. simde__m128d
  3918. simde_mm_exp2_pd (simde__m128d a) {
  3919. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
  3920. return _mm_exp2_pd(a);
  3921. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
  3922. return Sleef_exp2d2_u10(a);
  3923. #else
  3924. simde__m128d_private
  3925. r_,
  3926. a_ = simde__m128d_to_private(a);
  3927. SIMDE_VECTORIZE
  3928. for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
  3929. r_.f64[i] = simde_math_exp2(a_.f64[i]);
  3930. }
  3931. return simde__m128d_from_private(r_);
  3932. #endif
  3933. }
  3934. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  3935. #undef _mm_exp2_pd
  3936. #define _mm_exp2_pd(a) simde_mm_exp2_pd(a)
  3937. #endif
  3938. SIMDE_FUNCTION_ATTRIBUTES
  3939. simde__m256
  3940. simde_mm256_exp2_ps (simde__m256 a) {
  3941. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
  3942. return _mm256_exp2_ps(a);
  3943. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
  3944. return Sleef_exp2f8_u10(a);
  3945. #else
  3946. simde__m256_private
  3947. r_,
  3948. a_ = simde__m256_to_private(a);
  3949. #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
  3950. for (size_t i = 0 ; i < (sizeof(r_.m128) / sizeof(r_.m128[0])) ; i++) {
  3951. r_.m128[i] = simde_mm_exp2_ps(a_.m128[i]);
  3952. }
  3953. #else
  3954. SIMDE_VECTORIZE
  3955. for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
  3956. r_.f32[i] = simde_math_exp2f(a_.f32[i]);
  3957. }
  3958. #endif
  3959. return simde__m256_from_private(r_);
  3960. #endif
  3961. }
  3962. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  3963. #undef _mm256_exp2_ps
  3964. #define _mm256_exp2_ps(a) simde_mm256_exp2_ps(a)
  3965. #endif
  3966. SIMDE_FUNCTION_ATTRIBUTES
  3967. simde__m256d
  3968. simde_mm256_exp2_pd (simde__m256d a) {
  3969. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
  3970. return _mm256_exp2_pd(a);
  3971. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
  3972. return Sleef_exp2d4_u10(a);
  3973. #else
  3974. simde__m256d_private
  3975. r_,
  3976. a_ = simde__m256d_to_private(a);
  3977. #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
  3978. for (size_t i = 0 ; i < (sizeof(r_.m128d) / sizeof(r_.m128d[0])) ; i++) {
  3979. r_.m128d[i] = simde_mm_exp2_pd(a_.m128d[i]);
  3980. }
  3981. #else
  3982. SIMDE_VECTORIZE
  3983. for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
  3984. r_.f64[i] = simde_math_exp2(a_.f64[i]);
  3985. }
  3986. #endif
  3987. return simde__m256d_from_private(r_);
  3988. #endif
  3989. }
  3990. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  3991. #undef _mm256_exp2_pd
  3992. #define _mm256_exp2_pd(a) simde_mm256_exp2_pd(a)
  3993. #endif
  3994. SIMDE_FUNCTION_ATTRIBUTES
  3995. simde__m512
  3996. simde_mm512_exp2_ps (simde__m512 a) {
  3997. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  3998. return _mm512_exp2_ps(a);
  3999. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
  4000. return Sleef_exp2f16_u10(a);
  4001. #else
  4002. simde__m512_private
  4003. r_,
  4004. a_ = simde__m512_to_private(a);
  4005. #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
  4006. for (size_t i = 0 ; i < (sizeof(r_.m256) / sizeof(r_.m256[0])) ; i++) {
  4007. r_.m256[i] = simde_mm256_exp2_ps(a_.m256[i]);
  4008. }
  4009. #else
  4010. SIMDE_VECTORIZE
  4011. for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
  4012. r_.f32[i] = simde_math_exp2f(a_.f32[i]);
  4013. }
  4014. #endif
  4015. return simde__m512_from_private(r_);
  4016. #endif
  4017. }
  4018. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  4019. #undef _mm512_exp2_ps
  4020. #define _mm512_exp2_ps(a) simde_mm512_exp2_ps(a)
  4021. #endif
  4022. SIMDE_FUNCTION_ATTRIBUTES
  4023. simde__m512d
  4024. simde_mm512_exp2_pd (simde__m512d a) {
  4025. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  4026. return _mm512_exp2_pd(a);
  4027. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
  4028. return Sleef_exp2d8_u10(a);
  4029. #else
  4030. simde__m512d_private
  4031. r_,
  4032. a_ = simde__m512d_to_private(a);
  4033. #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
  4034. for (size_t i = 0 ; i < (sizeof(r_.m256d) / sizeof(r_.m256d[0])) ; i++) {
  4035. r_.m256d[i] = simde_mm256_exp2_pd(a_.m256d[i]);
  4036. }
  4037. #else
  4038. SIMDE_VECTORIZE
  4039. for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
  4040. r_.f64[i] = simde_math_exp2(a_.f64[i]);
  4041. }
  4042. #endif
  4043. return simde__m512d_from_private(r_);
  4044. #endif
  4045. }
  4046. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  4047. #undef _mm512_exp2_pd
  4048. #define _mm512_exp2_pd(a) simde_mm512_exp2_pd(a)
  4049. #endif
  4050. SIMDE_FUNCTION_ATTRIBUTES
  4051. simde__m512
  4052. simde_mm512_mask_exp2_ps(simde__m512 src, simde__mmask16 k, simde__m512 a) {
  4053. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  4054. return _mm512_mask_exp2_ps(src, k, a);
  4055. #else
  4056. return simde_mm512_mask_mov_ps(src, k, simde_mm512_exp2_ps(a));
  4057. #endif
  4058. }
  4059. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  4060. #undef _mm512_mask_exp2_ps
  4061. #define _mm512_mask_exp2_ps(src, k, a) simde_mm512_mask_exp2_ps(src, k, a)
  4062. #endif
  4063. SIMDE_FUNCTION_ATTRIBUTES
  4064. simde__m512d
  4065. simde_mm512_mask_exp2_pd(simde__m512d src, simde__mmask8 k, simde__m512d a) {
  4066. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  4067. return _mm512_mask_exp2_pd(src, k, a);
  4068. #else
  4069. return simde_mm512_mask_mov_pd(src, k, simde_mm512_exp2_pd(a));
  4070. #endif
  4071. }
  4072. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  4073. #undef _mm512_mask_exp2_pd
  4074. #define _mm512_mask_exp2_pd(src, k, a) simde_mm512_mask_exp2_pd(src, k, a)
  4075. #endif
  4076. SIMDE_FUNCTION_ATTRIBUTES
  4077. simde__m128
  4078. simde_mm_exp10_ps (simde__m128 a) {
  4079. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
  4080. return _mm_exp10_ps(a);
  4081. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
  4082. return Sleef_exp10f4_u10(a);
  4083. #else
  4084. simde__m128_private
  4085. r_,
  4086. a_ = simde__m128_to_private(a);
  4087. SIMDE_VECTORIZE
  4088. for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
  4089. r_.f32[i] = simde_math_exp10f(a_.f32[i]);
  4090. }
  4091. return simde__m128_from_private(r_);
  4092. #endif
  4093. }
  4094. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  4095. #undef _mm_exp10_ps
  4096. #define _mm_exp10_ps(a) simde_mm_exp10_ps(a)
  4097. #endif
  4098. SIMDE_FUNCTION_ATTRIBUTES
  4099. simde__m128d
  4100. simde_mm_exp10_pd (simde__m128d a) {
  4101. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
  4102. return _mm_exp10_pd(a);
  4103. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
  4104. return Sleef_exp10d2_u10(a);
  4105. #else
  4106. simde__m128d_private
  4107. r_,
  4108. a_ = simde__m128d_to_private(a);
  4109. SIMDE_VECTORIZE
  4110. for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
  4111. r_.f64[i] = simde_math_exp10(a_.f64[i]);
  4112. }
  4113. return simde__m128d_from_private(r_);
  4114. #endif
  4115. }
  4116. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  4117. #undef _mm_exp10_pd
  4118. #define _mm_exp10_pd(a) simde_mm_exp10_pd(a)
  4119. #endif
  4120. SIMDE_FUNCTION_ATTRIBUTES
  4121. simde__m256
  4122. simde_mm256_exp10_ps (simde__m256 a) {
  4123. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
  4124. return _mm256_exp10_ps(a);
  4125. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
  4126. return Sleef_exp10f8_u10(a);
  4127. #else
  4128. simde__m256_private
  4129. r_,
  4130. a_ = simde__m256_to_private(a);
  4131. #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
  4132. for (size_t i = 0 ; i < (sizeof(r_.m128) / sizeof(r_.m128[0])) ; i++) {
  4133. r_.m128[i] = simde_mm_exp10_ps(a_.m128[i]);
  4134. }
  4135. #else
  4136. SIMDE_VECTORIZE
  4137. for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
  4138. r_.f32[i] = simde_math_exp10f(a_.f32[i]);
  4139. }
  4140. #endif
  4141. return simde__m256_from_private(r_);
  4142. #endif
  4143. }
  4144. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  4145. #undef _mm256_exp10_ps
  4146. #define _mm256_exp10_ps(a) simde_mm256_exp10_ps(a)
  4147. #endif
  4148. SIMDE_FUNCTION_ATTRIBUTES
  4149. simde__m256d
  4150. simde_mm256_exp10_pd (simde__m256d a) {
  4151. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
  4152. return _mm256_exp10_pd(a);
  4153. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
  4154. return Sleef_exp10d4_u10(a);
  4155. #else
  4156. simde__m256d_private
  4157. r_,
  4158. a_ = simde__m256d_to_private(a);
  4159. #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
  4160. for (size_t i = 0 ; i < (sizeof(r_.m128d) / sizeof(r_.m128d[0])) ; i++) {
  4161. r_.m128d[i] = simde_mm_exp10_pd(a_.m128d[i]);
  4162. }
  4163. #else
  4164. SIMDE_VECTORIZE
  4165. for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
  4166. r_.f64[i] = simde_math_exp10(a_.f64[i]);
  4167. }
  4168. #endif
  4169. return simde__m256d_from_private(r_);
  4170. #endif
  4171. }
  4172. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  4173. #undef _mm256_exp10_pd
  4174. #define _mm256_exp10_pd(a) simde_mm256_exp10_pd(a)
  4175. #endif
  4176. SIMDE_FUNCTION_ATTRIBUTES
  4177. simde__m512
  4178. simde_mm512_exp10_ps (simde__m512 a) {
  4179. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  4180. return _mm512_exp10_ps(a);
  4181. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
  4182. return Sleef_exp10f16_u10(a);
  4183. #else
  4184. simde__m512_private
  4185. r_,
  4186. a_ = simde__m512_to_private(a);
  4187. #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
  4188. for (size_t i = 0 ; i < (sizeof(r_.m256) / sizeof(r_.m256[0])) ; i++) {
  4189. r_.m256[i] = simde_mm256_exp10_ps(a_.m256[i]);
  4190. }
  4191. #else
  4192. SIMDE_VECTORIZE
  4193. for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
  4194. r_.f32[i] = simde_math_exp10f(a_.f32[i]);
  4195. }
  4196. #endif
  4197. return simde__m512_from_private(r_);
  4198. #endif
  4199. }
  4200. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  4201. #undef _mm512_exp10_ps
  4202. #define _mm512_exp10_ps(a) simde_mm512_exp10_ps(a)
  4203. #endif
  4204. SIMDE_FUNCTION_ATTRIBUTES
  4205. simde__m512d
  4206. simde_mm512_exp10_pd (simde__m512d a) {
  4207. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  4208. return _mm512_exp10_pd(a);
  4209. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
  4210. return Sleef_exp10d8_u10(a);
  4211. #else
  4212. simde__m512d_private
  4213. r_,
  4214. a_ = simde__m512d_to_private(a);
  4215. #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
  4216. for (size_t i = 0 ; i < (sizeof(r_.m256d) / sizeof(r_.m256d[0])) ; i++) {
  4217. r_.m256d[i] = simde_mm256_exp10_pd(a_.m256d[i]);
  4218. }
  4219. #else
  4220. SIMDE_VECTORIZE
  4221. for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
  4222. r_.f64[i] = simde_math_exp10(a_.f64[i]);
  4223. }
  4224. #endif
  4225. return simde__m512d_from_private(r_);
  4226. #endif
  4227. }
  4228. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  4229. #undef _mm512_exp10_pd
  4230. #define _mm512_exp10_pd(a) simde_mm512_exp10_pd(a)
  4231. #endif
  4232. SIMDE_FUNCTION_ATTRIBUTES
  4233. simde__m512
  4234. simde_mm512_mask_exp10_ps(simde__m512 src, simde__mmask16 k, simde__m512 a) {
  4235. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  4236. return _mm512_mask_exp10_ps(src, k, a);
  4237. #else
  4238. return simde_mm512_mask_mov_ps(src, k, simde_mm512_exp10_ps(a));
  4239. #endif
  4240. }
  4241. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  4242. #undef _mm512_mask_exp10_ps
  4243. #define _mm512_mask_exp10_ps(src, k, a) simde_mm512_mask_exp10_ps(src, k, a)
  4244. #endif
  4245. SIMDE_FUNCTION_ATTRIBUTES
  4246. simde__m512d
  4247. simde_mm512_mask_exp10_pd(simde__m512d src, simde__mmask8 k, simde__m512d a) {
  4248. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  4249. return _mm512_mask_exp10_pd(src, k, a);
  4250. #else
  4251. return simde_mm512_mask_mov_pd(src, k, simde_mm512_exp10_pd(a));
  4252. #endif
  4253. }
  4254. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  4255. #undef _mm512_mask_exp10_pd
  4256. #define _mm512_mask_exp10_pd(src, k, a) simde_mm512_mask_exp10_pd(src, k, a)
  4257. #endif
  4258. SIMDE_FUNCTION_ATTRIBUTES
  4259. simde__m128
  4260. simde_mm_cdfnorm_ps (simde__m128 a) {
  4261. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
  4262. return _mm_cdfnorm_ps(a);
  4263. #elif (SIMDE_NATURAL_VECTOR_SIZE > 0)
  4264. /* https://www.johndcook.com/blog/cpp_phi/ */
  4265. const simde__m128 a1 = simde_mm_set1_ps(SIMDE_FLOAT32_C( 0.254829592));
  4266. const simde__m128 a2 = simde_mm_set1_ps(SIMDE_FLOAT32_C(-0.284496736));
  4267. const simde__m128 a3 = simde_mm_set1_ps(SIMDE_FLOAT32_C(1.421413741));
  4268. const simde__m128 a4 = simde_mm_set1_ps(SIMDE_FLOAT32_C(-1.453152027));
  4269. const simde__m128 a5 = simde_mm_set1_ps(SIMDE_FLOAT32_C(1.061405429));
  4270. const simde__m128 p = simde_mm_set1_ps(SIMDE_FLOAT32_C(0.3275911));
  4271. const simde__m128 one = simde_mm_set1_ps(SIMDE_FLOAT32_C(1.0));
  4272. /* simde_math_fabsf(x) / sqrtf(2.0) */
  4273. const simde__m128 x = simde_mm_div_ps(simde_x_mm_abs_ps(a), simde_mm_sqrt_ps(simde_mm_set1_ps(SIMDE_FLOAT32_C(2.0))));
  4274. /* 1.0 / (1.0 + p * x) */
  4275. const simde__m128 t = simde_mm_div_ps(one, simde_mm_add_ps(one, simde_mm_mul_ps(p, x)));
  4276. /* 1.0 - (((((a5 * t + a4) * t) + a3) * t + a2) * t + a1) * t * exp(-x * x) */
  4277. simde__m128 y = simde_mm_mul_ps(a5, t);
  4278. y = simde_mm_add_ps(y, a4);
  4279. y = simde_mm_mul_ps(y, t);
  4280. y = simde_mm_add_ps(y, a3);
  4281. y = simde_mm_mul_ps(y, t);
  4282. y = simde_mm_add_ps(y, a2);
  4283. y = simde_mm_mul_ps(y, t);
  4284. y = simde_mm_add_ps(y, a1);
  4285. y = simde_mm_mul_ps(y, t);
  4286. y = simde_mm_mul_ps(y, simde_mm_exp_ps(simde_mm_mul_ps(x, simde_x_mm_negate_ps(x))));
  4287. y = simde_mm_sub_ps(one, y);
  4288. /* 0.5 * (1.0 + ((a < 0.0) ? -y : y)) */
  4289. return simde_mm_mul_ps(simde_mm_set1_ps(SIMDE_FLOAT32_C(0.5)), simde_mm_add_ps(one, simde_x_mm_xorsign_ps(y, a)));
  4290. #else
  4291. simde__m128_private
  4292. r_,
  4293. a_ = simde__m128_to_private(a);
  4294. SIMDE_VECTORIZE
  4295. for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
  4296. r_.f32[i] = simde_math_cdfnormf(a_.f32[i]);
  4297. }
  4298. return simde__m128_from_private(r_);
  4299. #endif
  4300. }
  4301. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  4302. #undef _mm_cdfnorm_ps
  4303. #define _mm_cdfnorm_ps(a) simde_mm_cdfnorm_ps(a)
  4304. #endif
  4305. SIMDE_FUNCTION_ATTRIBUTES
  4306. simde__m128d
  4307. simde_mm_cdfnorm_pd (simde__m128d a) {
  4308. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
  4309. return _mm_cdfnorm_pd(a);
  4310. #elif (SIMDE_NATURAL_VECTOR_SIZE > 0)
  4311. /* https://www.johndcook.com/blog/cpp_phi/ */
  4312. const simde__m128d a1 = simde_mm_set1_pd(SIMDE_FLOAT64_C( 0.254829592));
  4313. const simde__m128d a2 = simde_mm_set1_pd(SIMDE_FLOAT64_C(-0.284496736));
  4314. const simde__m128d a3 = simde_mm_set1_pd(SIMDE_FLOAT64_C(1.421413741));
  4315. const simde__m128d a4 = simde_mm_set1_pd(SIMDE_FLOAT64_C(-1.453152027));
  4316. const simde__m128d a5 = simde_mm_set1_pd(SIMDE_FLOAT64_C(1.061405429));
  4317. const simde__m128d p = simde_mm_set1_pd(SIMDE_FLOAT64_C(0.6475911));
  4318. const simde__m128d one = simde_mm_set1_pd(SIMDE_FLOAT64_C(1.0));
  4319. /* simde_math_fabs(x) / sqrt(2.0) */
  4320. const simde__m128d x = simde_mm_div_pd(simde_x_mm_abs_pd(a), simde_mm_sqrt_pd(simde_mm_set1_pd(SIMDE_FLOAT64_C(2.0))));
  4321. /* 1.0 / (1.0 + p * x) */
  4322. const simde__m128d t = simde_mm_div_pd(one, simde_mm_add_pd(one, simde_mm_mul_pd(p, x)));
  4323. /* 1.0 - (((((a5 * t + a4) * t) + a3) * t + a2) * t + a1) * t * exp(-x * x) */
  4324. simde__m128d y = simde_mm_mul_pd(a5, t);
  4325. y = simde_mm_add_pd(y, a4);
  4326. y = simde_mm_mul_pd(y, t);
  4327. y = simde_mm_add_pd(y, a3);
  4328. y = simde_mm_mul_pd(y, t);
  4329. y = simde_mm_add_pd(y, a2);
  4330. y = simde_mm_mul_pd(y, t);
  4331. y = simde_mm_add_pd(y, a1);
  4332. y = simde_mm_mul_pd(y, t);
  4333. y = simde_mm_mul_pd(y, simde_mm_exp_pd(simde_mm_mul_pd(x, simde_x_mm_negate_pd(x))));
  4334. y = simde_mm_sub_pd(one, y);
  4335. /* 0.5 * (1.0 + ((a < 0.0) ? -y : y)) */
  4336. return simde_mm_mul_pd(simde_mm_set1_pd(SIMDE_FLOAT64_C(0.5)), simde_mm_add_pd(one, simde_x_mm_xorsign_pd(y, a)));
  4337. #else
  4338. simde__m128d_private
  4339. r_,
  4340. a_ = simde__m128d_to_private(a);
  4341. SIMDE_VECTORIZE
  4342. for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
  4343. r_.f64[i] = simde_math_cdfnorm(a_.f64[i]);
  4344. }
  4345. return simde__m128d_from_private(r_);
  4346. #endif
  4347. }
  4348. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  4349. #undef _mm_cdfnorm_pd
  4350. #define _mm_cdfnorm_pd(a) simde_mm_cdfnorm_pd(a)
  4351. #endif
  4352. SIMDE_FUNCTION_ATTRIBUTES
  4353. simde__m256
  4354. simde_mm256_cdfnorm_ps (simde__m256 a) {
  4355. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
  4356. return _mm256_cdfnorm_ps(a);
  4357. #elif (SIMDE_NATURAL_VECTOR_SIZE > 0)
  4358. /* https://www.johndcook.com/blog/cpp_phi/ */
  4359. const simde__m256 a1 = simde_mm256_set1_ps(SIMDE_FLOAT32_C( 0.254829592));
  4360. const simde__m256 a2 = simde_mm256_set1_ps(SIMDE_FLOAT32_C(-0.284496736));
  4361. const simde__m256 a3 = simde_mm256_set1_ps(SIMDE_FLOAT32_C(1.421413741));
  4362. const simde__m256 a4 = simde_mm256_set1_ps(SIMDE_FLOAT32_C(-1.453152027));
  4363. const simde__m256 a5 = simde_mm256_set1_ps(SIMDE_FLOAT32_C(1.061405429));
  4364. const simde__m256 p = simde_mm256_set1_ps(SIMDE_FLOAT32_C(0.3275911));
  4365. const simde__m256 one = simde_mm256_set1_ps(SIMDE_FLOAT32_C(1.0));
  4366. /* simde_math_fabsf(x) / sqrtf(2.0) */
  4367. const simde__m256 x = simde_mm256_div_ps(simde_x_mm256_abs_ps(a), simde_mm256_sqrt_ps(simde_mm256_set1_ps(SIMDE_FLOAT32_C(2.0))));
  4368. /* 1.0 / (1.0 + p * x) */
  4369. const simde__m256 t = simde_mm256_div_ps(one, simde_mm256_add_ps(one, simde_mm256_mul_ps(p, x)));
  4370. /* 1.0 - (((((a5 * t + a4) * t) + a3) * t + a2) * t + a1) * t * exp(-x * x) */
  4371. simde__m256 y = simde_mm256_mul_ps(a5, t);
  4372. y = simde_mm256_add_ps(y, a4);
  4373. y = simde_mm256_mul_ps(y, t);
  4374. y = simde_mm256_add_ps(y, a3);
  4375. y = simde_mm256_mul_ps(y, t);
  4376. y = simde_mm256_add_ps(y, a2);
  4377. y = simde_mm256_mul_ps(y, t);
  4378. y = simde_mm256_add_ps(y, a1);
  4379. y = simde_mm256_mul_ps(y, t);
  4380. y = simde_mm256_mul_ps(y, simde_mm256_exp_ps(simde_mm256_mul_ps(x, simde_x_mm256_negate_ps(x))));
  4381. y = simde_mm256_sub_ps(one, y);
  4382. /* 0.5 * (1.0 + ((a < 0.0) ? -y : y)) */
  4383. return simde_mm256_mul_ps(simde_mm256_set1_ps(SIMDE_FLOAT32_C(0.5)), simde_mm256_add_ps(one, simde_x_mm256_xorsign_ps(y, a)));
  4384. #else
  4385. simde__m256_private
  4386. r_,
  4387. a_ = simde__m256_to_private(a);
  4388. #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
  4389. for (size_t i = 0 ; i < (sizeof(r_.m128) / sizeof(r_.m128[0])) ; i++) {
  4390. r_.m128[i] = simde_mm_cdfnorm_ps(a_.m128[i]);
  4391. }
  4392. #else
  4393. SIMDE_VECTORIZE
  4394. for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
  4395. r_.f32[i] = simde_math_cdfnormf(a_.f32[i]);
  4396. }
  4397. #endif
  4398. return simde__m256_from_private(r_);
  4399. #endif
  4400. }
  4401. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  4402. #undef _mm256_cdfnorm_ps
  4403. #define _mm256_cdfnorm_ps(a) simde_mm256_cdfnorm_ps(a)
  4404. #endif
  4405. SIMDE_FUNCTION_ATTRIBUTES
  4406. simde__m256d
  4407. simde_mm256_cdfnorm_pd (simde__m256d a) {
  4408. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
  4409. return _mm256_cdfnorm_pd(a);
  4410. #elif (SIMDE_NATURAL_VECTOR_SIZE > 0)
  4411. /* https://www.johndcook.com/blog/cpp_phi/ */
  4412. const simde__m256d a1 = simde_mm256_set1_pd(SIMDE_FLOAT64_C( 0.254829592));
  4413. const simde__m256d a2 = simde_mm256_set1_pd(SIMDE_FLOAT64_C(-0.284496736));
  4414. const simde__m256d a3 = simde_mm256_set1_pd(SIMDE_FLOAT64_C(1.421413741));
  4415. const simde__m256d a4 = simde_mm256_set1_pd(SIMDE_FLOAT64_C(-1.453152027));
  4416. const simde__m256d a5 = simde_mm256_set1_pd(SIMDE_FLOAT64_C(1.061405429));
  4417. const simde__m256d p = simde_mm256_set1_pd(SIMDE_FLOAT64_C(0.6475911));
  4418. const simde__m256d one = simde_mm256_set1_pd(SIMDE_FLOAT64_C(1.0));
  4419. /* simde_math_fabs(x) / sqrt(2.0) */
  4420. const simde__m256d x = simde_mm256_div_pd(simde_x_mm256_abs_pd(a), simde_mm256_sqrt_pd(simde_mm256_set1_pd(SIMDE_FLOAT64_C(2.0))));
  4421. /* 1.0 / (1.0 + p * x) */
  4422. const simde__m256d t = simde_mm256_div_pd(one, simde_mm256_add_pd(one, simde_mm256_mul_pd(p, x)));
  4423. /* 1.0 - (((((a5 * t + a4) * t) + a3) * t + a2) * t + a1) * t * exp(-x * x) */
  4424. simde__m256d y = simde_mm256_mul_pd(a5, t);
  4425. y = simde_mm256_add_pd(y, a4);
  4426. y = simde_mm256_mul_pd(y, t);
  4427. y = simde_mm256_add_pd(y, a3);
  4428. y = simde_mm256_mul_pd(y, t);
  4429. y = simde_mm256_add_pd(y, a2);
  4430. y = simde_mm256_mul_pd(y, t);
  4431. y = simde_mm256_add_pd(y, a1);
  4432. y = simde_mm256_mul_pd(y, t);
  4433. y = simde_mm256_mul_pd(y, simde_mm256_exp_pd(simde_mm256_mul_pd(x, simde_x_mm256_negate_pd(x))));
  4434. y = simde_mm256_sub_pd(one, y);
  4435. /* 0.5 * (1.0 + ((a < 0.0) ? -y : y)) */
  4436. return simde_mm256_mul_pd(simde_mm256_set1_pd(SIMDE_FLOAT64_C(0.5)), simde_mm256_add_pd(one, simde_x_mm256_xorsign_pd(y, a)));
  4437. #else
  4438. simde__m256d_private
  4439. r_,
  4440. a_ = simde__m256d_to_private(a);
  4441. #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
  4442. for (size_t i = 0 ; i < (sizeof(r_.m128d) / sizeof(r_.m128d[0])) ; i++) {
  4443. r_.m128d[i] = simde_mm_cdfnorm_pd(a_.m128d[i]);
  4444. }
  4445. #else
  4446. SIMDE_VECTORIZE
  4447. for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
  4448. r_.f64[i] = simde_math_cdfnorm(a_.f64[i]);
  4449. }
  4450. #endif
  4451. return simde__m256d_from_private(r_);
  4452. #endif
  4453. }
  4454. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  4455. #undef _mm256_cdfnorm_pd
  4456. #define _mm256_cdfnorm_pd(a) simde_mm256_cdfnorm_pd(a)
  4457. #endif
  4458. SIMDE_FUNCTION_ATTRIBUTES
  4459. simde__m512
  4460. simde_mm512_cdfnorm_ps (simde__m512 a) {
  4461. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  4462. return _mm512_cdfnorm_ps(a);
  4463. #elif (SIMDE_NATURAL_VECTOR_SIZE > 0)
  4464. /* https://www.johndcook.com/blog/cpp_phi/ */
  4465. const simde__m512 a1 = simde_mm512_set1_ps(SIMDE_FLOAT32_C( 0.254829592));
  4466. const simde__m512 a2 = simde_mm512_set1_ps(SIMDE_FLOAT32_C(-0.284496736));
  4467. const simde__m512 a3 = simde_mm512_set1_ps(SIMDE_FLOAT32_C(1.421413741));
  4468. const simde__m512 a4 = simde_mm512_set1_ps(SIMDE_FLOAT32_C(-1.453152027));
  4469. const simde__m512 a5 = simde_mm512_set1_ps(SIMDE_FLOAT32_C(1.061405429));
  4470. const simde__m512 p = simde_mm512_set1_ps(SIMDE_FLOAT32_C(0.3275911));
  4471. const simde__m512 one = simde_mm512_set1_ps(SIMDE_FLOAT32_C(1.0));
  4472. /* simde_math_fabsf(x) / sqrtf(2.0) */
  4473. const simde__m512 x = simde_mm512_div_ps(simde_mm512_abs_ps(a), simde_mm512_sqrt_ps(simde_mm512_set1_ps(SIMDE_FLOAT32_C(2.0))));
  4474. /* 1.0 / (1.0 + p * x) */
  4475. const simde__m512 t = simde_mm512_div_ps(one, simde_mm512_add_ps(one, simde_mm512_mul_ps(p, x)));
  4476. /* 1.0 - (((((a5 * t + a4) * t) + a3) * t + a2) * t + a1) * t * exp(-x * x) */
  4477. simde__m512 y = simde_mm512_mul_ps(a5, t);
  4478. y = simde_mm512_add_ps(y, a4);
  4479. y = simde_mm512_mul_ps(y, t);
  4480. y = simde_mm512_add_ps(y, a3);
  4481. y = simde_mm512_mul_ps(y, t);
  4482. y = simde_mm512_add_ps(y, a2);
  4483. y = simde_mm512_mul_ps(y, t);
  4484. y = simde_mm512_add_ps(y, a1);
  4485. y = simde_mm512_mul_ps(y, t);
  4486. y = simde_mm512_mul_ps(y, simde_mm512_exp_ps(simde_mm512_mul_ps(x, simde_x_mm512_negate_ps(x))));
  4487. y = simde_mm512_sub_ps(one, y);
  4488. /* 0.5 * (1.0 + ((a < 0.0) ? -y : y)) */
  4489. return simde_mm512_mul_ps(simde_mm512_set1_ps(SIMDE_FLOAT32_C(0.5)), simde_mm512_add_ps(one, simde_x_mm512_xorsign_ps(y, a)));
  4490. #else
  4491. simde__m512_private
  4492. r_,
  4493. a_ = simde__m512_to_private(a);
  4494. #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
  4495. for (size_t i = 0 ; i < (sizeof(r_.m256) / sizeof(r_.m256[0])) ; i++) {
  4496. r_.m256[i] = simde_mm256_cdfnorm_ps(a_.m256[i]);
  4497. }
  4498. #else
  4499. SIMDE_VECTORIZE
  4500. for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
  4501. r_.f32[i] = simde_math_cdfnormf(a_.f32[i]);
  4502. }
  4503. #endif
  4504. return simde__m512_from_private(r_);
  4505. #endif
  4506. }
  4507. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  4508. #undef _mm512_cdfnorm_ps
  4509. #define _mm512_cdfnorm_ps(a) simde_mm512_cdfnorm_ps(a)
  4510. #endif
  4511. SIMDE_FUNCTION_ATTRIBUTES
  4512. simde__m512d
  4513. simde_mm512_cdfnorm_pd (simde__m512d a) {
  4514. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  4515. return _mm512_cdfnorm_pd(a);
  4516. #elif (SIMDE_NATURAL_VECTOR_SIZE > 0)
  4517. /* https://www.johndcook.com/blog/cpp_phi/ */
  4518. const simde__m512d a1 = simde_mm512_set1_pd(SIMDE_FLOAT64_C( 0.254829592));
  4519. const simde__m512d a2 = simde_mm512_set1_pd(SIMDE_FLOAT64_C(-0.284496736));
  4520. const simde__m512d a3 = simde_mm512_set1_pd(SIMDE_FLOAT64_C(1.421413741));
  4521. const simde__m512d a4 = simde_mm512_set1_pd(SIMDE_FLOAT64_C(-1.453152027));
  4522. const simde__m512d a5 = simde_mm512_set1_pd(SIMDE_FLOAT64_C(1.061405429));
  4523. const simde__m512d p = simde_mm512_set1_pd(SIMDE_FLOAT64_C(0.6475911));
  4524. const simde__m512d one = simde_mm512_set1_pd(SIMDE_FLOAT64_C(1.0));
  4525. /* simde_math_fabs(x) / sqrt(2.0) */
  4526. const simde__m512d x = simde_mm512_div_pd(simde_mm512_abs_pd(a), simde_mm512_sqrt_pd(simde_mm512_set1_pd(SIMDE_FLOAT64_C(2.0))));
  4527. /* 1.0 / (1.0 + p * x) */
  4528. const simde__m512d t = simde_mm512_div_pd(one, simde_mm512_add_pd(one, simde_mm512_mul_pd(p, x)));
  4529. /* 1.0 - (((((a5 * t + a4) * t) + a3) * t + a2) * t + a1) * t * exp(-x * x) */
  4530. simde__m512d y = simde_mm512_mul_pd(a5, t);
  4531. y = simde_mm512_add_pd(y, a4);
  4532. y = simde_mm512_mul_pd(y, t);
  4533. y = simde_mm512_add_pd(y, a3);
  4534. y = simde_mm512_mul_pd(y, t);
  4535. y = simde_mm512_add_pd(y, a2);
  4536. y = simde_mm512_mul_pd(y, t);
  4537. y = simde_mm512_add_pd(y, a1);
  4538. y = simde_mm512_mul_pd(y, t);
  4539. y = simde_mm512_mul_pd(y, simde_mm512_exp_pd(simde_mm512_mul_pd(x, simde_x_mm512_negate_pd(x))));
  4540. y = simde_mm512_sub_pd(one, y);
  4541. /* 0.5 * (1.0 + ((a < 0.0) ? -y : y)) */
  4542. return simde_mm512_mul_pd(simde_mm512_set1_pd(SIMDE_FLOAT64_C(0.5)), simde_mm512_add_pd(one, simde_x_mm512_xorsign_pd(y, a)));
  4543. #else
  4544. simde__m512d_private
  4545. r_,
  4546. a_ = simde__m512d_to_private(a);
  4547. #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
  4548. for (size_t i = 0 ; i < (sizeof(r_.m256d) / sizeof(r_.m256d[0])) ; i++) {
  4549. r_.m256d[i] = simde_mm256_cdfnorm_pd(a_.m256d[i]);
  4550. }
  4551. #else
  4552. SIMDE_VECTORIZE
  4553. for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
  4554. r_.f64[i] = simde_math_cdfnorm(a_.f64[i]);
  4555. }
  4556. #endif
  4557. return simde__m512d_from_private(r_);
  4558. #endif
  4559. }
  4560. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  4561. #undef _mm512_cdfnorm_pd
  4562. #define _mm512_cdfnorm_pd(a) simde_mm512_cdfnorm_pd(a)
  4563. #endif
  4564. SIMDE_FUNCTION_ATTRIBUTES
  4565. simde__m512
  4566. simde_mm512_mask_cdfnorm_ps(simde__m512 src, simde__mmask16 k, simde__m512 a) {
  4567. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  4568. return _mm512_mask_cdfnorm_ps(src, k, a);
  4569. #else
  4570. return simde_mm512_mask_mov_ps(src, k, simde_mm512_cdfnorm_ps(a));
  4571. #endif
  4572. }
  4573. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  4574. #undef _mm512_mask_cdfnorm_ps
  4575. #define _mm512_mask_cdfnorm_ps(src, k, a) simde_mm512_mask_cdfnorm_ps(src, k, a)
  4576. #endif
  4577. SIMDE_FUNCTION_ATTRIBUTES
  4578. simde__m512d
  4579. simde_mm512_mask_cdfnorm_pd(simde__m512d src, simde__mmask8 k, simde__m512d a) {
  4580. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  4581. return _mm512_mask_cdfnorm_pd(src, k, a);
  4582. #else
  4583. return simde_mm512_mask_mov_pd(src, k, simde_mm512_cdfnorm_pd(a));
  4584. #endif
  4585. }
  4586. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  4587. #undef _mm512_mask_cdfnorm_pd
  4588. #define _mm512_mask_cdfnorm_pd(src, k, a) simde_mm512_mask_cdfnorm_pd(src, k, a)
  4589. #endif
  4590. SIMDE_FUNCTION_ATTRIBUTES
  4591. simde__m128i
  4592. simde_mm_idivrem_epi32 (simde__m128i* mem_addr, simde__m128i a, simde__m128i b) {
  4593. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
  4594. return _mm_idivrem_epi32(HEDLEY_REINTERPRET_CAST(__m128i*, mem_addr), a, b);
  4595. #else
  4596. simde__m128i r;
  4597. r = simde_mm_div_epi32(a, b);
  4598. *mem_addr = simde_mm_sub_epi32(a, simde_mm_mullo_epi32(r, b));
  4599. return r;
  4600. #endif
  4601. }
  4602. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  4603. #undef _mm_idivrem_epi32
  4604. #define _mm_idivrem_epi32(mem_addr, a, b) simde_mm_idivrem_epi32((mem_addr),(a), (b))
  4605. #endif
  4606. SIMDE_FUNCTION_ATTRIBUTES
  4607. simde__m256i
  4608. simde_mm256_idivrem_epi32 (simde__m256i* mem_addr, simde__m256i a, simde__m256i b) {
  4609. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
  4610. return _mm256_idivrem_epi32(HEDLEY_REINTERPRET_CAST(__m256i*, mem_addr), a, b);
  4611. #else
  4612. simde__m256i r;
  4613. r = simde_mm256_div_epi32(a, b);
  4614. *mem_addr = simde_mm256_sub_epi32(a, simde_mm256_mullo_epi32(r, b));
  4615. return r;
  4616. #endif
  4617. }
  4618. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  4619. #undef _mm256_idivrem_epi32
  4620. #define _mm256_idivrem_epi32(mem_addr, a, b) simde_mm256_idivrem_epi32((mem_addr),(a), (b))
  4621. #endif
  4622. SIMDE_FUNCTION_ATTRIBUTES
  4623. simde__m128
  4624. simde_mm_hypot_ps (simde__m128 a, simde__m128 b) {
  4625. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
  4626. return _mm_hypot_ps(a, b);
  4627. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
  4628. #if SIMDE_ACCURACY_PREFERENCE > 1
  4629. return Sleef_hypotf4_u05(a, b);
  4630. #else
  4631. return Sleef_hypotf4_u35(a, b);
  4632. #endif
  4633. #else
  4634. simde__m128_private
  4635. r_,
  4636. a_ = simde__m128_to_private(a),
  4637. b_ = simde__m128_to_private(b);
  4638. SIMDE_VECTORIZE
  4639. for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
  4640. r_.f32[i] = simde_math_hypotf(a_.f32[i], b_.f32[i]);
  4641. }
  4642. return simde__m128_from_private(r_);
  4643. #endif
  4644. }
  4645. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  4646. #undef _mm_hypot_ps
  4647. #define _mm_hypot_ps(a, b) simde_mm_hypot_ps(a, b)
  4648. #endif
  4649. SIMDE_FUNCTION_ATTRIBUTES
  4650. simde__m128d
  4651. simde_mm_hypot_pd (simde__m128d a, simde__m128d b) {
  4652. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
  4653. return _mm_hypot_pd(a, b);
  4654. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
  4655. #if SIMDE_ACCURACY_PREFERENCE > 1
  4656. return Sleef_hypotd2_u05(a, b);
  4657. #else
  4658. return Sleef_hypotd2_u35(a, b);
  4659. #endif
  4660. #else
  4661. simde__m128d_private
  4662. r_,
  4663. a_ = simde__m128d_to_private(a),
  4664. b_ = simde__m128d_to_private(b);
  4665. SIMDE_VECTORIZE
  4666. for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
  4667. r_.f64[i] = simde_math_hypot(a_.f64[i], b_.f64[i]);
  4668. }
  4669. return simde__m128d_from_private(r_);
  4670. #endif
  4671. }
  4672. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  4673. #undef _mm_hypot_pd
  4674. #define _mm_hypot_pd(a, b) simde_mm_hypot_pd(a, b)
  4675. #endif
  4676. SIMDE_FUNCTION_ATTRIBUTES
  4677. simde__m256
  4678. simde_mm256_hypot_ps (simde__m256 a, simde__m256 b) {
  4679. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
  4680. return _mm256_hypot_ps(a, b);
  4681. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
  4682. #if SIMDE_ACCURACY_PREFERENCE > 1
  4683. return Sleef_hypotf8_u05(a, b);
  4684. #else
  4685. return Sleef_hypotf8_u35(a, b);
  4686. #endif
  4687. #else
  4688. simde__m256_private
  4689. r_,
  4690. a_ = simde__m256_to_private(a),
  4691. b_ = simde__m256_to_private(b);
  4692. #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
  4693. for (size_t i = 0 ; i < (sizeof(r_.m128) / sizeof(r_.m128[0])) ; i++) {
  4694. r_.m128[i] = simde_mm_hypot_ps(a_.m128[i], b_.m128[i]);
  4695. }
  4696. #else
  4697. SIMDE_VECTORIZE
  4698. for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
  4699. r_.f32[i] = simde_math_hypotf(a_.f32[i], b_.f32[i]);
  4700. }
  4701. #endif
  4702. return simde__m256_from_private(r_);
  4703. #endif
  4704. }
  4705. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  4706. #undef _mm256_hypot_ps
  4707. #define _mm256_hypot_ps(a, b) simde_mm256_hypot_ps(a, b)
  4708. #endif
  4709. SIMDE_FUNCTION_ATTRIBUTES
  4710. simde__m256d
  4711. simde_mm256_hypot_pd (simde__m256d a, simde__m256d b) {
  4712. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
  4713. return _mm256_hypot_pd(a, b);
  4714. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
  4715. #if SIMDE_ACCURACY_PREFERENCE > 1
  4716. return Sleef_hypotd4_u05(a, b);
  4717. #else
  4718. return Sleef_hypotd4_u35(a, b);
  4719. #endif
  4720. #else
  4721. simde__m256d_private
  4722. r_,
  4723. a_ = simde__m256d_to_private(a),
  4724. b_ = simde__m256d_to_private(b);
  4725. #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
  4726. for (size_t i = 0 ; i < (sizeof(r_.m128d) / sizeof(r_.m128d[0])) ; i++) {
  4727. r_.m128d[i] = simde_mm_hypot_pd(a_.m128d[i], b_.m128d[i]);
  4728. }
  4729. #else
  4730. SIMDE_VECTORIZE
  4731. for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
  4732. r_.f64[i] = simde_math_hypot(a_.f64[i], b_.f64[i]);
  4733. }
  4734. #endif
  4735. return simde__m256d_from_private(r_);
  4736. #endif
  4737. }
  4738. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  4739. #undef _mm256_hypot_pd
  4740. #define _mm256_hypot_pd(a, b) simde_mm256_hypot_pd(a, b)
  4741. #endif
  4742. SIMDE_FUNCTION_ATTRIBUTES
  4743. simde__m512
  4744. simde_mm512_hypot_ps (simde__m512 a, simde__m512 b) {
  4745. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  4746. return _mm512_hypot_ps(a, b);
  4747. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
  4748. #if SIMDE_ACCURACY_PREFERENCE > 1
  4749. return Sleef_hypotf16_u05(a, b);
  4750. #else
  4751. return Sleef_hypotf16_u35(a, b);
  4752. #endif
  4753. #else
  4754. simde__m512_private
  4755. r_,
  4756. a_ = simde__m512_to_private(a),
  4757. b_ = simde__m512_to_private(b);
  4758. #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
  4759. for (size_t i = 0 ; i < (sizeof(r_.m256) / sizeof(r_.m256[0])) ; i++) {
  4760. r_.m256[i] = simde_mm256_hypot_ps(a_.m256[i], b_.m256[i]);
  4761. }
  4762. #else
  4763. SIMDE_VECTORIZE
  4764. for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
  4765. r_.f32[i] = simde_math_hypotf(a_.f32[i], b_.f32[i]);
  4766. }
  4767. #endif
  4768. return simde__m512_from_private(r_);
  4769. #endif
  4770. }
  4771. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  4772. #undef _mm512_hypot_ps
  4773. #define _mm512_hypot_ps(a, b) simde_mm512_hypot_ps(a, b)
  4774. #endif
  4775. SIMDE_FUNCTION_ATTRIBUTES
  4776. simde__m512d
  4777. simde_mm512_hypot_pd (simde__m512d a, simde__m512d b) {
  4778. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  4779. return _mm512_hypot_pd(a, b);
  4780. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
  4781. #if SIMDE_ACCURACY_PREFERENCE > 1
  4782. return Sleef_hypotd8_u05(a, b);
  4783. #else
  4784. return Sleef_hypotd8_u35(a, b);
  4785. #endif
  4786. #else
  4787. simde__m512d_private
  4788. r_,
  4789. a_ = simde__m512d_to_private(a),
  4790. b_ = simde__m512d_to_private(b);
  4791. #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
  4792. for (size_t i = 0 ; i < (sizeof(r_.m256d) / sizeof(r_.m256d[0])) ; i++) {
  4793. r_.m256d[i] = simde_mm256_hypot_pd(a_.m256d[i], b_.m256d[i]);
  4794. }
  4795. #else
  4796. SIMDE_VECTORIZE
  4797. for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
  4798. r_.f64[i] = simde_math_hypot(a_.f64[i], b_.f64[i]);
  4799. }
  4800. #endif
  4801. return simde__m512d_from_private(r_);
  4802. #endif
  4803. }
  4804. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  4805. #undef _mm512_hypot_pd
  4806. #define _mm512_hypot_pd(a, b) simde_mm512_hypot_pd(a, b)
  4807. #endif
  4808. SIMDE_FUNCTION_ATTRIBUTES
  4809. simde__m512
  4810. simde_mm512_mask_hypot_ps(simde__m512 src, simde__mmask16 k, simde__m512 a, simde__m512 b) {
  4811. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  4812. return _mm512_mask_hypot_ps(src, k, a, b);
  4813. #else
  4814. return simde_mm512_mask_mov_ps(src, k, simde_mm512_hypot_ps(a, b));
  4815. #endif
  4816. }
  4817. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  4818. #undef _mm512_mask_hypot_ps
  4819. #define _mm512_mask_hypot_ps(src, k, a, b) simde_mm512_mask_hypot_ps(src, k, a, b)
  4820. #endif
  4821. SIMDE_FUNCTION_ATTRIBUTES
  4822. simde__m512d
  4823. simde_mm512_mask_hypot_pd(simde__m512d src, simde__mmask8 k, simde__m512d a, simde__m512d b) {
  4824. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  4825. return _mm512_mask_hypot_pd(src, k, a, b);
  4826. #else
  4827. return simde_mm512_mask_mov_pd(src, k, simde_mm512_hypot_pd(a, b));
  4828. #endif
  4829. }
  4830. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  4831. #undef _mm512_mask_hypot_pd
  4832. #define _mm512_mask_hypot_pd(src, k, a, b) simde_mm512_mask_hypot_pd(src, k, a, b)
  4833. #endif
  4834. SIMDE_FUNCTION_ATTRIBUTES
  4835. simde__m128
  4836. simde_mm_invcbrt_ps (simde__m128 a) {
  4837. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
  4838. return _mm_invcbrt_ps(a);
  4839. #else
  4840. return simde_mm_rcp_ps(simde_mm_cbrt_ps(a));
  4841. #endif
  4842. }
  4843. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  4844. #undef _mm_invcbrt_ps
  4845. #define _mm_invcbrt_ps(a) simde_mm_invcbrt_ps(a)
  4846. #endif
  4847. SIMDE_FUNCTION_ATTRIBUTES
  4848. simde__m128d
  4849. simde_mm_invcbrt_pd (simde__m128d a) {
  4850. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
  4851. return _mm_invcbrt_pd(a);
  4852. #else
  4853. return simde_mm_div_pd(simde_mm_set1_pd(SIMDE_FLOAT64_C(1.0)), simde_mm_cbrt_pd(a));
  4854. #endif
  4855. }
  4856. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  4857. #undef _mm_invcbrt_pd
  4858. #define _mm_invcbrt_pd(a) simde_mm_invcbrt_pd(a)
  4859. #endif
  4860. SIMDE_FUNCTION_ATTRIBUTES
  4861. simde__m256
  4862. simde_mm256_invcbrt_ps (simde__m256 a) {
  4863. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
  4864. return _mm256_invcbrt_ps(a);
  4865. #else
  4866. return simde_mm256_rcp_ps(simde_mm256_cbrt_ps(a));
  4867. #endif
  4868. }
  4869. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  4870. #undef _mm256_invcbrt_ps
  4871. #define _mm256_invcbrt_ps(a) simde_mm256_invcbrt_ps(a)
  4872. #endif
  4873. SIMDE_FUNCTION_ATTRIBUTES
  4874. simde__m256d
  4875. simde_mm256_invcbrt_pd (simde__m256d a) {
  4876. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
  4877. return _mm256_invcbrt_pd(a);
  4878. #else
  4879. return simde_mm256_div_pd(simde_mm256_set1_pd(SIMDE_FLOAT64_C(1.0)), simde_mm256_cbrt_pd(a));
  4880. #endif
  4881. }
  4882. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  4883. #undef _mm256_invcbrt_pd
  4884. #define _mm256_invcbrt_pd(a) simde_mm256_invcbrt_pd(a)
  4885. #endif
  4886. SIMDE_FUNCTION_ATTRIBUTES
  4887. simde__m128
  4888. simde_mm_invsqrt_ps (simde__m128 a) {
  4889. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
  4890. return _mm_invsqrt_ps(a);
  4891. #else
  4892. return simde_mm_rcp_ps(simde_mm_sqrt_ps(a));
  4893. #endif
  4894. }
  4895. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  4896. #undef _mm_invsqrt_ps
  4897. #define _mm_invsqrt_ps(a) simde_mm_invsqrt_ps(a)
  4898. #endif
  4899. SIMDE_FUNCTION_ATTRIBUTES
  4900. simde__m128d
  4901. simde_mm_invsqrt_pd (simde__m128d a) {
  4902. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
  4903. return _mm_invsqrt_pd(a);
  4904. #else
  4905. return simde_mm_div_pd(simde_mm_set1_pd(SIMDE_FLOAT64_C(1.0)), simde_mm_sqrt_pd(a));
  4906. #endif
  4907. }
  4908. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  4909. #undef _mm_invsqrt_pd
  4910. #define _mm_invsqrt_pd(a) simde_mm_invsqrt_pd(a)
  4911. #endif
  4912. SIMDE_FUNCTION_ATTRIBUTES
  4913. simde__m256
  4914. simde_mm256_invsqrt_ps (simde__m256 a) {
  4915. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
  4916. return _mm256_invsqrt_ps(a);
  4917. #else
  4918. return simde_mm256_rcp_ps(simde_mm256_sqrt_ps(a));
  4919. #endif
  4920. }
  4921. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  4922. #undef _mm256_invsqrt_ps
  4923. #define _mm256_invsqrt_ps(a) simde_mm256_invsqrt_ps(a)
  4924. #endif
  4925. SIMDE_FUNCTION_ATTRIBUTES
  4926. simde__m256d
  4927. simde_mm256_invsqrt_pd (simde__m256d a) {
  4928. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
  4929. return _mm256_invsqrt_pd(a);
  4930. #else
  4931. return simde_mm256_div_pd(simde_mm256_set1_pd(SIMDE_FLOAT64_C(1.0)), simde_mm256_sqrt_pd(a));
  4932. #endif
  4933. }
  4934. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  4935. #undef _mm256_invsqrt_pd
  4936. #define _mm256_invsqrt_pd(a) simde_mm256_invsqrt_pd(a)
  4937. #endif
  4938. SIMDE_FUNCTION_ATTRIBUTES
  4939. simde__m512
  4940. simde_mm512_invsqrt_ps (simde__m512 a) {
  4941. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  4942. return _mm512_invsqrt_ps(a);
  4943. #else
  4944. return simde_mm512_div_ps(simde_mm512_set1_ps(SIMDE_FLOAT32_C(1.0)), simde_mm512_sqrt_ps(a));
  4945. #endif
  4946. }
  4947. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  4948. #undef _mm512_invsqrt_ps
  4949. #define _mm512_invsqrt_ps(a) simde_mm512_invsqrt_ps(a)
  4950. #endif
  4951. SIMDE_FUNCTION_ATTRIBUTES
  4952. simde__m512d
  4953. simde_mm512_invsqrt_pd (simde__m512d a) {
  4954. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  4955. return _mm512_invsqrt_pd(a);
  4956. #else
  4957. return simde_mm512_div_pd(simde_mm512_set1_pd(SIMDE_FLOAT64_C(1.0)), simde_mm512_sqrt_pd(a));
  4958. #endif
  4959. }
  4960. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  4961. #undef _mm512_invsqrt_pd
  4962. #define _mm512_invsqrt_pd(a) simde_mm512_invsqrt_pd(a)
  4963. #endif
  4964. SIMDE_FUNCTION_ATTRIBUTES
  4965. simde__m512
  4966. simde_mm512_mask_invsqrt_ps(simde__m512 src, simde__mmask16 k, simde__m512 a) {
  4967. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  4968. return _mm512_mask_invsqrt_ps(src, k, a);
  4969. #else
  4970. return simde_mm512_mask_mov_ps(src, k, simde_mm512_invsqrt_ps(a));
  4971. #endif
  4972. }
  4973. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  4974. #undef _mm512_mask_invsqrt_ps
  4975. #define _mm512_mask_invsqrt_ps(src, k, a) simde_mm512_mask_invsqrt_ps(src, k, a)
  4976. #endif
  4977. SIMDE_FUNCTION_ATTRIBUTES
  4978. simde__m512d
  4979. simde_mm512_mask_invsqrt_pd(simde__m512d src, simde__mmask8 k, simde__m512d a) {
  4980. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  4981. return _mm512_mask_invsqrt_pd(src, k, a);
  4982. #else
  4983. return simde_mm512_mask_mov_pd(src, k, simde_mm512_invsqrt_pd(a));
  4984. #endif
  4985. }
  4986. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  4987. #undef _mm512_mask_invsqrt_pd
  4988. #define _mm512_mask_invsqrt_pd(src, k, a) simde_mm512_mask_invsqrt_pd(src, k, a)
  4989. #endif
  4990. SIMDE_FUNCTION_ATTRIBUTES
  4991. simde__m128
  4992. simde_mm_log_ps (simde__m128 a) {
  4993. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
  4994. return _mm_log_ps(a);
  4995. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
  4996. #if SIMDE_ACCURACY_PREFERENCE > 1
  4997. return Sleef_logf4_u10(a);
  4998. #else
  4999. return Sleef_logf4_u35(a);
  5000. #endif
  5001. #else
  5002. simde__m128_private
  5003. r_,
  5004. a_ = simde__m128_to_private(a);
  5005. SIMDE_VECTORIZE
  5006. for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
  5007. r_.f32[i] = simde_math_logf(a_.f32[i]);
  5008. }
  5009. return simde__m128_from_private(r_);
  5010. #endif
  5011. }
  5012. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  5013. #undef _mm_log_ps
  5014. #define _mm_log_ps(a) simde_mm_log_ps(a)
  5015. #endif
  5016. SIMDE_FUNCTION_ATTRIBUTES
  5017. simde__m128d
  5018. simde_mm_log_pd (simde__m128d a) {
  5019. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
  5020. return _mm_log_pd(a);
  5021. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
  5022. #if SIMDE_ACCURACY_PREFERENCE > 1
  5023. return Sleef_logd2_u10(a);
  5024. #else
  5025. return Sleef_logd2_u35(a);
  5026. #endif
  5027. #else
  5028. simde__m128d_private
  5029. r_,
  5030. a_ = simde__m128d_to_private(a);
  5031. SIMDE_VECTORIZE
  5032. for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
  5033. r_.f64[i] = simde_math_log(a_.f64[i]);
  5034. }
  5035. return simde__m128d_from_private(r_);
  5036. #endif
  5037. }
  5038. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  5039. #undef _mm_log_pd
  5040. #define _mm_log_pd(a) simde_mm_log_pd(a)
  5041. #endif
  5042. SIMDE_FUNCTION_ATTRIBUTES
  5043. simde__m256
  5044. simde_mm256_log_ps (simde__m256 a) {
  5045. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
  5046. return _mm256_log_ps(a);
  5047. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
  5048. #if SIMDE_ACCURACY_PREFERENCE > 1
  5049. return Sleef_logf8_u10(a);
  5050. #else
  5051. return Sleef_logf8_u35(a);
  5052. #endif
  5053. #else
  5054. simde__m256_private
  5055. r_,
  5056. a_ = simde__m256_to_private(a);
  5057. #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
  5058. for (size_t i = 0 ; i < (sizeof(r_.m128) / sizeof(r_.m128[0])) ; i++) {
  5059. r_.m128[i] = simde_mm_log_ps(a_.m128[i]);
  5060. }
  5061. #else
  5062. SIMDE_VECTORIZE
  5063. for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
  5064. r_.f32[i] = simde_math_logf(a_.f32[i]);
  5065. }
  5066. #endif
  5067. return simde__m256_from_private(r_);
  5068. #endif
  5069. }
  5070. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  5071. #undef _mm256_log_ps
  5072. #define _mm256_log_ps(a) simde_mm256_log_ps(a)
  5073. #endif
  5074. SIMDE_FUNCTION_ATTRIBUTES
  5075. simde__m256d
  5076. simde_mm256_log_pd (simde__m256d a) {
  5077. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
  5078. return _mm256_log_pd(a);
  5079. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
  5080. #if SIMDE_ACCURACY_PREFERENCE > 1
  5081. return Sleef_logd4_u10(a);
  5082. #else
  5083. return Sleef_logd4_u35(a);
  5084. #endif
  5085. #else
  5086. simde__m256d_private
  5087. r_,
  5088. a_ = simde__m256d_to_private(a);
  5089. #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
  5090. for (size_t i = 0 ; i < (sizeof(r_.m128d) / sizeof(r_.m128d[0])) ; i++) {
  5091. r_.m128d[i] = simde_mm_log_pd(a_.m128d[i]);
  5092. }
  5093. #else
  5094. SIMDE_VECTORIZE
  5095. for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
  5096. r_.f64[i] = simde_math_log(a_.f64[i]);
  5097. }
  5098. #endif
  5099. return simde__m256d_from_private(r_);
  5100. #endif
  5101. }
  5102. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  5103. #undef _mm256_log_pd
  5104. #define _mm256_log_pd(a) simde_mm256_log_pd(a)
  5105. #endif
  5106. SIMDE_FUNCTION_ATTRIBUTES
  5107. simde__m512
  5108. simde_mm512_log_ps (simde__m512 a) {
  5109. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  5110. return _mm512_log_ps(a);
  5111. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
  5112. #if SIMDE_ACCURACY_PREFERENCE > 1
  5113. return Sleef_logf16_u10(a);
  5114. #else
  5115. return Sleef_logf16_u35(a);
  5116. #endif
  5117. #else
  5118. simde__m512_private
  5119. r_,
  5120. a_ = simde__m512_to_private(a);
  5121. #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
  5122. for (size_t i = 0 ; i < (sizeof(r_.m256) / sizeof(r_.m256[0])) ; i++) {
  5123. r_.m256[i] = simde_mm256_log_ps(a_.m256[i]);
  5124. }
  5125. #else
  5126. SIMDE_VECTORIZE
  5127. for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
  5128. r_.f32[i] = simde_math_logf(a_.f32[i]);
  5129. }
  5130. #endif
  5131. return simde__m512_from_private(r_);
  5132. #endif
  5133. }
  5134. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  5135. #undef _mm512_log_ps
  5136. #define _mm512_log_ps(a) simde_mm512_log_ps(a)
  5137. #endif
  5138. SIMDE_FUNCTION_ATTRIBUTES
  5139. simde__m512d
  5140. simde_mm512_log_pd (simde__m512d a) {
  5141. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  5142. return _mm512_log_pd(a);
  5143. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
  5144. #if SIMDE_ACCURACY_PREFERENCE > 1
  5145. return Sleef_logd8_u10(a);
  5146. #else
  5147. return Sleef_logd8_u35(a);
  5148. #endif
  5149. #else
  5150. simde__m512d_private
  5151. r_,
  5152. a_ = simde__m512d_to_private(a);
  5153. #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
  5154. for (size_t i = 0 ; i < (sizeof(r_.m256d) / sizeof(r_.m256d[0])) ; i++) {
  5155. r_.m256d[i] = simde_mm256_log_pd(a_.m256d[i]);
  5156. }
  5157. #else
  5158. SIMDE_VECTORIZE
  5159. for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
  5160. r_.f64[i] = simde_math_log(a_.f64[i]);
  5161. }
  5162. #endif
  5163. return simde__m512d_from_private(r_);
  5164. #endif
  5165. }
  5166. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  5167. #undef _mm512_log_pd
  5168. #define _mm512_log_pd(a) simde_mm512_log_pd(a)
  5169. #endif
  5170. SIMDE_FUNCTION_ATTRIBUTES
  5171. simde__m512
  5172. simde_mm512_mask_log_ps(simde__m512 src, simde__mmask16 k, simde__m512 a) {
  5173. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  5174. return _mm512_mask_log_ps(src, k, a);
  5175. #else
  5176. return simde_mm512_mask_mov_ps(src, k, simde_mm512_log_ps(a));
  5177. #endif
  5178. }
  5179. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  5180. #undef _mm512_mask_log_ps
  5181. #define _mm512_mask_log_ps(src, k, a) simde_mm512_mask_log_ps(src, k, a)
  5182. #endif
  5183. SIMDE_FUNCTION_ATTRIBUTES
  5184. simde__m512d
  5185. simde_mm512_mask_log_pd(simde__m512d src, simde__mmask8 k, simde__m512d a) {
  5186. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  5187. return _mm512_mask_log_pd(src, k, a);
  5188. #else
  5189. return simde_mm512_mask_mov_pd(src, k, simde_mm512_log_pd(a));
  5190. #endif
  5191. }
  5192. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  5193. #undef _mm512_mask_log_pd
  5194. #define _mm512_mask_log_pd(src, k, a) simde_mm512_mask_log_pd(src, k, a)
  5195. #endif
  5196. SIMDE_FUNCTION_ATTRIBUTES
  5197. simde__m128
  5198. simde_mm_cdfnorminv_ps (simde__m128 a) {
  5199. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
  5200. return _mm_cdfnorminv_ps(a);
  5201. #elif SIMDE_NATURAL_VECTOR_SIZE_GE(128)
  5202. simde__m128 matched, retval = simde_mm_setzero_ps();
  5203. { /* if (a < 0 || a > 1) */
  5204. matched = simde_mm_or_ps(simde_mm_cmplt_ps(a, simde_mm_set1_ps(SIMDE_FLOAT32_C(0.0))), simde_mm_cmpgt_ps(a, simde_mm_set1_ps(SIMDE_FLOAT32_C(1.0))));
  5205. /* We don't actually need to do anything here since we initialize
  5206. * retval to 0.0. */
  5207. }
  5208. { /* else if (a == 0) */
  5209. simde__m128 mask = simde_mm_cmpeq_ps(a, simde_mm_set1_ps(SIMDE_FLOAT32_C(0.0)));
  5210. mask = simde_mm_andnot_ps(matched, mask);
  5211. matched = simde_mm_or_ps(matched, mask);
  5212. simde__m128 res = simde_mm_set1_ps(-SIMDE_MATH_INFINITYF);
  5213. retval = simde_mm_or_ps(retval, simde_mm_and_ps(mask, res));
  5214. }
  5215. { /* else if (a == 1) */
  5216. simde__m128 mask = simde_mm_cmpeq_ps(a, simde_mm_set1_ps(SIMDE_FLOAT32_C(1.0)));
  5217. mask = simde_mm_andnot_ps(matched, mask);
  5218. matched = simde_mm_or_ps(matched, mask);
  5219. simde__m128 res = simde_mm_set1_ps(SIMDE_MATH_INFINITYF);
  5220. retval = simde_mm_or_ps(retval, simde_mm_and_ps(mask, res));
  5221. }
  5222. { /* Remaining conditions.
  5223. *
  5224. * Including the else case in this complicates things a lot, but
  5225. * we're using cheap operations to get rid of expensive multiply
  5226. * and add functions. This should be a small improvement on SSE
  5227. * prior to 4.1. On SSE 4.1 we can use _mm_blendv_ps which is
  5228. * very fast and this becomes a huge win. NEON, AltiVec, and
  5229. * WASM also have blend operations, so this should be a big win
  5230. * there, too. */
  5231. /* else if (a < 0.02425) */
  5232. simde__m128 mask_lo = simde_mm_cmplt_ps(a, simde_mm_set1_ps(SIMDE_FLOAT32_C(0.02425)));
  5233. /* else if (a > 0.97575) */
  5234. simde__m128 mask_hi = simde_mm_cmpgt_ps(a, simde_mm_set1_ps(SIMDE_FLOAT32_C(0.97575)));
  5235. simde__m128 mask = simde_mm_or_ps(mask_lo, mask_hi);
  5236. matched = simde_mm_or_ps(matched, mask);
  5237. /* else */
  5238. simde__m128 mask_el = simde_x_mm_not_ps(matched);
  5239. mask = simde_mm_or_ps(mask, mask_el);
  5240. /* r = a - 0.5f */
  5241. simde__m128 r = simde_mm_sub_ps(a, simde_mm_set1_ps(SIMDE_FLOAT32_C(0.5)));
  5242. /* lo: q = a
  5243. * hi: q = (1.0 - a) */
  5244. simde__m128 q = simde_mm_and_ps(mask_lo, a);
  5245. q = simde_mm_or_ps(q, simde_mm_and_ps(mask_hi, simde_mm_sub_ps(simde_mm_set1_ps(1.0f), a)));
  5246. /* q = simde_math_sqrtf(-2.0f * simde_math_logf(q)) */
  5247. q = simde_mm_log_ps(q);
  5248. q = simde_mm_mul_ps(q, simde_mm_set1_ps(SIMDE_FLOAT32_C(-2.0)));
  5249. q = simde_mm_sqrt_ps(q);
  5250. /* el: q = r * r */
  5251. q = simde_x_mm_select_ps(q, simde_mm_mul_ps(r, r), mask_el);
  5252. /* lo: float numerator = ((((((c_c[0] * q + c_c[1]) * q + c_c[2]) * q + c_c[3]) * q + c_c[4]) * q + c_c[5]) * 1.0f); */
  5253. /* hi: float numerator = ((((((c_c[0] * q + c_c[1]) * q + c_c[2]) * q + c_c[3]) * q + c_c[4]) * q + c_c[5]) * -1.0f); */
  5254. /* el: float numerator = ((((((c_a[0] * q + c_a[1]) * q + c_a[2]) * q + c_a[3]) * q + c_a[4]) * q + c_a[5]) * r); */
  5255. simde__m128 numerator = simde_x_mm_select_ps(simde_mm_set1_ps(SIMDE_FLOAT32_C(-7.784894002430293e-03)), simde_mm_set1_ps(SIMDE_FLOAT32_C(-3.969683028665376e+01)), mask_el);
  5256. numerator = simde_mm_fmadd_ps(numerator, q, simde_x_mm_select_ps(simde_mm_set1_ps(SIMDE_FLOAT32_C(-3.223964580411365e-01)), simde_mm_set1_ps(SIMDE_FLOAT32_C( 2.209460984245205e+02)), mask_el));
  5257. numerator = simde_mm_fmadd_ps(numerator, q, simde_x_mm_select_ps(simde_mm_set1_ps(SIMDE_FLOAT32_C(-2.400758277161838e+00)), simde_mm_set1_ps(SIMDE_FLOAT32_C(-2.759285104469687e+02)), mask_el));
  5258. numerator = simde_mm_fmadd_ps(numerator, q, simde_x_mm_select_ps(simde_mm_set1_ps(SIMDE_FLOAT32_C(-2.549732539343734e+00)), simde_mm_set1_ps(SIMDE_FLOAT32_C( 1.383577518672690e+02)), mask_el));
  5259. numerator = simde_mm_fmadd_ps(numerator, q, simde_x_mm_select_ps(simde_mm_set1_ps(SIMDE_FLOAT32_C( 4.374664141464968e+00)), simde_mm_set1_ps(SIMDE_FLOAT32_C(-3.066479806614716e+01)), mask_el));
  5260. numerator = simde_mm_fmadd_ps(numerator, q, simde_x_mm_select_ps(simde_mm_set1_ps(SIMDE_FLOAT32_C( 2.938163982698783e+00)), simde_mm_set1_ps(SIMDE_FLOAT32_C( 2.506628277459239e+00)), mask_el));
  5261. {
  5262. simde__m128 multiplier;
  5263. multiplier = simde_mm_and_ps(mask_lo, simde_mm_set1_ps(SIMDE_FLOAT32_C( 1.0)));
  5264. multiplier = simde_mm_or_ps(multiplier, simde_mm_and_ps(mask_hi, simde_mm_set1_ps(SIMDE_FLOAT32_C(-1.0))));
  5265. multiplier = simde_mm_or_ps(multiplier, simde_mm_and_ps(mask_el, r));
  5266. numerator = simde_mm_mul_ps(numerator, multiplier);
  5267. }
  5268. /* lo/hi: float denominator = (((((c_d[0] * q + c_d[1]) * q + c_d[2]) * q + c_d[3]) * 1 + 0.0f) * q + 1); */
  5269. /* el: float denominator = (((((c_b[0] * q + c_b[1]) * q + c_b[2]) * q + c_b[3]) * q + c_b[4]) * q + 1); */
  5270. simde__m128 denominator = simde_x_mm_select_ps(simde_mm_set1_ps(SIMDE_FLOAT32_C( 7.784695709041462e-03)), simde_mm_set1_ps(SIMDE_FLOAT32_C(-5.447609879822406e+01)), mask_el);
  5271. denominator = simde_mm_fmadd_ps(denominator, q, simde_x_mm_select_ps(simde_mm_set1_ps(SIMDE_FLOAT32_C( 3.224671290700398e-01)), simde_mm_set1_ps(SIMDE_FLOAT32_C( 1.615858368580409e+02)), mask_el));
  5272. denominator = simde_mm_fmadd_ps(denominator, q, simde_x_mm_select_ps(simde_mm_set1_ps(SIMDE_FLOAT32_C( 2.445134137142996e+00)), simde_mm_set1_ps(SIMDE_FLOAT32_C(-1.556989798598866e+02)), mask_el));
  5273. denominator = simde_mm_fmadd_ps(denominator, q, simde_x_mm_select_ps(simde_mm_set1_ps(SIMDE_FLOAT32_C( 3.754408661907416e+00)), simde_mm_set1_ps(SIMDE_FLOAT32_C( 6.680131188771972e+01)), mask_el));
  5274. denominator = simde_mm_fmadd_ps(denominator, simde_x_mm_select_ps(simde_mm_set1_ps(SIMDE_FLOAT32_C( 1.0)), q, mask_el),
  5275. simde_x_mm_select_ps(simde_mm_set1_ps(SIMDE_FLOAT32_C( 0.0)), simde_mm_set1_ps(SIMDE_FLOAT32_C(-1.328068155288572e+01)), mask_el));
  5276. denominator = simde_mm_fmadd_ps(denominator, q, simde_mm_set1_ps(SIMDE_FLOAT32_C(1.0)));
  5277. /* res = numerator / denominator; */
  5278. simde__m128 res = simde_mm_div_ps(numerator, denominator);
  5279. retval = simde_mm_or_ps(retval, simde_mm_and_ps(mask, res));
  5280. }
  5281. return retval;
  5282. #else
  5283. simde__m128_private
  5284. r_,
  5285. a_ = simde__m128_to_private(a);
  5286. SIMDE_VECTORIZE
  5287. for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
  5288. r_.f32[i] = simde_math_cdfnorminvf(a_.f32[i]);
  5289. }
  5290. return simde__m128_from_private(r_);
  5291. #endif
  5292. }
  5293. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  5294. #undef _mm_cdfnorminv_ps
  5295. #define _mm_cdfnorminv_ps(a) simde_mm_cdfnorminv_ps(a)
  5296. #endif
  5297. SIMDE_FUNCTION_ATTRIBUTES
  5298. simde__m128d
  5299. simde_mm_cdfnorminv_pd (simde__m128d a) {
  5300. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
  5301. return _mm_cdfnorminv_pd(a);
  5302. #elif SIMDE_NATURAL_VECTOR_SIZE_GE(128)
  5303. simde__m128d matched, retval = simde_mm_setzero_pd();
  5304. { /* if (a < 0 || a > 1) */
  5305. matched = simde_mm_or_pd(simde_mm_cmplt_pd(a, simde_mm_set1_pd(SIMDE_FLOAT64_C(0.0))), simde_mm_cmpgt_pd(a, simde_mm_set1_pd(SIMDE_FLOAT64_C(1.0))));
  5306. /* We don't actually need to do anything here since we initialize
  5307. * retval to 0.0. */
  5308. }
  5309. { /* else if (a == 0) */
  5310. simde__m128d mask = simde_mm_cmpeq_pd(a, simde_mm_set1_pd(SIMDE_FLOAT64_C(0.0)));
  5311. mask = simde_mm_andnot_pd(matched, mask);
  5312. matched = simde_mm_or_pd(matched, mask);
  5313. simde__m128d res = simde_mm_set1_pd(-SIMDE_MATH_INFINITY);
  5314. retval = simde_mm_or_pd(retval, simde_mm_and_pd(mask, res));
  5315. }
  5316. { /* else if (a == 1) */
  5317. simde__m128d mask = simde_mm_cmpeq_pd(a, simde_mm_set1_pd(SIMDE_FLOAT64_C(1.0)));
  5318. mask = simde_mm_andnot_pd(matched, mask);
  5319. matched = simde_mm_or_pd(matched, mask);
  5320. simde__m128d res = simde_mm_set1_pd(SIMDE_MATH_INFINITY);
  5321. retval = simde_mm_or_pd(retval, simde_mm_and_pd(mask, res));
  5322. }
  5323. { /* Remaining conditions.
  5324. *
  5325. * Including the else case in this complicates things a lot, but
  5326. * we're using cheap operations to get rid of expensive multiply
  5327. * and add functions. This should be a small improvement on SSE
  5328. * prior to 4.1. On SSE 4.1 we can use _mm_blendv_pd which is
  5329. * very fast and this becomes a huge win. NEON, AltiVec, and
  5330. * WASM also have blend operations, so this should be a big win
  5331. * there, too. */
  5332. /* else if (a < 0.02425) */
  5333. simde__m128d mask_lo = simde_mm_cmplt_pd(a, simde_mm_set1_pd(SIMDE_FLOAT64_C(0.02425)));
  5334. /* else if (a > 0.97575) */
  5335. simde__m128d mask_hi = simde_mm_cmpgt_pd(a, simde_mm_set1_pd(SIMDE_FLOAT64_C(0.97575)));
  5336. simde__m128d mask = simde_mm_or_pd(mask_lo, mask_hi);
  5337. matched = simde_mm_or_pd(matched, mask);
  5338. /* else */
  5339. simde__m128d mask_el = simde_x_mm_not_pd(matched);
  5340. mask = simde_mm_or_pd(mask, mask_el);
  5341. /* r = a - 0.5 */
  5342. simde__m128d r = simde_mm_sub_pd(a, simde_mm_set1_pd(SIMDE_FLOAT64_C(0.5)));
  5343. /* lo: q = a
  5344. * hi: q = (1.0 - a) */
  5345. simde__m128d q = simde_mm_and_pd(mask_lo, a);
  5346. q = simde_mm_or_pd(q, simde_mm_and_pd(mask_hi, simde_mm_sub_pd(simde_mm_set1_pd(1.0), a)));
  5347. /* q = simde_math_sqrt(-2.0 * simde_math_log(q)) */
  5348. q = simde_mm_log_pd(q);
  5349. q = simde_mm_mul_pd(q, simde_mm_set1_pd(SIMDE_FLOAT64_C(-2.0)));
  5350. q = simde_mm_sqrt_pd(q);
  5351. /* el: q = r * r */
  5352. q = simde_x_mm_select_pd(q, simde_mm_mul_pd(r, r), mask_el);
  5353. /* lo: double numerator = ((((((c_c[0] * q + c_c[1]) * q + c_c[2]) * q + c_c[3]) * q + c_c[4]) * q + c_c[5]) * 1.0); */
  5354. /* hi: double numerator = ((((((c_c[0] * q + c_c[1]) * q + c_c[2]) * q + c_c[3]) * q + c_c[4]) * q + c_c[5]) * -1.0); */
  5355. /* el: double numerator = ((((((c_a[0] * q + c_a[1]) * q + c_a[2]) * q + c_a[3]) * q + c_a[4]) * q + c_a[5]) * r); */
  5356. simde__m128d numerator = simde_x_mm_select_pd(simde_mm_set1_pd(SIMDE_FLOAT64_C(-7.784894002430293e-03)), simde_mm_set1_pd(SIMDE_FLOAT64_C(-3.969683028665376e+01)), mask_el);
  5357. numerator = simde_mm_fmadd_pd(numerator, q, simde_x_mm_select_pd(simde_mm_set1_pd(SIMDE_FLOAT64_C(-3.223964580411365e-01)), simde_mm_set1_pd(SIMDE_FLOAT64_C( 2.209460984245205e+02)), mask_el));
  5358. numerator = simde_mm_fmadd_pd(numerator, q, simde_x_mm_select_pd(simde_mm_set1_pd(SIMDE_FLOAT64_C(-2.400758277161838e+00)), simde_mm_set1_pd(SIMDE_FLOAT64_C(-2.759285104469687e+02)), mask_el));
  5359. numerator = simde_mm_fmadd_pd(numerator, q, simde_x_mm_select_pd(simde_mm_set1_pd(SIMDE_FLOAT64_C(-2.549732539343734e+00)), simde_mm_set1_pd(SIMDE_FLOAT64_C( 1.383577518672690e+02)), mask_el));
  5360. numerator = simde_mm_fmadd_pd(numerator, q, simde_x_mm_select_pd(simde_mm_set1_pd(SIMDE_FLOAT64_C( 4.374664141464968e+00)), simde_mm_set1_pd(SIMDE_FLOAT64_C(-3.066479806614716e+01)), mask_el));
  5361. numerator = simde_mm_fmadd_pd(numerator, q, simde_x_mm_select_pd(simde_mm_set1_pd(SIMDE_FLOAT64_C( 2.938163982698783e+00)), simde_mm_set1_pd(SIMDE_FLOAT64_C( 2.506628277459239e+00)), mask_el));
  5362. {
  5363. simde__m128d multiplier;
  5364. multiplier = simde_mm_and_pd(mask_lo, simde_mm_set1_pd(SIMDE_FLOAT64_C( 1.0)));
  5365. multiplier = simde_mm_or_pd(multiplier, simde_mm_and_pd(mask_hi, simde_mm_set1_pd(SIMDE_FLOAT64_C(-1.0))));
  5366. multiplier = simde_mm_or_pd(multiplier, simde_mm_and_pd(mask_el, r));
  5367. numerator = simde_mm_mul_pd(numerator, multiplier);
  5368. }
  5369. /* lo/hi: double denominator = (((((c_d[0] * q + c_d[1]) * q + c_d[2]) * q + c_d[3]) * 1 + 0.0f) * q + 1); */
  5370. /* el: double denominator = (((((c_b[0] * q + c_b[1]) * q + c_b[2]) * q + c_b[3]) * q + c_b[4]) * q + 1); */
  5371. simde__m128d denominator = simde_x_mm_select_pd(simde_mm_set1_pd(SIMDE_FLOAT64_C( 7.784695709041462e-03)), simde_mm_set1_pd(SIMDE_FLOAT64_C(-5.447609879822406e+01)), mask_el);
  5372. denominator = simde_mm_fmadd_pd(denominator, q, simde_x_mm_select_pd(simde_mm_set1_pd(SIMDE_FLOAT64_C( 3.224671290700398e-01)), simde_mm_set1_pd(SIMDE_FLOAT64_C( 1.615858368580409e+02)), mask_el));
  5373. denominator = simde_mm_fmadd_pd(denominator, q, simde_x_mm_select_pd(simde_mm_set1_pd(SIMDE_FLOAT64_C( 2.445134137142996e+00)), simde_mm_set1_pd(SIMDE_FLOAT64_C(-1.556989798598866e+02)), mask_el));
  5374. denominator = simde_mm_fmadd_pd(denominator, q, simde_x_mm_select_pd(simde_mm_set1_pd(SIMDE_FLOAT64_C( 3.754408661907416e+00)), simde_mm_set1_pd(SIMDE_FLOAT64_C( 6.680131188771972e+01)), mask_el));
  5375. denominator = simde_mm_fmadd_pd(denominator, simde_x_mm_select_pd(simde_mm_set1_pd(SIMDE_FLOAT64_C( 1.0)), q, mask_el),
  5376. simde_x_mm_select_pd(simde_mm_set1_pd(SIMDE_FLOAT64_C( 0.0)), simde_mm_set1_pd(SIMDE_FLOAT64_C(-1.328068155288572e+01)), mask_el));
  5377. denominator = simde_mm_fmadd_pd(denominator, q, simde_mm_set1_pd(SIMDE_FLOAT64_C(1.0)));
  5378. /* res = numerator / denominator; */
  5379. simde__m128d res = simde_mm_div_pd(numerator, denominator);
  5380. retval = simde_mm_or_pd(retval, simde_mm_and_pd(mask, res));
  5381. }
  5382. return retval;
  5383. #else
  5384. simde__m128d_private
  5385. r_,
  5386. a_ = simde__m128d_to_private(a);
  5387. SIMDE_VECTORIZE
  5388. for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
  5389. r_.f64[i] = simde_math_cdfnorminv(a_.f64[i]);
  5390. }
  5391. return simde__m128d_from_private(r_);
  5392. #endif
  5393. }
  5394. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  5395. #undef _mm_cdfnorminv_pd
  5396. #define _mm_cdfnorminv_pd(a) simde_mm_cdfnorminv_pd(a)
  5397. #endif
  5398. SIMDE_FUNCTION_ATTRIBUTES
  5399. simde__m256
  5400. simde_mm256_cdfnorminv_ps (simde__m256 a) {
  5401. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
  5402. return _mm256_cdfnorminv_ps(a);
  5403. #elif SIMDE_NATURAL_VECTOR_SIZE_GE(256)
  5404. simde__m256 matched, retval = simde_mm256_setzero_ps();
  5405. { /* if (a < 0 || a > 1) */
  5406. matched = simde_mm256_or_ps(simde_mm256_cmp_ps(a, simde_mm256_set1_ps(SIMDE_FLOAT32_C(0.0)), SIMDE_CMP_LT_OQ), simde_mm256_cmp_ps(a, simde_mm256_set1_ps(SIMDE_FLOAT32_C(1.0)), SIMDE_CMP_GT_OQ));
  5407. /* We don't actually need to do anything here since we initialize
  5408. * retval to 0.0. */
  5409. }
  5410. { /* else if (a == 0) */
  5411. simde__m256 mask = simde_mm256_cmp_ps(a, simde_mm256_set1_ps(SIMDE_FLOAT32_C(0.0)), SIMDE_CMP_EQ_OQ);
  5412. mask = simde_mm256_andnot_ps(matched, mask);
  5413. matched = simde_mm256_or_ps(matched, mask);
  5414. simde__m256 res = simde_mm256_set1_ps(-SIMDE_MATH_INFINITYF);
  5415. retval = simde_mm256_or_ps(retval, simde_mm256_and_ps(mask, res));
  5416. }
  5417. { /* else if (a == 1) */
  5418. simde__m256 mask = simde_mm256_cmp_ps(a, simde_mm256_set1_ps(SIMDE_FLOAT32_C(1.0)), SIMDE_CMP_EQ_OQ);
  5419. mask = simde_mm256_andnot_ps(matched, mask);
  5420. matched = simde_mm256_or_ps(matched, mask);
  5421. simde__m256 res = simde_mm256_set1_ps(SIMDE_MATH_INFINITYF);
  5422. retval = simde_mm256_or_ps(retval, simde_mm256_and_ps(mask, res));
  5423. }
  5424. { /* Remaining conditions.
  5425. *
  5426. * Including the else case in this complicates things a lot, but
  5427. * we're using cheap operations to get rid of expensive multiply
  5428. * and add functions. This should be a small improvement on SSE
  5429. * prior to 4.1. On SSE 4.1 we can use _mm256_blendv_ps which is
  5430. * very fast and this becomes a huge win. NEON, AltiVec, and
  5431. * WASM also have blend operations, so this should be a big win
  5432. * there, too. */
  5433. /* else if (a < 0.02425) */
  5434. simde__m256 mask_lo = simde_mm256_cmp_ps(a, simde_mm256_set1_ps(SIMDE_FLOAT32_C(0.02425)), SIMDE_CMP_LT_OQ);
  5435. /* else if (a > 0.97575) */
  5436. simde__m256 mask_hi = simde_mm256_cmp_ps(a, simde_mm256_set1_ps(SIMDE_FLOAT32_C(0.97575)), SIMDE_CMP_GT_OQ);
  5437. simde__m256 mask = simde_mm256_or_ps(mask_lo, mask_hi);
  5438. matched = simde_mm256_or_ps(matched, mask);
  5439. /* else */
  5440. simde__m256 mask_el = simde_x_mm256_not_ps(matched);
  5441. mask = simde_mm256_or_ps(mask, mask_el);
  5442. /* r = a - 0.5f */
  5443. simde__m256 r = simde_mm256_sub_ps(a, simde_mm256_set1_ps(SIMDE_FLOAT32_C(0.5)));
  5444. /* lo: q = a
  5445. * hi: q = (1.0 - a) */
  5446. simde__m256 q = simde_mm256_and_ps(mask_lo, a);
  5447. q = simde_mm256_or_ps(q, simde_mm256_and_ps(mask_hi, simde_mm256_sub_ps(simde_mm256_set1_ps(1.0f), a)));
  5448. /* q = simde_math_sqrtf(-2.0f * simde_math_logf(q)) */
  5449. q = simde_mm256_log_ps(q);
  5450. q = simde_mm256_mul_ps(q, simde_mm256_set1_ps(SIMDE_FLOAT32_C(-2.0)));
  5451. q = simde_mm256_sqrt_ps(q);
  5452. /* el: q = r * r */
  5453. q = simde_x_mm256_select_ps(q, simde_mm256_mul_ps(r, r), mask_el);
  5454. /* lo: float numerator = ((((((c_c[0] * q + c_c[1]) * q + c_c[2]) * q + c_c[3]) * q + c_c[4]) * q + c_c[5]) * 1.0f); */
  5455. /* hi: float numerator = ((((((c_c[0] * q + c_c[1]) * q + c_c[2]) * q + c_c[3]) * q + c_c[4]) * q + c_c[5]) * -1.0f); */
  5456. /* el: float numerator = ((((((c_a[0] * q + c_a[1]) * q + c_a[2]) * q + c_a[3]) * q + c_a[4]) * q + c_a[5]) * r); */
  5457. simde__m256 numerator = simde_x_mm256_select_ps(simde_mm256_set1_ps(SIMDE_FLOAT32_C(-7.784894002430293e-03)), simde_mm256_set1_ps(SIMDE_FLOAT32_C(-3.969683028665376e+01)), mask_el);
  5458. numerator = simde_mm256_fmadd_ps(numerator, q, simde_x_mm256_select_ps(simde_mm256_set1_ps(SIMDE_FLOAT32_C(-3.223964580411365e-01)), simde_mm256_set1_ps(SIMDE_FLOAT32_C( 2.209460984245205e+02)), mask_el));
  5459. numerator = simde_mm256_fmadd_ps(numerator, q, simde_x_mm256_select_ps(simde_mm256_set1_ps(SIMDE_FLOAT32_C(-2.400758277161838e+00)), simde_mm256_set1_ps(SIMDE_FLOAT32_C(-2.759285104469687e+02)), mask_el));
  5460. numerator = simde_mm256_fmadd_ps(numerator, q, simde_x_mm256_select_ps(simde_mm256_set1_ps(SIMDE_FLOAT32_C(-2.549732539343734e+00)), simde_mm256_set1_ps(SIMDE_FLOAT32_C( 1.383577518672690e+02)), mask_el));
  5461. numerator = simde_mm256_fmadd_ps(numerator, q, simde_x_mm256_select_ps(simde_mm256_set1_ps(SIMDE_FLOAT32_C( 4.374664141464968e+00)), simde_mm256_set1_ps(SIMDE_FLOAT32_C(-3.066479806614716e+01)), mask_el));
  5462. numerator = simde_mm256_fmadd_ps(numerator, q, simde_x_mm256_select_ps(simde_mm256_set1_ps(SIMDE_FLOAT32_C( 2.938163982698783e+00)), simde_mm256_set1_ps(SIMDE_FLOAT32_C( 2.506628277459239e+00)), mask_el));
  5463. {
  5464. simde__m256 multiplier;
  5465. multiplier = simde_mm256_and_ps(mask_lo, simde_mm256_set1_ps(SIMDE_FLOAT32_C( 1.0)));
  5466. multiplier = simde_mm256_or_ps(multiplier, simde_mm256_and_ps(mask_hi, simde_mm256_set1_ps(SIMDE_FLOAT32_C(-1.0))));
  5467. multiplier = simde_mm256_or_ps(multiplier, simde_mm256_and_ps(mask_el, r));
  5468. numerator = simde_mm256_mul_ps(numerator, multiplier);
  5469. }
  5470. /* lo/hi: float denominator = (((((c_d[0] * q + c_d[1]) * q + c_d[2]) * q + c_d[3]) * 1 + 0.0f) * q + 1); */
  5471. /* el: float denominator = (((((c_b[0] * q + c_b[1]) * q + c_b[2]) * q + c_b[3]) * q + c_b[4]) * q + 1); */
  5472. simde__m256 denominator = simde_x_mm256_select_ps(simde_mm256_set1_ps(SIMDE_FLOAT32_C( 7.784695709041462e-03)), simde_mm256_set1_ps(SIMDE_FLOAT32_C(-5.447609879822406e+01)), mask_el);
  5473. denominator = simde_mm256_fmadd_ps(denominator, q, simde_x_mm256_select_ps(simde_mm256_set1_ps(SIMDE_FLOAT32_C( 3.224671290700398e-01)), simde_mm256_set1_ps(SIMDE_FLOAT32_C( 1.615858368580409e+02)), mask_el));
  5474. denominator = simde_mm256_fmadd_ps(denominator, q, simde_x_mm256_select_ps(simde_mm256_set1_ps(SIMDE_FLOAT32_C( 2.445134137142996e+00)), simde_mm256_set1_ps(SIMDE_FLOAT32_C(-1.556989798598866e+02)), mask_el));
  5475. denominator = simde_mm256_fmadd_ps(denominator, q, simde_x_mm256_select_ps(simde_mm256_set1_ps(SIMDE_FLOAT32_C( 3.754408661907416e+00)), simde_mm256_set1_ps(SIMDE_FLOAT32_C( 6.680131188771972e+01)), mask_el));
  5476. denominator = simde_mm256_fmadd_ps(denominator, simde_x_mm256_select_ps(simde_mm256_set1_ps(SIMDE_FLOAT32_C( 1.0)), q, mask_el),
  5477. simde_x_mm256_select_ps(simde_mm256_set1_ps(SIMDE_FLOAT32_C( 0.0)), simde_mm256_set1_ps(SIMDE_FLOAT32_C(-1.328068155288572e+01)), mask_el));
  5478. denominator = simde_mm256_fmadd_ps(denominator, q, simde_mm256_set1_ps(SIMDE_FLOAT32_C(1.0)));
  5479. /* res = numerator / denominator; */
  5480. simde__m256 res = simde_mm256_div_ps(numerator, denominator);
  5481. retval = simde_mm256_or_ps(retval, simde_mm256_and_ps(mask, res));
  5482. }
  5483. return retval;
  5484. #else
  5485. simde__m256_private
  5486. r_,
  5487. a_ = simde__m256_to_private(a);
  5488. #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
  5489. for (size_t i = 0 ; i < (sizeof(r_.m128) / sizeof(r_.m128[0])) ; i++) {
  5490. r_.m128[i] = simde_mm_cdfnorminv_ps(a_.m128[i]);
  5491. }
  5492. #else
  5493. SIMDE_VECTORIZE
  5494. for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
  5495. r_.f32[i] = simde_math_cdfnorminvf(a_.f32[i]);
  5496. }
  5497. #endif
  5498. return simde__m256_from_private(r_);
  5499. #endif
  5500. }
  5501. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  5502. #undef _mm256_cdfnorminv_ps
  5503. #define _mm256_cdfnorminv_ps(a) simde_mm256_cdfnorminv_ps(a)
  5504. #endif
  5505. SIMDE_FUNCTION_ATTRIBUTES
  5506. simde__m256d
  5507. simde_mm256_cdfnorminv_pd (simde__m256d a) {
  5508. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
  5509. return _mm256_cdfnorminv_pd(a);
  5510. #elif SIMDE_NATURAL_VECTOR_SIZE_GE(256)
  5511. simde__m256d matched, retval = simde_mm256_setzero_pd();
  5512. { /* if (a < 0 || a > 1) */
  5513. matched = simde_mm256_or_pd(simde_mm256_cmp_pd(a, simde_mm256_set1_pd(SIMDE_FLOAT64_C(0.0)), SIMDE_CMP_LT_OQ), simde_mm256_cmp_pd(a, simde_mm256_set1_pd(SIMDE_FLOAT64_C(1.0)), SIMDE_CMP_GT_OQ));
  5514. /* We don't actually need to do anything here since we initialize
  5515. * retval to 0.0. */
  5516. }
  5517. { /* else if (a == 0) */
  5518. simde__m256d mask = simde_mm256_cmp_pd(a, simde_mm256_set1_pd(SIMDE_FLOAT64_C(0.0)), SIMDE_CMP_EQ_OQ);
  5519. mask = simde_mm256_andnot_pd(matched, mask);
  5520. matched = simde_mm256_or_pd(matched, mask);
  5521. simde__m256d res = simde_mm256_set1_pd(-SIMDE_MATH_INFINITY);
  5522. retval = simde_mm256_or_pd(retval, simde_mm256_and_pd(mask, res));
  5523. }
  5524. { /* else if (a == 1) */
  5525. simde__m256d mask = simde_mm256_cmp_pd(a, simde_mm256_set1_pd(SIMDE_FLOAT64_C(1.0)), SIMDE_CMP_EQ_OQ);
  5526. mask = simde_mm256_andnot_pd(matched, mask);
  5527. matched = simde_mm256_or_pd(matched, mask);
  5528. simde__m256d res = simde_mm256_set1_pd(SIMDE_MATH_INFINITY);
  5529. retval = simde_mm256_or_pd(retval, simde_mm256_and_pd(mask, res));
  5530. }
  5531. { /* Remaining conditions.
  5532. *
  5533. * Including the else case in this complicates things a lot, but
  5534. * we're using cheap operations to get rid of expensive multiply
  5535. * and add functions. This should be a small improvement on SSE
  5536. * prior to 4.1. On SSE 4.1 we can use _mm256_blendv_pd which is
  5537. * very fast and this becomes a huge win. NEON, AltiVec, and
  5538. * WASM also have blend operations, so this should be a big win
  5539. * there, too. */
  5540. /* else if (a < 0.02425) */
  5541. simde__m256d mask_lo = simde_mm256_cmp_pd(a, simde_mm256_set1_pd(SIMDE_FLOAT64_C(0.02425)), SIMDE_CMP_LT_OQ);
  5542. /* else if (a > 0.97575) */
  5543. simde__m256d mask_hi = simde_mm256_cmp_pd(a, simde_mm256_set1_pd(SIMDE_FLOAT64_C(0.97575)), SIMDE_CMP_GT_OQ);
  5544. simde__m256d mask = simde_mm256_or_pd(mask_lo, mask_hi);
  5545. matched = simde_mm256_or_pd(matched, mask);
  5546. /* else */
  5547. simde__m256d mask_el = simde_x_mm256_not_pd(matched);
  5548. mask = simde_mm256_or_pd(mask, mask_el);
  5549. /* r = a - 0.5 */
  5550. simde__m256d r = simde_mm256_sub_pd(a, simde_mm256_set1_pd(SIMDE_FLOAT64_C(0.5)));
  5551. /* lo: q = a
  5552. * hi: q = (1.0 - a) */
  5553. simde__m256d q = simde_mm256_and_pd(mask_lo, a);
  5554. q = simde_mm256_or_pd(q, simde_mm256_and_pd(mask_hi, simde_mm256_sub_pd(simde_mm256_set1_pd(1.0), a)));
  5555. /* q = simde_math_sqrt(-2.0 * simde_math_log(q)) */
  5556. q = simde_mm256_log_pd(q);
  5557. q = simde_mm256_mul_pd(q, simde_mm256_set1_pd(SIMDE_FLOAT64_C(-2.0)));
  5558. q = simde_mm256_sqrt_pd(q);
  5559. /* el: q = r * r */
  5560. q = simde_x_mm256_select_pd(q, simde_mm256_mul_pd(r, r), mask_el);
  5561. /* lo: double numerator = ((((((c_c[0] * q + c_c[1]) * q + c_c[2]) * q + c_c[3]) * q + c_c[4]) * q + c_c[5]) * 1.0); */
  5562. /* hi: double numerator = ((((((c_c[0] * q + c_c[1]) * q + c_c[2]) * q + c_c[3]) * q + c_c[4]) * q + c_c[5]) * -1.0); */
  5563. /* el: double numerator = ((((((c_a[0] * q + c_a[1]) * q + c_a[2]) * q + c_a[3]) * q + c_a[4]) * q + c_a[5]) * r); */
  5564. simde__m256d numerator = simde_x_mm256_select_pd(simde_mm256_set1_pd(SIMDE_FLOAT64_C(-7.784894002430293e-03)), simde_mm256_set1_pd(SIMDE_FLOAT64_C(-3.969683028665376e+01)), mask_el);
  5565. numerator = simde_mm256_fmadd_pd(numerator, q, simde_x_mm256_select_pd(simde_mm256_set1_pd(SIMDE_FLOAT64_C(-3.223964580411365e-01)), simde_mm256_set1_pd(SIMDE_FLOAT64_C( 2.209460984245205e+02)), mask_el));
  5566. numerator = simde_mm256_fmadd_pd(numerator, q, simde_x_mm256_select_pd(simde_mm256_set1_pd(SIMDE_FLOAT64_C(-2.400758277161838e+00)), simde_mm256_set1_pd(SIMDE_FLOAT64_C(-2.759285104469687e+02)), mask_el));
  5567. numerator = simde_mm256_fmadd_pd(numerator, q, simde_x_mm256_select_pd(simde_mm256_set1_pd(SIMDE_FLOAT64_C(-2.549732539343734e+00)), simde_mm256_set1_pd(SIMDE_FLOAT64_C( 1.383577518672690e+02)), mask_el));
  5568. numerator = simde_mm256_fmadd_pd(numerator, q, simde_x_mm256_select_pd(simde_mm256_set1_pd(SIMDE_FLOAT64_C( 4.374664141464968e+00)), simde_mm256_set1_pd(SIMDE_FLOAT64_C(-3.066479806614716e+01)), mask_el));
  5569. numerator = simde_mm256_fmadd_pd(numerator, q, simde_x_mm256_select_pd(simde_mm256_set1_pd(SIMDE_FLOAT64_C( 2.938163982698783e+00)), simde_mm256_set1_pd(SIMDE_FLOAT64_C( 2.506628277459239e+00)), mask_el));
  5570. {
  5571. simde__m256d multiplier;
  5572. multiplier = simde_mm256_and_pd(mask_lo, simde_mm256_set1_pd(SIMDE_FLOAT64_C( 1.0)));
  5573. multiplier = simde_mm256_or_pd(multiplier, simde_mm256_and_pd(mask_hi, simde_mm256_set1_pd(SIMDE_FLOAT64_C(-1.0))));
  5574. multiplier = simde_mm256_or_pd(multiplier, simde_mm256_and_pd(mask_el, r));
  5575. numerator = simde_mm256_mul_pd(numerator, multiplier);
  5576. }
  5577. /* lo/hi: double denominator = (((((c_d[0] * q + c_d[1]) * q + c_d[2]) * q + c_d[3]) * 1 + 0.0f) * q + 1); */
  5578. /* el: double denominator = (((((c_b[0] * q + c_b[1]) * q + c_b[2]) * q + c_b[3]) * q + c_b[4]) * q + 1); */
  5579. simde__m256d denominator = simde_x_mm256_select_pd(simde_mm256_set1_pd(SIMDE_FLOAT64_C( 7.784695709041462e-03)), simde_mm256_set1_pd(SIMDE_FLOAT64_C(-5.447609879822406e+01)), mask_el);
  5580. denominator = simde_mm256_fmadd_pd(denominator, q, simde_x_mm256_select_pd(simde_mm256_set1_pd(SIMDE_FLOAT64_C( 3.224671290700398e-01)), simde_mm256_set1_pd(SIMDE_FLOAT64_C( 1.615858368580409e+02)), mask_el));
  5581. denominator = simde_mm256_fmadd_pd(denominator, q, simde_x_mm256_select_pd(simde_mm256_set1_pd(SIMDE_FLOAT64_C( 2.445134137142996e+00)), simde_mm256_set1_pd(SIMDE_FLOAT64_C(-1.556989798598866e+02)), mask_el));
  5582. denominator = simde_mm256_fmadd_pd(denominator, q, simde_x_mm256_select_pd(simde_mm256_set1_pd(SIMDE_FLOAT64_C( 3.754408661907416e+00)), simde_mm256_set1_pd(SIMDE_FLOAT64_C( 6.680131188771972e+01)), mask_el));
  5583. denominator = simde_mm256_fmadd_pd(denominator, simde_x_mm256_select_pd(simde_mm256_set1_pd(SIMDE_FLOAT64_C( 1.0)), q, mask_el),
  5584. simde_x_mm256_select_pd(simde_mm256_set1_pd(SIMDE_FLOAT64_C( 0.0)), simde_mm256_set1_pd(SIMDE_FLOAT64_C(-1.328068155288572e+01)), mask_el));
  5585. denominator = simde_mm256_fmadd_pd(denominator, q, simde_mm256_set1_pd(SIMDE_FLOAT64_C(1.0)));
  5586. /* res = numerator / denominator; */
  5587. simde__m256d res = simde_mm256_div_pd(numerator, denominator);
  5588. retval = simde_mm256_or_pd(retval, simde_mm256_and_pd(mask, res));
  5589. }
  5590. return retval;
  5591. #else
  5592. simde__m256d_private
  5593. r_,
  5594. a_ = simde__m256d_to_private(a);
  5595. #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
  5596. for (size_t i = 0 ; i < (sizeof(r_.m128d) / sizeof(r_.m128d[0])) ; i++) {
  5597. r_.m128d[i] = simde_mm_cdfnorminv_pd(a_.m128d[i]);
  5598. }
  5599. #else
  5600. SIMDE_VECTORIZE
  5601. for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
  5602. r_.f64[i] = simde_math_cdfnorminv(a_.f64[i]);
  5603. }
  5604. #endif
  5605. return simde__m256d_from_private(r_);
  5606. #endif
  5607. }
  5608. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  5609. #undef _mm256_cdfnorminv_pd
  5610. #define _mm256_cdfnorminv_pd(a) simde_mm256_cdfnorminv_pd(a)
  5611. #endif
  5612. SIMDE_FUNCTION_ATTRIBUTES
  5613. simde__m512
  5614. simde_mm512_cdfnorminv_ps (simde__m512 a) {
  5615. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  5616. return _mm512_cdfnorminv_ps(a);
  5617. #elif SIMDE_NATURAL_VECTOR_SIZE_LE(256)
  5618. simde__m512_private
  5619. r_,
  5620. a_ = simde__m512_to_private(a);
  5621. for (size_t i = 0 ; i < (sizeof(r_.m256) / sizeof(r_.m256[0])) ; i++) {
  5622. r_.m256[i] = simde_mm256_cdfnorminv_ps(a_.m256[i]);
  5623. }
  5624. return simde__m512_from_private(r_);
  5625. #else
  5626. simde__m512 retval = simde_mm512_setzero_ps();
  5627. simde__mmask16 matched;
  5628. { /* if (a < 0 || a > 1) */
  5629. matched = simde_mm512_cmp_ps_mask(a, simde_mm512_set1_ps(SIMDE_FLOAT32_C(0.0)), SIMDE_CMP_LT_OQ);
  5630. matched |= simde_mm512_cmp_ps_mask(a, simde_mm512_set1_ps(SIMDE_FLOAT32_C(1.0)), SIMDE_CMP_GT_OQ);
  5631. /* We don't actually need to do anything here since we initialize
  5632. * retval to 0.0. */
  5633. }
  5634. { /* else if (a == 0) */
  5635. simde__mmask16 mask = simde_mm512_cmp_ps_mask(a, simde_mm512_set1_ps(SIMDE_FLOAT32_C(0.0)), SIMDE_CMP_EQ_OQ);
  5636. matched |= mask;
  5637. retval = simde_mm512_mask_mov_ps(retval, mask, simde_mm512_set1_ps(-SIMDE_MATH_INFINITYF));
  5638. }
  5639. { /* else if (a == 1) */
  5640. simde__mmask16 mask = simde_mm512_cmp_ps_mask(a, simde_mm512_set1_ps(SIMDE_FLOAT32_C(0.0)), SIMDE_CMP_EQ_OQ);
  5641. matched |= mask;
  5642. retval = simde_mm512_mask_mov_ps(retval, mask, simde_mm512_set1_ps(SIMDE_MATH_INFINITYF));
  5643. }
  5644. { /* else if (a < 0.02425) */
  5645. simde__mmask16 mask_lo = simde_mm512_cmp_ps_mask(a, simde_mm512_set1_ps(SIMDE_FLOAT32_C(0.02425)), SIMDE_CMP_LT_OQ);
  5646. /* else if (a > 0.97575) */
  5647. simde__mmask16 mask_hi = simde_mm512_cmp_ps_mask(a, simde_mm512_set1_ps(SIMDE_FLOAT32_C(0.97575)), SIMDE_CMP_GT_OQ);
  5648. simde__mmask16 mask = mask_lo | mask_hi;
  5649. matched = matched | mask;
  5650. /* else */
  5651. simde__mmask16 mask_el = ~matched;
  5652. /* r = a - 0.5f */
  5653. simde__m512 r = simde_mm512_sub_ps(a, simde_mm512_set1_ps(SIMDE_FLOAT32_C(0.5)));
  5654. /* lo: q = a
  5655. * hi: q = (1.0 - a) */
  5656. simde__m512 q = simde_mm512_maskz_mov_ps(mask_lo, a);
  5657. q = simde_mm512_mask_sub_ps(q, mask_hi, simde_mm512_set1_ps(SIMDE_FLOAT32_C(1.0)), a);
  5658. /* q = simde_math_sqrtf(-2.0f * simde_math_logf(q)) */
  5659. q = simde_mm512_log_ps(q);
  5660. q = simde_mm512_mul_ps(q, simde_mm512_set1_ps(SIMDE_FLOAT32_C(-2.0)));
  5661. q = simde_mm512_sqrt_ps(q);
  5662. /* el: q = r * r */
  5663. q = simde_mm512_mask_mul_ps(q, mask_el, r, r);
  5664. /* lo: float numerator = ((((((c_c[0] * q + c_c[1]) * q + c_c[2]) * q + c_c[3]) * q + c_c[4]) * q + c_c[5]) * 1.0f); */
  5665. /* hi: float numerator = ((((((c_c[0] * q + c_c[1]) * q + c_c[2]) * q + c_c[3]) * q + c_c[4]) * q + c_c[5]) * -1.0f); */
  5666. /* el: float numerator = ((((((c_a[0] * q + c_a[1]) * q + c_a[2]) * q + c_a[3]) * q + c_a[4]) * q + c_a[5]) * r); */
  5667. simde__m512 numerator = simde_mm512_mask_mov_ps(simde_mm512_set1_ps(SIMDE_FLOAT32_C(-7.784894002430293e-03)), mask_el, simde_mm512_set1_ps(SIMDE_FLOAT32_C(-3.969683028665376e+01)));
  5668. numerator = simde_mm512_fmadd_ps(numerator, q, simde_mm512_mask_mov_ps(simde_mm512_set1_ps(SIMDE_FLOAT32_C(-3.223964580411365e-01)), mask_el, simde_mm512_set1_ps(SIMDE_FLOAT32_C( 2.209460984245205e+02))));
  5669. numerator = simde_mm512_fmadd_ps(numerator, q, simde_mm512_mask_mov_ps(simde_mm512_set1_ps(SIMDE_FLOAT32_C(-2.400758277161838e+00)), mask_el, simde_mm512_set1_ps(SIMDE_FLOAT32_C(-2.759285104469687e+02))));
  5670. numerator = simde_mm512_fmadd_ps(numerator, q, simde_mm512_mask_mov_ps(simde_mm512_set1_ps(SIMDE_FLOAT32_C(-2.549732539343734e+00)), mask_el, simde_mm512_set1_ps(SIMDE_FLOAT32_C( 1.383577518672690e+02))));
  5671. numerator = simde_mm512_fmadd_ps(numerator, q, simde_mm512_mask_mov_ps(simde_mm512_set1_ps(SIMDE_FLOAT32_C( 4.374664141464968e+00)), mask_el, simde_mm512_set1_ps(SIMDE_FLOAT32_C(-3.066479806614716e+01))));
  5672. numerator = simde_mm512_fmadd_ps(numerator, q, simde_mm512_mask_mov_ps(simde_mm512_set1_ps(SIMDE_FLOAT32_C( 2.938163982698783e+00)), mask_el, simde_mm512_set1_ps(SIMDE_FLOAT32_C( 2.506628277459239e+00))));
  5673. {
  5674. simde__m512 multiplier;
  5675. multiplier = simde_mm512_set1_ps(SIMDE_FLOAT32_C( 1.0));
  5676. multiplier = simde_mm512_mask_mov_ps(multiplier, mask_hi, simde_mm512_set1_ps(SIMDE_FLOAT32_C(-1.0)));
  5677. multiplier = simde_mm512_mask_mov_ps(multiplier, mask_el, r);
  5678. numerator = simde_mm512_mul_ps(numerator, multiplier);
  5679. }
  5680. /* lo/hi: float denominator = (((((c_d[0] * q + c_d[1]) * q + c_d[2]) * q + c_d[3]) * 1 + 0.0f) * q + 1); */
  5681. /* el: float denominator = (((((c_b[0] * q + c_b[1]) * q + c_b[2]) * q + c_b[3]) * q + c_b[4]) * q + 1); */
  5682. simde__m512 denominator = simde_mm512_mask_mov_ps(simde_mm512_set1_ps(SIMDE_FLOAT32_C( 7.784695709041462e-03)), mask_el, simde_mm512_set1_ps(SIMDE_FLOAT32_C(-5.447609879822406e+01)));
  5683. denominator = simde_mm512_fmadd_ps(denominator, q, simde_mm512_mask_mov_ps(simde_mm512_set1_ps(SIMDE_FLOAT32_C( 3.224671290700398e-01)), mask_el, simde_mm512_set1_ps(SIMDE_FLOAT32_C( 1.615858368580409e+02))));
  5684. denominator = simde_mm512_fmadd_ps(denominator, q, simde_mm512_mask_mov_ps(simde_mm512_set1_ps(SIMDE_FLOAT32_C( 2.445134137142996e+00)), mask_el, simde_mm512_set1_ps(SIMDE_FLOAT32_C(-1.556989798598866e+02))));
  5685. denominator = simde_mm512_fmadd_ps(denominator, q, simde_mm512_mask_mov_ps(simde_mm512_set1_ps(SIMDE_FLOAT32_C( 3.754408661907416e+00)), mask_el, simde_mm512_set1_ps(SIMDE_FLOAT32_C( 6.680131188771972e+01))));
  5686. denominator = simde_mm512_fmadd_ps(denominator, simde_mm512_mask_mov_ps(simde_mm512_set1_ps(SIMDE_FLOAT32_C( 1.0)), mask_el, q),
  5687. simde_mm512_mask_mov_ps(simde_mm512_set1_ps(SIMDE_FLOAT32_C( 0.0)), mask_el, simde_mm512_set1_ps(SIMDE_FLOAT32_C(-1.328068155288572e+01))));
  5688. denominator = simde_mm512_fmadd_ps(denominator, q, simde_mm512_set1_ps(SIMDE_FLOAT32_C(1.0)));
  5689. /* res = numerator / denominator; */
  5690. retval = simde_mm512_mask_div_ps(retval, mask_lo | mask_hi | mask_el, numerator, denominator);
  5691. }
  5692. return retval;
  5693. #endif
  5694. }
  5695. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  5696. #undef _mm512_cdfnorminv_ps
  5697. #define _mm512_cdfnorminv_ps(a) simde_mm512_cdfnorminv_ps(a)
  5698. #endif
  5699. SIMDE_FUNCTION_ATTRIBUTES
  5700. simde__m512d
  5701. simde_mm512_cdfnorminv_pd (simde__m512d a) {
  5702. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  5703. return _mm512_cdfnorminv_pd(a);
  5704. #elif SIMDE_NATURAL_VECTOR_SIZE_LE(256)
  5705. simde__m512d_private
  5706. r_,
  5707. a_ = simde__m512d_to_private(a);
  5708. for (size_t i = 0 ; i < (sizeof(r_.m256d) / sizeof(r_.m256d[0])) ; i++) {
  5709. r_.m256d[i] = simde_mm256_cdfnorminv_pd(a_.m256d[i]);
  5710. }
  5711. return simde__m512d_from_private(r_);
  5712. #else
  5713. simde__m512d retval = simde_mm512_setzero_pd();
  5714. simde__mmask8 matched;
  5715. { /* if (a < 0 || a > 1) */
  5716. matched = simde_mm512_cmp_pd_mask(a, simde_mm512_set1_pd(SIMDE_FLOAT64_C(0.0)), SIMDE_CMP_LT_OQ);
  5717. matched |= simde_mm512_cmp_pd_mask(a, simde_mm512_set1_pd(SIMDE_FLOAT64_C(1.0)), SIMDE_CMP_GT_OQ);
  5718. /* We don't actually need to do anything here since we initialize
  5719. * retval to 0.0. */
  5720. }
  5721. { /* else if (a == 0) */
  5722. simde__mmask8 mask = simde_mm512_cmp_pd_mask(a, simde_mm512_set1_pd(SIMDE_FLOAT64_C(0.0)), SIMDE_CMP_EQ_OQ);
  5723. matched |= mask;
  5724. retval = simde_mm512_mask_mov_pd(retval, mask, simde_mm512_set1_pd(-SIMDE_MATH_INFINITY));
  5725. }
  5726. { /* else if (a == 1) */
  5727. simde__mmask8 mask = simde_mm512_cmp_pd_mask(a, simde_mm512_set1_pd(SIMDE_FLOAT64_C(0.0)), SIMDE_CMP_EQ_OQ);
  5728. matched |= mask;
  5729. retval = simde_mm512_mask_mov_pd(retval, mask, simde_mm512_set1_pd(SIMDE_MATH_INFINITY));
  5730. }
  5731. { /* else if (a < 0.02425) */
  5732. simde__mmask8 mask_lo = simde_mm512_cmp_pd_mask(a, simde_mm512_set1_pd(SIMDE_FLOAT64_C(0.02425)), SIMDE_CMP_LT_OQ);
  5733. /* else if (a > 0.97575) */
  5734. simde__mmask8 mask_hi = simde_mm512_cmp_pd_mask(a, simde_mm512_set1_pd(SIMDE_FLOAT64_C(0.97575)), SIMDE_CMP_GT_OQ);
  5735. simde__mmask8 mask = mask_lo | mask_hi;
  5736. matched = matched | mask;
  5737. /* else */
  5738. simde__mmask8 mask_el = ~matched;
  5739. /* r = a - 0.5f */
  5740. simde__m512d r = simde_mm512_sub_pd(a, simde_mm512_set1_pd(SIMDE_FLOAT64_C(0.5)));
  5741. /* lo: q = a
  5742. * hi: q = (1.0 - a) */
  5743. simde__m512d q = a;
  5744. q = simde_mm512_mask_sub_pd(q, mask_hi, simde_mm512_set1_pd(SIMDE_FLOAT64_C(1.0)), a);
  5745. /* q = simde_math_sqrtf(-2.0f * simde_math_logf(q)) */
  5746. q = simde_mm512_log_pd(q);
  5747. q = simde_mm512_mul_pd(q, simde_mm512_set1_pd(SIMDE_FLOAT64_C(-2.0)));
  5748. q = simde_mm512_sqrt_pd(q);
  5749. /* el: q = r * r */
  5750. q = simde_mm512_mask_mul_pd(q, mask_el, r, r);
  5751. /* lo: float numerator = ((((((c_c[0] * q + c_c[1]) * q + c_c[2]) * q + c_c[3]) * q + c_c[4]) * q + c_c[5]) * 1.0f); */
  5752. /* hi: float numerator = ((((((c_c[0] * q + c_c[1]) * q + c_c[2]) * q + c_c[3]) * q + c_c[4]) * q + c_c[5]) * -1.0f); */
  5753. /* el: float numerator = ((((((c_a[0] * q + c_a[1]) * q + c_a[2]) * q + c_a[3]) * q + c_a[4]) * q + c_a[5]) * r); */
  5754. simde__m512d numerator = simde_mm512_mask_mov_pd(simde_mm512_set1_pd(SIMDE_FLOAT64_C(-7.784894002430293e-03)), mask_el, simde_mm512_set1_pd(SIMDE_FLOAT64_C(-3.969683028665376e+01)));
  5755. numerator = simde_mm512_fmadd_pd(numerator, q, simde_mm512_mask_mov_pd(simde_mm512_set1_pd(SIMDE_FLOAT64_C(-3.223964580411365e-01)), mask_el, simde_mm512_set1_pd(SIMDE_FLOAT64_C( 2.209460984245205e+02))));
  5756. numerator = simde_mm512_fmadd_pd(numerator, q, simde_mm512_mask_mov_pd(simde_mm512_set1_pd(SIMDE_FLOAT64_C(-2.400758277161838e+00)), mask_el, simde_mm512_set1_pd(SIMDE_FLOAT64_C(-2.759285104469687e+02))));
  5757. numerator = simde_mm512_fmadd_pd(numerator, q, simde_mm512_mask_mov_pd(simde_mm512_set1_pd(SIMDE_FLOAT64_C(-2.549732539343734e+00)), mask_el, simde_mm512_set1_pd(SIMDE_FLOAT64_C( 1.383577518672690e+02))));
  5758. numerator = simde_mm512_fmadd_pd(numerator, q, simde_mm512_mask_mov_pd(simde_mm512_set1_pd(SIMDE_FLOAT64_C( 4.374664141464968e+00)), mask_el, simde_mm512_set1_pd(SIMDE_FLOAT64_C(-3.066479806614716e+01))));
  5759. numerator = simde_mm512_fmadd_pd(numerator, q, simde_mm512_mask_mov_pd(simde_mm512_set1_pd(SIMDE_FLOAT64_C( 2.938163982698783e+00)), mask_el, simde_mm512_set1_pd(SIMDE_FLOAT64_C( 2.506628277459239e+00))));
  5760. {
  5761. simde__m512d multiplier;
  5762. multiplier = simde_mm512_set1_pd(SIMDE_FLOAT64_C( 1.0));
  5763. multiplier = simde_mm512_mask_mov_pd(multiplier, mask_hi, simde_mm512_set1_pd(SIMDE_FLOAT64_C(-1.0)));
  5764. multiplier = simde_mm512_mask_mov_pd(multiplier, mask_el, r);
  5765. numerator = simde_mm512_mul_pd(numerator, multiplier);
  5766. }
  5767. /* lo/hi: float denominator = (((((c_d[0] * q + c_d[1]) * q + c_d[2]) * q + c_d[3]) * 1 + 0.0f) * q + 1); */
  5768. /* el: float denominator = (((((c_b[0] * q + c_b[1]) * q + c_b[2]) * q + c_b[3]) * q + c_b[4]) * q + 1); */
  5769. simde__m512d denominator = simde_mm512_mask_mov_pd(simde_mm512_set1_pd(SIMDE_FLOAT64_C( 7.784695709041462e-03)), mask_el, simde_mm512_set1_pd(SIMDE_FLOAT64_C(-5.447609879822406e+01)));
  5770. denominator = simde_mm512_fmadd_pd(denominator, q, simde_mm512_mask_mov_pd(simde_mm512_set1_pd(SIMDE_FLOAT64_C( 3.224671290700398e-01)), mask_el, simde_mm512_set1_pd(SIMDE_FLOAT64_C( 1.615858368580409e+02))));
  5771. denominator = simde_mm512_fmadd_pd(denominator, q, simde_mm512_mask_mov_pd(simde_mm512_set1_pd(SIMDE_FLOAT64_C( 2.445134137142996e+00)), mask_el, simde_mm512_set1_pd(SIMDE_FLOAT64_C(-1.556989798598866e+02))));
  5772. denominator = simde_mm512_fmadd_pd(denominator, q, simde_mm512_mask_mov_pd(simde_mm512_set1_pd(SIMDE_FLOAT64_C( 3.754408661907416e+00)), mask_el, simde_mm512_set1_pd(SIMDE_FLOAT64_C( 6.680131188771972e+01))));
  5773. denominator = simde_mm512_fmadd_pd(denominator, simde_mm512_mask_mov_pd(simde_mm512_set1_pd(SIMDE_FLOAT64_C( 1.0)), mask_el, q),
  5774. simde_mm512_mask_mov_pd(simde_mm512_set1_pd(SIMDE_FLOAT64_C( 0.0)), mask_el, simde_mm512_set1_pd(SIMDE_FLOAT64_C(-1.328068155288572e+01))));
  5775. denominator = simde_mm512_fmadd_pd(denominator, q, simde_mm512_set1_pd(SIMDE_FLOAT64_C(1.0)));
  5776. /* res = numerator / denominator; */
  5777. retval = simde_mm512_mask_div_pd(retval, mask_lo | mask_hi | mask_el, numerator, denominator);
  5778. }
  5779. return retval;
  5780. #endif
  5781. }
  5782. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  5783. #undef _mm512_cdfnorminv_pd
  5784. #define _mm512_cdfnorminv_pd(a) simde_mm512_cdfnorminv_pd(a)
  5785. #endif
  5786. SIMDE_FUNCTION_ATTRIBUTES
  5787. simde__m512
  5788. simde_mm512_mask_cdfnorminv_ps(simde__m512 src, simde__mmask16 k, simde__m512 a) {
  5789. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  5790. return _mm512_mask_cdfnorminv_ps(src, k, a);
  5791. #else
  5792. return simde_mm512_mask_mov_ps(src, k, simde_mm512_cdfnorminv_ps(a));
  5793. #endif
  5794. }
  5795. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  5796. #undef _mm512_mask_cdfnorminv_ps
  5797. #define _mm512_mask_cdfnorminv_ps(src, k, a) simde_mm512_mask_cdfnorminv_ps(src, k, a)
  5798. #endif
  5799. SIMDE_FUNCTION_ATTRIBUTES
  5800. simde__m512d
  5801. simde_mm512_mask_cdfnorminv_pd(simde__m512d src, simde__mmask8 k, simde__m512d a) {
  5802. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  5803. return _mm512_mask_cdfnorminv_pd(src, k, a);
  5804. #else
  5805. return simde_mm512_mask_mov_pd(src, k, simde_mm512_cdfnorminv_pd(a));
  5806. #endif
  5807. }
  5808. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  5809. #undef _mm512_mask_cdfnorminv_pd
  5810. #define _mm512_mask_cdfnorminv_pd(src, k, a) simde_mm512_mask_cdfnorminv_pd(src, k, a)
  5811. #endif
  5812. SIMDE_FUNCTION_ATTRIBUTES
  5813. simde__m128
  5814. simde_mm_erfinv_ps (simde__m128 a) {
  5815. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
  5816. return _mm_erfinv_ps(a);
  5817. #elif (SIMDE_NATURAL_VECTOR_SIZE > 0)
  5818. /* https://stackoverflow.com/questions/27229371/inverse-error-function-in-c */
  5819. simde__m128 one = simde_mm_set1_ps(SIMDE_FLOAT32_C(1.0));
  5820. simde__m128 lnx = simde_mm_log_ps(simde_mm_mul_ps(simde_mm_sub_ps(one, a), simde_mm_add_ps(one, a)));
  5821. simde__m128 tt1 = simde_mm_mul_ps(simde_mm_set1_ps(HEDLEY_STATIC_CAST(simde_float32, SIMDE_MATH_PI)), simde_mm_set1_ps(SIMDE_FLOAT32_C(0.147)));
  5822. tt1 = simde_mm_div_ps(simde_mm_set1_ps(SIMDE_FLOAT32_C(2.0)), tt1);
  5823. tt1 = simde_mm_add_ps(tt1, simde_mm_mul_ps(simde_mm_set1_ps(SIMDE_FLOAT32_C(0.5)), lnx));
  5824. simde__m128 tt2 = simde_mm_set1_ps(SIMDE_FLOAT32_C(1.0) / SIMDE_FLOAT32_C(0.147));
  5825. tt2 = simde_mm_mul_ps(tt2, lnx);
  5826. simde__m128 r = simde_mm_mul_ps(tt1, tt1);
  5827. r = simde_mm_sub_ps(r, tt2);
  5828. r = simde_mm_sqrt_ps(r);
  5829. r = simde_mm_add_ps(simde_x_mm_negate_ps(tt1), r);
  5830. r = simde_mm_sqrt_ps(r);
  5831. return simde_x_mm_xorsign_ps(r, a);
  5832. #else
  5833. simde__m128_private
  5834. a_ = simde__m128_to_private(a),
  5835. r_;
  5836. SIMDE_VECTORIZE
  5837. for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
  5838. r_.f32[i] = simde_math_erfinvf(a_.f32[i]);
  5839. }
  5840. return simde__m128_from_private(r_);
  5841. #endif
  5842. }
  5843. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  5844. #undef _mm_erfinv_ps
  5845. #define _mm_erfinv_ps(a) simde_mm_erfinv_ps(a)
  5846. #endif
  5847. SIMDE_FUNCTION_ATTRIBUTES
  5848. simde__m128d
  5849. simde_mm_erfinv_pd (simde__m128d a) {
  5850. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
  5851. return _mm_erfinv_pd(a);
  5852. #elif (SIMDE_NATURAL_VECTOR_SIZE > 0)
  5853. simde__m128d one = simde_mm_set1_pd(SIMDE_FLOAT64_C(1.0));
  5854. simde__m128d lnx = simde_mm_log_pd(simde_mm_mul_pd(simde_mm_sub_pd(one, a), simde_mm_add_pd(one, a)));
  5855. simde__m128d tt1 = simde_mm_mul_pd(simde_mm_set1_pd(SIMDE_MATH_PI), simde_mm_set1_pd(SIMDE_FLOAT64_C(0.147)));
  5856. tt1 = simde_mm_div_pd(simde_mm_set1_pd(SIMDE_FLOAT64_C(2.0)), tt1);
  5857. tt1 = simde_mm_add_pd(tt1, simde_mm_mul_pd(simde_mm_set1_pd(SIMDE_FLOAT64_C(0.5)), lnx));
  5858. simde__m128d tt2 = simde_mm_set1_pd(SIMDE_FLOAT64_C(1.0) / SIMDE_FLOAT64_C(0.147));
  5859. tt2 = simde_mm_mul_pd(tt2, lnx);
  5860. simde__m128d r = simde_mm_mul_pd(tt1, tt1);
  5861. r = simde_mm_sub_pd(r, tt2);
  5862. r = simde_mm_sqrt_pd(r);
  5863. r = simde_mm_add_pd(simde_x_mm_negate_pd(tt1), r);
  5864. r = simde_mm_sqrt_pd(r);
  5865. return simde_x_mm_xorsign_pd(r, a);
  5866. #else
  5867. simde__m128d_private
  5868. a_ = simde__m128d_to_private(a),
  5869. r_;
  5870. SIMDE_VECTORIZE
  5871. for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
  5872. r_.f64[i] = simde_math_erfinv(a_.f64[i]);
  5873. }
  5874. return simde__m128d_from_private(r_);
  5875. #endif
  5876. }
  5877. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  5878. #undef _mm_erfinv_pd
  5879. #define _mm_erfinv_pd(a) simde_mm_erfinv_pd(a)
  5880. #endif
  5881. SIMDE_FUNCTION_ATTRIBUTES
  5882. simde__m256
  5883. simde_mm256_erfinv_ps (simde__m256 a) {
  5884. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
  5885. return _mm256_erfinv_ps(a);
  5886. #elif (SIMDE_NATURAL_VECTOR_SIZE > 0)
  5887. simde__m256 one = simde_mm256_set1_ps(SIMDE_FLOAT32_C(1.0));
  5888. simde__m256 sgn = simde_x_mm256_copysign_ps(one, a);
  5889. a = simde_mm256_mul_ps(simde_mm256_sub_ps(one, a), simde_mm256_add_ps(one, a));
  5890. simde__m256 lnx = simde_mm256_log_ps(a);
  5891. simde__m256 tt1 = simde_mm256_mul_ps(simde_mm256_set1_ps(HEDLEY_STATIC_CAST(simde_float32, SIMDE_MATH_PI)), simde_mm256_set1_ps(SIMDE_FLOAT32_C(0.147)));
  5892. tt1 = simde_mm256_div_ps(simde_mm256_set1_ps(SIMDE_FLOAT32_C(2.0)), tt1);
  5893. tt1 = simde_mm256_add_ps(tt1, simde_mm256_mul_ps(simde_mm256_set1_ps(SIMDE_FLOAT32_C(0.5)), lnx));
  5894. simde__m256 tt2 = simde_mm256_set1_ps(SIMDE_FLOAT32_C(1.0) / SIMDE_FLOAT32_C(0.147));
  5895. tt2 = simde_mm256_mul_ps(tt2, lnx);
  5896. simde__m256 r = simde_mm256_mul_ps(tt1, tt1);
  5897. r = simde_mm256_sub_ps(r, tt2);
  5898. r = simde_mm256_sqrt_ps(r);
  5899. r = simde_mm256_add_ps(simde_x_mm256_negate_ps(tt1), r);
  5900. r = simde_mm256_sqrt_ps(r);
  5901. return simde_mm256_mul_ps(sgn, r);
  5902. #else
  5903. simde__m256_private
  5904. a_ = simde__m256_to_private(a),
  5905. r_;
  5906. SIMDE_VECTORIZE
  5907. for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
  5908. r_.f32[i] = simde_math_erfinvf(a_.f32[i]);
  5909. }
  5910. return simde__m256_from_private(r_);
  5911. #endif
  5912. }
  5913. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  5914. #undef _mm256_erfinv_ps
  5915. #define _mm256_erfinv_ps(a) simde_mm256_erfinv_ps(a)
  5916. #endif
  5917. SIMDE_FUNCTION_ATTRIBUTES
  5918. simde__m256d
  5919. simde_mm256_erfinv_pd (simde__m256d a) {
  5920. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
  5921. return _mm256_erfinv_pd(a);
  5922. #elif (SIMDE_NATURAL_VECTOR_SIZE > 0)
  5923. simde__m256d one = simde_mm256_set1_pd(SIMDE_FLOAT64_C(1.0));
  5924. simde__m256d sgn = simde_x_mm256_copysign_pd(one, a);
  5925. a = simde_mm256_mul_pd(simde_mm256_sub_pd(one, a), simde_mm256_add_pd(one, a));
  5926. simde__m256d lnx = simde_mm256_log_pd(a);
  5927. simde__m256d tt1 = simde_mm256_mul_pd(simde_mm256_set1_pd(SIMDE_MATH_PI), simde_mm256_set1_pd(SIMDE_FLOAT64_C(0.147)));
  5928. tt1 = simde_mm256_div_pd(simde_mm256_set1_pd(SIMDE_FLOAT64_C(2.0)), tt1);
  5929. tt1 = simde_mm256_add_pd(tt1, simde_mm256_mul_pd(simde_mm256_set1_pd(SIMDE_FLOAT64_C(0.5)), lnx));
  5930. simde__m256d tt2 = simde_mm256_set1_pd(SIMDE_FLOAT64_C(1.0) / SIMDE_FLOAT64_C(0.147));
  5931. tt2 = simde_mm256_mul_pd(tt2, lnx);
  5932. simde__m256d r = simde_mm256_mul_pd(tt1, tt1);
  5933. r = simde_mm256_sub_pd(r, tt2);
  5934. r = simde_mm256_sqrt_pd(r);
  5935. r = simde_mm256_add_pd(simde_x_mm256_negate_pd(tt1), r);
  5936. r = simde_mm256_sqrt_pd(r);
  5937. return simde_mm256_mul_pd(sgn, r);
  5938. #else
  5939. simde__m256d_private
  5940. a_ = simde__m256d_to_private(a),
  5941. r_;
  5942. SIMDE_VECTORIZE
  5943. for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
  5944. r_.f64[i] = simde_math_erfinv(a_.f64[i]);
  5945. }
  5946. return simde__m256d_from_private(r_);
  5947. #endif
  5948. }
  5949. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  5950. #undef _mm256_erfinv_pd
  5951. #define _mm256_erfinv_pd(a) simde_mm256_erfinv_pd(a)
  5952. #endif
  5953. SIMDE_FUNCTION_ATTRIBUTES
  5954. simde__m512
  5955. simde_mm512_erfinv_ps (simde__m512 a) {
  5956. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  5957. return _mm512_erfinv_ps(a);
  5958. #elif (SIMDE_NATURAL_VECTOR_SIZE > 0)
  5959. simde__m512 one = simde_mm512_set1_ps(SIMDE_FLOAT32_C(1.0));
  5960. simde__m512 sgn = simde_x_mm512_copysign_ps(one, a);
  5961. a = simde_mm512_mul_ps(simde_mm512_sub_ps(one, a), simde_mm512_add_ps(one, a));
  5962. simde__m512 lnx = simde_mm512_log_ps(a);
  5963. simde__m512 tt1 = simde_mm512_mul_ps(simde_mm512_set1_ps(HEDLEY_STATIC_CAST(simde_float32, SIMDE_MATH_PI)), simde_mm512_set1_ps(SIMDE_FLOAT32_C(0.147)));
  5964. tt1 = simde_mm512_div_ps(simde_mm512_set1_ps(SIMDE_FLOAT32_C(2.0)), tt1);
  5965. tt1 = simde_mm512_add_ps(tt1, simde_mm512_mul_ps(simde_mm512_set1_ps(SIMDE_FLOAT32_C(0.5)), lnx));
  5966. simde__m512 tt2 = simde_mm512_set1_ps(SIMDE_FLOAT32_C(1.0) / SIMDE_FLOAT32_C(0.147));
  5967. tt2 = simde_mm512_mul_ps(tt2, lnx);
  5968. simde__m512 r = simde_mm512_mul_ps(tt1, tt1);
  5969. r = simde_mm512_sub_ps(r, tt2);
  5970. r = simde_mm512_sqrt_ps(r);
  5971. r = simde_mm512_add_ps(simde_x_mm512_negate_ps(tt1), r);
  5972. r = simde_mm512_sqrt_ps(r);
  5973. return simde_mm512_mul_ps(sgn, r);
  5974. #else
  5975. simde__m512_private
  5976. a_ = simde__m512_to_private(a),
  5977. r_;
  5978. SIMDE_VECTORIZE
  5979. for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
  5980. r_.f32[i] = simde_math_erfinvf(a_.f32[i]);
  5981. }
  5982. return simde__m512_from_private(r_);
  5983. #endif
  5984. }
  5985. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  5986. #undef _mm512_erfinv_ps
  5987. #define _mm512_erfinv_ps(a) simde_mm512_erfinv_ps(a)
  5988. #endif
  5989. SIMDE_FUNCTION_ATTRIBUTES
  5990. simde__m512d
  5991. simde_mm512_erfinv_pd (simde__m512d a) {
  5992. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  5993. return _mm512_erfinv_pd(a);
  5994. #elif (SIMDE_NATURAL_VECTOR_SIZE > 0)
  5995. simde__m512d one = simde_mm512_set1_pd(SIMDE_FLOAT64_C(1.0));
  5996. simde__m512d sgn = simde_x_mm512_copysign_pd(one, a);
  5997. a = simde_mm512_mul_pd(simde_mm512_sub_pd(one, a), simde_mm512_add_pd(one, a));
  5998. simde__m512d lnx = simde_mm512_log_pd(a);
  5999. simde__m512d tt1 = simde_mm512_mul_pd(simde_mm512_set1_pd(SIMDE_MATH_PI), simde_mm512_set1_pd(SIMDE_FLOAT64_C(0.147)));
  6000. tt1 = simde_mm512_div_pd(simde_mm512_set1_pd(SIMDE_FLOAT64_C(2.0)), tt1);
  6001. tt1 = simde_mm512_add_pd(tt1, simde_mm512_mul_pd(simde_mm512_set1_pd(SIMDE_FLOAT64_C(0.5)), lnx));
  6002. simde__m512d tt2 = simde_mm512_set1_pd(SIMDE_FLOAT64_C(1.0) / SIMDE_FLOAT64_C(0.147));
  6003. tt2 = simde_mm512_mul_pd(tt2, lnx);
  6004. simde__m512d r = simde_mm512_mul_pd(tt1, tt1);
  6005. r = simde_mm512_sub_pd(r, tt2);
  6006. r = simde_mm512_sqrt_pd(r);
  6007. r = simde_mm512_add_pd(simde_x_mm512_negate_pd(tt1), r);
  6008. r = simde_mm512_sqrt_pd(r);
  6009. return simde_mm512_mul_pd(sgn, r);
  6010. #else
  6011. simde__m512d_private
  6012. a_ = simde__m512d_to_private(a),
  6013. r_;
  6014. SIMDE_VECTORIZE
  6015. for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
  6016. r_.f64[i] = simde_math_erfinv(a_.f64[i]);
  6017. }
  6018. return simde__m512d_from_private(r_);
  6019. #endif
  6020. }
  6021. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  6022. #undef _mm512_erfinv_pd
  6023. #define _mm512_erfinv_pd(a) simde_mm512_erfinv_pd(a)
  6024. #endif
  6025. SIMDE_FUNCTION_ATTRIBUTES
  6026. simde__m512
  6027. simde_mm512_mask_erfinv_ps(simde__m512 src, simde__mmask16 k, simde__m512 a) {
  6028. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  6029. return _mm512_mask_erfinv_ps(src, k, a);
  6030. #else
  6031. return simde_mm512_mask_mov_ps(src, k, simde_mm512_erfinv_ps(a));
  6032. #endif
  6033. }
  6034. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  6035. #undef _mm512_mask_erfinv_ps
  6036. #define _mm512_mask_erfinv_ps(src, k, a) simde_mm512_mask_erfinv_ps(src, k, a)
  6037. #endif
  6038. SIMDE_FUNCTION_ATTRIBUTES
  6039. simde__m512d
  6040. simde_mm512_mask_erfinv_pd(simde__m512d src, simde__mmask8 k, simde__m512d a) {
  6041. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  6042. return _mm512_mask_erfinv_pd(src, k, a);
  6043. #else
  6044. return simde_mm512_mask_mov_pd(src, k, simde_mm512_erfinv_pd(a));
  6045. #endif
  6046. }
  6047. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  6048. #undef _mm512_mask_erfinv_pd
  6049. #define _mm512_mask_erfinv_pd(src, k, a) simde_mm512_mask_erfinv_pd(src, k, a)
  6050. #endif
  6051. SIMDE_FUNCTION_ATTRIBUTES
  6052. simde__m128
  6053. simde_mm_erfcinv_ps (simde__m128 a) {
  6054. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
  6055. return _mm_erfcinv_ps(a);
  6056. #elif SIMDE_NATURAL_VECTOR_SIZE_GE(128)
  6057. simde__m128 matched, retval = simde_mm_setzero_ps();
  6058. { /* if (a < 2.0f && a > 0.0625f) */
  6059. matched = simde_mm_cmplt_ps(a, simde_mm_set1_ps(SIMDE_FLOAT32_C(2.0)));
  6060. matched = simde_mm_and_ps(matched, simde_mm_cmpgt_ps(a, simde_mm_set1_ps(SIMDE_FLOAT32_C(0.0625))));
  6061. if (!simde_mm_test_all_zeros(simde_mm_castps_si128(matched), simde_x_mm_setone_si128())) {
  6062. retval = simde_mm_erfinv_ps(simde_mm_sub_ps(simde_mm_set1_ps(SIMDE_FLOAT32_C(1.0)), a));
  6063. }
  6064. if (simde_mm_test_all_ones(simde_mm_castps_si128(matched))) {
  6065. return retval;
  6066. }
  6067. }
  6068. { /* else if (a < 0.0625f && a > 0.0f) */
  6069. simde__m128 mask = simde_mm_cmplt_ps(a, simde_mm_set1_ps(SIMDE_FLOAT32_C(0.0625)));
  6070. mask = simde_mm_and_ps(mask, simde_mm_cmpgt_ps(a, simde_mm_set1_ps(SIMDE_FLOAT32_C(0.0))));
  6071. mask = simde_mm_andnot_ps(matched, mask);
  6072. if (!simde_mm_test_all_zeros(simde_mm_castps_si128(mask), simde_x_mm_setone_si128())) {
  6073. matched = simde_mm_or_ps(matched, mask);
  6074. /* t = 1/(sqrt(-log(a))) */
  6075. simde__m128 t = simde_x_mm_negate_ps(simde_mm_log_ps(a));
  6076. t = simde_mm_sqrt_ps(t);
  6077. t = simde_mm_div_ps(simde_mm_set1_ps(SIMDE_FLOAT32_C(1.0)), t);
  6078. const simde__m128 p[] = {
  6079. simde_mm_set1_ps(SIMDE_FLOAT32_C( 0.1550470003116)),
  6080. simde_mm_set1_ps(SIMDE_FLOAT32_C( 1.382719649631)),
  6081. simde_mm_set1_ps(SIMDE_FLOAT32_C( 0.690969348887)),
  6082. simde_mm_set1_ps(SIMDE_FLOAT32_C(-1.128081391617)),
  6083. simde_mm_set1_ps(SIMDE_FLOAT32_C( 0.680544246825)),
  6084. simde_mm_set1_ps(SIMDE_FLOAT32_C(-0.164441567910))
  6085. };
  6086. const simde__m128 q[] = {
  6087. simde_mm_set1_ps(SIMDE_FLOAT32_C( 0.155024849822)),
  6088. simde_mm_set1_ps(SIMDE_FLOAT32_C( 1.385228141995)),
  6089. simde_mm_set1_ps(SIMDE_FLOAT32_C( 1.000000000000))
  6090. };
  6091. /* float numerator = p[0] / t + p[1] + t * (p[2] + t * (p[3] + t * (p[4] + t * p[5])))) */
  6092. simde__m128 numerator = simde_mm_fmadd_ps(p[5], t, p[4]);
  6093. numerator = simde_mm_fmadd_ps(numerator, t, p[3]);
  6094. numerator = simde_mm_fmadd_ps(numerator, t, p[2]);
  6095. numerator = simde_mm_fmadd_ps(numerator, t, p[1]);
  6096. numerator = simde_mm_add_ps(numerator, simde_mm_div_ps(p[0], t));
  6097. /* float denominator = (q[0] + t * (q[1] + t * (q[2]))) */
  6098. simde__m128 denominator = simde_mm_fmadd_ps(q[2], t, q[1]);
  6099. denominator = simde_mm_fmadd_ps(denominator, t, q[0]);
  6100. simde__m128 res = simde_mm_div_ps(numerator, denominator);
  6101. retval = simde_mm_or_ps(retval, simde_mm_and_ps(mask, res));
  6102. }
  6103. }
  6104. { /* else if (a < 0.0f) */
  6105. simde__m128 mask = simde_mm_cmplt_ps(a, simde_mm_set1_ps(SIMDE_FLOAT32_C(0.0)));
  6106. mask = simde_mm_andnot_ps(matched, mask);
  6107. if (!simde_mm_test_all_zeros(simde_mm_castps_si128(mask), simde_x_mm_setone_si128())) {
  6108. matched = simde_mm_or_ps(matched, mask);
  6109. /* t = 1/(sqrt(-log(a))) */
  6110. simde__m128 t = simde_x_mm_negate_ps(simde_mm_log_ps(a));
  6111. t = simde_mm_sqrt_ps(t);
  6112. t = simde_mm_div_ps(simde_mm_set1_ps(SIMDE_FLOAT32_C(1.0)), t);
  6113. const simde__m128 p[] = {
  6114. simde_mm_set1_ps(SIMDE_FLOAT32_C( 0.00980456202915)),
  6115. simde_mm_set1_ps(SIMDE_FLOAT32_C( 0.36366788917100)),
  6116. simde_mm_set1_ps(SIMDE_FLOAT32_C( 0.97302949837000)),
  6117. simde_mm_set1_ps(SIMDE_FLOAT32_C( -0.5374947401000))
  6118. };
  6119. const simde__m128 q[] = {
  6120. simde_mm_set1_ps(SIMDE_FLOAT32_C( 0.00980451277802)),
  6121. simde_mm_set1_ps(SIMDE_FLOAT32_C( 0.36369997154400)),
  6122. simde_mm_set1_ps(SIMDE_FLOAT32_C( 1.00000000000000))
  6123. };
  6124. /* float numerator = (p[0] / t + p[1] + t * (p[2] + t * p[3])) */
  6125. simde__m128 numerator = simde_mm_fmadd_ps(p[3], t, p[2]);
  6126. numerator = simde_mm_fmadd_ps(numerator, t, p[1]);
  6127. numerator = simde_mm_add_ps(numerator, simde_mm_div_ps(p[0], t));
  6128. /* float denominator = (q[0] + t * (q[1] + t * (q[2]))) */
  6129. simde__m128 denominator = simde_mm_fmadd_ps(q[2], t, q[1]);
  6130. denominator = simde_mm_fmadd_ps(denominator, t, q[0]);
  6131. simde__m128 res = simde_mm_div_ps(numerator, denominator);
  6132. retval = simde_mm_or_ps(retval, simde_mm_and_ps(mask, res));
  6133. if (simde_mm_test_all_ones(simde_mm_castps_si128(matched))) {
  6134. return retval;
  6135. }
  6136. }
  6137. }
  6138. { /* else if (a == 0.0f) */
  6139. simde__m128 mask = simde_mm_cmpeq_ps(a, simde_mm_set1_ps(SIMDE_FLOAT32_C(0.0)));
  6140. mask = simde_mm_andnot_ps(matched, mask);
  6141. matched = simde_mm_or_ps(matched, mask);
  6142. simde__m128 res = simde_mm_set1_ps(SIMDE_MATH_INFINITYF);
  6143. retval = simde_mm_or_ps(retval, simde_mm_and_ps(mask, res));
  6144. }
  6145. { /* else */
  6146. /* (a >= 2.0f) */
  6147. retval = simde_mm_or_ps(retval, simde_mm_andnot_ps(matched, simde_mm_set1_ps(-SIMDE_MATH_INFINITYF)));
  6148. }
  6149. return retval;
  6150. #else
  6151. simde__m128_private
  6152. r_,
  6153. a_ = simde__m128_to_private(a);
  6154. SIMDE_VECTORIZE
  6155. for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
  6156. r_.f32[i] = simde_math_erfcinvf(a_.f32[i]);
  6157. }
  6158. return simde__m128_from_private(r_);
  6159. #endif
  6160. }
  6161. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  6162. #undef _mm_erfcinv_ps
  6163. #define _mm_erfcinv_ps(a) simde_mm_erfcinv_ps(a)
  6164. #endif
  6165. SIMDE_FUNCTION_ATTRIBUTES
  6166. simde__m128d
  6167. simde_mm_erfcinv_pd (simde__m128d a) {
  6168. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
  6169. return _mm_erfcinv_pd(a);
  6170. #elif SIMDE_NATURAL_VECTOR_SIZE_GE(128)
  6171. simde__m128d matched, retval = simde_mm_setzero_pd();
  6172. { /* if (a < 2.0 && a > 0.0625) */
  6173. matched = simde_mm_cmplt_pd(a, simde_mm_set1_pd(SIMDE_FLOAT64_C(2.0)));
  6174. matched = simde_mm_and_pd(matched, simde_mm_cmpgt_pd(a, simde_mm_set1_pd(SIMDE_FLOAT64_C(0.0625))));
  6175. if (!simde_mm_test_all_zeros(simde_mm_castpd_si128(matched), simde_x_mm_setone_si128())) {
  6176. retval = simde_mm_erfinv_pd(simde_mm_sub_pd(simde_mm_set1_pd(SIMDE_FLOAT64_C(1.0)), a));
  6177. }
  6178. if (simde_mm_test_all_ones(simde_mm_castpd_si128(matched))) {
  6179. return retval;
  6180. }
  6181. }
  6182. { /* else if (a < 0.0625 && a > 0.0) */
  6183. simde__m128d mask = simde_mm_cmplt_pd(a, simde_mm_set1_pd(SIMDE_FLOAT64_C(0.0625)));
  6184. mask = simde_mm_and_pd(mask, simde_mm_cmpgt_pd(a, simde_mm_set1_pd(SIMDE_FLOAT64_C(0.0))));
  6185. mask = simde_mm_andnot_pd(matched, mask);
  6186. if (!simde_mm_test_all_zeros(simde_mm_castpd_si128(mask), simde_x_mm_setone_si128())) {
  6187. matched = simde_mm_or_pd(matched, mask);
  6188. /* t = 1/(sqrt(-log(a))) */
  6189. simde__m128d t = simde_x_mm_negate_pd(simde_mm_log_pd(a));
  6190. t = simde_mm_sqrt_pd(t);
  6191. t = simde_mm_div_pd(simde_mm_set1_pd(SIMDE_FLOAT64_C(1.0)), t);
  6192. const simde__m128d p[] = {
  6193. simde_mm_set1_pd(SIMDE_FLOAT64_C( 0.1550470003116)),
  6194. simde_mm_set1_pd(SIMDE_FLOAT64_C( 1.382719649631)),
  6195. simde_mm_set1_pd(SIMDE_FLOAT64_C( 0.690969348887)),
  6196. simde_mm_set1_pd(SIMDE_FLOAT64_C(-1.128081391617)),
  6197. simde_mm_set1_pd(SIMDE_FLOAT64_C( 0.680544246825)),
  6198. simde_mm_set1_pd(SIMDE_FLOAT64_C(-0.164441567910))
  6199. };
  6200. const simde__m128d q[] = {
  6201. simde_mm_set1_pd(SIMDE_FLOAT64_C( 0.155024849822)),
  6202. simde_mm_set1_pd(SIMDE_FLOAT64_C( 1.385228141995)),
  6203. simde_mm_set1_pd(SIMDE_FLOAT64_C( 1.000000000000))
  6204. };
  6205. /* float numerator = p[0] / t + p[1] + t * (p[2] + t * (p[3] + t * (p[4] + t * p[5])))) */
  6206. simde__m128d numerator = simde_mm_fmadd_pd(p[5], t, p[4]);
  6207. numerator = simde_mm_fmadd_pd(numerator, t, p[3]);
  6208. numerator = simde_mm_fmadd_pd(numerator, t, p[2]);
  6209. numerator = simde_mm_fmadd_pd(numerator, t, p[1]);
  6210. numerator = simde_mm_add_pd(numerator, simde_mm_div_pd(p[0], t));
  6211. /* float denominator = (q[0] + t * (q[1] + t * (q[2]))) */
  6212. simde__m128d denominator = simde_mm_fmadd_pd(q[2], t, q[1]);
  6213. denominator = simde_mm_fmadd_pd(denominator, t, q[0]);
  6214. simde__m128d res = simde_mm_div_pd(numerator, denominator);
  6215. retval = simde_mm_or_pd(retval, simde_mm_and_pd(mask, res));
  6216. }
  6217. }
  6218. { /* else if (a < 0.0) */
  6219. simde__m128d mask = simde_mm_cmplt_pd(a, simde_mm_set1_pd(SIMDE_FLOAT64_C(0.0)));
  6220. mask = simde_mm_andnot_pd(matched, mask);
  6221. if (!simde_mm_test_all_zeros(simde_mm_castpd_si128(mask), simde_x_mm_setone_si128())) {
  6222. matched = simde_mm_or_pd(matched, mask);
  6223. /* t = 1/(sqrt(-log(a))) */
  6224. simde__m128d t = simde_x_mm_negate_pd(simde_mm_log_pd(a));
  6225. t = simde_mm_sqrt_pd(t);
  6226. t = simde_mm_div_pd(simde_mm_set1_pd(SIMDE_FLOAT64_C(1.0)), t);
  6227. const simde__m128d p[] = {
  6228. simde_mm_set1_pd(SIMDE_FLOAT64_C( 0.00980456202915)),
  6229. simde_mm_set1_pd(SIMDE_FLOAT64_C( 0.36366788917100)),
  6230. simde_mm_set1_pd(SIMDE_FLOAT64_C( 0.97302949837000)),
  6231. simde_mm_set1_pd(SIMDE_FLOAT64_C( -0.5374947401000))
  6232. };
  6233. const simde__m128d q[] = {
  6234. simde_mm_set1_pd(SIMDE_FLOAT64_C( 0.00980451277802)),
  6235. simde_mm_set1_pd(SIMDE_FLOAT64_C( 0.36369997154400)),
  6236. simde_mm_set1_pd(SIMDE_FLOAT64_C( 1.00000000000000))
  6237. };
  6238. /* float numerator = (p[0] / t + p[1] + t * (p[2] + t * p[3])) */
  6239. simde__m128d numerator = simde_mm_fmadd_pd(p[3], t, p[2]);
  6240. numerator = simde_mm_fmadd_pd(numerator, t, p[1]);
  6241. numerator = simde_mm_add_pd(numerator, simde_mm_div_pd(p[0], t));
  6242. /* float denominator = (q[0] + t * (q[1] + t * (q[2]))) */
  6243. simde__m128d denominator = simde_mm_fmadd_pd(q[2], t, q[1]);
  6244. denominator = simde_mm_fmadd_pd(denominator, t, q[0]);
  6245. simde__m128d res = simde_mm_div_pd(numerator, denominator);
  6246. retval = simde_mm_or_pd(retval, simde_mm_and_pd(mask, res));
  6247. if (simde_mm_test_all_ones(simde_mm_castpd_si128(matched))) {
  6248. return retval;
  6249. }
  6250. }
  6251. }
  6252. { /* else if (a == 0.0) */
  6253. simde__m128d mask = simde_mm_cmpeq_pd(a, simde_mm_set1_pd(SIMDE_FLOAT64_C(0.0)));
  6254. mask = simde_mm_andnot_pd(matched, mask);
  6255. matched = simde_mm_or_pd(matched, mask);
  6256. simde__m128d res = simde_mm_set1_pd(SIMDE_MATH_INFINITY);
  6257. retval = simde_mm_or_pd(retval, simde_mm_and_pd(mask, res));
  6258. }
  6259. { /* else */
  6260. /* (a >= 2.0) */
  6261. retval = simde_mm_or_pd(retval, simde_mm_andnot_pd(matched, simde_mm_set1_pd(-SIMDE_MATH_INFINITY)));
  6262. }
  6263. return retval;
  6264. #else
  6265. simde__m128d_private
  6266. r_,
  6267. a_ = simde__m128d_to_private(a);
  6268. SIMDE_VECTORIZE
  6269. for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
  6270. r_.f64[i] = simde_math_erfcinv(a_.f64[i]);
  6271. }
  6272. return simde__m128d_from_private(r_);
  6273. #endif
  6274. }
  6275. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  6276. #undef _mm_erfcinv_pd
  6277. #define _mm_erfcinv_pd(a) simde_mm_erfcinv_pd(a)
  6278. #endif
  6279. SIMDE_FUNCTION_ATTRIBUTES
  6280. simde__m256
  6281. simde_mm256_erfcinv_ps (simde__m256 a) {
  6282. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
  6283. return _mm256_erfcinv_ps(a);
  6284. #elif SIMDE_NATURAL_VECTOR_SIZE_GE(256)
  6285. simde__m256 matched, retval = simde_mm256_setzero_ps();
  6286. { /* if (a < 2.0f && a > 0.0625f) */
  6287. matched = simde_mm256_cmp_ps(a, simde_mm256_set1_ps(SIMDE_FLOAT32_C(2.0)), SIMDE_CMP_LT_OQ);
  6288. matched = simde_mm256_and_ps(matched, simde_mm256_cmp_ps(a, simde_mm256_set1_ps(SIMDE_FLOAT32_C(0.0625)), SIMDE_CMP_GT_OQ));
  6289. if (!simde_mm256_testz_ps(matched, matched)) {
  6290. retval = simde_mm256_erfinv_ps(simde_mm256_sub_ps(simde_mm256_set1_ps(SIMDE_FLOAT32_C(1.0)), a));
  6291. }
  6292. if (simde_x_mm256_test_all_ones(simde_mm256_castps_si256(matched))) {
  6293. return retval;
  6294. }
  6295. }
  6296. { /* else if (a < 0.0625f && a > 0.0f) */
  6297. simde__m256 mask = simde_mm256_cmp_ps(a, simde_mm256_set1_ps(SIMDE_FLOAT32_C(0.0625)), SIMDE_CMP_LT_OQ);
  6298. mask = simde_mm256_and_ps(mask, simde_mm256_cmp_ps(a, simde_mm256_set1_ps(SIMDE_FLOAT32_C(0.0)), SIMDE_CMP_GT_OQ));
  6299. mask = simde_mm256_andnot_ps(matched, mask);
  6300. if (!simde_mm256_testz_ps(mask, mask)) {
  6301. matched = simde_mm256_or_ps(matched, mask);
  6302. /* t = 1/(sqrt(-log(a))) */
  6303. simde__m256 t = simde_x_mm256_negate_ps(simde_mm256_log_ps(a));
  6304. t = simde_mm256_sqrt_ps(t);
  6305. t = simde_mm256_div_ps(simde_mm256_set1_ps(SIMDE_FLOAT32_C(1.0)), t);
  6306. const simde__m256 p[] = {
  6307. simde_mm256_set1_ps(SIMDE_FLOAT32_C( 0.1550470003116)),
  6308. simde_mm256_set1_ps(SIMDE_FLOAT32_C( 1.382719649631)),
  6309. simde_mm256_set1_ps(SIMDE_FLOAT32_C( 0.690969348887)),
  6310. simde_mm256_set1_ps(SIMDE_FLOAT32_C(-1.128081391617)),
  6311. simde_mm256_set1_ps(SIMDE_FLOAT32_C( 0.680544246825)),
  6312. simde_mm256_set1_ps(SIMDE_FLOAT32_C(-0.16444156791))
  6313. };
  6314. const simde__m256 q[] = {
  6315. simde_mm256_set1_ps(SIMDE_FLOAT32_C( 0.155024849822)),
  6316. simde_mm256_set1_ps(SIMDE_FLOAT32_C( 1.385228141995)),
  6317. simde_mm256_set1_ps(SIMDE_FLOAT32_C( 1.000000000000))
  6318. };
  6319. /* float numerator = p[0] / t + p[1] + t * (p[2] + t * (p[3] + t * (p[4] + t * p[5])))) */
  6320. simde__m256 numerator = simde_mm256_fmadd_ps(p[5], t, p[4]);
  6321. numerator = simde_mm256_fmadd_ps(numerator, t, p[3]);
  6322. numerator = simde_mm256_fmadd_ps(numerator, t, p[2]);
  6323. numerator = simde_mm256_fmadd_ps(numerator, t, p[1]);
  6324. numerator = simde_mm256_add_ps(numerator, simde_mm256_div_ps(p[0], t));
  6325. /* float denominator = (q[0] + t * (q[1] + t * (q[2]))) */
  6326. simde__m256 denominator = simde_mm256_fmadd_ps(q[2], t, q[1]);
  6327. denominator = simde_mm256_fmadd_ps(denominator, t, q[0]);
  6328. simde__m256 res = simde_mm256_div_ps(numerator, denominator);
  6329. retval = simde_mm256_or_ps(retval, simde_mm256_and_ps(mask, res));
  6330. }
  6331. }
  6332. { /* else if (a < 0.0f) */
  6333. simde__m256 mask = simde_mm256_cmp_ps(a, simde_mm256_set1_ps(SIMDE_FLOAT32_C(0.0)), SIMDE_CMP_LT_OQ);
  6334. mask = simde_mm256_andnot_ps(matched, mask);
  6335. if (!simde_mm256_testz_ps(mask, mask)) {
  6336. matched = simde_mm256_or_ps(matched, mask);
  6337. /* t = 1/(sqrt(-log(a))) */
  6338. simde__m256 t = simde_x_mm256_negate_ps(simde_mm256_log_ps(a));
  6339. t = simde_mm256_sqrt_ps(t);
  6340. t = simde_mm256_div_ps(simde_mm256_set1_ps(SIMDE_FLOAT32_C(1.0)), t);
  6341. const simde__m256 p[] = {
  6342. simde_mm256_set1_ps(SIMDE_FLOAT32_C( 0.00980456202915)),
  6343. simde_mm256_set1_ps(SIMDE_FLOAT32_C( 0.36366788917100)),
  6344. simde_mm256_set1_ps(SIMDE_FLOAT32_C( 0.97302949837000)),
  6345. simde_mm256_set1_ps(SIMDE_FLOAT32_C(-0.5374947401000))
  6346. };
  6347. const simde__m256 q[] = {
  6348. simde_mm256_set1_ps(SIMDE_FLOAT32_C( 0.00980451277802)),
  6349. simde_mm256_set1_ps(SIMDE_FLOAT32_C( 0.36369997154400)),
  6350. simde_mm256_set1_ps(SIMDE_FLOAT32_C( 1.00000000000000))
  6351. };
  6352. /* float numerator = (p[0] / t + p[1] + t * (p[2] + t * p[3])) */
  6353. simde__m256 numerator = simde_mm256_fmadd_ps(p[3], t, p[2]);
  6354. numerator = simde_mm256_fmadd_ps(numerator, t, p[1]);
  6355. numerator = simde_mm256_add_ps(numerator, simde_mm256_div_ps(p[0], t));
  6356. /* float denominator = (q[0] + t * (q[1] + t * (q[2]))) */
  6357. simde__m256 denominator = simde_mm256_fmadd_ps(q[2], t, q[1]);
  6358. denominator = simde_mm256_fmadd_ps(denominator, t, q[0]);
  6359. simde__m256 res = simde_mm256_div_ps(numerator, denominator);
  6360. retval = simde_mm256_or_ps(retval, simde_mm256_and_ps(mask, res));
  6361. if (simde_x_mm256_test_all_ones(simde_mm256_castps_si256(matched))) {
  6362. return retval;
  6363. }
  6364. }
  6365. }
  6366. { /* else if (a == 0.0f) */
  6367. simde__m256 mask = simde_mm256_cmp_ps(a, simde_mm256_set1_ps(SIMDE_FLOAT32_C(0.0)), SIMDE_CMP_EQ_OQ);
  6368. mask = simde_mm256_andnot_ps(matched, mask);
  6369. matched = simde_mm256_or_ps(matched, mask);
  6370. simde__m256 res = simde_mm256_set1_ps(SIMDE_MATH_INFINITYF);
  6371. retval = simde_mm256_or_ps(retval, simde_mm256_and_ps(mask, res));
  6372. }
  6373. { /* else */
  6374. /* (a >= 2.0f) */
  6375. retval = simde_mm256_or_ps(retval, simde_mm256_andnot_ps(matched, simde_mm256_set1_ps(-SIMDE_MATH_INFINITYF)));
  6376. }
  6377. return retval;
  6378. #else
  6379. simde__m256_private
  6380. r_,
  6381. a_ = simde__m256_to_private(a);
  6382. #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
  6383. for (size_t i = 0 ; i < (sizeof(r_.m128) / sizeof(r_.m128[0])) ; i++) {
  6384. r_.m128[i] = simde_mm_erfcinv_ps(a_.m128[i]);
  6385. }
  6386. #else
  6387. SIMDE_VECTORIZE
  6388. for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
  6389. r_.f32[i] = simde_math_erfcinvf(a_.f32[i]);
  6390. }
  6391. #endif
  6392. return simde__m256_from_private(r_);
  6393. #endif
  6394. }
  6395. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  6396. #undef _mm256_erfcinv_ps
  6397. #define _mm256_erfcinv_ps(a) simde_mm256_erfcinv_ps(a)
  6398. #endif
  6399. SIMDE_FUNCTION_ATTRIBUTES
  6400. simde__m256d
  6401. simde_mm256_erfcinv_pd (simde__m256d a) {
  6402. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
  6403. return _mm256_erfcinv_pd(a);
  6404. #elif SIMDE_NATURAL_VECTOR_SIZE_GE(256)
  6405. simde__m256d matched, retval = simde_mm256_setzero_pd();
  6406. { /* if (a < 2.0 && a > 0.0625) */
  6407. matched = simde_mm256_cmp_pd(a, simde_mm256_set1_pd(SIMDE_FLOAT64_C(2.0)), SIMDE_CMP_LT_OQ);
  6408. matched = simde_mm256_and_pd(matched, simde_mm256_cmp_pd(a, simde_mm256_set1_pd(SIMDE_FLOAT64_C(0.0625)), SIMDE_CMP_GT_OQ));
  6409. if (!simde_mm256_testz_pd(matched, matched)) {
  6410. retval = simde_mm256_erfinv_pd(simde_mm256_sub_pd(simde_mm256_set1_pd(SIMDE_FLOAT64_C(1.0)), a));
  6411. }
  6412. if (simde_x_mm256_test_all_ones(simde_mm256_castpd_si256(matched))) {
  6413. return retval;
  6414. }
  6415. }
  6416. { /* else if (a < 0.0625 && a > 0.0) */
  6417. simde__m256d mask = simde_mm256_cmp_pd(a, simde_mm256_set1_pd(SIMDE_FLOAT64_C(0.0625)), SIMDE_CMP_LT_OQ);
  6418. mask = simde_mm256_and_pd(mask, simde_mm256_cmp_pd(a, simde_mm256_set1_pd(SIMDE_FLOAT64_C(0.0)), SIMDE_CMP_GT_OQ));
  6419. mask = simde_mm256_andnot_pd(matched, mask);
  6420. if (!simde_mm256_testz_pd(mask, mask)) {
  6421. matched = simde_mm256_or_pd(matched, mask);
  6422. /* t = 1/(sqrt(-log(a))) */
  6423. simde__m256d t = simde_x_mm256_negate_pd(simde_mm256_log_pd(a));
  6424. t = simde_mm256_sqrt_pd(t);
  6425. t = simde_mm256_div_pd(simde_mm256_set1_pd(SIMDE_FLOAT64_C(1.0)), t);
  6426. const simde__m256d p[] = {
  6427. simde_mm256_set1_pd(SIMDE_FLOAT64_C( 0.1550470003116)),
  6428. simde_mm256_set1_pd(SIMDE_FLOAT64_C( 1.382719649631)),
  6429. simde_mm256_set1_pd(SIMDE_FLOAT64_C( 0.690969348887)),
  6430. simde_mm256_set1_pd(SIMDE_FLOAT64_C(-1.128081391617)),
  6431. simde_mm256_set1_pd(SIMDE_FLOAT64_C( 0.680544246825)),
  6432. simde_mm256_set1_pd(SIMDE_FLOAT64_C(-0.16444156791))
  6433. };
  6434. const simde__m256d q[] = {
  6435. simde_mm256_set1_pd(SIMDE_FLOAT64_C( 0.155024849822)),
  6436. simde_mm256_set1_pd(SIMDE_FLOAT64_C( 1.385228141995)),
  6437. simde_mm256_set1_pd(SIMDE_FLOAT64_C( 1.000000000000))
  6438. };
  6439. /* float numerator = p[0] / t + p[1] + t * (p[2] + t * (p[3] + t * (p[4] + t * p[5])))) */
  6440. simde__m256d numerator = simde_mm256_fmadd_pd(p[5], t, p[4]);
  6441. numerator = simde_mm256_fmadd_pd(numerator, t, p[3]);
  6442. numerator = simde_mm256_fmadd_pd(numerator, t, p[2]);
  6443. numerator = simde_mm256_fmadd_pd(numerator, t, p[1]);
  6444. numerator = simde_mm256_add_pd(numerator, simde_mm256_div_pd(p[0], t));
  6445. /* float denominator = (q[0] + t * (q[1] + t * (q[2]))) */
  6446. simde__m256d denominator = simde_mm256_fmadd_pd(q[2], t, q[1]);
  6447. denominator = simde_mm256_fmadd_pd(denominator, t, q[0]);
  6448. simde__m256d res = simde_mm256_div_pd(numerator, denominator);
  6449. retval = simde_mm256_or_pd(retval, simde_mm256_and_pd(mask, res));
  6450. }
  6451. }
  6452. { /* else if (a < 0.0) */
  6453. simde__m256d mask = simde_mm256_cmp_pd(a, simde_mm256_set1_pd(SIMDE_FLOAT64_C(0.0)), SIMDE_CMP_LT_OQ);
  6454. mask = simde_mm256_andnot_pd(matched, mask);
  6455. if (!simde_mm256_testz_pd(mask, mask)) {
  6456. matched = simde_mm256_or_pd(matched, mask);
  6457. /* t = 1/(sqrt(-log(a))) */
  6458. simde__m256d t = simde_x_mm256_negate_pd(simde_mm256_log_pd(a));
  6459. t = simde_mm256_sqrt_pd(t);
  6460. t = simde_mm256_div_pd(simde_mm256_set1_pd(SIMDE_FLOAT64_C(1.0)), t);
  6461. const simde__m256d p[] = {
  6462. simde_mm256_set1_pd(SIMDE_FLOAT64_C( 0.00980456202915)),
  6463. simde_mm256_set1_pd(SIMDE_FLOAT64_C( 0.36366788917100)),
  6464. simde_mm256_set1_pd(SIMDE_FLOAT64_C( 0.97302949837000)),
  6465. simde_mm256_set1_pd(SIMDE_FLOAT64_C(-0.5374947401000))
  6466. };
  6467. const simde__m256d q[] = {
  6468. simde_mm256_set1_pd(SIMDE_FLOAT64_C( 0.00980451277802)),
  6469. simde_mm256_set1_pd(SIMDE_FLOAT64_C( 0.36369997154400)),
  6470. simde_mm256_set1_pd(SIMDE_FLOAT64_C( 1.00000000000000))
  6471. };
  6472. /* float numerator = (p[0] / t + p[1] + t * (p[2] + t * p[3])) */
  6473. simde__m256d numerator = simde_mm256_fmadd_pd(p[3], t, p[2]);
  6474. numerator = simde_mm256_fmadd_pd(numerator, t, p[1]);
  6475. numerator = simde_mm256_add_pd(numerator, simde_mm256_div_pd(p[0], t));
  6476. /* float denominator = (q[0] + t * (q[1] + t * (q[2]))) */
  6477. simde__m256d denominator = simde_mm256_fmadd_pd(q[2], t, q[1]);
  6478. denominator = simde_mm256_fmadd_pd(denominator, t, q[0]);
  6479. simde__m256d res = simde_mm256_div_pd(numerator, denominator);
  6480. retval = simde_mm256_or_pd(retval, simde_mm256_and_pd(mask, res));
  6481. if (simde_x_mm256_test_all_ones(simde_mm256_castpd_si256(matched))) {
  6482. return retval;
  6483. }
  6484. }
  6485. }
  6486. { /* else if (a == 0.0) */
  6487. simde__m256d mask = simde_mm256_cmp_pd(a, simde_mm256_set1_pd(SIMDE_FLOAT64_C(0.0)), SIMDE_CMP_EQ_OQ);
  6488. mask = simde_mm256_andnot_pd(matched, mask);
  6489. matched = simde_mm256_or_pd(matched, mask);
  6490. simde__m256d res = simde_mm256_set1_pd(SIMDE_MATH_INFINITY);
  6491. retval = simde_mm256_or_pd(retval, simde_mm256_and_pd(mask, res));
  6492. }
  6493. { /* else */
  6494. /* (a >= 2.0) */
  6495. retval = simde_mm256_or_pd(retval, simde_mm256_andnot_pd(matched, simde_mm256_set1_pd(-SIMDE_MATH_INFINITY)));
  6496. }
  6497. return retval;
  6498. #else
  6499. simde__m256d_private
  6500. r_,
  6501. a_ = simde__m256d_to_private(a);
  6502. #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
  6503. for (size_t i = 0 ; i < (sizeof(r_.m128d) / sizeof(r_.m128d[0])) ; i++) {
  6504. r_.m128d[i] = simde_mm_erfcinv_pd(a_.m128d[i]);
  6505. }
  6506. #else
  6507. SIMDE_VECTORIZE
  6508. for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
  6509. r_.f64[i] = simde_math_erfcinv(a_.f64[i]);
  6510. }
  6511. #endif
  6512. return simde__m256d_from_private(r_);
  6513. #endif
  6514. }
  6515. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  6516. #undef _mm256_erfcinv_pd
  6517. #define _mm256_erfcinv_pd(a) simde_mm256_erfcinv_pd(a)
  6518. #endif
  6519. SIMDE_FUNCTION_ATTRIBUTES
  6520. simde__m512
  6521. simde_mm512_erfcinv_ps (simde__m512 a) {
  6522. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  6523. return _mm512_erfcinv_ps(a);
  6524. #elif SIMDE_NATURAL_VECTOR_SIZE_LE(256) && (!defined(SIMDE_ARCH_ARM) || defined(SIMDE_ARCH_AARCH64))
  6525. /* The results on Arm are *slightly* off, which causes problems for
  6526. * the edge cases; for example, if you pass 2.0 sqrt will be called
  6527. * with a value of -0.0 instead of 0.0, resulting in a NaN. */
  6528. simde__m512_private
  6529. r_,
  6530. a_ = simde__m512_to_private(a);
  6531. for (size_t i = 0 ; i < (sizeof(r_.m256) / sizeof(r_.m256[0])) ; i++) {
  6532. r_.m256[i] = simde_mm256_erfcinv_ps(a_.m256[i]);
  6533. }
  6534. return simde__m512_from_private(r_);
  6535. #else
  6536. simde__m512 retval = simde_mm512_setzero_ps();
  6537. simde__mmask16 matched;
  6538. { /* if (a < 2.0f && a > 0.0625f) */
  6539. matched = simde_mm512_cmp_ps_mask(a, simde_mm512_set1_ps(SIMDE_FLOAT32_C(2.0)), SIMDE_CMP_LT_OQ);
  6540. matched &= simde_mm512_cmp_ps_mask(a, simde_mm512_set1_ps(SIMDE_FLOAT32_C(0.0625)), SIMDE_CMP_GT_OQ);
  6541. if (matched != 0) {
  6542. retval = simde_mm512_erfinv_ps(simde_mm512_sub_ps(simde_mm512_set1_ps(SIMDE_FLOAT32_C(1.0)), a));
  6543. }
  6544. if (matched == 1) {
  6545. return retval;
  6546. }
  6547. }
  6548. { /* else if (a < 0.0625f && a > 0.0f) */
  6549. simde__mmask16 mask = simde_mm512_cmp_ps_mask(a, simde_mm512_set1_ps(SIMDE_FLOAT32_C(0.0625)), SIMDE_CMP_LT_OQ);
  6550. mask &= simde_mm512_cmp_ps_mask(a, simde_mm512_set1_ps(SIMDE_FLOAT32_C(0.0)), SIMDE_CMP_GT_OQ);
  6551. mask = ~matched & mask;
  6552. if (mask != 0) {
  6553. matched = matched | mask;
  6554. /* t = 1/(sqrt(-log(a))) */
  6555. simde__m512 t = simde_x_mm512_negate_ps(simde_mm512_log_ps(a));
  6556. t = simde_mm512_sqrt_ps(t);
  6557. t = simde_mm512_div_ps(simde_mm512_set1_ps(SIMDE_FLOAT32_C(1.0)), t);
  6558. const simde__m512 p[] = {
  6559. simde_mm512_set1_ps(SIMDE_FLOAT32_C( 0.1550470003116)),
  6560. simde_mm512_set1_ps(SIMDE_FLOAT32_C( 1.382719649631)),
  6561. simde_mm512_set1_ps(SIMDE_FLOAT32_C( 0.690969348887)),
  6562. simde_mm512_set1_ps(SIMDE_FLOAT32_C(-1.128081391617)),
  6563. simde_mm512_set1_ps(SIMDE_FLOAT32_C( 0.680544246825)),
  6564. simde_mm512_set1_ps(SIMDE_FLOAT32_C(-0.16444156791))
  6565. };
  6566. const simde__m512 q[] = {
  6567. simde_mm512_set1_ps(SIMDE_FLOAT32_C( 0.155024849822)),
  6568. simde_mm512_set1_ps(SIMDE_FLOAT32_C( 1.385228141995)),
  6569. simde_mm512_set1_ps(SIMDE_FLOAT32_C( 1.000000000000))
  6570. };
  6571. /* float numerator = p[0] / t + p[1] + t * (p[2] + t * (p[3] + t * (p[4] + t * p[5])))) */
  6572. simde__m512 numerator = simde_mm512_fmadd_ps(p[5], t, p[4]);
  6573. numerator = simde_mm512_fmadd_ps(numerator, t, p[3]);
  6574. numerator = simde_mm512_fmadd_ps(numerator, t, p[2]);
  6575. numerator = simde_mm512_fmadd_ps(numerator, t, p[1]);
  6576. numerator = simde_mm512_add_ps(numerator, simde_mm512_div_ps(p[0], t));
  6577. /* float denominator = (q[0] + t * (q[1] + t * (q[2]))) */
  6578. simde__m512 denominator = simde_mm512_fmadd_ps(q[2], t, q[1]);
  6579. denominator = simde_mm512_fmadd_ps(denominator, t, q[0]);
  6580. simde__m512 res = simde_mm512_div_ps(numerator, denominator);
  6581. retval = simde_mm512_or_ps(retval, simde_mm512_maskz_mov_ps(mask, res));
  6582. }
  6583. }
  6584. { /* else if (a < 0.0f) */
  6585. simde__mmask16 mask = simde_mm512_cmp_ps_mask(a, simde_mm512_set1_ps(SIMDE_FLOAT32_C(0.0)), SIMDE_CMP_LT_OQ);
  6586. mask = ~matched & mask;
  6587. if (mask != 0) {
  6588. matched = matched | mask;
  6589. /* t = 1/(sqrt(-log(a))) */
  6590. simde__m512 t = simde_x_mm512_negate_ps(simde_mm512_log_ps(a));
  6591. t = simde_mm512_sqrt_ps(t);
  6592. t = simde_mm512_div_ps(simde_mm512_set1_ps(SIMDE_FLOAT32_C(1.0)), t);
  6593. const simde__m512 p[] = {
  6594. simde_mm512_set1_ps(SIMDE_FLOAT32_C( 0.00980456202915)),
  6595. simde_mm512_set1_ps(SIMDE_FLOAT32_C( 0.36366788917100)),
  6596. simde_mm512_set1_ps(SIMDE_FLOAT32_C( 0.97302949837000)),
  6597. simde_mm512_set1_ps(SIMDE_FLOAT32_C( -0.5374947401000))
  6598. };
  6599. const simde__m512 q[] = {
  6600. simde_mm512_set1_ps(SIMDE_FLOAT32_C( 0.00980451277802)),
  6601. simde_mm512_set1_ps(SIMDE_FLOAT32_C( 0.36369997154400)),
  6602. simde_mm512_set1_ps(SIMDE_FLOAT32_C( 1.00000000000000))
  6603. };
  6604. /* float numerator = (p[0] / t + p[1] + t * (p[2] + t * p[3])) */
  6605. simde__m512 numerator = simde_mm512_fmadd_ps(p[3], t, p[2]);
  6606. numerator = simde_mm512_fmadd_ps(numerator, t, p[1]);
  6607. numerator = simde_mm512_add_ps(numerator, simde_mm512_div_ps(p[0], t));
  6608. /* float denominator = (q[0] + t * (q[1] + t * (q[2]))) */
  6609. simde__m512 denominator = simde_mm512_fmadd_ps(q[2], t, q[1]);
  6610. denominator = simde_mm512_fmadd_ps(denominator, t, q[0]);
  6611. simde__m512 res = simde_mm512_div_ps(numerator, denominator);
  6612. retval = simde_mm512_or_ps(retval, simde_mm512_maskz_mov_ps(mask, res));
  6613. if (matched == 1) {
  6614. return retval;
  6615. }
  6616. }
  6617. }
  6618. { /* else if (a == 0.0f) */
  6619. simde__mmask16 mask = simde_mm512_cmp_ps_mask(a, simde_mm512_set1_ps(SIMDE_FLOAT32_C(0.0)), SIMDE_CMP_EQ_OQ);
  6620. mask = ~matched & mask;
  6621. matched = matched | mask;
  6622. simde__m512 res = simde_mm512_set1_ps(SIMDE_MATH_INFINITYF);
  6623. retval = simde_mm512_or_ps(retval, simde_mm512_maskz_mov_ps(mask, res));
  6624. }
  6625. { /* else */
  6626. /* (a >= 2.0f) */
  6627. retval = simde_mm512_or_ps(retval, simde_mm512_maskz_mov_ps(~matched, simde_mm512_set1_ps(-SIMDE_MATH_INFINITYF)));
  6628. }
  6629. return retval;
  6630. #endif
  6631. }
  6632. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  6633. #undef _mm512_erfcinv_ps
  6634. #define _mm512_erfcinv_ps(a) simde_mm512_erfcinv_ps(a)
  6635. #endif
  6636. SIMDE_FUNCTION_ATTRIBUTES
  6637. simde__m512d
  6638. simde_mm512_erfcinv_pd (simde__m512d a) {
  6639. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  6640. return _mm512_erfcinv_pd(a);
  6641. #elif SIMDE_NATURAL_VECTOR_SIZE_LE(256)
  6642. simde__m512d_private
  6643. r_,
  6644. a_ = simde__m512d_to_private(a);
  6645. for (size_t i = 0 ; i < (sizeof(r_.m256d) / sizeof(r_.m256d[0])) ; i++) {
  6646. r_.m256d[i] = simde_mm256_erfcinv_pd(a_.m256d[i]);
  6647. }
  6648. return simde__m512d_from_private(r_);
  6649. #else
  6650. simde__m512d retval = simde_mm512_setzero_pd();
  6651. simde__mmask8 matched;
  6652. { /* if (a < 2.0f && a > 0.0625f) */
  6653. matched = simde_mm512_cmp_pd_mask(a, simde_mm512_set1_pd(SIMDE_FLOAT64_C(2.0)), SIMDE_CMP_LT_OQ);
  6654. matched &= simde_mm512_cmp_pd_mask(a, simde_mm512_set1_pd(SIMDE_FLOAT64_C(0.0625)), SIMDE_CMP_GT_OQ);
  6655. if (matched != 0) {
  6656. retval = simde_mm512_erfinv_pd(simde_mm512_sub_pd(simde_mm512_set1_pd(SIMDE_FLOAT64_C(1.0)), a));
  6657. }
  6658. if (matched == 1) {
  6659. return retval;
  6660. }
  6661. }
  6662. { /* else if (a < 0.0625f && a > 0.0f) */
  6663. simde__mmask8 mask = simde_mm512_cmp_pd_mask(a, simde_mm512_set1_pd(SIMDE_FLOAT64_C(0.0625)), SIMDE_CMP_LT_OQ);
  6664. mask &= simde_mm512_cmp_pd_mask(a, simde_mm512_set1_pd(SIMDE_FLOAT64_C(0.0)), SIMDE_CMP_GT_OQ);
  6665. mask = ~matched & mask;
  6666. if (mask != 0) {
  6667. matched = matched | mask;
  6668. /* t = 1/(sqrt(-log(a))) */
  6669. simde__m512d t = simde_x_mm512_negate_pd(simde_mm512_log_pd(a));
  6670. t = simde_mm512_sqrt_pd(t);
  6671. t = simde_mm512_div_pd(simde_mm512_set1_pd(SIMDE_FLOAT64_C(1.0)), t);
  6672. const simde__m512d p[] = {
  6673. simde_mm512_set1_pd(SIMDE_FLOAT64_C( 0.1550470003116)),
  6674. simde_mm512_set1_pd(SIMDE_FLOAT64_C( 1.382719649631)),
  6675. simde_mm512_set1_pd(SIMDE_FLOAT64_C( 0.690969348887)),
  6676. simde_mm512_set1_pd(SIMDE_FLOAT64_C(-1.128081391617)),
  6677. simde_mm512_set1_pd(SIMDE_FLOAT64_C( 0.680544246825)),
  6678. simde_mm512_set1_pd(SIMDE_FLOAT64_C(-0.16444156791))
  6679. };
  6680. const simde__m512d q[] = {
  6681. simde_mm512_set1_pd(SIMDE_FLOAT64_C( 0.155024849822)),
  6682. simde_mm512_set1_pd(SIMDE_FLOAT64_C( 1.385228141995)),
  6683. simde_mm512_set1_pd(SIMDE_FLOAT64_C( 1.000000000000))
  6684. };
  6685. /* float numerator = p[0] / t + p[1] + t * (p[2] + t * (p[3] + t * (p[4] + t * p[5])))) */
  6686. simde__m512d numerator = simde_mm512_fmadd_pd(p[5], t, p[4]);
  6687. numerator = simde_mm512_fmadd_pd(numerator, t, p[3]);
  6688. numerator = simde_mm512_fmadd_pd(numerator, t, p[2]);
  6689. numerator = simde_mm512_fmadd_pd(numerator, t, p[1]);
  6690. numerator = simde_mm512_add_pd(numerator, simde_mm512_div_pd(p[0], t));
  6691. /* float denominator = (q[0] + t * (q[1] + t * (q[2]))) */
  6692. simde__m512d denominator = simde_mm512_fmadd_pd(q[2], t, q[1]);
  6693. denominator = simde_mm512_fmadd_pd(denominator, t, q[0]);
  6694. simde__m512d res = simde_mm512_div_pd(numerator, denominator);
  6695. retval = simde_mm512_or_pd(retval, simde_mm512_maskz_mov_pd(mask, res));
  6696. }
  6697. }
  6698. { /* else if (a < 0.0f) */
  6699. simde__mmask8 mask = simde_mm512_cmp_pd_mask(a, simde_mm512_set1_pd(SIMDE_FLOAT64_C(0.0)), SIMDE_CMP_LT_OQ);
  6700. mask = ~matched & mask;
  6701. if (mask != 0) {
  6702. matched = matched | mask;
  6703. /* t = 1/(sqrt(-log(a))) */
  6704. simde__m512d t = simde_x_mm512_negate_pd(simde_mm512_log_pd(a));
  6705. t = simde_mm512_sqrt_pd(t);
  6706. t = simde_mm512_div_pd(simde_mm512_set1_pd(SIMDE_FLOAT64_C(1.0)), t);
  6707. const simde__m512d p[] = {
  6708. simde_mm512_set1_pd(SIMDE_FLOAT64_C( 0.00980456202915)),
  6709. simde_mm512_set1_pd(SIMDE_FLOAT64_C( 0.36366788917100)),
  6710. simde_mm512_set1_pd(SIMDE_FLOAT64_C( 0.97302949837000)),
  6711. simde_mm512_set1_pd(SIMDE_FLOAT64_C( -0.5374947401000))
  6712. };
  6713. const simde__m512d q[] = {
  6714. simde_mm512_set1_pd(SIMDE_FLOAT64_C( 0.00980451277802)),
  6715. simde_mm512_set1_pd(SIMDE_FLOAT64_C( 0.36369997154400)),
  6716. simde_mm512_set1_pd(SIMDE_FLOAT64_C( 1.00000000000000))
  6717. };
  6718. /* float numerator = (p[0] / t + p[1] + t * (p[2] + t * p[3])) */
  6719. simde__m512d numerator = simde_mm512_fmadd_pd(p[3], t, p[2]);
  6720. numerator = simde_mm512_fmadd_pd(numerator, t, p[1]);
  6721. numerator = simde_mm512_add_pd(numerator, simde_mm512_div_pd(p[0], t));
  6722. /* float denominator = (q[0] + t * (q[1] + t * (q[2]))) */
  6723. simde__m512d denominator = simde_mm512_fmadd_pd(q[2], t, q[1]);
  6724. denominator = simde_mm512_fmadd_pd(denominator, t, q[0]);
  6725. simde__m512d res = simde_mm512_div_pd(numerator, denominator);
  6726. retval = simde_mm512_or_pd(retval, simde_mm512_maskz_mov_pd(mask, res));
  6727. if (matched == 1) {
  6728. return retval;
  6729. }
  6730. }
  6731. }
  6732. { /* else if (a == 0.0f) */
  6733. simde__mmask8 mask = simde_mm512_cmp_pd_mask(a, simde_mm512_set1_pd(SIMDE_FLOAT64_C(0.0)), SIMDE_CMP_EQ_OQ);
  6734. mask = ~matched & mask;
  6735. matched = matched | mask;
  6736. simde__m512d res = simde_mm512_set1_pd(SIMDE_MATH_INFINITY);
  6737. retval = simde_mm512_or_pd(retval, simde_mm512_maskz_mov_pd(mask, res));
  6738. }
  6739. { /* else */
  6740. /* (a >= 2.0f) */
  6741. retval = simde_mm512_or_pd(retval, simde_mm512_maskz_mov_pd(~matched, simde_mm512_set1_pd(-SIMDE_MATH_INFINITY)));
  6742. }
  6743. return retval;
  6744. #endif
  6745. }
  6746. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  6747. #undef _mm512_erfcinv_pd
  6748. #define _mm512_erfcinv_pd(a) simde_mm512_erfcinv_pd(a)
  6749. #endif
  6750. SIMDE_FUNCTION_ATTRIBUTES
  6751. simde__m512
  6752. simde_mm512_mask_erfcinv_ps(simde__m512 src, simde__mmask16 k, simde__m512 a) {
  6753. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  6754. return _mm512_mask_erfcinv_ps(src, k, a);
  6755. #else
  6756. return simde_mm512_mask_mov_ps(src, k, simde_mm512_erfcinv_ps(a));
  6757. #endif
  6758. }
  6759. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  6760. #undef _mm512_mask_erfcinv_ps
  6761. #define _mm512_mask_erfcinv_ps(src, k, a) simde_mm512_mask_erfcinv_ps(src, k, a)
  6762. #endif
  6763. SIMDE_FUNCTION_ATTRIBUTES
  6764. simde__m512d
  6765. simde_mm512_mask_erfcinv_pd(simde__m512d src, simde__mmask8 k, simde__m512d a) {
  6766. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  6767. return _mm512_mask_erfcinv_pd(src, k, a);
  6768. #else
  6769. return simde_mm512_mask_mov_pd(src, k, simde_mm512_erfcinv_pd(a));
  6770. #endif
  6771. }
  6772. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  6773. #undef _mm512_mask_erfcinv_pd
  6774. #define _mm512_mask_erfcinv_pd(src, k, a) simde_mm512_mask_erfcinv_pd(src, k, a)
  6775. #endif
  6776. SIMDE_FUNCTION_ATTRIBUTES
  6777. simde__m128
  6778. simde_mm_logb_ps (simde__m128 a) {
  6779. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
  6780. return _mm_logb_ps(a);
  6781. #else
  6782. simde__m128_private
  6783. r_,
  6784. a_ = simde__m128_to_private(a);
  6785. SIMDE_VECTORIZE
  6786. for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
  6787. r_.f32[i] = simde_math_logbf(a_.f32[i]);
  6788. }
  6789. return simde__m128_from_private(r_);
  6790. #endif
  6791. }
  6792. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  6793. #undef _mm_logb_ps
  6794. #define _mm_logb_ps(a) simde_mm_logb_ps(a)
  6795. #endif
  6796. SIMDE_FUNCTION_ATTRIBUTES
  6797. simde__m128d
  6798. simde_mm_logb_pd (simde__m128d a) {
  6799. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
  6800. return _mm_logb_pd(a);
  6801. #else
  6802. simde__m128d_private
  6803. r_,
  6804. a_ = simde__m128d_to_private(a);
  6805. SIMDE_VECTORIZE
  6806. for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
  6807. r_.f64[i] = simde_math_logb(a_.f64[i]);
  6808. }
  6809. return simde__m128d_from_private(r_);
  6810. #endif
  6811. }
  6812. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  6813. #undef _mm_logb_pd
  6814. #define _mm_logb_pd(a) simde_mm_logb_pd(a)
  6815. #endif
  6816. SIMDE_FUNCTION_ATTRIBUTES
  6817. simde__m256
  6818. simde_mm256_logb_ps (simde__m256 a) {
  6819. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
  6820. return _mm256_logb_ps(a);
  6821. #else
  6822. simde__m256_private
  6823. r_,
  6824. a_ = simde__m256_to_private(a);
  6825. #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
  6826. for (size_t i = 0 ; i < (sizeof(r_.m128) / sizeof(r_.m128[0])) ; i++) {
  6827. r_.m128[i] = simde_mm_logb_ps(a_.m128[i]);
  6828. }
  6829. #else
  6830. SIMDE_VECTORIZE
  6831. for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
  6832. r_.f32[i] = simde_math_logbf(a_.f32[i]);
  6833. }
  6834. #endif
  6835. return simde__m256_from_private(r_);
  6836. #endif
  6837. }
  6838. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  6839. #undef _mm256_logb_ps
  6840. #define _mm256_logb_ps(a) simde_mm256_logb_ps(a)
  6841. #endif
  6842. SIMDE_FUNCTION_ATTRIBUTES
  6843. simde__m256d
  6844. simde_mm256_logb_pd (simde__m256d a) {
  6845. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
  6846. return _mm256_logb_pd(a);
  6847. #else
  6848. simde__m256d_private
  6849. r_,
  6850. a_ = simde__m256d_to_private(a);
  6851. #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
  6852. for (size_t i = 0 ; i < (sizeof(r_.m128d) / sizeof(r_.m128d[0])) ; i++) {
  6853. r_.m128d[i] = simde_mm_logb_pd(a_.m128d[i]);
  6854. }
  6855. #else
  6856. SIMDE_VECTORIZE
  6857. for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
  6858. r_.f64[i] = simde_math_logb(a_.f64[i]);
  6859. }
  6860. #endif
  6861. return simde__m256d_from_private(r_);
  6862. #endif
  6863. }
  6864. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  6865. #undef _mm256_logb_pd
  6866. #define _mm256_logb_pd(a) simde_mm256_logb_pd(a)
  6867. #endif
  6868. SIMDE_FUNCTION_ATTRIBUTES
  6869. simde__m512
  6870. simde_mm512_logb_ps (simde__m512 a) {
  6871. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  6872. return _mm512_logb_ps(a);
  6873. #else
  6874. simde__m512_private
  6875. r_,
  6876. a_ = simde__m512_to_private(a);
  6877. #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
  6878. for (size_t i = 0 ; i < (sizeof(r_.m256) / sizeof(r_.m256[0])) ; i++) {
  6879. r_.m256[i] = simde_mm256_logb_ps(a_.m256[i]);
  6880. }
  6881. #else
  6882. SIMDE_VECTORIZE
  6883. for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
  6884. r_.f32[i] = simde_math_logbf(a_.f32[i]);
  6885. }
  6886. #endif
  6887. return simde__m512_from_private(r_);
  6888. #endif
  6889. }
  6890. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  6891. #undef _mm512_logb_ps
  6892. #define _mm512_logb_ps(a) simde_mm512_logb_ps(a)
  6893. #endif
  6894. SIMDE_FUNCTION_ATTRIBUTES
  6895. simde__m512d
  6896. simde_mm512_logb_pd (simde__m512d a) {
  6897. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  6898. return _mm512_logb_pd(a);
  6899. #else
  6900. simde__m512d_private
  6901. r_,
  6902. a_ = simde__m512d_to_private(a);
  6903. #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
  6904. for (size_t i = 0 ; i < (sizeof(r_.m256d) / sizeof(r_.m256d[0])) ; i++) {
  6905. r_.m256d[i] = simde_mm256_logb_pd(a_.m256d[i]);
  6906. }
  6907. #else
  6908. SIMDE_VECTORIZE
  6909. for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
  6910. r_.f64[i] = simde_math_logb(a_.f64[i]);
  6911. }
  6912. #endif
  6913. return simde__m512d_from_private(r_);
  6914. #endif
  6915. }
  6916. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  6917. #undef _mm512_logb_pd
  6918. #define _mm512_logb_pd(a) simde_mm512_logb_pd(a)
  6919. #endif
  6920. SIMDE_FUNCTION_ATTRIBUTES
  6921. simde__m512
  6922. simde_mm512_mask_logb_ps(simde__m512 src, simde__mmask16 k, simde__m512 a) {
  6923. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  6924. return _mm512_mask_logb_ps(src, k, a);
  6925. #else
  6926. return simde_mm512_mask_mov_ps(src, k, simde_mm512_logb_ps(a));
  6927. #endif
  6928. }
  6929. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  6930. #undef _mm512_mask_logb_ps
  6931. #define _mm512_mask_logb_ps(src, k, a) simde_mm512_mask_logb_ps(src, k, a)
  6932. #endif
  6933. SIMDE_FUNCTION_ATTRIBUTES
  6934. simde__m512d
  6935. simde_mm512_mask_logb_pd(simde__m512d src, simde__mmask8 k, simde__m512d a) {
  6936. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  6937. return _mm512_mask_logb_pd(src, k, a);
  6938. #else
  6939. return simde_mm512_mask_mov_pd(src, k, simde_mm512_logb_pd(a));
  6940. #endif
  6941. }
  6942. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  6943. #undef _mm512_mask_logb_pd
  6944. #define _mm512_mask_logb_pd(src, k, a) simde_mm512_mask_logb_pd(src, k, a)
  6945. #endif
  6946. SIMDE_FUNCTION_ATTRIBUTES
  6947. simde__m128
  6948. simde_mm_log2_ps (simde__m128 a) {
  6949. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
  6950. return _mm_log2_ps(a);
  6951. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
  6952. #if SIMDE_MATH_SLEEF_VERSION_CHECK(3,4,0) && (SIMDE_ACCURACY_PREFERENCE <= 1)
  6953. return Sleef_log2f4_u35(a);
  6954. #else
  6955. return Sleef_log2f4_u10(a);
  6956. #endif
  6957. #else
  6958. simde__m128_private
  6959. r_,
  6960. a_ = simde__m128_to_private(a);
  6961. SIMDE_VECTORIZE
  6962. for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
  6963. r_.f32[i] = simde_math_log2f(a_.f32[i]);
  6964. }
  6965. return simde__m128_from_private(r_);
  6966. #endif
  6967. }
  6968. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  6969. #undef _mm_log2_ps
  6970. #define _mm_log2_ps(a) simde_mm_log2_ps(a)
  6971. #endif
  6972. SIMDE_FUNCTION_ATTRIBUTES
  6973. simde__m128d
  6974. simde_mm_log2_pd (simde__m128d a) {
  6975. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
  6976. return _mm_log2_pd(a);
  6977. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
  6978. #if SIMDE_MATH_SLEEF_VERSION_CHECK(3,4,0) && (SIMDE_ACCURACY_PREFERENCE <= 1)
  6979. return Sleef_log2d2_u35(a);
  6980. #else
  6981. return Sleef_log2d2_u10(a);
  6982. #endif
  6983. #else
  6984. simde__m128d_private
  6985. r_,
  6986. a_ = simde__m128d_to_private(a);
  6987. SIMDE_VECTORIZE
  6988. for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
  6989. r_.f64[i] = simde_math_log2(a_.f64[i]);
  6990. }
  6991. return simde__m128d_from_private(r_);
  6992. #endif
  6993. }
  6994. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  6995. #undef _mm_log2_pd
  6996. #define _mm_log2_pd(a) simde_mm_log2_pd(a)
  6997. #endif
  6998. SIMDE_FUNCTION_ATTRIBUTES
  6999. simde__m256
  7000. simde_mm256_log2_ps (simde__m256 a) {
  7001. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
  7002. return _mm256_log2_ps(a);
  7003. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
  7004. #if SIMDE_MATH_SLEEF_VERSION_CHECK(3,4,0) && (SIMDE_ACCURACY_PREFERENCE <= 1)
  7005. return Sleef_log2f8_u35(a);
  7006. #else
  7007. return Sleef_log2f8_u10(a);
  7008. #endif
  7009. #else
  7010. simde__m256_private
  7011. r_,
  7012. a_ = simde__m256_to_private(a);
  7013. #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
  7014. for (size_t i = 0 ; i < (sizeof(r_.m128) / sizeof(r_.m128[0])) ; i++) {
  7015. r_.m128[i] = simde_mm_log2_ps(a_.m128[i]);
  7016. }
  7017. #else
  7018. SIMDE_VECTORIZE
  7019. for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
  7020. r_.f32[i] = simde_math_log2f(a_.f32[i]);
  7021. }
  7022. #endif
  7023. return simde__m256_from_private(r_);
  7024. #endif
  7025. }
  7026. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  7027. #undef _mm256_log2_ps
  7028. #define _mm256_log2_ps(a) simde_mm256_log2_ps(a)
  7029. #endif
  7030. SIMDE_FUNCTION_ATTRIBUTES
  7031. simde__m256d
  7032. simde_mm256_log2_pd (simde__m256d a) {
  7033. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
  7034. return _mm256_log2_pd(a);
  7035. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
  7036. #if SIMDE_MATH_SLEEF_VERSION_CHECK(3,4,0) && (SIMDE_ACCURACY_PREFERENCE <= 1)
  7037. return Sleef_log2d4_u35(a);
  7038. #else
  7039. return Sleef_log2d4_u10(a);
  7040. #endif
  7041. #else
  7042. simde__m256d_private
  7043. r_,
  7044. a_ = simde__m256d_to_private(a);
  7045. #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
  7046. for (size_t i = 0 ; i < (sizeof(r_.m128d) / sizeof(r_.m128d[0])) ; i++) {
  7047. r_.m128d[i] = simde_mm_log2_pd(a_.m128d[i]);
  7048. }
  7049. #else
  7050. SIMDE_VECTORIZE
  7051. for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
  7052. r_.f64[i] = simde_math_log2(a_.f64[i]);
  7053. }
  7054. #endif
  7055. return simde__m256d_from_private(r_);
  7056. #endif
  7057. }
  7058. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  7059. #undef _mm256_log2_pd
  7060. #define _mm256_log2_pd(a) simde_mm256_log2_pd(a)
  7061. #endif
  7062. SIMDE_FUNCTION_ATTRIBUTES
  7063. simde__m512
  7064. simde_mm512_log2_ps (simde__m512 a) {
  7065. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  7066. return _mm512_log2_ps(a);
  7067. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
  7068. #if SIMDE_MATH_SLEEF_VERSION_CHECK(3,4,0) && (SIMDE_ACCURACY_PREFERENCE <= 1)
  7069. return Sleef_log2f16_u35(a);
  7070. #else
  7071. return Sleef_log2f16_u10(a);
  7072. #endif
  7073. #else
  7074. simde__m512_private
  7075. r_,
  7076. a_ = simde__m512_to_private(a);
  7077. #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
  7078. for (size_t i = 0 ; i < (sizeof(r_.m256) / sizeof(r_.m256[0])) ; i++) {
  7079. r_.m256[i] = simde_mm256_log2_ps(a_.m256[i]);
  7080. }
  7081. #else
  7082. SIMDE_VECTORIZE
  7083. for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
  7084. r_.f32[i] = simde_math_log2f(a_.f32[i]);
  7085. }
  7086. #endif
  7087. return simde__m512_from_private(r_);
  7088. #endif
  7089. }
  7090. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  7091. #undef _mm512_log2_ps
  7092. #define _mm512_log2_ps(a) simde_mm512_log2_ps(a)
  7093. #endif
  7094. SIMDE_FUNCTION_ATTRIBUTES
  7095. simde__m512d
  7096. simde_mm512_log2_pd (simde__m512d a) {
  7097. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  7098. return _mm512_log2_pd(a);
  7099. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
  7100. #if SIMDE_MATH_SLEEF_VERSION_CHECK(3,4,0) && (SIMDE_ACCURACY_PREFERENCE <= 1)
  7101. return Sleef_log2d8_u35(a);
  7102. #else
  7103. return Sleef_log2d8_u10(a);
  7104. #endif
  7105. #else
  7106. simde__m512d_private
  7107. r_,
  7108. a_ = simde__m512d_to_private(a);
  7109. #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
  7110. for (size_t i = 0 ; i < (sizeof(r_.m256d) / sizeof(r_.m256d[0])) ; i++) {
  7111. r_.m256d[i] = simde_mm256_log2_pd(a_.m256d[i]);
  7112. }
  7113. #else
  7114. SIMDE_VECTORIZE
  7115. for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
  7116. r_.f64[i] = simde_math_log2(a_.f64[i]);
  7117. }
  7118. #endif
  7119. return simde__m512d_from_private(r_);
  7120. #endif
  7121. }
  7122. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  7123. #undef _mm512_log2_pd
  7124. #define _mm512_log2_pd(a) simde_mm512_log2_pd(a)
  7125. #endif
  7126. SIMDE_FUNCTION_ATTRIBUTES
  7127. simde__m512
  7128. simde_mm512_mask_log2_ps(simde__m512 src, simde__mmask16 k, simde__m512 a) {
  7129. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  7130. return _mm512_mask_log2_ps(src, k, a);
  7131. #else
  7132. return simde_mm512_mask_mov_ps(src, k, simde_mm512_log2_ps(a));
  7133. #endif
  7134. }
  7135. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  7136. #undef _mm512_mask_log2_ps
  7137. #define _mm512_mask_log2_ps(src, k, a) simde_mm512_mask_log2_ps(src, k, a)
  7138. #endif
  7139. SIMDE_FUNCTION_ATTRIBUTES
  7140. simde__m512d
  7141. simde_mm512_mask_log2_pd(simde__m512d src, simde__mmask8 k, simde__m512d a) {
  7142. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  7143. return _mm512_mask_log2_pd(src, k, a);
  7144. #else
  7145. return simde_mm512_mask_mov_pd(src, k, simde_mm512_log2_pd(a));
  7146. #endif
  7147. }
  7148. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  7149. #undef _mm512_mask_log2_pd
  7150. #define _mm512_mask_log2_pd(src, k, a) simde_mm512_mask_log2_pd(src, k, a)
  7151. #endif
  7152. SIMDE_FUNCTION_ATTRIBUTES
  7153. simde__m128
  7154. simde_mm_log1p_ps (simde__m128 a) {
  7155. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
  7156. return _mm_log1p_ps(a);
  7157. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
  7158. return Sleef_log1pf4_u10(a);
  7159. #else
  7160. simde__m128_private
  7161. r_,
  7162. a_ = simde__m128_to_private(a);
  7163. SIMDE_VECTORIZE
  7164. for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
  7165. r_.f32[i] = simde_math_log1pf(a_.f32[i]);
  7166. }
  7167. return simde__m128_from_private(r_);
  7168. #endif
  7169. }
  7170. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  7171. #undef _mm_log1p_ps
  7172. #define _mm_log1p_ps(a) simde_mm_log1p_ps(a)
  7173. #endif
  7174. SIMDE_FUNCTION_ATTRIBUTES
  7175. simde__m128d
  7176. simde_mm_log1p_pd (simde__m128d a) {
  7177. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
  7178. return _mm_log1p_pd(a);
  7179. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
  7180. return Sleef_log1pd2_u10(a);
  7181. #else
  7182. simde__m128d_private
  7183. r_,
  7184. a_ = simde__m128d_to_private(a);
  7185. SIMDE_VECTORIZE
  7186. for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
  7187. r_.f64[i] = simde_math_log1p(a_.f64[i]);
  7188. }
  7189. return simde__m128d_from_private(r_);
  7190. #endif
  7191. }
  7192. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  7193. #undef _mm_log1p_pd
  7194. #define _mm_log1p_pd(a) simde_mm_log1p_pd(a)
  7195. #endif
  7196. SIMDE_FUNCTION_ATTRIBUTES
  7197. simde__m256
  7198. simde_mm256_log1p_ps (simde__m256 a) {
  7199. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
  7200. return _mm256_log1p_ps(a);
  7201. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
  7202. return Sleef_log1pf8_u10(a);
  7203. #else
  7204. simde__m256_private
  7205. r_,
  7206. a_ = simde__m256_to_private(a);
  7207. #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
  7208. for (size_t i = 0 ; i < (sizeof(r_.m128) / sizeof(r_.m128[0])) ; i++) {
  7209. r_.m128[i] = simde_mm_log1p_ps(a_.m128[i]);
  7210. }
  7211. #else
  7212. SIMDE_VECTORIZE
  7213. for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
  7214. r_.f32[i] = simde_math_log1pf(a_.f32[i]);
  7215. }
  7216. #endif
  7217. return simde__m256_from_private(r_);
  7218. #endif
  7219. }
  7220. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  7221. #undef _mm256_log1p_ps
  7222. #define _mm256_log1p_ps(a) simde_mm256_log1p_ps(a)
  7223. #endif
  7224. SIMDE_FUNCTION_ATTRIBUTES
  7225. simde__m256d
  7226. simde_mm256_log1p_pd (simde__m256d a) {
  7227. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
  7228. return _mm256_log1p_pd(a);
  7229. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
  7230. return Sleef_log1pd4_u10(a);
  7231. #else
  7232. simde__m256d_private
  7233. r_,
  7234. a_ = simde__m256d_to_private(a);
  7235. #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
  7236. for (size_t i = 0 ; i < (sizeof(r_.m128d) / sizeof(r_.m128d[0])) ; i++) {
  7237. r_.m128d[i] = simde_mm_log1p_pd(a_.m128d[i]);
  7238. }
  7239. #else
  7240. SIMDE_VECTORIZE
  7241. for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
  7242. r_.f64[i] = simde_math_log1p(a_.f64[i]);
  7243. }
  7244. #endif
  7245. return simde__m256d_from_private(r_);
  7246. #endif
  7247. }
  7248. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  7249. #undef _mm256_log1p_pd
  7250. #define _mm256_log1p_pd(a) simde_mm256_log1p_pd(a)
  7251. #endif
  7252. SIMDE_FUNCTION_ATTRIBUTES
  7253. simde__m512
  7254. simde_mm512_log1p_ps (simde__m512 a) {
  7255. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  7256. return _mm512_log1p_ps(a);
  7257. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
  7258. return Sleef_log1pf16_u10(a);
  7259. #else
  7260. simde__m512_private
  7261. r_,
  7262. a_ = simde__m512_to_private(a);
  7263. #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
  7264. for (size_t i = 0 ; i < (sizeof(r_.m256) / sizeof(r_.m256[0])) ; i++) {
  7265. r_.m256[i] = simde_mm256_log1p_ps(a_.m256[i]);
  7266. }
  7267. #else
  7268. SIMDE_VECTORIZE
  7269. for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
  7270. r_.f32[i] = simde_math_log1pf(a_.f32[i]);
  7271. }
  7272. #endif
  7273. return simde__m512_from_private(r_);
  7274. #endif
  7275. }
  7276. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  7277. #undef _mm512_log1p_ps
  7278. #define _mm512_log1p_ps(a) simde_mm512_log1p_ps(a)
  7279. #endif
  7280. SIMDE_FUNCTION_ATTRIBUTES
  7281. simde__m512d
  7282. simde_mm512_log1p_pd (simde__m512d a) {
  7283. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  7284. return _mm512_log1p_pd(a);
  7285. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
  7286. return Sleef_log1pd8_u10(a);
  7287. #else
  7288. simde__m512d_private
  7289. r_,
  7290. a_ = simde__m512d_to_private(a);
  7291. #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
  7292. for (size_t i = 0 ; i < (sizeof(r_.m256d) / sizeof(r_.m256d[0])) ; i++) {
  7293. r_.m256d[i] = simde_mm256_log1p_pd(a_.m256d[i]);
  7294. }
  7295. #else
  7296. SIMDE_VECTORIZE
  7297. for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
  7298. r_.f64[i] = simde_math_log1p(a_.f64[i]);
  7299. }
  7300. #endif
  7301. return simde__m512d_from_private(r_);
  7302. #endif
  7303. }
  7304. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  7305. #undef _mm512_log1p_pd
  7306. #define _mm512_log1p_pd(a) simde_mm512_log1p_pd(a)
  7307. #endif
  7308. SIMDE_FUNCTION_ATTRIBUTES
  7309. simde__m512
  7310. simde_mm512_mask_log1p_ps(simde__m512 src, simde__mmask16 k, simde__m512 a) {
  7311. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  7312. return _mm512_mask_log1p_ps(src, k, a);
  7313. #else
  7314. return simde_mm512_mask_mov_ps(src, k, simde_mm512_log1p_ps(a));
  7315. #endif
  7316. }
  7317. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  7318. #undef _mm512_mask_log1p_ps
  7319. #define _mm512_mask_log1p_ps(src, k, a) simde_mm512_mask_log1p_ps(src, k, a)
  7320. #endif
  7321. SIMDE_FUNCTION_ATTRIBUTES
  7322. simde__m512d
  7323. simde_mm512_mask_log1p_pd(simde__m512d src, simde__mmask8 k, simde__m512d a) {
  7324. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  7325. return _mm512_mask_log1p_pd(src, k, a);
  7326. #else
  7327. return simde_mm512_mask_mov_pd(src, k, simde_mm512_log1p_pd(a));
  7328. #endif
  7329. }
  7330. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  7331. #undef _mm512_mask_log1p_pd
  7332. #define _mm512_mask_log1p_pd(src, k, a) simde_mm512_mask_log1p_pd(src, k, a)
  7333. #endif
  7334. SIMDE_FUNCTION_ATTRIBUTES
  7335. simde__m128
  7336. simde_mm_log10_ps (simde__m128 a) {
  7337. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
  7338. return _mm_log10_ps(a);
  7339. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
  7340. return Sleef_log10f4_u10(a);
  7341. #else
  7342. simde__m128_private
  7343. r_,
  7344. a_ = simde__m128_to_private(a);
  7345. SIMDE_VECTORIZE
  7346. for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
  7347. r_.f32[i] = simde_math_log10f(a_.f32[i]);
  7348. }
  7349. return simde__m128_from_private(r_);
  7350. #endif
  7351. }
  7352. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  7353. #undef _mm_log10_ps
  7354. #define _mm_log10_ps(a) simde_mm_log10_ps(a)
  7355. #endif
  7356. SIMDE_FUNCTION_ATTRIBUTES
  7357. simde__m128d
  7358. simde_mm_log10_pd (simde__m128d a) {
  7359. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
  7360. return _mm_log10_pd(a);
  7361. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
  7362. return Sleef_log10d2_u10(a);
  7363. #else
  7364. simde__m128d_private
  7365. r_,
  7366. a_ = simde__m128d_to_private(a);
  7367. SIMDE_VECTORIZE
  7368. for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
  7369. r_.f64[i] = simde_math_log10(a_.f64[i]);
  7370. }
  7371. return simde__m128d_from_private(r_);
  7372. #endif
  7373. }
  7374. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  7375. #undef _mm_log10_pd
  7376. #define _mm_log10_pd(a) simde_mm_log10_pd(a)
  7377. #endif
  7378. SIMDE_FUNCTION_ATTRIBUTES
  7379. simde__m256
  7380. simde_mm256_log10_ps (simde__m256 a) {
  7381. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
  7382. return _mm256_log10_ps(a);
  7383. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
  7384. return Sleef_log10f8_u10(a);
  7385. #else
  7386. simde__m256_private
  7387. r_,
  7388. a_ = simde__m256_to_private(a);
  7389. #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
  7390. for (size_t i = 0 ; i < (sizeof(r_.m128) / sizeof(r_.m128[0])) ; i++) {
  7391. r_.m128[i] = simde_mm_log10_ps(a_.m128[i]);
  7392. }
  7393. #else
  7394. SIMDE_VECTORIZE
  7395. for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
  7396. r_.f32[i] = simde_math_log10f(a_.f32[i]);
  7397. }
  7398. #endif
  7399. return simde__m256_from_private(r_);
  7400. #endif
  7401. }
  7402. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  7403. #undef _mm256_log10_ps
  7404. #define _mm256_log10_ps(a) simde_mm256_log10_ps(a)
  7405. #endif
  7406. SIMDE_FUNCTION_ATTRIBUTES
  7407. simde__m256d
  7408. simde_mm256_log10_pd (simde__m256d a) {
  7409. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
  7410. return _mm256_log10_pd(a);
  7411. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
  7412. return Sleef_log10d4_u10(a);
  7413. #else
  7414. simde__m256d_private
  7415. r_,
  7416. a_ = simde__m256d_to_private(a);
  7417. #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
  7418. for (size_t i = 0 ; i < (sizeof(r_.m128d) / sizeof(r_.m128d[0])) ; i++) {
  7419. r_.m128d[i] = simde_mm_log10_pd(a_.m128d[i]);
  7420. }
  7421. #else
  7422. SIMDE_VECTORIZE
  7423. for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
  7424. r_.f64[i] = simde_math_log10(a_.f64[i]);
  7425. }
  7426. #endif
  7427. return simde__m256d_from_private(r_);
  7428. #endif
  7429. }
  7430. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  7431. #undef _mm256_log10_pd
  7432. #define _mm256_log10_pd(a) simde_mm256_log10_pd(a)
  7433. #endif
  7434. SIMDE_FUNCTION_ATTRIBUTES
  7435. simde__m512
  7436. simde_mm512_log10_ps (simde__m512 a) {
  7437. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  7438. return _mm512_log10_ps(a);
  7439. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
  7440. return Sleef_log10f16_u10(a);
  7441. #else
  7442. simde__m512_private
  7443. r_,
  7444. a_ = simde__m512_to_private(a);
  7445. #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
  7446. for (size_t i = 0 ; i < (sizeof(r_.m256) / sizeof(r_.m256[0])) ; i++) {
  7447. r_.m256[i] = simde_mm256_log10_ps(a_.m256[i]);
  7448. }
  7449. #else
  7450. SIMDE_VECTORIZE
  7451. for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
  7452. r_.f32[i] = simde_math_log10f(a_.f32[i]);
  7453. }
  7454. #endif
  7455. return simde__m512_from_private(r_);
  7456. #endif
  7457. }
  7458. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  7459. #undef _mm512_log10_ps
  7460. #define _mm512_log10_ps(a) simde_mm512_log10_ps(a)
  7461. #endif
  7462. SIMDE_FUNCTION_ATTRIBUTES
  7463. simde__m512d
  7464. simde_mm512_log10_pd (simde__m512d a) {
  7465. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  7466. return _mm512_log10_pd(a);
  7467. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
  7468. return Sleef_log10d8_u10(a);
  7469. #else
  7470. simde__m512d_private
  7471. r_,
  7472. a_ = simde__m512d_to_private(a);
  7473. #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
  7474. for (size_t i = 0 ; i < (sizeof(r_.m256d) / sizeof(r_.m256d[0])) ; i++) {
  7475. r_.m256d[i] = simde_mm256_log10_pd(a_.m256d[i]);
  7476. }
  7477. #else
  7478. SIMDE_VECTORIZE
  7479. for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
  7480. r_.f64[i] = simde_math_log10(a_.f64[i]);
  7481. }
  7482. #endif
  7483. return simde__m512d_from_private(r_);
  7484. #endif
  7485. }
  7486. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  7487. #undef _mm512_log10_pd
  7488. #define _mm512_log10_pd(a) simde_mm512_log10_pd(a)
  7489. #endif
  7490. SIMDE_FUNCTION_ATTRIBUTES
  7491. simde__m512
  7492. simde_mm512_mask_log10_ps(simde__m512 src, simde__mmask16 k, simde__m512 a) {
  7493. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  7494. return _mm512_mask_log10_ps(src, k, a);
  7495. #else
  7496. return simde_mm512_mask_mov_ps(src, k, simde_mm512_log10_ps(a));
  7497. #endif
  7498. }
  7499. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  7500. #undef _mm512_mask_log10_ps
  7501. #define _mm512_mask_log10_ps(src, k, a) simde_mm512_mask_log10_ps(src, k, a)
  7502. #endif
  7503. SIMDE_FUNCTION_ATTRIBUTES
  7504. simde__m512d
  7505. simde_mm512_mask_log10_pd(simde__m512d src, simde__mmask8 k, simde__m512d a) {
  7506. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  7507. return _mm512_mask_log10_pd(src, k, a);
  7508. #else
  7509. return simde_mm512_mask_mov_pd(src, k, simde_mm512_log10_pd(a));
  7510. #endif
  7511. }
  7512. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  7513. #undef _mm512_mask_log10_pd
  7514. #define _mm512_mask_log10_pd(src, k, a) simde_mm512_mask_log10_pd(src, k, a)
  7515. #endif
  7516. SIMDE_FUNCTION_ATTRIBUTES
  7517. simde__m512
  7518. simde_mm512_nearbyint_ps (simde__m512 a) {
  7519. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  7520. return _mm512_nearbyint_ps(a);
  7521. #else
  7522. simde__m512_private
  7523. r_,
  7524. a_ = simde__m512_to_private(a);
  7525. SIMDE_VECTORIZE
  7526. for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
  7527. r_.f32[i] = simde_math_nearbyintf(a_.f32[i]);
  7528. }
  7529. return simde__m512_from_private(r_);
  7530. #endif
  7531. }
  7532. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  7533. #undef _mm512_nearbyint_ps
  7534. #define _mm512_nearbyint_ps(a) simde_mm512_nearbyint_ps(a)
  7535. #endif
  7536. SIMDE_FUNCTION_ATTRIBUTES
  7537. simde__m512d
  7538. simde_mm512_nearbyint_pd (simde__m512d a) {
  7539. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  7540. return _mm512_nearbyint_pd(a);
  7541. #else
  7542. simde__m512d_private
  7543. r_,
  7544. a_ = simde__m512d_to_private(a);
  7545. SIMDE_VECTORIZE
  7546. for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
  7547. r_.f64[i] = simde_math_nearbyint(a_.f64[i]);
  7548. }
  7549. return simde__m512d_from_private(r_);
  7550. #endif
  7551. }
  7552. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  7553. #undef _mm512_nearbyint_pd
  7554. #define _mm512_nearbyint_pd(a) simde_mm512_nearbyint_pd(a)
  7555. #endif
  7556. SIMDE_FUNCTION_ATTRIBUTES
  7557. simde__m512
  7558. simde_mm512_mask_nearbyint_ps(simde__m512 src, simde__mmask16 k, simde__m512 a) {
  7559. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  7560. return _mm512_mask_nearbyint_ps(src, k, a);
  7561. #else
  7562. return simde_mm512_mask_mov_ps(src, k, simde_mm512_nearbyint_ps(a));
  7563. #endif
  7564. }
  7565. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  7566. #undef _mm512_mask_nearbyint_ps
  7567. #define _mm512_mask_nearbyint_ps(src, k, a) simde_mm512_mask_nearbyint_ps(src, k, a)
  7568. #endif
  7569. SIMDE_FUNCTION_ATTRIBUTES
  7570. simde__m512d
  7571. simde_mm512_mask_nearbyint_pd(simde__m512d src, simde__mmask8 k, simde__m512d a) {
  7572. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  7573. return _mm512_mask_nearbyint_pd(src, k, a);
  7574. #else
  7575. return simde_mm512_mask_mov_pd(src, k, simde_mm512_nearbyint_pd(a));
  7576. #endif
  7577. }
  7578. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  7579. #undef _mm512_mask_nearbyint_pd
  7580. #define _mm512_mask_nearbyint_pd(src, k, a) simde_mm512_mask_nearbyint_pd(src, k, a)
  7581. #endif
  7582. SIMDE_FUNCTION_ATTRIBUTES
  7583. simde__m128
  7584. simde_mm_pow_ps (simde__m128 a, simde__m128 b) {
  7585. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
  7586. return _mm_pow_ps(a, b);
  7587. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
  7588. return Sleef_powf4_u10(a, b);
  7589. #else
  7590. simde__m128_private
  7591. r_,
  7592. a_ = simde__m128_to_private(a),
  7593. b_ = simde__m128_to_private(b);
  7594. SIMDE_VECTORIZE
  7595. for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
  7596. r_.f32[i] = simde_math_powf(a_.f32[i], b_.f32[i]);
  7597. }
  7598. return simde__m128_from_private(r_);
  7599. #endif
  7600. }
  7601. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  7602. #undef _mm_pow_ps
  7603. #define _mm_pow_ps(a, b) simde_mm_pow_ps(a, b)
  7604. #endif
  7605. SIMDE_FUNCTION_ATTRIBUTES
  7606. simde__m128d
  7607. simde_mm_pow_pd (simde__m128d a, simde__m128d b) {
  7608. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
  7609. return _mm_pow_pd(a, b);
  7610. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
  7611. return Sleef_powd2_u10(a, b);
  7612. #else
  7613. simde__m128d_private
  7614. r_,
  7615. a_ = simde__m128d_to_private(a),
  7616. b_ = simde__m128d_to_private(b);
  7617. SIMDE_VECTORIZE
  7618. for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
  7619. r_.f64[i] = simde_math_pow(a_.f64[i], b_.f64[i]);
  7620. }
  7621. return simde__m128d_from_private(r_);
  7622. #endif
  7623. }
  7624. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  7625. #undef _mm_pow_pd
  7626. #define _mm_pow_pd(a, b) simde_mm_pow_pd(a, b)
  7627. #endif
  7628. SIMDE_FUNCTION_ATTRIBUTES
  7629. simde__m256
  7630. simde_mm256_pow_ps (simde__m256 a, simde__m256 b) {
  7631. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
  7632. return _mm256_pow_ps(a, b);
  7633. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
  7634. return Sleef_powf8_u10(a, b);
  7635. #else
  7636. simde__m256_private
  7637. r_,
  7638. a_ = simde__m256_to_private(a),
  7639. b_ = simde__m256_to_private(b);
  7640. SIMDE_VECTORIZE
  7641. for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
  7642. r_.f32[i] = simde_math_powf(a_.f32[i], b_.f32[i]);
  7643. }
  7644. return simde__m256_from_private(r_);
  7645. #endif
  7646. }
  7647. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  7648. #undef _mm256_pow_ps
  7649. #define _mm256_pow_ps(a, b) simde_mm256_pow_ps(a, b)
  7650. #endif
  7651. SIMDE_FUNCTION_ATTRIBUTES
  7652. simde__m256d
  7653. simde_mm256_pow_pd (simde__m256d a, simde__m256d b) {
  7654. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
  7655. return _mm256_pow_pd(a, b);
  7656. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
  7657. return Sleef_powd4_u10(a, b);
  7658. #else
  7659. simde__m256d_private
  7660. r_,
  7661. a_ = simde__m256d_to_private(a),
  7662. b_ = simde__m256d_to_private(b);
  7663. SIMDE_VECTORIZE
  7664. for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
  7665. r_.f64[i] = simde_math_pow(a_.f64[i], b_.f64[i]);
  7666. }
  7667. return simde__m256d_from_private(r_);
  7668. #endif
  7669. }
  7670. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  7671. #undef _mm256_pow_pd
  7672. #define _mm256_pow_pd(a, b) simde_mm256_pow_pd(a, b)
  7673. #endif
  7674. SIMDE_FUNCTION_ATTRIBUTES
  7675. simde__m512
  7676. simde_mm512_pow_ps (simde__m512 a, simde__m512 b) {
  7677. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  7678. return _mm512_pow_ps(a, b);
  7679. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
  7680. return Sleef_powf16_u10(a, b);
  7681. #else
  7682. simde__m512_private
  7683. r_,
  7684. a_ = simde__m512_to_private(a),
  7685. b_ = simde__m512_to_private(b);
  7686. SIMDE_VECTORIZE
  7687. for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
  7688. r_.f32[i] = simde_math_powf(a_.f32[i], b_.f32[i]);
  7689. }
  7690. return simde__m512_from_private(r_);
  7691. #endif
  7692. }
  7693. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  7694. #undef _mm512_pow_ps
  7695. #define _mm512_pow_ps(a, b) simde_mm512_pow_ps(a, b)
  7696. #endif
  7697. SIMDE_FUNCTION_ATTRIBUTES
  7698. simde__m512d
  7699. simde_mm512_pow_pd (simde__m512d a, simde__m512d b) {
  7700. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  7701. return _mm512_pow_pd(a, b);
  7702. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
  7703. return Sleef_powd8_u10(a, b);
  7704. #else
  7705. simde__m512d_private
  7706. r_,
  7707. a_ = simde__m512d_to_private(a),
  7708. b_ = simde__m512d_to_private(b);
  7709. SIMDE_VECTORIZE
  7710. for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
  7711. r_.f64[i] = simde_math_pow(a_.f64[i], b_.f64[i]);
  7712. }
  7713. return simde__m512d_from_private(r_);
  7714. #endif
  7715. }
  7716. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  7717. #undef _mm512_pow_pd
  7718. #define _mm512_pow_pd(a, b) simde_mm512_pow_pd(a, b)
  7719. #endif
  7720. SIMDE_FUNCTION_ATTRIBUTES
  7721. simde__m512
  7722. simde_mm512_mask_pow_ps(simde__m512 src, simde__mmask16 k, simde__m512 a, simde__m512 b) {
  7723. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  7724. return _mm512_mask_pow_ps(src, k, a, b);
  7725. #else
  7726. return simde_mm512_mask_mov_ps(src, k, simde_mm512_pow_ps(a, b));
  7727. #endif
  7728. }
  7729. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  7730. #undef _mm512_mask_pow_ps
  7731. #define _mm512_mask_pow_ps(src, k, a, b) simde_mm512_mask_pow_ps(src, k, a, b)
  7732. #endif
  7733. SIMDE_FUNCTION_ATTRIBUTES
  7734. simde__m512d
  7735. simde_mm512_mask_pow_pd(simde__m512d src, simde__mmask8 k, simde__m512d a, simde__m512d b) {
  7736. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  7737. return _mm512_mask_pow_pd(src, k, a, b);
  7738. #else
  7739. return simde_mm512_mask_mov_pd(src, k, simde_mm512_pow_pd(a, b));
  7740. #endif
  7741. }
  7742. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  7743. #undef _mm512_mask_pow_pd
  7744. #define _mm512_mask_pow_pd(src, k, a, b) simde_mm512_mask_pow_pd(src, k, a, b)
  7745. #endif
  7746. SIMDE_FUNCTION_ATTRIBUTES
  7747. simde__m128
  7748. simde_mm_clog_ps (simde__m128 a) {
  7749. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
  7750. return _mm_clog_ps(a);
  7751. #else
  7752. simde__m128_private
  7753. r_,
  7754. a_ = simde__m128_to_private(a);
  7755. simde__m128_private pow_res_ = simde__m128_to_private(simde_mm_pow_ps(a, simde_mm_set1_ps(SIMDE_FLOAT32_C(2.0))));
  7756. SIMDE_VECTORIZE
  7757. for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i += 2) {
  7758. r_.f32[ i ] = simde_math_logf(simde_math_sqrtf(pow_res_.f32[i] + pow_res_.f32[i+1]));
  7759. r_.f32[i + 1] = simde_math_atan2f(a_.f32[i + 1], a_.f32[i]);
  7760. }
  7761. return simde__m128_from_private(r_);
  7762. #endif
  7763. }
  7764. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  7765. #undef _mm_clog_ps
  7766. #define _mm_clog_ps(a) simde_mm_clog_ps(a)
  7767. #endif
  7768. SIMDE_FUNCTION_ATTRIBUTES
  7769. simde__m256
  7770. simde_mm256_clog_ps (simde__m256 a) {
  7771. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
  7772. return _mm256_clog_ps(a);
  7773. #else
  7774. simde__m256_private
  7775. r_,
  7776. a_ = simde__m256_to_private(a);
  7777. simde__m256_private pow_res_ = simde__m256_to_private(simde_mm256_pow_ps(a, simde_mm256_set1_ps(SIMDE_FLOAT32_C(2.0))));
  7778. SIMDE_VECTORIZE
  7779. for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i += 2) {
  7780. r_.f32[ i ] = simde_math_logf(simde_math_sqrtf(pow_res_.f32[i] + pow_res_.f32[i + 1]));
  7781. r_.f32[i + 1] = simde_math_atan2f(a_.f32[i + 1], a_.f32[i]);
  7782. }
  7783. return simde__m256_from_private(r_);
  7784. #endif
  7785. }
  7786. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  7787. #undef _mm256_clog_ps
  7788. #define _mm256_clog_ps(a) simde_mm256_clog_ps(a)
  7789. #endif
  7790. SIMDE_FUNCTION_ATTRIBUTES
  7791. simde__m128
  7792. simde_mm_csqrt_ps (simde__m128 a) {
  7793. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
  7794. return _mm_csqrt_ps(a);
  7795. #else
  7796. simde__m128_private
  7797. r_,
  7798. a_ = simde__m128_to_private(a);
  7799. simde__m128 pow_res= simde_mm_pow_ps(a,simde_mm_set1_ps(SIMDE_FLOAT32_C(2.0)));
  7800. simde__m128_private pow_res_=simde__m128_to_private(pow_res);
  7801. SIMDE_VECTORIZE
  7802. for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i+=2) {
  7803. simde_float32 sign = simde_math_copysignf(SIMDE_FLOAT32_C(1.0), a_.f32[i + 1]);
  7804. simde_float32 temp = simde_math_sqrtf(pow_res_.f32[i] + pow_res_.f32[i+1]);
  7805. r_.f32[ i ] = simde_math_sqrtf(( a_.f32[i] + temp) / SIMDE_FLOAT32_C(2.0));
  7806. r_.f32[i + 1] = sign * simde_math_sqrtf((-a_.f32[i] + temp) / SIMDE_FLOAT32_C(2.0));
  7807. }
  7808. return simde__m128_from_private(r_);
  7809. #endif
  7810. }
  7811. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  7812. #undef _mm_csqrt_ps
  7813. #define _mm_csqrt_ps(a) simde_mm_csqrt_ps(a)
  7814. #endif
  7815. SIMDE_FUNCTION_ATTRIBUTES
  7816. simde__m256
  7817. simde_mm256_csqrt_ps (simde__m256 a) {
  7818. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
  7819. return _mm256_csqrt_ps(a);
  7820. #else
  7821. simde__m256_private
  7822. r_,
  7823. a_ = simde__m256_to_private(a);
  7824. simde__m256 pow_res= simde_mm256_pow_ps(a,simde_mm256_set1_ps(SIMDE_FLOAT32_C(2.0)));
  7825. simde__m256_private pow_res_=simde__m256_to_private(pow_res);
  7826. SIMDE_VECTORIZE
  7827. for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i+=2) {
  7828. simde_float32 sign = simde_math_copysignf(SIMDE_FLOAT32_C(1.0), a_.f32[i + 1]);
  7829. simde_float32 temp = simde_math_sqrtf(pow_res_.f32[i] + pow_res_.f32[i+1]);
  7830. r_.f32[ i ] = simde_math_sqrtf(( a_.f32[i] + temp) / SIMDE_FLOAT32_C(2.0));
  7831. r_.f32[i + 1] = sign * simde_math_sqrtf((-a_.f32[i] + temp) / SIMDE_FLOAT32_C(2.0));
  7832. }
  7833. return simde__m256_from_private(r_);
  7834. #endif
  7835. }
  7836. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  7837. #undef _mm256_csqrt_ps
  7838. #define _mm256_csqrt_ps(a) simde_mm256_csqrt_ps(a)
  7839. #endif
  7840. SIMDE_FUNCTION_ATTRIBUTES
  7841. simde__m128i
  7842. simde_mm_rem_epi8 (simde__m128i a, simde__m128i b) {
  7843. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
  7844. return _mm_rem_epi8(a, b);
  7845. #else
  7846. simde__m128i_private
  7847. r_,
  7848. a_ = simde__m128i_to_private(a),
  7849. b_ = simde__m128i_to_private(b);
  7850. #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS) && !defined(SIMDE_BUG_PGI_30104)
  7851. r_.i8 = a_.i8 % b_.i8;
  7852. #else
  7853. SIMDE_VECTORIZE
  7854. for (size_t i = 0 ; i < (sizeof(r_.i8) / sizeof(r_.i8[0])) ; i++) {
  7855. r_.i8[i] = a_.i8[i] % b_.i8[i];
  7856. }
  7857. #endif
  7858. return simde__m128i_from_private(r_);
  7859. #endif
  7860. }
  7861. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  7862. #undef _mm_rem_epi8
  7863. #define _mm_rem_epi8(a, b) simde_mm_rem_epi8((a), (b))
  7864. #endif
  7865. SIMDE_FUNCTION_ATTRIBUTES
  7866. simde__m128i
  7867. simde_mm_rem_epi16 (simde__m128i a, simde__m128i b) {
  7868. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
  7869. return _mm_rem_epi16(a, b);
  7870. #else
  7871. simde__m128i_private
  7872. r_,
  7873. a_ = simde__m128i_to_private(a),
  7874. b_ = simde__m128i_to_private(b);
  7875. #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS) && !defined(SIMDE_BUG_PGI_30104)
  7876. r_.i16 = a_.i16 % b_.i16;
  7877. #else
  7878. SIMDE_VECTORIZE
  7879. for (size_t i = 0 ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) {
  7880. r_.i16[i] = a_.i16[i] % b_.i16[i];
  7881. }
  7882. #endif
  7883. return simde__m128i_from_private(r_);
  7884. #endif
  7885. }
  7886. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  7887. #undef _mm_rem_epi16
  7888. #define _mm_rem_epi16(a, b) simde_mm_rem_epi16((a), (b))
  7889. #endif
  7890. SIMDE_FUNCTION_ATTRIBUTES
  7891. simde__m128i
  7892. simde_mm_rem_epi32 (simde__m128i a, simde__m128i b) {
  7893. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
  7894. return _mm_rem_epi32(a, b);
  7895. #else
  7896. simde__m128i_private
  7897. r_,
  7898. a_ = simde__m128i_to_private(a),
  7899. b_ = simde__m128i_to_private(b);
  7900. #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS) && !defined(SIMDE_BUG_PGI_30104)
  7901. r_.i32 = a_.i32 % b_.i32;
  7902. #else
  7903. SIMDE_VECTORIZE
  7904. for (size_t i = 0 ; i < (sizeof(r_.i32) / sizeof(r_.i32[0])) ; i++) {
  7905. r_.i32[i] = a_.i32[i] % b_.i32[i];
  7906. }
  7907. #endif
  7908. return simde__m128i_from_private(r_);
  7909. #endif
  7910. }
  7911. #define simde_mm_irem_epi32(a, b) simde_mm_rem_epi32(a, b)
  7912. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  7913. #undef _mm_rem_epi32
  7914. #define _mm_rem_epi32(a, b) simde_mm_rem_epi32(a, b)
  7915. #undef _mm_irem_epi32
  7916. #define _mm_irem_epi32(a, b) simde_mm_rem_epi32(a, b)
  7917. #endif
  7918. SIMDE_FUNCTION_ATTRIBUTES
  7919. simde__m128i
  7920. simde_mm_rem_epi64 (simde__m128i a, simde__m128i b) {
  7921. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
  7922. return _mm_rem_epi64(a, b);
  7923. #else
  7924. simde__m128i_private
  7925. r_,
  7926. a_ = simde__m128i_to_private(a),
  7927. b_ = simde__m128i_to_private(b);
  7928. #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS) && !defined(SIMDE_BUG_PGI_30104)
  7929. r_.i64 = a_.i64 % b_.i64;
  7930. #else
  7931. SIMDE_VECTORIZE
  7932. for (size_t i = 0 ; i < (sizeof(r_.i64) / sizeof(r_.i64[0])) ; i++) {
  7933. r_.i64[i] = a_.i64[i] % b_.i64[i];
  7934. }
  7935. #endif
  7936. return simde__m128i_from_private(r_);
  7937. #endif
  7938. }
  7939. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  7940. #undef _mm_rem_epi64
  7941. #define _mm_rem_epi64(a, b) simde_mm_rem_epi64((a), (b))
  7942. #endif
  7943. SIMDE_FUNCTION_ATTRIBUTES
  7944. simde__m128i
  7945. simde_mm_rem_epu8 (simde__m128i a, simde__m128i b) {
  7946. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
  7947. return _mm_rem_epu8(a, b);
  7948. #else
  7949. simde__m128i_private
  7950. r_,
  7951. a_ = simde__m128i_to_private(a),
  7952. b_ = simde__m128i_to_private(b);
  7953. #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS) && !defined(SIMDE_BUG_PGI_30104)
  7954. r_.u8 = a_.u8 % b_.u8;
  7955. #else
  7956. SIMDE_VECTORIZE
  7957. for (size_t i = 0 ; i < (sizeof(r_.u8) / sizeof(r_.u8[0])) ; i++) {
  7958. r_.u8[i] = a_.u8[i] % b_.u8[i];
  7959. }
  7960. #endif
  7961. return simde__m128i_from_private(r_);
  7962. #endif
  7963. }
  7964. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  7965. #undef _mm_rem_epu8
  7966. #define _mm_rem_epu8(a, b) simde_mm_rem_epu8((a), (b))
  7967. #endif
  7968. SIMDE_FUNCTION_ATTRIBUTES
  7969. simde__m128i
  7970. simde_mm_rem_epu16 (simde__m128i a, simde__m128i b) {
  7971. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
  7972. return _mm_rem_epu16(a, b);
  7973. #else
  7974. simde__m128i_private
  7975. r_,
  7976. a_ = simde__m128i_to_private(a),
  7977. b_ = simde__m128i_to_private(b);
  7978. #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS) && !defined(SIMDE_BUG_PGI_30104)
  7979. r_.u16 = a_.u16 % b_.u16;
  7980. #else
  7981. SIMDE_VECTORIZE
  7982. for (size_t i = 0 ; i < (sizeof(r_.u16) / sizeof(r_.u16[0])) ; i++) {
  7983. r_.u16[i] = a_.u16[i] % b_.u16[i];
  7984. }
  7985. #endif
  7986. return simde__m128i_from_private(r_);
  7987. #endif
  7988. }
  7989. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  7990. #undef _mm_rem_epu16
  7991. #define _mm_rem_epu16(a, b) simde_mm_rem_epu16((a), (b))
  7992. #endif
  7993. SIMDE_FUNCTION_ATTRIBUTES
  7994. simde__m128i
  7995. simde_mm_rem_epu32 (simde__m128i a, simde__m128i b) {
  7996. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
  7997. return _mm_rem_epu32(a, b);
  7998. #else
  7999. simde__m128i_private
  8000. r_,
  8001. a_ = simde__m128i_to_private(a),
  8002. b_ = simde__m128i_to_private(b);
  8003. #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS) && !defined(SIMDE_BUG_PGI_30104)
  8004. r_.u32 = a_.u32 % b_.u32;
  8005. #else
  8006. SIMDE_VECTORIZE
  8007. for (size_t i = 0 ; i < (sizeof(r_.u32) / sizeof(r_.u32[0])) ; i++) {
  8008. r_.u32[i] = a_.u32[i] % b_.u32[i];
  8009. }
  8010. #endif
  8011. return simde__m128i_from_private(r_);
  8012. #endif
  8013. }
  8014. #define simde_mm_urem_epi32(a, b) simde_mm_rem_epu32(a, b)
  8015. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  8016. #undef _mm_rem_epu32
  8017. #define _mm_rem_epu32(a, b) simde_mm_rem_epu32(a, b)
  8018. #undef _mm_urem_epi32
  8019. #define _mm_urem_epi32(a, b) simde_mm_rem_epu32(a, b)
  8020. #endif
  8021. SIMDE_FUNCTION_ATTRIBUTES
  8022. simde__m128i
  8023. simde_mm_rem_epu64 (simde__m128i a, simde__m128i b) {
  8024. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
  8025. return _mm_rem_epu64(a, b);
  8026. #else
  8027. simde__m128i_private
  8028. r_,
  8029. a_ = simde__m128i_to_private(a),
  8030. b_ = simde__m128i_to_private(b);
  8031. #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS) && !defined(SIMDE_BUG_PGI_30104)
  8032. r_.u64 = a_.u64 % b_.u64;
  8033. #else
  8034. SIMDE_VECTORIZE
  8035. for (size_t i = 0 ; i < (sizeof(r_.u64) / sizeof(r_.u64[0])) ; i++) {
  8036. r_.u64[i] = a_.u64[i] % b_.u64[i];
  8037. }
  8038. #endif
  8039. return simde__m128i_from_private(r_);
  8040. #endif
  8041. }
  8042. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  8043. #undef _mm_rem_epu64
  8044. #define _mm_rem_epu64(a, b) simde_mm_rem_epu64((a), (b))
  8045. #endif
  8046. SIMDE_FUNCTION_ATTRIBUTES
  8047. simde__m256i
  8048. simde_mm256_rem_epi8 (simde__m256i a, simde__m256i b) {
  8049. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
  8050. return _mm256_rem_epi8(a, b);
  8051. #else
  8052. simde__m256i_private
  8053. r_,
  8054. a_ = simde__m256i_to_private(a),
  8055. b_ = simde__m256i_to_private(b);
  8056. #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS) && !defined(SIMDE_BUG_PGI_30104)
  8057. r_.i8 = a_.i8 % b_.i8;
  8058. #else
  8059. #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
  8060. for (size_t i = 0 ; i < (sizeof(r_.m128i) / sizeof(r_.m128i[0])) ; i++) {
  8061. r_.m128i[i] = simde_mm_rem_epi8(a_.m128i[i], b_.m128i[i]);
  8062. }
  8063. #else
  8064. SIMDE_VECTORIZE
  8065. for (size_t i = 0 ; i < (sizeof(r_.i8) / sizeof(r_.i8[0])) ; i++) {
  8066. r_.i8[i] = a_.i8[i] % b_.i8[i];
  8067. }
  8068. #endif
  8069. #endif
  8070. return simde__m256i_from_private(r_);
  8071. #endif
  8072. }
  8073. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  8074. #undef _mm256_rem_epi8
  8075. #define _mm256_rem_epi8(a, b) simde_mm256_rem_epi8((a), (b))
  8076. #endif
  8077. SIMDE_FUNCTION_ATTRIBUTES
  8078. simde__m256i
  8079. simde_mm256_rem_epi16 (simde__m256i a, simde__m256i b) {
  8080. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
  8081. return _mm256_rem_epi16(a, b);
  8082. #else
  8083. simde__m256i_private
  8084. r_,
  8085. a_ = simde__m256i_to_private(a),
  8086. b_ = simde__m256i_to_private(b);
  8087. #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS) && !defined(SIMDE_BUG_PGI_30104)
  8088. r_.i16 = a_.i16 % b_.i16;
  8089. #else
  8090. #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
  8091. for (size_t i = 0 ; i < (sizeof(r_.m128i) / sizeof(r_.m128i[0])) ; i++) {
  8092. r_.m128i[i] = simde_mm_rem_epi16(a_.m128i[i], b_.m128i[i]);
  8093. }
  8094. #else
  8095. SIMDE_VECTORIZE
  8096. for (size_t i = 0 ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) {
  8097. r_.i16[i] = a_.i16[i] % b_.i16[i];
  8098. }
  8099. #endif
  8100. #endif
  8101. return simde__m256i_from_private(r_);
  8102. #endif
  8103. }
  8104. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  8105. #undef _mm256_rem_epi16
  8106. #define _mm256_rem_epi16(a, b) simde_mm256_rem_epi16((a), (b))
  8107. #endif
  8108. SIMDE_FUNCTION_ATTRIBUTES
  8109. simde__m256i
  8110. simde_mm256_rem_epi32 (simde__m256i a, simde__m256i b) {
  8111. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
  8112. return _mm256_rem_epi32(a, b);
  8113. #else
  8114. simde__m256i_private
  8115. r_,
  8116. a_ = simde__m256i_to_private(a),
  8117. b_ = simde__m256i_to_private(b);
  8118. #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS) && !defined(SIMDE_BUG_PGI_30104)
  8119. r_.i32 = a_.i32 % b_.i32;
  8120. #else
  8121. #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
  8122. for (size_t i = 0 ; i < (sizeof(r_.m128i) / sizeof(r_.m128i[0])) ; i++) {
  8123. r_.m128i[i] = simde_mm_rem_epi32(a_.m128i[i], b_.m128i[i]);
  8124. }
  8125. #else
  8126. SIMDE_VECTORIZE
  8127. for (size_t i = 0 ; i < (sizeof(r_.i32) / sizeof(r_.i32[0])) ; i++) {
  8128. r_.i32[i] = a_.i32[i] % b_.i32[i];
  8129. }
  8130. #endif
  8131. #endif
  8132. return simde__m256i_from_private(r_);
  8133. #endif
  8134. }
  8135. #define simde_mm256_irem_epi32(a, b) simde_mm256_rem_epi32(a, b)
  8136. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  8137. #undef _mm256_rem_epi32
  8138. #define _mm256_rem_epi32(a, b) simde_mm256_rem_epi32(a, b)
  8139. #undef _mm256_irem_epi32
  8140. #define _mm256_irem_epi32(a, b) simde_mm256_rem_epi32(a, b)
  8141. #endif
  8142. SIMDE_FUNCTION_ATTRIBUTES
  8143. simde__m256i
  8144. simde_mm256_rem_epi64 (simde__m256i a, simde__m256i b) {
  8145. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
  8146. return _mm256_rem_epi64(a, b);
  8147. #else
  8148. simde__m256i_private
  8149. r_,
  8150. a_ = simde__m256i_to_private(a),
  8151. b_ = simde__m256i_to_private(b);
  8152. #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS) && !defined(SIMDE_BUG_PGI_30104)
  8153. r_.i64 = a_.i64 % b_.i64;
  8154. #else
  8155. #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
  8156. for (size_t i = 0 ; i < (sizeof(r_.m128i) / sizeof(r_.m128i[0])) ; i++) {
  8157. r_.m128i[i] = simde_mm_rem_epi64(a_.m128i[i], b_.m128i[i]);
  8158. }
  8159. #else
  8160. SIMDE_VECTORIZE
  8161. for (size_t i = 0 ; i < (sizeof(r_.i64) / sizeof(r_.i64[0])) ; i++) {
  8162. r_.i64[i] = a_.i64[i] % b_.i64[i];
  8163. }
  8164. #endif
  8165. #endif
  8166. return simde__m256i_from_private(r_);
  8167. #endif
  8168. }
  8169. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  8170. #undef _mm256_rem_epi64
  8171. #define _mm256_rem_epi64(a, b) simde_mm256_rem_epi64((a), (b))
  8172. #endif
  8173. SIMDE_FUNCTION_ATTRIBUTES
  8174. simde__m256i
  8175. simde_mm256_rem_epu8 (simde__m256i a, simde__m256i b) {
  8176. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
  8177. return _mm256_rem_epu8(a, b);
  8178. #else
  8179. simde__m256i_private
  8180. r_,
  8181. a_ = simde__m256i_to_private(a),
  8182. b_ = simde__m256i_to_private(b);
  8183. #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS) && !defined(SIMDE_BUG_PGI_30104)
  8184. r_.u8 = a_.u8 % b_.u8;
  8185. #else
  8186. #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
  8187. for (size_t i = 0 ; i < (sizeof(r_.m128i) / sizeof(r_.m128i[0])) ; i++) {
  8188. r_.m128i[i] = simde_mm_rem_epu8(a_.m128i[i], b_.m128i[i]);
  8189. }
  8190. #else
  8191. SIMDE_VECTORIZE
  8192. for (size_t i = 0 ; i < (sizeof(r_.u8) / sizeof(r_.u8[0])) ; i++) {
  8193. r_.u8[i] = a_.u8[i] % b_.u8[i];
  8194. }
  8195. #endif
  8196. #endif
  8197. return simde__m256i_from_private(r_);
  8198. #endif
  8199. }
  8200. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  8201. #undef _mm256_rem_epu8
  8202. #define _mm256_rem_epu8(a, b) simde_mm256_rem_epu8((a), (b))
  8203. #endif
  8204. SIMDE_FUNCTION_ATTRIBUTES
  8205. simde__m256i
  8206. simde_mm256_rem_epu16 (simde__m256i a, simde__m256i b) {
  8207. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
  8208. return _mm256_rem_epu16(a, b);
  8209. #else
  8210. simde__m256i_private
  8211. r_,
  8212. a_ = simde__m256i_to_private(a),
  8213. b_ = simde__m256i_to_private(b);
  8214. #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS) && !defined(SIMDE_BUG_PGI_30104)
  8215. r_.u16 = a_.u16 % b_.u16;
  8216. #else
  8217. #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
  8218. for (size_t i = 0 ; i < (sizeof(r_.m128i) / sizeof(r_.m128i[0])) ; i++) {
  8219. r_.m128i[i] = simde_mm_rem_epu16(a_.m128i[i], b_.m128i[i]);
  8220. }
  8221. #else
  8222. SIMDE_VECTORIZE
  8223. for (size_t i = 0 ; i < (sizeof(r_.u16) / sizeof(r_.u16[0])) ; i++) {
  8224. r_.u16[i] = a_.u16[i] % b_.u16[i];
  8225. }
  8226. #endif
  8227. #endif
  8228. return simde__m256i_from_private(r_);
  8229. #endif
  8230. }
  8231. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  8232. #undef _mm256_rem_epu16
  8233. #define _mm256_rem_epu16(a, b) simde_mm256_rem_epu16((a), (b))
  8234. #endif
  8235. SIMDE_FUNCTION_ATTRIBUTES
  8236. simde__m256i
  8237. simde_mm256_rem_epu32 (simde__m256i a, simde__m256i b) {
  8238. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
  8239. return _mm256_rem_epu32(a, b);
  8240. #else
  8241. simde__m256i_private
  8242. r_,
  8243. a_ = simde__m256i_to_private(a),
  8244. b_ = simde__m256i_to_private(b);
  8245. #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS) && !defined(SIMDE_BUG_PGI_30104)
  8246. r_.u32 = a_.u32 % b_.u32;
  8247. #else
  8248. #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
  8249. for (size_t i = 0 ; i < (sizeof(r_.m128i) / sizeof(r_.m128i[0])) ; i++) {
  8250. r_.m128i[i] = simde_mm_rem_epu32(a_.m128i[i], b_.m128i[i]);
  8251. }
  8252. #else
  8253. SIMDE_VECTORIZE
  8254. for (size_t i = 0 ; i < (sizeof(r_.u32) / sizeof(r_.u32[0])) ; i++) {
  8255. r_.u32[i] = a_.u32[i] % b_.u32[i];
  8256. }
  8257. #endif
  8258. #endif
  8259. return simde__m256i_from_private(r_);
  8260. #endif
  8261. }
  8262. #define simde_mm256_urem_epi32(a, b) simde_mm256_rem_epu32(a, b)
  8263. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  8264. #undef _mm256_rem_epu32
  8265. #define _mm256_rem_epu32(a, b) simde_mm256_rem_epu32(a, b)
  8266. #undef _mm256_urem_epi32
  8267. #define _mm256_urem_epi32(a, b) simde_mm256_rem_epu32(a, b)
  8268. #endif
  8269. SIMDE_FUNCTION_ATTRIBUTES
  8270. simde__m256i
  8271. simde_mm256_rem_epu64 (simde__m256i a, simde__m256i b) {
  8272. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
  8273. return _mm256_rem_epu64(a, b);
  8274. #else
  8275. simde__m256i_private
  8276. r_,
  8277. a_ = simde__m256i_to_private(a),
  8278. b_ = simde__m256i_to_private(b);
  8279. #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS) && !defined(SIMDE_BUG_PGI_30104)
  8280. r_.u64 = a_.u64 % b_.u64;
  8281. #else
  8282. #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
  8283. for (size_t i = 0 ; i < (sizeof(r_.m128i) / sizeof(r_.m128i[0])) ; i++) {
  8284. r_.m128i[i] = simde_mm_rem_epu64(a_.m128i[i], b_.m128i[i]);
  8285. }
  8286. #else
  8287. SIMDE_VECTORIZE
  8288. for (size_t i = 0 ; i < (sizeof(r_.u64) / sizeof(r_.u64[0])) ; i++) {
  8289. r_.u64[i] = a_.u64[i] % b_.u64[i];
  8290. }
  8291. #endif
  8292. #endif
  8293. return simde__m256i_from_private(r_);
  8294. #endif
  8295. }
  8296. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  8297. #undef _mm256_rem_epu64
  8298. #define _mm256_rem_epu64(a, b) simde_mm256_rem_epu64((a), (b))
  8299. #endif
  8300. SIMDE_FUNCTION_ATTRIBUTES
  8301. simde__m512i
  8302. simde_mm512_rem_epi8 (simde__m512i a, simde__m512i b) {
  8303. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  8304. return _mm512_rem_epi8(a, b);
  8305. #else
  8306. simde__m512i_private
  8307. r_,
  8308. a_ = simde__m512i_to_private(a),
  8309. b_ = simde__m512i_to_private(b);
  8310. #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS) && !defined(SIMDE_BUG_PGI_30104)
  8311. r_.i8 = a_.i8 % b_.i8;
  8312. #else
  8313. #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
  8314. for (size_t i = 0 ; i < (sizeof(r_.m256i) / sizeof(r_.m256i[0])) ; i++) {
  8315. r_.m256i[i] = simde_mm256_rem_epi8(a_.m256i[i], b_.m256i[i]);
  8316. }
  8317. #else
  8318. SIMDE_VECTORIZE
  8319. for (size_t i = 0 ; i < (sizeof(r_.i8) / sizeof(r_.i8[0])) ; i++) {
  8320. r_.i8[i] = a_.i8[i] % b_.i8[i];
  8321. }
  8322. #endif
  8323. #endif
  8324. return simde__m512i_from_private(r_);
  8325. #endif
  8326. }
  8327. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  8328. #undef _mm512_rem_epi8
  8329. #define _mm512_rem_epi8(a, b) simde_mm512_rem_epi8((a), (b))
  8330. #endif
  8331. SIMDE_FUNCTION_ATTRIBUTES
  8332. simde__m512i
  8333. simde_mm512_rem_epi16 (simde__m512i a, simde__m512i b) {
  8334. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  8335. return _mm512_rem_epi16(a, b);
  8336. #else
  8337. simde__m512i_private
  8338. r_,
  8339. a_ = simde__m512i_to_private(a),
  8340. b_ = simde__m512i_to_private(b);
  8341. #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS) && !defined(SIMDE_BUG_PGI_30104)
  8342. r_.i16 = a_.i16 % b_.i16;
  8343. #else
  8344. #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
  8345. for (size_t i = 0 ; i < (sizeof(r_.m256i) / sizeof(r_.m256i[0])) ; i++) {
  8346. r_.m256i[i] = simde_mm256_rem_epi16(a_.m256i[i], b_.m256i[i]);
  8347. }
  8348. #else
  8349. SIMDE_VECTORIZE
  8350. for (size_t i = 0 ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) {
  8351. r_.i16[i] = a_.i16[i] % b_.i16[i];
  8352. }
  8353. #endif
  8354. #endif
  8355. return simde__m512i_from_private(r_);
  8356. #endif
  8357. }
  8358. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  8359. #undef _mm512_rem_epi16
  8360. #define _mm512_rem_epi16(a, b) simde_mm512_rem_epi16((a), (b))
  8361. #endif
  8362. SIMDE_FUNCTION_ATTRIBUTES
  8363. simde__m512i
  8364. simde_mm512_rem_epi32 (simde__m512i a, simde__m512i b) {
  8365. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  8366. return _mm512_rem_epi32(a, b);
  8367. #else
  8368. simde__m512i_private
  8369. r_,
  8370. a_ = simde__m512i_to_private(a),
  8371. b_ = simde__m512i_to_private(b);
  8372. #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS) && !defined(SIMDE_BUG_PGI_30104)
  8373. r_.i32 = a_.i32 % b_.i32;
  8374. #else
  8375. #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
  8376. for (size_t i = 0 ; i < (sizeof(r_.m256i) / sizeof(r_.m256i[0])) ; i++) {
  8377. r_.m256i[i] = simde_mm256_rem_epi32(a_.m256i[i], b_.m256i[i]);
  8378. }
  8379. #else
  8380. SIMDE_VECTORIZE
  8381. for (size_t i = 0 ; i < (sizeof(r_.i32) / sizeof(r_.i32[0])) ; i++) {
  8382. r_.i32[i] = a_.i32[i] % b_.i32[i];
  8383. }
  8384. #endif
  8385. #endif
  8386. return simde__m512i_from_private(r_);
  8387. #endif
  8388. }
  8389. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  8390. #undef _mm512_rem_epi32
  8391. #define _mm512_rem_epi32(a, b) simde_mm512_rem_epi32((a), (b))
  8392. #endif
  8393. SIMDE_FUNCTION_ATTRIBUTES
  8394. simde__m512i
  8395. simde_mm512_mask_rem_epi32(simde__m512i src, simde__mmask16 k, simde__m512i a, simde__m512i b) {
  8396. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  8397. return _mm512_mask_rem_epi32(src, k, a, b);
  8398. #else
  8399. return simde_mm512_mask_mov_epi32(src, k, simde_mm512_rem_epi32(a, b));
  8400. #endif
  8401. }
  8402. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  8403. #undef _mm512_mask_rem_epi32
  8404. #define _mm512_mask_rem_epi32(src, k, a, b) simde_mm512_mask_rem_epi32(src, k, a, b)
  8405. #endif
  8406. SIMDE_FUNCTION_ATTRIBUTES
  8407. simde__m512i
  8408. simde_mm512_rem_epi64 (simde__m512i a, simde__m512i b) {
  8409. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  8410. return _mm512_rem_epi64(a, b);
  8411. #else
  8412. simde__m512i_private
  8413. r_,
  8414. a_ = simde__m512i_to_private(a),
  8415. b_ = simde__m512i_to_private(b);
  8416. #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS) && !defined(SIMDE_BUG_PGI_30104)
  8417. r_.i64 = a_.i64 % b_.i64;
  8418. #else
  8419. #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
  8420. for (size_t i = 0 ; i < (sizeof(r_.m256i) / sizeof(r_.m256i[0])) ; i++) {
  8421. r_.m256i[i] = simde_mm256_rem_epi64(a_.m256i[i], b_.m256i[i]);
  8422. }
  8423. #else
  8424. SIMDE_VECTORIZE
  8425. for (size_t i = 0 ; i < (sizeof(r_.i64) / sizeof(r_.i64[0])) ; i++) {
  8426. r_.i64[i] = a_.i64[i] % b_.i64[i];
  8427. }
  8428. #endif
  8429. #endif
  8430. return simde__m512i_from_private(r_);
  8431. #endif
  8432. }
  8433. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  8434. #undef _mm512_rem_epi64
  8435. #define _mm512_rem_epi64(a, b) simde_mm512_rem_epi64((a), (b))
  8436. #endif
  8437. SIMDE_FUNCTION_ATTRIBUTES
  8438. simde__m512i
  8439. simde_mm512_rem_epu8 (simde__m512i a, simde__m512i b) {
  8440. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  8441. return _mm512_rem_epu8(a, b);
  8442. #else
  8443. simde__m512i_private
  8444. r_,
  8445. a_ = simde__m512i_to_private(a),
  8446. b_ = simde__m512i_to_private(b);
  8447. #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS) && !defined(SIMDE_BUG_PGI_30104)
  8448. r_.u8 = a_.u8 % b_.u8;
  8449. #else
  8450. #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
  8451. for (size_t i = 0 ; i < (sizeof(r_.m256i) / sizeof(r_.m256i[0])) ; i++) {
  8452. r_.m256i[i] = simde_mm256_rem_epu8(a_.m256i[i], b_.m256i[i]);
  8453. }
  8454. #else
  8455. SIMDE_VECTORIZE
  8456. for (size_t i = 0 ; i < (sizeof(r_.u8) / sizeof(r_.u8[0])) ; i++) {
  8457. r_.u8[i] = a_.u8[i] % b_.u8[i];
  8458. }
  8459. #endif
  8460. #endif
  8461. return simde__m512i_from_private(r_);
  8462. #endif
  8463. }
  8464. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  8465. #undef _mm512_rem_epu8
  8466. #define _mm512_rem_epu8(a, b) simde_mm512_rem_epu8((a), (b))
  8467. #endif
  8468. SIMDE_FUNCTION_ATTRIBUTES
  8469. simde__m512i
  8470. simde_mm512_rem_epu16 (simde__m512i a, simde__m512i b) {
  8471. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  8472. return _mm512_rem_epu16(a, b);
  8473. #else
  8474. simde__m512i_private
  8475. r_,
  8476. a_ = simde__m512i_to_private(a),
  8477. b_ = simde__m512i_to_private(b);
  8478. #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS) && !defined(SIMDE_BUG_PGI_30104)
  8479. r_.u16 = a_.u16 % b_.u16;
  8480. #else
  8481. #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
  8482. for (size_t i = 0 ; i < (sizeof(r_.m256i) / sizeof(r_.m256i[0])) ; i++) {
  8483. r_.m256i[i] = simde_mm256_rem_epu16(a_.m256i[i], b_.m256i[i]);
  8484. }
  8485. #else
  8486. SIMDE_VECTORIZE
  8487. for (size_t i = 0 ; i < (sizeof(r_.u16) / sizeof(r_.u16[0])) ; i++) {
  8488. r_.u16[i] = a_.u16[i] % b_.u16[i];
  8489. }
  8490. #endif
  8491. #endif
  8492. return simde__m512i_from_private(r_);
  8493. #endif
  8494. }
  8495. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  8496. #undef _mm512_rem_epu16
  8497. #define _mm512_rem_epu16(a, b) simde_mm512_rem_epu16((a), (b))
  8498. #endif
  8499. SIMDE_FUNCTION_ATTRIBUTES
  8500. simde__m512i
  8501. simde_mm512_rem_epu32 (simde__m512i a, simde__m512i b) {
  8502. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  8503. return _mm512_rem_epu32(a, b);
  8504. #else
  8505. simde__m512i_private
  8506. r_,
  8507. a_ = simde__m512i_to_private(a),
  8508. b_ = simde__m512i_to_private(b);
  8509. #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS) && !defined(SIMDE_BUG_PGI_30104)
  8510. r_.u32 = a_.u32 % b_.u32;
  8511. #else
  8512. #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
  8513. for (size_t i = 0 ; i < (sizeof(r_.m256i) / sizeof(r_.m256i[0])) ; i++) {
  8514. r_.m256i[i] = simde_mm256_rem_epu32(a_.m256i[i], b_.m256i[i]);
  8515. }
  8516. #else
  8517. SIMDE_VECTORIZE
  8518. for (size_t i = 0 ; i < (sizeof(r_.u32) / sizeof(r_.u32[0])) ; i++) {
  8519. r_.u32[i] = a_.u32[i] % b_.u32[i];
  8520. }
  8521. #endif
  8522. #endif
  8523. return simde__m512i_from_private(r_);
  8524. #endif
  8525. }
  8526. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  8527. #undef _mm512_rem_epu32
  8528. #define _mm512_rem_epu32(a, b) simde_mm512_rem_epu32((a), (b))
  8529. #endif
  8530. SIMDE_FUNCTION_ATTRIBUTES
  8531. simde__m512i
  8532. simde_mm512_mask_rem_epu32(simde__m512i src, simde__mmask16 k, simde__m512i a, simde__m512i b) {
  8533. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  8534. return _mm512_mask_rem_epu32(src, k, a, b);
  8535. #else
  8536. return simde_mm512_mask_mov_epi32(src, k, simde_mm512_rem_epu32(a, b));
  8537. #endif
  8538. }
  8539. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  8540. #undef _mm512_mask_rem_epu32
  8541. #define _mm512_mask_rem_epu32(src, k, a, b) simde_mm512_mask_rem_epu32(src, k, a, b)
  8542. #endif
  8543. SIMDE_FUNCTION_ATTRIBUTES
  8544. simde__m512i
  8545. simde_mm512_rem_epu64 (simde__m512i a, simde__m512i b) {
  8546. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  8547. return _mm512_rem_epu64(a, b);
  8548. #else
  8549. simde__m512i_private
  8550. r_,
  8551. a_ = simde__m512i_to_private(a),
  8552. b_ = simde__m512i_to_private(b);
  8553. #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS) && !defined(SIMDE_BUG_PGI_30104)
  8554. r_.u64 = a_.u64 % b_.u64;
  8555. #else
  8556. #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
  8557. for (size_t i = 0 ; i < (sizeof(r_.m256i) / sizeof(r_.m256i[0])) ; i++) {
  8558. r_.m256i[i] = simde_mm256_rem_epu64(a_.m256i[i], b_.m256i[i]);
  8559. }
  8560. #else
  8561. SIMDE_VECTORIZE
  8562. for (size_t i = 0 ; i < (sizeof(r_.u64) / sizeof(r_.u64[0])) ; i++) {
  8563. r_.u64[i] = a_.u64[i] % b_.u64[i];
  8564. }
  8565. #endif
  8566. #endif
  8567. return simde__m512i_from_private(r_);
  8568. #endif
  8569. }
  8570. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  8571. #undef _mm512_rem_epu64
  8572. #define _mm512_rem_epu64(a, b) simde_mm512_rem_epu64((a), (b))
  8573. #endif
  8574. SIMDE_FUNCTION_ATTRIBUTES
  8575. simde__m512
  8576. simde_mm512_recip_ps (simde__m512 a) {
  8577. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  8578. return _mm512_recip_ps(a);
  8579. #else
  8580. return simde_mm512_div_ps(simde_mm512_set1_ps(SIMDE_FLOAT32_C(1.0)), a);
  8581. #endif
  8582. }
  8583. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  8584. #undef _mm512_recip_ps
  8585. #define _mm512_recip_ps(a) simde_mm512_recip_ps(a)
  8586. #endif
  8587. SIMDE_FUNCTION_ATTRIBUTES
  8588. simde__m512d
  8589. simde_mm512_recip_pd (simde__m512d a) {
  8590. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  8591. return _mm512_recip_pd(a);
  8592. #else
  8593. return simde_mm512_div_pd(simde_mm512_set1_pd(SIMDE_FLOAT64_C(1.0)), a);
  8594. #endif
  8595. }
  8596. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  8597. #undef _mm512_recip_pd
  8598. #define _mm512_recip_pd(a) simde_mm512_recip_pd(a)
  8599. #endif
  8600. SIMDE_FUNCTION_ATTRIBUTES
  8601. simde__m512
  8602. simde_mm512_mask_recip_ps(simde__m512 src, simde__mmask16 k, simde__m512 a) {
  8603. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  8604. return _mm512_mask_recip_ps(src, k, a);
  8605. #else
  8606. return simde_mm512_mask_mov_ps(src, k, simde_mm512_recip_ps(a));
  8607. #endif
  8608. }
  8609. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  8610. #undef _mm512_mask_recip_ps
  8611. #define _mm512_mask_recip_ps(src, k, a) simde_mm512_mask_recip_ps(src, k, a)
  8612. #endif
  8613. SIMDE_FUNCTION_ATTRIBUTES
  8614. simde__m512d
  8615. simde_mm512_mask_recip_pd(simde__m512d src, simde__mmask8 k, simde__m512d a) {
  8616. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  8617. return _mm512_mask_recip_pd(src, k, a);
  8618. #else
  8619. return simde_mm512_mask_mov_pd(src, k, simde_mm512_recip_pd(a));
  8620. #endif
  8621. }
  8622. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  8623. #undef _mm512_mask_recip_pd
  8624. #define _mm512_mask_recip_pd(src, k, a) simde_mm512_mask_recip_pd(src, k, a)
  8625. #endif
  8626. SIMDE_FUNCTION_ATTRIBUTES
  8627. simde__m512
  8628. simde_mm512_rint_ps (simde__m512 a) {
  8629. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  8630. return _mm512_rint_ps(a);
  8631. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
  8632. return Sleef_rintf16(a);
  8633. #else
  8634. simde__m512_private
  8635. r_,
  8636. a_ = simde__m512_to_private(a);
  8637. SIMDE_VECTORIZE
  8638. for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
  8639. r_.f32[i] = simde_math_rintf(a_.f32[i]);
  8640. }
  8641. return simde__m512_from_private(r_);
  8642. #endif
  8643. }
  8644. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  8645. #undef _mm512_rint_ps
  8646. #define _mm512_rint_ps(a) simde_mm512_rint_ps(a)
  8647. #endif
  8648. SIMDE_FUNCTION_ATTRIBUTES
  8649. simde__m512d
  8650. simde_mm512_rint_pd (simde__m512d a) {
  8651. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  8652. return _mm512_rint_pd(a);
  8653. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
  8654. return Sleef_rintd8(a);
  8655. #else
  8656. simde__m512d_private
  8657. r_,
  8658. a_ = simde__m512d_to_private(a);
  8659. SIMDE_VECTORIZE
  8660. for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
  8661. r_.f64[i] = simde_math_rint(a_.f64[i]);
  8662. }
  8663. return simde__m512d_from_private(r_);
  8664. #endif
  8665. }
  8666. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  8667. #undef _mm512_rint_pd
  8668. #define _mm512_rint_pd(a) simde_mm512_rint_pd(a)
  8669. #endif
  8670. SIMDE_FUNCTION_ATTRIBUTES
  8671. simde__m512
  8672. simde_mm512_mask_rint_ps(simde__m512 src, simde__mmask16 k, simde__m512 a) {
  8673. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  8674. return _mm512_mask_rint_ps(src, k, a);
  8675. #else
  8676. return simde_mm512_mask_mov_ps(src, k, simde_mm512_rint_ps(a));
  8677. #endif
  8678. }
  8679. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  8680. #undef _mm512_mask_rint_ps
  8681. #define _mm512_mask_rint_ps(src, k, a) simde_mm512_mask_rint_ps(src, k, a)
  8682. #endif
  8683. SIMDE_FUNCTION_ATTRIBUTES
  8684. simde__m512d
  8685. simde_mm512_mask_rint_pd(simde__m512d src, simde__mmask8 k, simde__m512d a) {
  8686. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  8687. return _mm512_mask_rint_pd(src, k, a);
  8688. #else
  8689. return simde_mm512_mask_mov_pd(src, k, simde_mm512_rint_pd(a));
  8690. #endif
  8691. }
  8692. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  8693. #undef _mm512_mask_rint_pd
  8694. #define _mm512_mask_rint_pd(src, k, a) simde_mm512_mask_rint_pd(src, k, a)
  8695. #endif
  8696. SIMDE_FUNCTION_ATTRIBUTES
  8697. simde__m128
  8698. simde_mm_sin_ps (simde__m128 a) {
  8699. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
  8700. return _mm_sin_ps(a);
  8701. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
  8702. #if SIMDE_ACCURACY_PREFERENCE > 1
  8703. return Sleef_sinf4_u10(a);
  8704. #else
  8705. return Sleef_sinf4_u35(a);
  8706. #endif
  8707. #else
  8708. simde__m128_private
  8709. r_,
  8710. a_ = simde__m128_to_private(a);
  8711. SIMDE_VECTORIZE
  8712. for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
  8713. r_.f32[i] = simde_math_sinf(a_.f32[i]);
  8714. }
  8715. return simde__m128_from_private(r_);
  8716. #endif
  8717. }
  8718. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  8719. #undef _mm_sin_ps
  8720. #define _mm_sin_ps(a) simde_mm_sin_ps(a)
  8721. #endif
  8722. SIMDE_FUNCTION_ATTRIBUTES
  8723. simde__m128d
  8724. simde_mm_sin_pd (simde__m128d a) {
  8725. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
  8726. return _mm_sin_pd(a);
  8727. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
  8728. #if SIMDE_ACCURACY_PREFERENCE > 1
  8729. return Sleef_sind2_u10(a);
  8730. #else
  8731. return Sleef_sind2_u35(a);
  8732. #endif
  8733. #else
  8734. simde__m128d_private
  8735. r_,
  8736. a_ = simde__m128d_to_private(a);
  8737. SIMDE_VECTORIZE
  8738. for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
  8739. r_.f64[i] = simde_math_sin(a_.f64[i]);
  8740. }
  8741. return simde__m128d_from_private(r_);
  8742. #endif
  8743. }
  8744. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  8745. #undef _mm_sin_pd
  8746. #define _mm_sin_pd(a) simde_mm_sin_pd(a)
  8747. #endif
  8748. SIMDE_FUNCTION_ATTRIBUTES
  8749. simde__m256
  8750. simde_mm256_sin_ps (simde__m256 a) {
  8751. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
  8752. return _mm256_sin_ps(a);
  8753. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
  8754. #if SIMDE_ACCURACY_PREFERENCE > 1
  8755. return Sleef_sinf8_u10(a);
  8756. #else
  8757. return Sleef_sinf8_u35(a);
  8758. #endif
  8759. #else
  8760. simde__m256_private
  8761. r_,
  8762. a_ = simde__m256_to_private(a);
  8763. #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
  8764. for (size_t i = 0 ; i < (sizeof(r_.m128) / sizeof(r_.m128[0])) ; i++) {
  8765. r_.m128[i] = simde_mm_sin_ps(a_.m128[i]);
  8766. }
  8767. #else
  8768. SIMDE_VECTORIZE
  8769. for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
  8770. r_.f32[i] = simde_math_sinf(a_.f32[i]);
  8771. }
  8772. #endif
  8773. return simde__m256_from_private(r_);
  8774. #endif
  8775. }
  8776. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  8777. #undef _mm256_sin_ps
  8778. #define _mm256_sin_ps(a) simde_mm256_sin_ps(a)
  8779. #endif
  8780. SIMDE_FUNCTION_ATTRIBUTES
  8781. simde__m256d
  8782. simde_mm256_sin_pd (simde__m256d a) {
  8783. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
  8784. return _mm256_sin_pd(a);
  8785. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
  8786. #if SIMDE_ACCURACY_PREFERENCE > 1
  8787. return Sleef_sind4_u10(a);
  8788. #else
  8789. return Sleef_sind4_u35(a);
  8790. #endif
  8791. #else
  8792. simde__m256d_private
  8793. r_,
  8794. a_ = simde__m256d_to_private(a);
  8795. #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
  8796. for (size_t i = 0 ; i < (sizeof(r_.m128d) / sizeof(r_.m128d[0])) ; i++) {
  8797. r_.m128d[i] = simde_mm_sin_pd(a_.m128d[i]);
  8798. }
  8799. #else
  8800. SIMDE_VECTORIZE
  8801. for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
  8802. r_.f64[i] = simde_math_sin(a_.f64[i]);
  8803. }
  8804. #endif
  8805. return simde__m256d_from_private(r_);
  8806. #endif
  8807. }
  8808. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  8809. #undef _mm256_sin_pd
  8810. #define _mm256_sin_pd(a) simde_mm256_sin_pd(a)
  8811. #endif
  8812. SIMDE_FUNCTION_ATTRIBUTES
  8813. simde__m512
  8814. simde_mm512_sin_ps (simde__m512 a) {
  8815. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  8816. return _mm512_sin_ps(a);
  8817. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
  8818. #if SIMDE_ACCURACY_PREFERENCE > 1
  8819. return Sleef_sinf16_u10(a);
  8820. #else
  8821. return Sleef_sinf16_u35(a);
  8822. #endif
  8823. #else
  8824. simde__m512_private
  8825. r_,
  8826. a_ = simde__m512_to_private(a);
  8827. #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
  8828. for (size_t i = 0 ; i < (sizeof(r_.m256) / sizeof(r_.m256[0])) ; i++) {
  8829. r_.m256[i] = simde_mm256_sin_ps(a_.m256[i]);
  8830. }
  8831. #else
  8832. SIMDE_VECTORIZE
  8833. for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
  8834. r_.f32[i] = simde_math_sinf(a_.f32[i]);
  8835. }
  8836. #endif
  8837. return simde__m512_from_private(r_);
  8838. #endif
  8839. }
  8840. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  8841. #undef _mm512_sin_ps
  8842. #define _mm512_sin_ps(a) simde_mm512_sin_ps(a)
  8843. #endif
  8844. SIMDE_FUNCTION_ATTRIBUTES
  8845. simde__m512d
  8846. simde_mm512_sin_pd (simde__m512d a) {
  8847. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  8848. return _mm512_sin_pd(a);
  8849. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
  8850. #if SIMDE_ACCURACY_PREFERENCE > 1
  8851. return Sleef_sind8_u10(a);
  8852. #else
  8853. return Sleef_sind8_u35(a);
  8854. #endif
  8855. #else
  8856. simde__m512d_private
  8857. r_,
  8858. a_ = simde__m512d_to_private(a);
  8859. #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
  8860. for (size_t i = 0 ; i < (sizeof(r_.m256d) / sizeof(r_.m256d[0])) ; i++) {
  8861. r_.m256d[i] = simde_mm256_sin_pd(a_.m256d[i]);
  8862. }
  8863. #else
  8864. SIMDE_VECTORIZE
  8865. for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
  8866. r_.f64[i] = simde_math_sin(a_.f64[i]);
  8867. }
  8868. #endif
  8869. return simde__m512d_from_private(r_);
  8870. #endif
  8871. }
  8872. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  8873. #undef _mm512_sin_pd
  8874. #define _mm512_sin_pd(a) simde_mm512_sin_pd(a)
  8875. #endif
  8876. SIMDE_FUNCTION_ATTRIBUTES
  8877. simde__m512
  8878. simde_mm512_mask_sin_ps(simde__m512 src, simde__mmask16 k, simde__m512 a) {
  8879. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  8880. return _mm512_mask_sin_ps(src, k, a);
  8881. #else
  8882. return simde_mm512_mask_mov_ps(src, k, simde_mm512_sin_ps(a));
  8883. #endif
  8884. }
  8885. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  8886. #undef _mm512_mask_sin_ps
  8887. #define _mm512_mask_sin_ps(src, k, a) simde_mm512_mask_sin_ps(src, k, a)
  8888. #endif
  8889. SIMDE_FUNCTION_ATTRIBUTES
  8890. simde__m512d
  8891. simde_mm512_mask_sin_pd(simde__m512d src, simde__mmask8 k, simde__m512d a) {
  8892. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  8893. return _mm512_mask_sin_pd(src, k, a);
  8894. #else
  8895. return simde_mm512_mask_mov_pd(src, k, simde_mm512_sin_pd(a));
  8896. #endif
  8897. }
  8898. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  8899. #undef _mm512_mask_sin_pd
  8900. #define _mm512_mask_sin_pd(src, k, a) simde_mm512_mask_sin_pd(src, k, a)
  8901. #endif
  8902. SIMDE_FUNCTION_ATTRIBUTES
  8903. simde__m128
  8904. simde_mm_sincos_ps (simde__m128* mem_addr, simde__m128 a) {
  8905. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
  8906. return _mm_sincos_ps(HEDLEY_REINTERPRET_CAST(__m128*, mem_addr), a);
  8907. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
  8908. Sleef___m128_2 temp;
  8909. #if SIMDE_ACCURACY_PREFERENCE > 1
  8910. temp = Sleef_sincosf4_u10(a);
  8911. #else
  8912. temp = Sleef_sincosf4_u35(a);
  8913. #endif
  8914. *mem_addr = temp.y;
  8915. return temp.x;
  8916. #else
  8917. simde__m128 r;
  8918. r = simde_mm_sin_ps(a);
  8919. *mem_addr = simde_mm_cos_ps(a);
  8920. return r;
  8921. #endif
  8922. }
  8923. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  8924. #undef _mm_sincos_ps
  8925. #define _mm_sincos_ps(mem_addr, a) simde_mm_sincos_ps((mem_addr),(a))
  8926. #endif
  8927. SIMDE_FUNCTION_ATTRIBUTES
  8928. simde__m128d
  8929. simde_mm_sincos_pd (simde__m128d* mem_addr, simde__m128d a) {
  8930. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
  8931. return _mm_sincos_pd(HEDLEY_REINTERPRET_CAST(__m128d*, mem_addr), a);
  8932. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
  8933. Sleef___m128d_2 temp;
  8934. #if SIMDE_ACCURACY_PREFERENCE > 1
  8935. temp = Sleef_sincosd2_u10(a);
  8936. #else
  8937. temp = Sleef_sincosd2_u35(a);
  8938. #endif
  8939. *mem_addr = temp.y;
  8940. return temp.x;
  8941. #else
  8942. simde__m128d r;
  8943. r = simde_mm_sin_pd(a);
  8944. *mem_addr = simde_mm_cos_pd(a);
  8945. return r;
  8946. #endif
  8947. }
  8948. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  8949. #undef _mm_sincos_pd
  8950. #define _mm_sincos_pd(mem_addr, a) simde_mm_sincos_pd((mem_addr),(a))
  8951. #endif
  8952. SIMDE_FUNCTION_ATTRIBUTES
  8953. simde__m256
  8954. simde_mm256_sincos_ps (simde__m256* mem_addr, simde__m256 a) {
  8955. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
  8956. return _mm256_sincos_ps(HEDLEY_REINTERPRET_CAST(__m256*, mem_addr), a);
  8957. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
  8958. Sleef___m256_2 temp;
  8959. #if SIMDE_ACCURACY_PREFERENCE > 1
  8960. temp = Sleef_sincosf8_u10(a);
  8961. #else
  8962. temp = Sleef_sincosf8_u35(a);
  8963. #endif
  8964. *mem_addr = temp.y;
  8965. return temp.x;
  8966. #else
  8967. simde__m256 r;
  8968. r = simde_mm256_sin_ps(a);
  8969. *mem_addr = simde_mm256_cos_ps(a);
  8970. return r;
  8971. #endif
  8972. }
  8973. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  8974. #undef _mm256_sincos_ps
  8975. #define _mm256_sincos_ps(mem_addr, a) simde_mm256_sincos_ps((mem_addr),(a))
  8976. #endif
  8977. SIMDE_FUNCTION_ATTRIBUTES
  8978. simde__m256d
  8979. simde_mm256_sincos_pd (simde__m256d* mem_addr, simde__m256d a) {
  8980. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
  8981. return _mm256_sincos_pd(HEDLEY_REINTERPRET_CAST(__m256d*, mem_addr), a);
  8982. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
  8983. Sleef___m256d_2 temp;
  8984. #if SIMDE_ACCURACY_PREFERENCE > 1
  8985. temp = Sleef_sincosd4_u10(a);
  8986. #else
  8987. temp = Sleef_sincosd4_u35(a);
  8988. #endif
  8989. *mem_addr = temp.y;
  8990. return temp.x;
  8991. #else
  8992. simde__m256d r;
  8993. r = simde_mm256_sin_pd(a);
  8994. *mem_addr = simde_mm256_cos_pd(a);
  8995. return r;
  8996. #endif
  8997. }
  8998. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  8999. #undef _mm256_sincos_pd
  9000. #define _mm256_sincos_pd(mem_addr, a) simde_mm256_sincos_pd((mem_addr),(a))
  9001. #endif
  9002. SIMDE_FUNCTION_ATTRIBUTES
  9003. simde__m512
  9004. simde_mm512_sincos_ps (simde__m512* mem_addr, simde__m512 a) {
  9005. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  9006. return _mm512_sincos_ps(HEDLEY_REINTERPRET_CAST(__m512*, mem_addr), a);
  9007. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
  9008. Sleef___m512_2 temp;
  9009. #if SIMDE_ACCURACY_PREFERENCE > 1
  9010. temp = Sleef_sincosf16_u10(a);
  9011. #else
  9012. temp = Sleef_sincosf16_u35(a);
  9013. #endif
  9014. *mem_addr = temp.y;
  9015. return temp.x;
  9016. #else
  9017. simde__m512 r;
  9018. r = simde_mm512_sin_ps(a);
  9019. *mem_addr = simde_mm512_cos_ps(a);
  9020. return r;
  9021. #endif
  9022. }
  9023. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  9024. #undef _mm512_sincos_ps
  9025. #define _mm512_sincos_ps(mem_addr, a) simde_mm512_sincos_ps((mem_addr),(a))
  9026. #endif
  9027. SIMDE_FUNCTION_ATTRIBUTES
  9028. simde__m512d
  9029. simde_mm512_sincos_pd (simde__m512d* mem_addr, simde__m512d a) {
  9030. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  9031. return _mm512_sincos_pd(HEDLEY_REINTERPRET_CAST(__m512d*, mem_addr), a);
  9032. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
  9033. Sleef___m512d_2 temp;
  9034. #if SIMDE_ACCURACY_PREFERENCE > 1
  9035. temp = Sleef_sincosd8_u10(a);
  9036. #else
  9037. temp = Sleef_sincosd8_u35(a);
  9038. #endif
  9039. *mem_addr = temp.y;
  9040. return temp.x;
  9041. #else
  9042. simde__m512d r;
  9043. r = simde_mm512_sin_pd(a);
  9044. *mem_addr = simde_mm512_cos_pd(a);
  9045. return r;
  9046. #endif
  9047. }
  9048. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  9049. #undef _mm512_sincos_pd
  9050. #define _mm512_sincos_pd(mem_addr, a) simde_mm512_sincos_pd((mem_addr),(a))
  9051. #endif
  9052. SIMDE_FUNCTION_ATTRIBUTES
  9053. simde__m512
  9054. simde_mm512_mask_sincos_ps(simde__m512* mem_addr, simde__m512 sin_src, simde__m512 cos_src, simde__mmask16 k, simde__m512 a) {
  9055. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  9056. return _mm512_mask_sincos_ps(mem_addr, sin_src, cos_src, k, a);
  9057. #else
  9058. simde__m512 cos_res, sin_res;
  9059. sin_res = simde_mm512_sincos_ps(&cos_res, a);
  9060. *mem_addr = simde_mm512_mask_mov_ps(cos_src, k, cos_res);
  9061. return simde_mm512_mask_mov_ps(sin_src, k, sin_res);
  9062. #endif
  9063. }
  9064. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  9065. #undef _mm512_mask_sincos_ps
  9066. #define _mm512_mask_sincos_ps(mem_addr, sin_src, cos_src, k, a) simde_mm512_mask_sincos_ps(mem_addr, sin_src, cos_src, k, a)
  9067. #endif
  9068. SIMDE_FUNCTION_ATTRIBUTES
  9069. simde__m512d
  9070. simde_mm512_mask_sincos_pd(simde__m512d* mem_addr, simde__m512d sin_src, simde__m512d cos_src, simde__mmask8 k, simde__m512d a) {
  9071. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  9072. return _mm512_mask_sincos_pd(mem_addr, sin_src, cos_src, k, a);
  9073. #else
  9074. simde__m512d cos_res, sin_res;
  9075. sin_res = simde_mm512_sincos_pd(&cos_res, a);
  9076. *mem_addr = simde_mm512_mask_mov_pd(cos_src, k, cos_res);
  9077. return simde_mm512_mask_mov_pd(sin_src, k, sin_res);
  9078. #endif
  9079. }
  9080. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  9081. #undef _mm512_mask_sincos_pd
  9082. #define _mm512_mask_sincos_pd(mem_addr, sin_src, cos_src, k, a) simde_mm512_mask_sincos_pd(mem_addr, sin_src, cos_src, k, a)
  9083. #endif
  9084. SIMDE_FUNCTION_ATTRIBUTES
  9085. simde__m128
  9086. simde_mm_sind_ps (simde__m128 a) {
  9087. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
  9088. return _mm_sind_ps(a);
  9089. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
  9090. #if SIMDE_ACCURACY_PREFERENCE > 1
  9091. return Sleef_sinf4_u10(simde_x_mm_deg2rad_ps(a));
  9092. #else
  9093. return Sleef_sinf4_u35(simde_x_mm_deg2rad_ps(a));
  9094. #endif
  9095. #else
  9096. simde__m128_private
  9097. r_,
  9098. a_ = simde__m128_to_private(a);
  9099. SIMDE_VECTORIZE
  9100. for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
  9101. r_.f32[i] = simde_math_sinf(simde_math_deg2radf(a_.f32[i]));
  9102. }
  9103. return simde__m128_from_private(r_);
  9104. #endif
  9105. }
  9106. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  9107. #undef _mm_sind_ps
  9108. #define _mm_sind_ps(a) simde_mm_sind_ps(a)
  9109. #endif
  9110. SIMDE_FUNCTION_ATTRIBUTES
  9111. simde__m128d
  9112. simde_mm_sind_pd (simde__m128d a) {
  9113. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
  9114. return _mm_sind_pd(a);
  9115. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
  9116. #if SIMDE_ACCURACY_PREFERENCE > 1
  9117. return Sleef_sind2_u10(simde_x_mm_deg2rad_pd(a));
  9118. #else
  9119. return Sleef_sind2_u35(simde_x_mm_deg2rad_pd(a));
  9120. #endif
  9121. #else
  9122. simde__m128d_private
  9123. r_,
  9124. a_ = simde__m128d_to_private(a);
  9125. SIMDE_VECTORIZE
  9126. for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
  9127. r_.f64[i] = simde_math_sin(simde_math_deg2rad(a_.f64[i]));
  9128. }
  9129. return simde__m128d_from_private(r_);
  9130. #endif
  9131. }
  9132. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  9133. #undef _mm_sind_pd
  9134. #define _mm_sind_pd(a) simde_mm_sind_pd(a)
  9135. #endif
  9136. SIMDE_FUNCTION_ATTRIBUTES
  9137. simde__m256
  9138. simde_mm256_sind_ps (simde__m256 a) {
  9139. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
  9140. return _mm256_sind_ps(a);
  9141. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
  9142. #if SIMDE_ACCURACY_PREFERENCE > 1
  9143. return Sleef_sinf8_u10(simde_x_mm256_deg2rad_ps(a));
  9144. #else
  9145. return Sleef_sinf8_u35(simde_x_mm256_deg2rad_ps(a));
  9146. #endif
  9147. #else
  9148. simde__m256_private
  9149. r_,
  9150. a_ = simde__m256_to_private(a);
  9151. #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
  9152. for (size_t i = 0 ; i < (sizeof(r_.m128) / sizeof(r_.m128[0])) ; i++) {
  9153. r_.m128[i] = simde_mm_sind_ps(a_.m128[i]);
  9154. }
  9155. #else
  9156. SIMDE_VECTORIZE
  9157. for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
  9158. r_.f32[i] = simde_math_sinf(simde_math_deg2radf(a_.f32[i]));
  9159. }
  9160. #endif
  9161. return simde__m256_from_private(r_);
  9162. #endif
  9163. }
  9164. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  9165. #undef _mm256_sind_ps
  9166. #define _mm256_sind_ps(a) simde_mm256_sind_ps(a)
  9167. #endif
  9168. SIMDE_FUNCTION_ATTRIBUTES
  9169. simde__m256d
  9170. simde_mm256_sind_pd (simde__m256d a) {
  9171. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
  9172. return _mm256_sind_pd(a);
  9173. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
  9174. #if SIMDE_ACCURACY_PREFERENCE > 1
  9175. return Sleef_sind4_u10(simde_x_mm256_deg2rad_pd(a));
  9176. #else
  9177. return Sleef_sind4_u35(simde_x_mm256_deg2rad_pd(a));
  9178. #endif
  9179. #else
  9180. simde__m256d_private
  9181. r_,
  9182. a_ = simde__m256d_to_private(a);
  9183. #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
  9184. for (size_t i = 0 ; i < (sizeof(r_.m128d) / sizeof(r_.m128d[0])) ; i++) {
  9185. r_.m128d[i] = simde_mm_sind_pd(a_.m128d[i]);
  9186. }
  9187. #else
  9188. SIMDE_VECTORIZE
  9189. for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
  9190. r_.f64[i] = simde_math_sin(simde_math_deg2rad(a_.f64[i]));
  9191. }
  9192. #endif
  9193. return simde__m256d_from_private(r_);
  9194. #endif
  9195. }
  9196. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  9197. #undef _mm256_sind_pd
  9198. #define _mm256_sind_pd(a) simde_mm256_sind_pd(a)
  9199. #endif
  9200. SIMDE_FUNCTION_ATTRIBUTES
  9201. simde__m512
  9202. simde_mm512_sind_ps (simde__m512 a) {
  9203. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  9204. return _mm512_sind_ps(a);
  9205. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
  9206. #if SIMDE_ACCURACY_PREFERENCE > 1
  9207. return Sleef_sinf16_u10(simde_x_mm512_deg2rad_ps(a));
  9208. #else
  9209. return Sleef_sinf16_u35(simde_x_mm512_deg2rad_ps(a));
  9210. #endif
  9211. #else
  9212. simde__m512_private
  9213. r_,
  9214. a_ = simde__m512_to_private(a);
  9215. #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
  9216. for (size_t i = 0 ; i < (sizeof(r_.m256) / sizeof(r_.m256[0])) ; i++) {
  9217. r_.m256[i] = simde_mm256_sind_ps(a_.m256[i]);
  9218. }
  9219. #else
  9220. SIMDE_VECTORIZE
  9221. for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
  9222. r_.f32[i] = simde_math_sinf(simde_math_deg2radf(a_.f32[i]));
  9223. }
  9224. #endif
  9225. return simde__m512_from_private(r_);
  9226. #endif
  9227. }
  9228. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  9229. #undef _mm512_sind_ps
  9230. #define _mm512_sind_ps(a) simde_mm512_sind_ps(a)
  9231. #endif
  9232. SIMDE_FUNCTION_ATTRIBUTES
  9233. simde__m512d
  9234. simde_mm512_sind_pd (simde__m512d a) {
  9235. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  9236. return _mm512_sind_pd(a);
  9237. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
  9238. #if SIMDE_ACCURACY_PREFERENCE > 1
  9239. return Sleef_sind8_u10(simde_x_mm512_deg2rad_pd(a));
  9240. #else
  9241. return Sleef_sind8_u35(simde_x_mm512_deg2rad_pd(a));
  9242. #endif
  9243. #else
  9244. simde__m512d_private
  9245. r_,
  9246. a_ = simde__m512d_to_private(a);
  9247. #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
  9248. for (size_t i = 0 ; i < (sizeof(r_.m256d) / sizeof(r_.m256d[0])) ; i++) {
  9249. r_.m256d[i] = simde_mm256_sind_pd(a_.m256d[i]);
  9250. }
  9251. #else
  9252. SIMDE_VECTORIZE
  9253. for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
  9254. r_.f64[i] = simde_math_sin(simde_math_deg2rad(a_.f64[i]));
  9255. }
  9256. #endif
  9257. return simde__m512d_from_private(r_);
  9258. #endif
  9259. }
  9260. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  9261. #undef _mm512_sind_pd
  9262. #define _mm512_sind_pd(a) simde_mm512_sind_pd(a)
  9263. #endif
  9264. SIMDE_FUNCTION_ATTRIBUTES
  9265. simde__m512
  9266. simde_mm512_mask_sind_ps(simde__m512 src, simde__mmask16 k, simde__m512 a) {
  9267. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  9268. return _mm512_mask_sind_ps(src, k, a);
  9269. #else
  9270. return simde_mm512_mask_mov_ps(src, k, simde_mm512_sind_ps(a));
  9271. #endif
  9272. }
  9273. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  9274. #undef _mm512_mask_sind_ps
  9275. #define _mm512_mask_sind_ps(src, k, a) simde_mm512_mask_sind_ps(src, k, a)
  9276. #endif
  9277. SIMDE_FUNCTION_ATTRIBUTES
  9278. simde__m512d
  9279. simde_mm512_mask_sind_pd(simde__m512d src, simde__mmask8 k, simde__m512d a) {
  9280. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  9281. return _mm512_mask_sind_pd(src, k, a);
  9282. #else
  9283. return simde_mm512_mask_mov_pd(src, k, simde_mm512_sind_pd(a));
  9284. #endif
  9285. }
  9286. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  9287. #undef _mm512_mask_sind_pd
  9288. #define _mm512_mask_sind_pd(src, k, a) simde_mm512_mask_sind_pd(src, k, a)
  9289. #endif
  9290. SIMDE_FUNCTION_ATTRIBUTES
  9291. simde__m128
  9292. simde_mm_sinh_ps (simde__m128 a) {
  9293. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
  9294. return _mm_sinh_ps(a);
  9295. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
  9296. return Sleef_sinhf4_u10(a);
  9297. #else
  9298. simde__m128_private
  9299. r_,
  9300. a_ = simde__m128_to_private(a);
  9301. SIMDE_VECTORIZE
  9302. for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
  9303. r_.f32[i] = simde_math_sinhf(a_.f32[i]);
  9304. }
  9305. return simde__m128_from_private(r_);
  9306. #endif
  9307. }
  9308. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  9309. #undef _mm_sinh_ps
  9310. #define _mm_sinh_ps(a) simde_mm_sinh_ps(a)
  9311. #endif
  9312. SIMDE_FUNCTION_ATTRIBUTES
  9313. simde__m128d
  9314. simde_mm_sinh_pd (simde__m128d a) {
  9315. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
  9316. return _mm_sinh_pd(a);
  9317. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
  9318. return Sleef_sinhd2_u10(a);
  9319. #else
  9320. simde__m128d_private
  9321. r_,
  9322. a_ = simde__m128d_to_private(a);
  9323. SIMDE_VECTORIZE
  9324. for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
  9325. r_.f64[i] = simde_math_sinh(a_.f64[i]);
  9326. }
  9327. return simde__m128d_from_private(r_);
  9328. #endif
  9329. }
  9330. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  9331. #undef _mm_sinh_pd
  9332. #define _mm_sinh_pd(a) simde_mm_sinh_pd(a)
  9333. #endif
  9334. SIMDE_FUNCTION_ATTRIBUTES
  9335. simde__m256
  9336. simde_mm256_sinh_ps (simde__m256 a) {
  9337. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
  9338. return _mm256_sinh_ps(a);
  9339. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
  9340. return Sleef_sinhf8_u10(a);
  9341. #else
  9342. simde__m256_private
  9343. r_,
  9344. a_ = simde__m256_to_private(a);
  9345. #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
  9346. for (size_t i = 0 ; i < (sizeof(r_.m128) / sizeof(r_.m128[0])) ; i++) {
  9347. r_.m128[i] = simde_mm_sinh_ps(a_.m128[i]);
  9348. }
  9349. #else
  9350. SIMDE_VECTORIZE
  9351. for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
  9352. r_.f32[i] = simde_math_sinhf(a_.f32[i]);
  9353. }
  9354. #endif
  9355. return simde__m256_from_private(r_);
  9356. #endif
  9357. }
  9358. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  9359. #undef _mm256_sinh_ps
  9360. #define _mm256_sinh_ps(a) simde_mm256_sinh_ps(a)
  9361. #endif
  9362. SIMDE_FUNCTION_ATTRIBUTES
  9363. simde__m256d
  9364. simde_mm256_sinh_pd (simde__m256d a) {
  9365. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
  9366. return _mm256_sinh_pd(a);
  9367. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
  9368. return Sleef_sinhd4_u10(a);
  9369. #else
  9370. simde__m256d_private
  9371. r_,
  9372. a_ = simde__m256d_to_private(a);
  9373. #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
  9374. for (size_t i = 0 ; i < (sizeof(r_.m128d) / sizeof(r_.m128d[0])) ; i++) {
  9375. r_.m128d[i] = simde_mm_sinh_pd(a_.m128d[i]);
  9376. }
  9377. #else
  9378. SIMDE_VECTORIZE
  9379. for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
  9380. r_.f64[i] = simde_math_sinh(a_.f64[i]);
  9381. }
  9382. #endif
  9383. return simde__m256d_from_private(r_);
  9384. #endif
  9385. }
  9386. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  9387. #undef _mm256_sinh_pd
  9388. #define _mm256_sinh_pd(a) simde_mm256_sinh_pd(a)
  9389. #endif
  9390. SIMDE_FUNCTION_ATTRIBUTES
  9391. simde__m512
  9392. simde_mm512_sinh_ps (simde__m512 a) {
  9393. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  9394. return _mm512_sinh_ps(a);
  9395. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
  9396. return Sleef_sinhf16_u10(a);
  9397. #else
  9398. simde__m512_private
  9399. r_,
  9400. a_ = simde__m512_to_private(a);
  9401. #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
  9402. for (size_t i = 0 ; i < (sizeof(r_.m256) / sizeof(r_.m256[0])) ; i++) {
  9403. r_.m256[i] = simde_mm256_sinh_ps(a_.m256[i]);
  9404. }
  9405. #else
  9406. SIMDE_VECTORIZE
  9407. for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
  9408. r_.f32[i] = simde_math_sinhf(a_.f32[i]);
  9409. }
  9410. #endif
  9411. return simde__m512_from_private(r_);
  9412. #endif
  9413. }
  9414. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  9415. #undef _mm512_sinh_ps
  9416. #define _mm512_sinh_ps(a) simde_mm512_sinh_ps(a)
  9417. #endif
  9418. SIMDE_FUNCTION_ATTRIBUTES
  9419. simde__m512d
  9420. simde_mm512_sinh_pd (simde__m512d a) {
  9421. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  9422. return _mm512_sinh_pd(a);
  9423. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
  9424. return Sleef_sinhd8_u10(a);
  9425. #else
  9426. simde__m512d_private
  9427. r_,
  9428. a_ = simde__m512d_to_private(a);
  9429. #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
  9430. for (size_t i = 0 ; i < (sizeof(r_.m256d) / sizeof(r_.m256d[0])) ; i++) {
  9431. r_.m256d[i] = simde_mm256_sinh_pd(a_.m256d[i]);
  9432. }
  9433. #else
  9434. SIMDE_VECTORIZE
  9435. for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
  9436. r_.f64[i] = simde_math_sinh(a_.f64[i]);
  9437. }
  9438. #endif
  9439. return simde__m512d_from_private(r_);
  9440. #endif
  9441. }
  9442. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  9443. #undef _mm512_sinh_pd
  9444. #define _mm512_sinh_pd(a) simde_mm512_sinh_pd(a)
  9445. #endif
  9446. SIMDE_FUNCTION_ATTRIBUTES
  9447. simde__m512
  9448. simde_mm512_mask_sinh_ps(simde__m512 src, simde__mmask16 k, simde__m512 a) {
  9449. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  9450. return _mm512_mask_sinh_ps(src, k, a);
  9451. #else
  9452. return simde_mm512_mask_mov_ps(src, k, simde_mm512_sinh_ps(a));
  9453. #endif
  9454. }
  9455. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  9456. #undef _mm512_mask_sinh_ps
  9457. #define _mm512_mask_sinh_ps(src, k, a) simde_mm512_mask_sinh_ps(src, k, a)
  9458. #endif
  9459. SIMDE_FUNCTION_ATTRIBUTES
  9460. simde__m512d
  9461. simde_mm512_mask_sinh_pd(simde__m512d src, simde__mmask8 k, simde__m512d a) {
  9462. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  9463. return _mm512_mask_sinh_pd(src, k, a);
  9464. #else
  9465. return simde_mm512_mask_mov_pd(src, k, simde_mm512_sinh_pd(a));
  9466. #endif
  9467. }
  9468. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  9469. #undef _mm512_mask_sinh_pd
  9470. #define _mm512_mask_sinh_pd(src, k, a) simde_mm512_mask_sinh_pd(src, k, a)
  9471. #endif
  9472. SIMDE_FUNCTION_ATTRIBUTES
  9473. simde__m128
  9474. simde_mm_svml_ceil_ps (simde__m128 a) {
  9475. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
  9476. return _mm_svml_ceil_ps(a);
  9477. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
  9478. return Sleef_ceilf4(a);
  9479. #else
  9480. return simde_mm_round_ps(a, SIMDE_MM_FROUND_TO_POS_INF);
  9481. #endif
  9482. }
  9483. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  9484. #undef _mm_svml_ceil_ps
  9485. #define _mm_svml_ceil_ps(a) simde_mm_svml_ceil_ps(a)
  9486. #endif
  9487. SIMDE_FUNCTION_ATTRIBUTES
  9488. simde__m128d
  9489. simde_mm_svml_ceil_pd (simde__m128d a) {
  9490. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
  9491. return _mm_svml_ceil_pd(a);
  9492. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
  9493. return Sleef_ceild2(a);
  9494. #else
  9495. return simde_mm_round_pd(a, SIMDE_MM_FROUND_TO_POS_INF);
  9496. #endif
  9497. }
  9498. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  9499. #undef _mm_svml_ceil_pd
  9500. #define _mm_svml_ceil_pd(a) simde_mm_svml_ceil_pd(a)
  9501. #endif
  9502. SIMDE_FUNCTION_ATTRIBUTES
  9503. simde__m256
  9504. simde_mm256_svml_ceil_ps (simde__m256 a) {
  9505. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
  9506. return _mm256_svml_ceil_ps(a);
  9507. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
  9508. return Sleef_ceilf8(a);
  9509. #else
  9510. return simde_mm256_round_ps(a, SIMDE_MM_FROUND_TO_POS_INF);
  9511. #endif
  9512. }
  9513. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  9514. #undef _mm256_svml_ceil_ps
  9515. #define _mm256_svml_ceil_ps(a) simde_mm256_svml_ceil_ps(a)
  9516. #endif
  9517. SIMDE_FUNCTION_ATTRIBUTES
  9518. simde__m256d
  9519. simde_mm256_svml_ceil_pd (simde__m256d a) {
  9520. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
  9521. return _mm256_svml_ceil_pd(a);
  9522. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
  9523. return Sleef_ceild4(a);
  9524. #else
  9525. return simde_mm256_round_pd(a, SIMDE_MM_FROUND_TO_POS_INF);
  9526. #endif
  9527. }
  9528. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  9529. #undef _mm256_svml_ceil_pd
  9530. #define _mm256_svml_ceil_pd(a) simde_mm256_svml_ceil_pd(a)
  9531. #endif
  9532. SIMDE_FUNCTION_ATTRIBUTES
  9533. simde__m512
  9534. simde_mm512_ceil_ps (simde__m512 a) {
  9535. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  9536. return _mm512_ceil_ps(a);
  9537. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
  9538. return Sleef_ceilf16(a);
  9539. #else
  9540. simde__m512_private
  9541. r_,
  9542. a_ = simde__m512_to_private(a);
  9543. #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
  9544. for (size_t i = 0 ; i < (sizeof(r_.m256) / sizeof(r_.m256[0])) ; i++) {
  9545. r_.m256[i] = simde_mm256_ceil_ps(a_.m256[i]);
  9546. }
  9547. #else
  9548. SIMDE_VECTORIZE
  9549. for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
  9550. r_.f32[i] = simde_math_ceilf(a_.f32[i]);
  9551. }
  9552. #endif
  9553. return simde__m512_from_private(r_);
  9554. #endif
  9555. }
  9556. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  9557. #undef _mm512_ceil_ps
  9558. #define _mm512_ceil_ps(a) simde_mm512_ceil_ps(a)
  9559. #endif
  9560. SIMDE_FUNCTION_ATTRIBUTES
  9561. simde__m512d
  9562. simde_mm512_ceil_pd (simde__m512d a) {
  9563. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  9564. return _mm512_ceil_pd(a);
  9565. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
  9566. return Sleef_ceild8(a);
  9567. #else
  9568. simde__m512d_private
  9569. r_,
  9570. a_ = simde__m512d_to_private(a);
  9571. #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
  9572. for (size_t i = 0 ; i < (sizeof(r_.m256d) / sizeof(r_.m256d[0])) ; i++) {
  9573. r_.m256d[i] = simde_mm256_ceil_pd(a_.m256d[i]);
  9574. }
  9575. #else
  9576. SIMDE_VECTORIZE
  9577. for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
  9578. r_.f64[i] = simde_math_ceil(a_.f64[i]);
  9579. }
  9580. #endif
  9581. return simde__m512d_from_private(r_);
  9582. #endif
  9583. }
  9584. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  9585. #undef _mm512_ceil_pd
  9586. #define _mm512_ceil_pd(a) simde_mm512_ceil_pd(a)
  9587. #endif
  9588. SIMDE_FUNCTION_ATTRIBUTES
  9589. simde__m512
  9590. simde_mm512_mask_ceil_ps(simde__m512 src, simde__mmask16 k, simde__m512 a) {
  9591. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  9592. return _mm512_mask_ceil_ps(src, k, a);
  9593. #else
  9594. return simde_mm512_mask_mov_ps(src, k, simde_mm512_ceil_ps(a));
  9595. #endif
  9596. }
  9597. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  9598. #undef _mm512_mask_ceil_ps
  9599. #define _mm512_mask_ceil_ps(src, k, a) simde_mm512_mask_ceil_ps(src, k, a)
  9600. #endif
  9601. SIMDE_FUNCTION_ATTRIBUTES
  9602. simde__m512d
  9603. simde_mm512_mask_ceil_pd(simde__m512d src, simde__mmask8 k, simde__m512d a) {
  9604. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  9605. return _mm512_mask_ceil_pd(src, k, a);
  9606. #else
  9607. return simde_mm512_mask_mov_pd(src, k, simde_mm512_ceil_pd(a));
  9608. #endif
  9609. }
  9610. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  9611. #undef _mm512_mask_ceil_pd
  9612. #define _mm512_mask_ceil_pd(src, k, a) simde_mm512_mask_ceil_pd(src, k, a)
  9613. #endif
  9614. SIMDE_FUNCTION_ATTRIBUTES
  9615. simde__m128
  9616. simde_mm_svml_floor_ps (simde__m128 a) {
  9617. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
  9618. return _mm_svml_floor_ps(a);
  9619. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
  9620. return Sleef_floorf4(a);
  9621. #else
  9622. return simde_mm_round_ps(a, SIMDE_MM_FROUND_TO_NEG_INF);
  9623. #endif
  9624. }
  9625. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  9626. #undef _mm_svml_floor_ps
  9627. #define _mm_svml_floor_ps(a) simde_mm_svml_floor_ps(a)
  9628. #endif
  9629. SIMDE_FUNCTION_ATTRIBUTES
  9630. simde__m128d
  9631. simde_mm_svml_floor_pd (simde__m128d a) {
  9632. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
  9633. return _mm_svml_floor_pd(a);
  9634. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
  9635. return Sleef_floord2(a);
  9636. #else
  9637. return simde_mm_round_pd(a, SIMDE_MM_FROUND_TO_NEG_INF);
  9638. #endif
  9639. }
  9640. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  9641. #undef _mm_svml_floor_pd
  9642. #define _mm_svml_floor_pd(a) simde_mm_svml_floor_pd(a)
  9643. #endif
  9644. SIMDE_FUNCTION_ATTRIBUTES
  9645. simde__m256
  9646. simde_mm256_svml_floor_ps (simde__m256 a) {
  9647. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
  9648. return _mm256_svml_floor_ps(a);
  9649. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
  9650. return Sleef_floorf8(a);
  9651. #else
  9652. return simde_mm256_round_ps(a, SIMDE_MM_FROUND_TO_NEG_INF);
  9653. #endif
  9654. }
  9655. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  9656. #undef _mm256_svml_floor_ps
  9657. #define _mm256_svml_floor_ps(a) simde_mm256_svml_floor_ps(a)
  9658. #endif
  9659. SIMDE_FUNCTION_ATTRIBUTES
  9660. simde__m256d
  9661. simde_mm256_svml_floor_pd (simde__m256d a) {
  9662. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
  9663. return _mm256_svml_floor_pd(a);
  9664. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
  9665. return Sleef_floord4(a);
  9666. #else
  9667. return simde_mm256_round_pd(a, SIMDE_MM_FROUND_TO_NEG_INF);
  9668. #endif
  9669. }
  9670. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  9671. #undef _mm256_svml_floor_pd
  9672. #define _mm256_svml_floor_pd(a) simde_mm256_svml_floor_pd(a)
  9673. #endif
  9674. SIMDE_FUNCTION_ATTRIBUTES
  9675. simde__m512
  9676. simde_mm512_floor_ps (simde__m512 a) {
  9677. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  9678. return _mm512_floor_ps(a);
  9679. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
  9680. return Sleef_floorf16(a);
  9681. #else
  9682. simde__m512_private
  9683. r_,
  9684. a_ = simde__m512_to_private(a);
  9685. #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
  9686. for (size_t i = 0 ; i < (sizeof(r_.m256) / sizeof(r_.m256[0])) ; i++) {
  9687. r_.m256[i] = simde_mm256_floor_ps(a_.m256[i]);
  9688. }
  9689. #else
  9690. SIMDE_VECTORIZE
  9691. for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
  9692. r_.f32[i] = simde_math_floorf(a_.f32[i]);
  9693. }
  9694. #endif
  9695. return simde__m512_from_private(r_);
  9696. #endif
  9697. }
  9698. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  9699. #undef _mm512_floor_ps
  9700. #define _mm512_floor_ps(a) simde_mm512_floor_ps(a)
  9701. #endif
  9702. SIMDE_FUNCTION_ATTRIBUTES
  9703. simde__m512d
  9704. simde_mm512_floor_pd (simde__m512d a) {
  9705. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  9706. return _mm512_floor_pd(a);
  9707. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
  9708. return Sleef_floord8(a);
  9709. #else
  9710. simde__m512d_private
  9711. r_,
  9712. a_ = simde__m512d_to_private(a);
  9713. #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
  9714. for (size_t i = 0 ; i < (sizeof(r_.m256d) / sizeof(r_.m256d[0])) ; i++) {
  9715. r_.m256d[i] = simde_mm256_floor_pd(a_.m256d[i]);
  9716. }
  9717. #else
  9718. SIMDE_VECTORIZE
  9719. for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
  9720. r_.f64[i] = simde_math_floor(a_.f64[i]);
  9721. }
  9722. #endif
  9723. return simde__m512d_from_private(r_);
  9724. #endif
  9725. }
  9726. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  9727. #undef _mm512_floor_pd
  9728. #define _mm512_floor_pd(a) simde_mm512_floor_pd(a)
  9729. #endif
  9730. SIMDE_FUNCTION_ATTRIBUTES
  9731. simde__m512
  9732. simde_mm512_mask_floor_ps(simde__m512 src, simde__mmask16 k, simde__m512 a) {
  9733. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  9734. return _mm512_mask_floor_ps(src, k, a);
  9735. #else
  9736. return simde_mm512_mask_mov_ps(src, k, simde_mm512_floor_ps(a));
  9737. #endif
  9738. }
  9739. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  9740. #undef _mm512_mask_floor_ps
  9741. #define _mm512_mask_floor_ps(src, k, a) simde_mm512_mask_floor_ps(src, k, a)
  9742. #endif
  9743. SIMDE_FUNCTION_ATTRIBUTES
  9744. simde__m512d
  9745. simde_mm512_mask_floor_pd(simde__m512d src, simde__mmask8 k, simde__m512d a) {
  9746. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  9747. return _mm512_mask_floor_pd(src, k, a);
  9748. #else
  9749. return simde_mm512_mask_mov_pd(src, k, simde_mm512_floor_pd(a));
  9750. #endif
  9751. }
  9752. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  9753. #undef _mm512_mask_floor_pd
  9754. #define _mm512_mask_floor_pd(src, k, a) simde_mm512_mask_floor_pd(src, k, a)
  9755. #endif
  9756. SIMDE_FUNCTION_ATTRIBUTES
  9757. simde__m128
  9758. simde_mm_svml_round_ps (simde__m128 a) {
  9759. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
  9760. return _mm_svml_round_ps(a);
  9761. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
  9762. return Sleef_roundf4(a);
  9763. #else
  9764. simde__m128_private
  9765. r_,
  9766. a_ = simde__m128_to_private(a);
  9767. SIMDE_VECTORIZE
  9768. for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
  9769. r_.f32[i] = simde_math_roundf(a_.f32[i]);
  9770. }
  9771. return simde__m128_from_private(r_);
  9772. #endif
  9773. }
  9774. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  9775. #undef _mm_svml_round_ps
  9776. #define _mm_svml_round_ps(a) simde_mm_svml_round_ps(a)
  9777. #endif
  9778. SIMDE_FUNCTION_ATTRIBUTES
  9779. simde__m128d
  9780. simde_mm_svml_round_pd (simde__m128d a) {
  9781. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
  9782. return _mm_svml_round_pd(a);
  9783. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
  9784. return Sleef_roundd2(a);
  9785. #else
  9786. simde__m128d_private
  9787. r_,
  9788. a_ = simde__m128d_to_private(a);
  9789. SIMDE_VECTORIZE
  9790. for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
  9791. r_.f64[i] = simde_math_round(a_.f64[i]);
  9792. }
  9793. return simde__m128d_from_private(r_);
  9794. #endif
  9795. }
  9796. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  9797. #undef _mm_svml_round_pd
  9798. #define _mm_svml_round_pd(a) simde_mm_svml_round_pd(a)
  9799. #endif
  9800. SIMDE_FUNCTION_ATTRIBUTES
  9801. simde__m256
  9802. simde_mm256_svml_round_ps (simde__m256 a) {
  9803. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
  9804. return _mm256_svml_round_ps(a);
  9805. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
  9806. return Sleef_roundf8(a);
  9807. #else
  9808. simde__m256_private
  9809. r_,
  9810. a_ = simde__m256_to_private(a);
  9811. #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
  9812. for (size_t i = 0 ; i < (sizeof(r_.m128) / sizeof(r_.m128[0])) ; i++) {
  9813. r_.m128[i] = simde_mm_svml_round_ps(a_.m128[i]);
  9814. }
  9815. #else
  9816. SIMDE_VECTORIZE
  9817. for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
  9818. r_.f32[i] = simde_math_roundf(a_.f32[i]);
  9819. }
  9820. #endif
  9821. return simde__m256_from_private(r_);
  9822. #endif
  9823. }
  9824. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  9825. #undef _mm256_svml_round_ps
  9826. #define _mm256_svml_round_ps(a) simde_mm256_svml_round_ps(a)
  9827. #endif
  9828. SIMDE_FUNCTION_ATTRIBUTES
  9829. simde__m256d
  9830. simde_mm256_svml_round_pd (simde__m256d a) {
  9831. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
  9832. return _mm256_svml_round_pd(a);
  9833. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
  9834. return Sleef_roundd4(a);
  9835. #else
  9836. simde__m256d_private
  9837. r_,
  9838. a_ = simde__m256d_to_private(a);
  9839. #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
  9840. for (size_t i = 0 ; i < (sizeof(r_.m128d) / sizeof(r_.m128d[0])) ; i++) {
  9841. r_.m128d[i] = simde_mm_svml_round_pd(a_.m128d[i]);
  9842. }
  9843. #else
  9844. SIMDE_VECTORIZE
  9845. for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
  9846. r_.f64[i] = simde_math_round(a_.f64[i]);
  9847. }
  9848. #endif
  9849. return simde__m256d_from_private(r_);
  9850. #endif
  9851. }
  9852. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  9853. #undef _mm256_svml_round_pd
  9854. #define _mm256_svml_round_pd(a) simde_mm256_svml_round_pd(a)
  9855. #endif
  9856. SIMDE_FUNCTION_ATTRIBUTES
  9857. simde__m512d
  9858. simde_mm512_svml_round_pd (simde__m512d a) {
  9859. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  9860. return _mm512_svml_round_pd(a);
  9861. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
  9862. return Sleef_roundd8(a);
  9863. #else
  9864. simde__m512d_private
  9865. r_,
  9866. a_ = simde__m512d_to_private(a);
  9867. #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
  9868. for (size_t i = 0 ; i < (sizeof(r_.m256d) / sizeof(r_.m256d[0])) ; i++) {
  9869. r_.m256d[i] = simde_mm256_svml_round_pd(a_.m256d[i]);
  9870. }
  9871. #else
  9872. SIMDE_VECTORIZE
  9873. for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
  9874. r_.f64[i] = simde_math_round(a_.f64[i]);
  9875. }
  9876. #endif
  9877. return simde__m512d_from_private(r_);
  9878. #endif
  9879. }
  9880. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  9881. #undef _mm512_svml_round_pd
  9882. #define _mm512_svml_round_pd(a) simde_mm512_svml_round_pd(a)
  9883. #endif
  9884. SIMDE_FUNCTION_ATTRIBUTES
  9885. simde__m512d
  9886. simde_mm512_mask_svml_round_pd(simde__m512d src, simde__mmask8 k, simde__m512d a) {
  9887. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  9888. return _mm512_mask_svml_round_pd(src, k, a);
  9889. #else
  9890. return simde_mm512_mask_mov_pd(src, k, simde_mm512_svml_round_pd(a));
  9891. #endif
  9892. }
  9893. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  9894. #undef _mm512_mask_svml_round_pd
  9895. #define _mm512_mask_svml_round_pd(src, k, a) simde_mm512_mask_svml_round_pd(src, k, a)
  9896. #endif
  9897. SIMDE_FUNCTION_ATTRIBUTES
  9898. simde__m128
  9899. simde_mm_svml_sqrt_ps (simde__m128 a) {
  9900. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
  9901. return _mm_svml_sqrt_ps(a);
  9902. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
  9903. return Sleef_sqrtf4(a);
  9904. #else
  9905. return simde_mm_sqrt_ps(a);
  9906. #endif
  9907. }
  9908. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  9909. #undef _mm_svml_sqrt_ps
  9910. #define _mm_svml_sqrt_ps(a) simde_mm_svml_sqrt_ps(a)
  9911. #endif
  9912. SIMDE_FUNCTION_ATTRIBUTES
  9913. simde__m128d
  9914. simde_mm_svml_sqrt_pd (simde__m128d a) {
  9915. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
  9916. return _mm_svml_sqrt_pd(a);
  9917. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
  9918. return Sleef_sqrtd2(a);
  9919. #else
  9920. return simde_mm_sqrt_pd(a);
  9921. #endif
  9922. }
  9923. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  9924. #undef _mm_svml_sqrt_pd
  9925. #define _mm_svml_sqrt_pd(a) simde_mm_svml_sqrt_pd(a)
  9926. #endif
  9927. SIMDE_FUNCTION_ATTRIBUTES
  9928. simde__m256
  9929. simde_mm256_svml_sqrt_ps (simde__m256 a) {
  9930. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
  9931. return _mm256_svml_sqrt_ps(a);
  9932. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
  9933. return Sleef_sqrtf8(a);
  9934. #else
  9935. return simde_mm256_sqrt_ps(a);
  9936. #endif
  9937. }
  9938. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  9939. #undef _mm256_svml_sqrt_ps
  9940. #define _mm256_svml_sqrt_ps(a) simde_mm256_svml_sqrt_ps(a)
  9941. #endif
  9942. SIMDE_FUNCTION_ATTRIBUTES
  9943. simde__m256d
  9944. simde_mm256_svml_sqrt_pd (simde__m256d a) {
  9945. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
  9946. return _mm256_svml_sqrt_pd(a);
  9947. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
  9948. return Sleef_sqrtd4(a);
  9949. #else
  9950. return simde_mm256_sqrt_pd(a);
  9951. #endif
  9952. }
  9953. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  9954. #undef _mm256_svml_sqrt_pd
  9955. #define _mm256_svml_sqrt_pd(a) simde_mm256_svml_sqrt_pd(a)
  9956. #endif
  9957. SIMDE_FUNCTION_ATTRIBUTES
  9958. simde__m512
  9959. simde_mm512_svml_sqrt_ps (simde__m512 a) {
  9960. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  9961. return _mm512_svml_sqrt_ps(a);
  9962. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
  9963. return Sleef_sqrtf16(a);
  9964. #else
  9965. return simde_mm512_sqrt_ps(a);
  9966. #endif
  9967. }
  9968. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  9969. #undef _mm512_svml_sqrt_ps
  9970. #define _mm512_svml_sqrt_ps(a) simde_mm512_svml_sqrt_ps(a)
  9971. #endif
  9972. SIMDE_FUNCTION_ATTRIBUTES
  9973. simde__m512d
  9974. simde_mm512_svml_sqrt_pd (simde__m512d a) {
  9975. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  9976. return _mm512_svml_sqrt_pd(a);
  9977. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
  9978. return Sleef_sqrtd8(a);
  9979. #else
  9980. return simde_mm512_sqrt_pd(a);
  9981. #endif
  9982. }
  9983. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  9984. #undef _mm512_svml_sqrt_pd
  9985. #define _mm512_svml_sqrt_pd(a) simde_mm512_svml_sqrt_pd(a)
  9986. #endif
  9987. SIMDE_FUNCTION_ATTRIBUTES
  9988. simde__m128
  9989. simde_mm_tan_ps (simde__m128 a) {
  9990. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
  9991. return _mm_tan_ps(a);
  9992. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
  9993. #if SIMDE_ACCURACY_PREFERENCE > 1
  9994. return Sleef_tanf4_u10(a);
  9995. #else
  9996. return Sleef_tanf4_u35(a);
  9997. #endif
  9998. #else
  9999. simde__m128_private
  10000. r_,
  10001. a_ = simde__m128_to_private(a);
  10002. SIMDE_VECTORIZE
  10003. for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
  10004. r_.f32[i] = simde_math_tanf(a_.f32[i]);
  10005. }
  10006. return simde__m128_from_private(r_);
  10007. #endif
  10008. }
  10009. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  10010. #undef _mm_tan_ps
  10011. #define _mm_tan_ps(a) simde_mm_tan_ps(a)
  10012. #endif
  10013. SIMDE_FUNCTION_ATTRIBUTES
  10014. simde__m128d
  10015. simde_mm_tan_pd (simde__m128d a) {
  10016. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
  10017. return _mm_tan_pd(a);
  10018. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
  10019. #if SIMDE_ACCURACY_PREFERENCE > 1
  10020. return Sleef_tand2_u10(a);
  10021. #else
  10022. return Sleef_tand2_u35(a);
  10023. #endif
  10024. #else
  10025. simde__m128d_private
  10026. r_,
  10027. a_ = simde__m128d_to_private(a);
  10028. SIMDE_VECTORIZE
  10029. for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
  10030. r_.f64[i] = simde_math_tan(a_.f64[i]);
  10031. }
  10032. return simde__m128d_from_private(r_);
  10033. #endif
  10034. }
  10035. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  10036. #undef _mm_tan_pd
  10037. #define _mm_tan_pd(a) simde_mm_tan_pd(a)
  10038. #endif
  10039. SIMDE_FUNCTION_ATTRIBUTES
  10040. simde__m256
  10041. simde_mm256_tan_ps (simde__m256 a) {
  10042. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
  10043. return _mm256_tan_ps(a);
  10044. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
  10045. #if SIMDE_ACCURACY_PREFERENCE > 1
  10046. return Sleef_tanf8_u10(a);
  10047. #else
  10048. return Sleef_tanf8_u35(a);
  10049. #endif
  10050. #else
  10051. simde__m256_private
  10052. r_,
  10053. a_ = simde__m256_to_private(a);
  10054. #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
  10055. for (size_t i = 0 ; i < (sizeof(r_.m128) / sizeof(r_.m128[0])) ; i++) {
  10056. r_.m128[i] = simde_mm_tan_ps(a_.m128[i]);
  10057. }
  10058. #else
  10059. SIMDE_VECTORIZE
  10060. for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
  10061. r_.f32[i] = simde_math_tanf(a_.f32[i]);
  10062. }
  10063. #endif
  10064. return simde__m256_from_private(r_);
  10065. #endif
  10066. }
  10067. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  10068. #undef _mm256_tan_ps
  10069. #define _mm256_tan_ps(a) simde_mm256_tan_ps(a)
  10070. #endif
  10071. SIMDE_FUNCTION_ATTRIBUTES
  10072. simde__m256d
  10073. simde_mm256_tan_pd (simde__m256d a) {
  10074. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
  10075. return _mm256_tan_pd(a);
  10076. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
  10077. #if SIMDE_ACCURACY_PREFERENCE > 1
  10078. return Sleef_tand4_u10(a);
  10079. #else
  10080. return Sleef_tand4_u35(a);
  10081. #endif
  10082. #else
  10083. simde__m256d_private
  10084. r_,
  10085. a_ = simde__m256d_to_private(a);
  10086. #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
  10087. for (size_t i = 0 ; i < (sizeof(r_.m128d) / sizeof(r_.m128d[0])) ; i++) {
  10088. r_.m128d[i] = simde_mm_tan_pd(a_.m128d[i]);
  10089. }
  10090. #else
  10091. SIMDE_VECTORIZE
  10092. for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
  10093. r_.f64[i] = simde_math_tan(a_.f64[i]);
  10094. }
  10095. #endif
  10096. return simde__m256d_from_private(r_);
  10097. #endif
  10098. }
  10099. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  10100. #undef _mm256_tan_pd
  10101. #define _mm256_tan_pd(a) simde_mm256_tan_pd(a)
  10102. #endif
  10103. SIMDE_FUNCTION_ATTRIBUTES
  10104. simde__m512
  10105. simde_mm512_tan_ps (simde__m512 a) {
  10106. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  10107. return _mm512_tan_ps(a);
  10108. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
  10109. #if SIMDE_ACCURACY_PREFERENCE > 1
  10110. return Sleef_tanf16_u10(a);
  10111. #else
  10112. return Sleef_tanf16_u35(a);
  10113. #endif
  10114. #else
  10115. simde__m512_private
  10116. r_,
  10117. a_ = simde__m512_to_private(a);
  10118. #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
  10119. for (size_t i = 0 ; i < (sizeof(r_.m256) / sizeof(r_.m256[0])) ; i++) {
  10120. r_.m256[i] = simde_mm256_tan_ps(a_.m256[i]);
  10121. }
  10122. #else
  10123. SIMDE_VECTORIZE
  10124. for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
  10125. r_.f32[i] = simde_math_tanf(a_.f32[i]);
  10126. }
  10127. #endif
  10128. return simde__m512_from_private(r_);
  10129. #endif
  10130. }
  10131. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  10132. #undef _mm512_tan_ps
  10133. #define _mm512_tan_ps(a) simde_mm512_tan_ps(a)
  10134. #endif
  10135. SIMDE_FUNCTION_ATTRIBUTES
  10136. simde__m512d
  10137. simde_mm512_tan_pd (simde__m512d a) {
  10138. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  10139. return _mm512_tan_pd(a);
  10140. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
  10141. #if SIMDE_ACCURACY_PREFERENCE > 1
  10142. return Sleef_tand8_u10(a);
  10143. #else
  10144. return Sleef_tand8_u35(a);
  10145. #endif
  10146. #else
  10147. simde__m512d_private
  10148. r_,
  10149. a_ = simde__m512d_to_private(a);
  10150. #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
  10151. for (size_t i = 0 ; i < (sizeof(r_.m256d) / sizeof(r_.m256d[0])) ; i++) {
  10152. r_.m256d[i] = simde_mm256_tan_pd(a_.m256d[i]);
  10153. }
  10154. #else
  10155. SIMDE_VECTORIZE
  10156. for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
  10157. r_.f64[i] = simde_math_tan(a_.f64[i]);
  10158. }
  10159. #endif
  10160. return simde__m512d_from_private(r_);
  10161. #endif
  10162. }
  10163. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  10164. #undef _mm512_tan_pd
  10165. #define _mm512_tan_pd(a) simde_mm512_tan_pd(a)
  10166. #endif
  10167. SIMDE_FUNCTION_ATTRIBUTES
  10168. simde__m512
  10169. simde_mm512_mask_tan_ps(simde__m512 src, simde__mmask16 k, simde__m512 a) {
  10170. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  10171. return _mm512_mask_tan_ps(src, k, a);
  10172. #else
  10173. return simde_mm512_mask_mov_ps(src, k, simde_mm512_tan_ps(a));
  10174. #endif
  10175. }
  10176. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  10177. #undef _mm512_mask_tan_ps
  10178. #define _mm512_mask_tan_ps(src, k, a) simde_mm512_mask_tan_ps(src, k, a)
  10179. #endif
  10180. SIMDE_FUNCTION_ATTRIBUTES
  10181. simde__m512d
  10182. simde_mm512_mask_tan_pd(simde__m512d src, simde__mmask8 k, simde__m512d a) {
  10183. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  10184. return _mm512_mask_tan_pd(src, k, a);
  10185. #else
  10186. return simde_mm512_mask_mov_pd(src, k, simde_mm512_tan_pd(a));
  10187. #endif
  10188. }
  10189. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  10190. #undef _mm512_mask_tan_pd
  10191. #define _mm512_mask_tan_pd(src, k, a) simde_mm512_mask_tan_pd(src, k, a)
  10192. #endif
  10193. SIMDE_FUNCTION_ATTRIBUTES
  10194. simde__m128
  10195. simde_mm_tand_ps (simde__m128 a) {
  10196. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
  10197. return _mm_tand_ps(a);
  10198. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
  10199. #if SIMDE_ACCURACY_PREFERENCE > 1
  10200. return Sleef_tanf4_u10(simde_x_mm_deg2rad_ps(a));
  10201. #else
  10202. return Sleef_tanf4_u35(simde_x_mm_deg2rad_ps(a));
  10203. #endif
  10204. #else
  10205. simde__m128_private
  10206. r_,
  10207. a_ = simde__m128_to_private(a);
  10208. SIMDE_VECTORIZE
  10209. for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
  10210. r_.f32[i] = simde_math_tanf(simde_math_deg2radf(a_.f32[i]));
  10211. }
  10212. return simde__m128_from_private(r_);
  10213. #endif
  10214. }
  10215. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  10216. #undef _mm_tand_ps
  10217. #define _mm_tand_ps(a) simde_mm_tand_ps(a)
  10218. #endif
  10219. SIMDE_FUNCTION_ATTRIBUTES
  10220. simde__m128d
  10221. simde_mm_tand_pd (simde__m128d a) {
  10222. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
  10223. return _mm_tand_pd(a);
  10224. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
  10225. #if SIMDE_ACCURACY_PREFERENCE > 1
  10226. return Sleef_tand2_u10(simde_x_mm_deg2rad_pd(a));
  10227. #else
  10228. return Sleef_tand2_u35(simde_x_mm_deg2rad_pd(a));
  10229. #endif
  10230. #else
  10231. simde__m128d_private
  10232. r_,
  10233. a_ = simde__m128d_to_private(a);
  10234. SIMDE_VECTORIZE
  10235. for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
  10236. r_.f64[i] = simde_math_tan(simde_math_deg2rad(a_.f64[i]));
  10237. }
  10238. return simde__m128d_from_private(r_);
  10239. #endif
  10240. }
  10241. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  10242. #undef _mm_tand_pd
  10243. #define _mm_tand_pd(a) simde_mm_tand_pd(a)
  10244. #endif
  10245. SIMDE_FUNCTION_ATTRIBUTES
  10246. simde__m256
  10247. simde_mm256_tand_ps (simde__m256 a) {
  10248. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
  10249. return _mm256_tand_ps(a);
  10250. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
  10251. #if SIMDE_ACCURACY_PREFERENCE > 1
  10252. return Sleef_tanf8_u10(simde_x_mm256_deg2rad_ps(a));
  10253. #else
  10254. return Sleef_tanf8_u35(simde_x_mm256_deg2rad_ps(a));
  10255. #endif
  10256. #else
  10257. simde__m256_private
  10258. r_,
  10259. a_ = simde__m256_to_private(a);
  10260. #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
  10261. for (size_t i = 0 ; i < (sizeof(r_.m128) / sizeof(r_.m128[0])) ; i++) {
  10262. r_.m128[i] = simde_mm_tand_ps(a_.m128[i]);
  10263. }
  10264. #else
  10265. SIMDE_VECTORIZE
  10266. for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
  10267. r_.f32[i] = simde_math_tanf(simde_math_deg2radf(a_.f32[i]));
  10268. }
  10269. #endif
  10270. return simde__m256_from_private(r_);
  10271. #endif
  10272. }
  10273. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  10274. #undef _mm256_tand_ps
  10275. #define _mm256_tand_ps(a) simde_mm256_tand_ps(a)
  10276. #endif
  10277. SIMDE_FUNCTION_ATTRIBUTES
  10278. simde__m256d
  10279. simde_mm256_tand_pd (simde__m256d a) {
  10280. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
  10281. return _mm256_tand_pd(a);
  10282. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
  10283. #if SIMDE_ACCURACY_PREFERENCE > 1
  10284. return Sleef_tand4_u10(simde_x_mm256_deg2rad_pd(a));
  10285. #else
  10286. return Sleef_tand4_u35(simde_x_mm256_deg2rad_pd(a));
  10287. #endif
  10288. #else
  10289. simde__m256d_private
  10290. r_,
  10291. a_ = simde__m256d_to_private(a);
  10292. #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
  10293. for (size_t i = 0 ; i < (sizeof(r_.m128d) / sizeof(r_.m128d[0])) ; i++) {
  10294. r_.m128d[i] = simde_mm_tand_pd(a_.m128d[i]);
  10295. }
  10296. #else
  10297. SIMDE_VECTORIZE
  10298. for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
  10299. r_.f64[i] = simde_math_tan(simde_math_deg2rad(a_.f64[i]));
  10300. }
  10301. #endif
  10302. return simde__m256d_from_private(r_);
  10303. #endif
  10304. }
  10305. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  10306. #undef _mm256_tand_pd
  10307. #define _mm256_tand_pd(a) simde_mm256_tand_pd(a)
  10308. #endif
  10309. SIMDE_FUNCTION_ATTRIBUTES
  10310. simde__m512
  10311. simde_mm512_tand_ps (simde__m512 a) {
  10312. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  10313. return _mm512_tand_ps(a);
  10314. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
  10315. #if SIMDE_ACCURACY_PREFERENCE > 1
  10316. return Sleef_tanf16_u10(simde_x_mm512_deg2rad_ps(a));
  10317. #else
  10318. return Sleef_tanf16_u35(simde_x_mm512_deg2rad_ps(a));
  10319. #endif
  10320. #else
  10321. simde__m512_private
  10322. r_,
  10323. a_ = simde__m512_to_private(a);
  10324. #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
  10325. for (size_t i = 0 ; i < (sizeof(r_.m256) / sizeof(r_.m256[0])) ; i++) {
  10326. r_.m256[i] = simde_mm256_tand_ps(a_.m256[i]);
  10327. }
  10328. #else
  10329. SIMDE_VECTORIZE
  10330. for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
  10331. r_.f32[i] = simde_math_tanf(simde_math_deg2radf(a_.f32[i]));
  10332. }
  10333. #endif
  10334. return simde__m512_from_private(r_);
  10335. #endif
  10336. }
  10337. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  10338. #undef _mm512_tand_ps
  10339. #define _mm512_tand_ps(a) simde_mm512_tand_ps(a)
  10340. #endif
  10341. SIMDE_FUNCTION_ATTRIBUTES
  10342. simde__m512d
  10343. simde_mm512_tand_pd (simde__m512d a) {
  10344. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  10345. return _mm512_tand_pd(a);
  10346. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
  10347. #if SIMDE_ACCURACY_PREFERENCE > 1
  10348. return Sleef_tand8_u10(simde_x_mm512_deg2rad_pd(a));
  10349. #else
  10350. return Sleef_tand8_u35(simde_x_mm512_deg2rad_pd(a));
  10351. #endif
  10352. #else
  10353. simde__m512d_private
  10354. r_,
  10355. a_ = simde__m512d_to_private(a);
  10356. #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
  10357. for (size_t i = 0 ; i < (sizeof(r_.m256d) / sizeof(r_.m256d[0])) ; i++) {
  10358. r_.m256d[i] = simde_mm256_tand_pd(a_.m256d[i]);
  10359. }
  10360. #else
  10361. SIMDE_VECTORIZE
  10362. for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
  10363. r_.f64[i] = simde_math_tan(simde_math_deg2rad(a_.f64[i]));
  10364. }
  10365. #endif
  10366. return simde__m512d_from_private(r_);
  10367. #endif
  10368. }
  10369. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  10370. #undef _mm512_tand_pd
  10371. #define _mm512_tand_pd(a) simde_mm512_tand_pd(a)
  10372. #endif
  10373. SIMDE_FUNCTION_ATTRIBUTES
  10374. simde__m512
  10375. simde_mm512_mask_tand_ps(simde__m512 src, simde__mmask16 k, simde__m512 a) {
  10376. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  10377. return _mm512_mask_tand_ps(src, k, a);
  10378. #else
  10379. return simde_mm512_mask_mov_ps(src, k, simde_mm512_tand_ps(a));
  10380. #endif
  10381. }
  10382. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  10383. #undef _mm512_mask_tand_ps
  10384. #define _mm512_mask_tand_ps(src, k, a) simde_mm512_mask_tand_ps(src, k, a)
  10385. #endif
  10386. SIMDE_FUNCTION_ATTRIBUTES
  10387. simde__m512d
  10388. simde_mm512_mask_tand_pd(simde__m512d src, simde__mmask8 k, simde__m512d a) {
  10389. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  10390. return _mm512_mask_tand_pd(src, k, a);
  10391. #else
  10392. return simde_mm512_mask_mov_pd(src, k, simde_mm512_tand_pd(a));
  10393. #endif
  10394. }
  10395. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  10396. #undef _mm512_mask_tand_pd
  10397. #define _mm512_mask_tand_pd(src, k, a) simde_mm512_mask_tand_pd(src, k, a)
  10398. #endif
  10399. SIMDE_FUNCTION_ATTRIBUTES
  10400. simde__m128
  10401. simde_mm_tanh_ps (simde__m128 a) {
  10402. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
  10403. return _mm_tanh_ps(a);
  10404. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
  10405. return Sleef_tanhf4_u10(a);
  10406. #else
  10407. simde__m128_private
  10408. r_,
  10409. a_ = simde__m128_to_private(a);
  10410. SIMDE_VECTORIZE
  10411. for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
  10412. r_.f32[i] = simde_math_tanhf(a_.f32[i]);
  10413. }
  10414. return simde__m128_from_private(r_);
  10415. #endif
  10416. }
  10417. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  10418. #undef _mm_tanh_ps
  10419. #define _mm_tanh_ps(a) simde_mm_tanh_ps(a)
  10420. #endif
  10421. SIMDE_FUNCTION_ATTRIBUTES
  10422. simde__m128d
  10423. simde_mm_tanh_pd (simde__m128d a) {
  10424. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
  10425. return _mm_tanh_pd(a);
  10426. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
  10427. return Sleef_tanhd2_u10(a);
  10428. #else
  10429. simde__m128d_private
  10430. r_,
  10431. a_ = simde__m128d_to_private(a);
  10432. SIMDE_VECTORIZE
  10433. for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
  10434. r_.f64[i] = simde_math_tanh(a_.f64[i]);
  10435. }
  10436. return simde__m128d_from_private(r_);
  10437. #endif
  10438. }
  10439. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  10440. #undef _mm_tanh_pd
  10441. #define _mm_tanh_pd(a) simde_mm_tanh_pd(a)
  10442. #endif
  10443. SIMDE_FUNCTION_ATTRIBUTES
  10444. simde__m256
  10445. simde_mm256_tanh_ps (simde__m256 a) {
  10446. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
  10447. return _mm256_tanh_ps(a);
  10448. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
  10449. return Sleef_tanhf8_u10(a);
  10450. #else
  10451. simde__m256_private
  10452. r_,
  10453. a_ = simde__m256_to_private(a);
  10454. #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
  10455. for (size_t i = 0 ; i < (sizeof(r_.m128) / sizeof(r_.m128[0])) ; i++) {
  10456. r_.m128[i] = simde_mm_tanh_ps(a_.m128[i]);
  10457. }
  10458. #else
  10459. SIMDE_VECTORIZE
  10460. for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
  10461. r_.f32[i] = simde_math_tanhf(a_.f32[i]);
  10462. }
  10463. #endif
  10464. return simde__m256_from_private(r_);
  10465. #endif
  10466. }
  10467. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  10468. #undef _mm256_tanh_ps
  10469. #define _mm256_tanh_ps(a) simde_mm256_tanh_ps(a)
  10470. #endif
  10471. SIMDE_FUNCTION_ATTRIBUTES
  10472. simde__m256d
  10473. simde_mm256_tanh_pd (simde__m256d a) {
  10474. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
  10475. return _mm256_tanh_pd(a);
  10476. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
  10477. return Sleef_tanhd4_u10(a);
  10478. #else
  10479. simde__m256d_private
  10480. r_,
  10481. a_ = simde__m256d_to_private(a);
  10482. #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
  10483. for (size_t i = 0 ; i < (sizeof(r_.m128d) / sizeof(r_.m128d[0])) ; i++) {
  10484. r_.m128d[i] = simde_mm_tanh_pd(a_.m128d[i]);
  10485. }
  10486. #else
  10487. SIMDE_VECTORIZE
  10488. for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
  10489. r_.f64[i] = simde_math_tanh(a_.f64[i]);
  10490. }
  10491. #endif
  10492. return simde__m256d_from_private(r_);
  10493. #endif
  10494. }
  10495. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  10496. #undef _mm256_tanh_pd
  10497. #define _mm256_tanh_pd(a) simde_mm256_tanh_pd(a)
  10498. #endif
  10499. SIMDE_FUNCTION_ATTRIBUTES
  10500. simde__m512
  10501. simde_mm512_tanh_ps (simde__m512 a) {
  10502. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  10503. return _mm512_tanh_ps(a);
  10504. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
  10505. return Sleef_tanhf16_u10(a);
  10506. #else
  10507. simde__m512_private
  10508. r_,
  10509. a_ = simde__m512_to_private(a);
  10510. #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
  10511. for (size_t i = 0 ; i < (sizeof(r_.m256) / sizeof(r_.m256[0])) ; i++) {
  10512. r_.m256[i] = simde_mm256_tanh_ps(a_.m256[i]);
  10513. }
  10514. #else
  10515. SIMDE_VECTORIZE
  10516. for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
  10517. r_.f32[i] = simde_math_tanhf(a_.f32[i]);
  10518. }
  10519. #endif
  10520. return simde__m512_from_private(r_);
  10521. #endif
  10522. }
  10523. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  10524. #undef _mm512_tanh_ps
  10525. #define _mm512_tanh_ps(a) simde_mm512_tanh_ps(a)
  10526. #endif
  10527. SIMDE_FUNCTION_ATTRIBUTES
  10528. simde__m512d
  10529. simde_mm512_tanh_pd (simde__m512d a) {
  10530. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  10531. return _mm512_tanh_pd(a);
  10532. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
  10533. return Sleef_tanhd8_u10(a);
  10534. #else
  10535. simde__m512d_private
  10536. r_,
  10537. a_ = simde__m512d_to_private(a);
  10538. #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
  10539. for (size_t i = 0 ; i < (sizeof(r_.m256d) / sizeof(r_.m256d[0])) ; i++) {
  10540. r_.m256d[i] = simde_mm256_tanh_pd(a_.m256d[i]);
  10541. }
  10542. #else
  10543. SIMDE_VECTORIZE
  10544. for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
  10545. r_.f64[i] = simde_math_tanh(a_.f64[i]);
  10546. }
  10547. #endif
  10548. return simde__m512d_from_private(r_);
  10549. #endif
  10550. }
  10551. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  10552. #undef _mm512_tanh_pd
  10553. #define _mm512_tanh_pd(a) simde_mm512_tanh_pd(a)
  10554. #endif
  10555. SIMDE_FUNCTION_ATTRIBUTES
  10556. simde__m512
  10557. simde_mm512_mask_tanh_ps(simde__m512 src, simde__mmask16 k, simde__m512 a) {
  10558. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  10559. return _mm512_mask_tanh_ps(src, k, a);
  10560. #else
  10561. return simde_mm512_mask_mov_ps(src, k, simde_mm512_tanh_ps(a));
  10562. #endif
  10563. }
  10564. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  10565. #undef _mm512_mask_tanh_ps
  10566. #define _mm512_mask_tanh_ps(src, k, a) simde_mm512_mask_tanh_ps(src, k, a)
  10567. #endif
  10568. SIMDE_FUNCTION_ATTRIBUTES
  10569. simde__m512d
  10570. simde_mm512_mask_tanh_pd(simde__m512d src, simde__mmask8 k, simde__m512d a) {
  10571. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  10572. return _mm512_mask_tanh_pd(src, k, a);
  10573. #else
  10574. return simde_mm512_mask_mov_pd(src, k, simde_mm512_tanh_pd(a));
  10575. #endif
  10576. }
  10577. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  10578. #undef _mm512_mask_tanh_pd
  10579. #define _mm512_mask_tanh_pd(src, k, a) simde_mm512_mask_tanh_pd(src, k, a)
  10580. #endif
  10581. SIMDE_FUNCTION_ATTRIBUTES
  10582. simde__m128
  10583. simde_mm_trunc_ps (simde__m128 a) {
  10584. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
  10585. return _mm_trunc_ps(a);
  10586. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
  10587. return Sleef_truncf4(a);
  10588. #else
  10589. return simde_mm_round_ps(a, SIMDE_MM_FROUND_TO_ZERO);
  10590. #endif
  10591. }
  10592. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  10593. #undef _mm_trunc_ps
  10594. #define _mm_trunc_ps(a) simde_mm_trunc_ps(a)
  10595. #endif
  10596. SIMDE_FUNCTION_ATTRIBUTES
  10597. simde__m128d
  10598. simde_mm_trunc_pd (simde__m128d a) {
  10599. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
  10600. return _mm_trunc_pd(a);
  10601. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
  10602. return Sleef_truncd2(a);
  10603. #else
  10604. return simde_mm_round_pd(a, SIMDE_MM_FROUND_TO_ZERO);
  10605. #endif
  10606. }
  10607. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  10608. #undef _mm_trunc_pd
  10609. #define _mm_trunc_pd(a) simde_mm_trunc_pd(a)
  10610. #endif
  10611. SIMDE_FUNCTION_ATTRIBUTES
  10612. simde__m256
  10613. simde_mm256_trunc_ps (simde__m256 a) {
  10614. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
  10615. return _mm256_trunc_ps(a);
  10616. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
  10617. return Sleef_truncf8(a);
  10618. #else
  10619. return simde_mm256_round_ps(a, SIMDE_MM_FROUND_TO_ZERO);
  10620. #endif
  10621. }
  10622. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  10623. #undef _mm256_trunc_ps
  10624. #define _mm256_trunc_ps(a) simde_mm256_trunc_ps(a)
  10625. #endif
  10626. SIMDE_FUNCTION_ATTRIBUTES
  10627. simde__m256d
  10628. simde_mm256_trunc_pd (simde__m256d a) {
  10629. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
  10630. return _mm256_trunc_pd(a);
  10631. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
  10632. return Sleef_truncd4(a);
  10633. #else
  10634. return simde_mm256_round_pd(a, SIMDE_MM_FROUND_TO_ZERO);
  10635. #endif
  10636. }
  10637. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  10638. #undef _mm256_trunc_pd
  10639. #define _mm256_trunc_pd(a) simde_mm256_trunc_pd(a)
  10640. #endif
  10641. SIMDE_FUNCTION_ATTRIBUTES
  10642. simde__m512
  10643. simde_mm512_trunc_ps (simde__m512 a) {
  10644. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  10645. return _mm512_trunc_ps(a);
  10646. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
  10647. return Sleef_truncf16(a);
  10648. #else
  10649. simde__m512_private
  10650. r_,
  10651. a_ = simde__m512_to_private(a);
  10652. #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
  10653. for (size_t i = 0 ; i < (sizeof(r_.m256) / sizeof(r_.m256[0])) ; i++) {
  10654. r_.m256[i] = simde_mm256_trunc_ps(a_.m256[i]);
  10655. }
  10656. #else
  10657. SIMDE_VECTORIZE
  10658. for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
  10659. r_.f32[i] = simde_math_truncf(a_.f32[i]);
  10660. }
  10661. #endif
  10662. return simde__m512_from_private(r_);
  10663. #endif
  10664. }
  10665. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  10666. #undef _mm512_trunc_ps
  10667. #define _mm512_trunc_ps(a) simde_mm512_trunc_ps(a)
  10668. #endif
  10669. SIMDE_FUNCTION_ATTRIBUTES
  10670. simde__m512d
  10671. simde_mm512_trunc_pd (simde__m512d a) {
  10672. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  10673. return _mm512_trunc_pd(a);
  10674. #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
  10675. return Sleef_truncd8(a);
  10676. #else
  10677. simde__m512d_private
  10678. r_,
  10679. a_ = simde__m512d_to_private(a);
  10680. #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
  10681. for (size_t i = 0 ; i < (sizeof(r_.m256d) / sizeof(r_.m256d[0])) ; i++) {
  10682. r_.m256d[i] = simde_mm256_trunc_pd(a_.m256d[i]);
  10683. }
  10684. #else
  10685. SIMDE_VECTORIZE
  10686. for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
  10687. r_.f64[i] = simde_math_trunc(a_.f64[i]);
  10688. }
  10689. #endif
  10690. return simde__m512d_from_private(r_);
  10691. #endif
  10692. }
  10693. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  10694. #undef _mm512_trunc_pd
  10695. #define _mm512_trunc_pd(a) simde_mm512_trunc_pd(a)
  10696. #endif
  10697. SIMDE_FUNCTION_ATTRIBUTES
  10698. simde__m512
  10699. simde_mm512_mask_trunc_ps(simde__m512 src, simde__mmask16 k, simde__m512 a) {
  10700. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  10701. return _mm512_mask_trunc_ps(src, k, a);
  10702. #else
  10703. return simde_mm512_mask_mov_ps(src, k, simde_mm512_trunc_ps(a));
  10704. #endif
  10705. }
  10706. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  10707. #undef _mm512_mask_trunc_ps
  10708. #define _mm512_mask_trunc_ps(src, k, a) simde_mm512_mask_trunc_ps(src, k, a)
  10709. #endif
  10710. SIMDE_FUNCTION_ATTRIBUTES
  10711. simde__m512d
  10712. simde_mm512_mask_trunc_pd(simde__m512d src, simde__mmask8 k, simde__m512d a) {
  10713. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
  10714. return _mm512_mask_trunc_pd(src, k, a);
  10715. #else
  10716. return simde_mm512_mask_mov_pd(src, k, simde_mm512_trunc_pd(a));
  10717. #endif
  10718. }
  10719. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  10720. #undef _mm512_mask_trunc_pd
  10721. #define _mm512_mask_trunc_pd(src, k, a) simde_mm512_mask_trunc_pd(src, k, a)
  10722. #endif
  10723. SIMDE_FUNCTION_ATTRIBUTES
  10724. simde__m128i
  10725. simde_mm_udivrem_epi32 (simde__m128i * mem_addr, simde__m128i a, simde__m128i b) {
  10726. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
  10727. return _mm_udivrem_epi32(mem_addr, a, b);
  10728. #else
  10729. simde__m128i r;
  10730. r = simde_mm_div_epu32(a, b);
  10731. *mem_addr = simde_x_mm_sub_epu32(a, simde_x_mm_mullo_epu32(r, b));
  10732. return r;
  10733. #endif
  10734. }
  10735. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  10736. #undef _mm_udivrem_epi32
  10737. #define _mm_udivrem_epi32(mem_addr, a, b) simde_mm_udivrem_epi32((mem_addr),(a), (b))
  10738. #endif
  10739. SIMDE_FUNCTION_ATTRIBUTES
  10740. simde__m256i
  10741. simde_mm256_udivrem_epi32 (simde__m256i* mem_addr, simde__m256i a, simde__m256i b) {
  10742. #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
  10743. return _mm256_udivrem_epi32(HEDLEY_REINTERPRET_CAST(__m256i*, mem_addr), a, b);
  10744. #else
  10745. simde__m256i r;
  10746. r = simde_mm256_div_epu32(a, b);
  10747. *mem_addr = simde_x_mm256_sub_epu32(a, simde_x_mm256_mullo_epu32(r, b));
  10748. return r;
  10749. #endif
  10750. }
  10751. #if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
  10752. #undef _mm256_udivrem_epi32
  10753. #define _mm256_udivrem_epi32(mem_addr, a, b) simde_mm256_udivrem_epi32((mem_addr),(a), (b))
  10754. #endif
  10755. SIMDE_END_DECLS_
  10756. HEDLEY_DIAGNOSTIC_POP
  10757. #endif /* !defined(SIMDE_X86_SVML_H) */