atomic64_test.c 6.6 KB

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  1. /*
  2. * Testsuite for atomic64_t functions
  3. *
  4. * Copyright © 2010 Luca Barbieri
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. */
  11. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  12. #include <linux/init.h>
  13. #include <linux/bug.h>
  14. #include <linux/kernel.h>
  15. #include <linux/atomic.h>
  16. #include <linux/module.h>
  17. #ifdef CONFIG_X86
  18. #include <asm/cpufeature.h> /* for boot_cpu_has below */
  19. #endif
  20. #define TEST(bit, op, c_op, val) \
  21. do { \
  22. atomic##bit##_set(&v, v0); \
  23. r = v0; \
  24. atomic##bit##_##op(val, &v); \
  25. r c_op val; \
  26. WARN(atomic##bit##_read(&v) != r, "%Lx != %Lx\n", \
  27. (unsigned long long)atomic##bit##_read(&v), \
  28. (unsigned long long)r); \
  29. } while (0)
  30. /*
  31. * Test for a atomic operation family,
  32. * @test should be a macro accepting parameters (bit, op, ...)
  33. */
  34. #define FAMILY_TEST(test, bit, op, args...) \
  35. do { \
  36. test(bit, op, ##args); \
  37. test(bit, op##_acquire, ##args); \
  38. test(bit, op##_release, ##args); \
  39. test(bit, op##_relaxed, ##args); \
  40. } while (0)
  41. #define TEST_RETURN(bit, op, c_op, val) \
  42. do { \
  43. atomic##bit##_set(&v, v0); \
  44. r = v0; \
  45. r c_op val; \
  46. BUG_ON(atomic##bit##_##op(val, &v) != r); \
  47. BUG_ON(atomic##bit##_read(&v) != r); \
  48. } while (0)
  49. #define TEST_FETCH(bit, op, c_op, val) \
  50. do { \
  51. atomic##bit##_set(&v, v0); \
  52. r = v0; \
  53. r c_op val; \
  54. BUG_ON(atomic##bit##_##op(val, &v) != v0); \
  55. BUG_ON(atomic##bit##_read(&v) != r); \
  56. } while (0)
  57. #define RETURN_FAMILY_TEST(bit, op, c_op, val) \
  58. do { \
  59. FAMILY_TEST(TEST_RETURN, bit, op, c_op, val); \
  60. } while (0)
  61. #define FETCH_FAMILY_TEST(bit, op, c_op, val) \
  62. do { \
  63. FAMILY_TEST(TEST_FETCH, bit, op, c_op, val); \
  64. } while (0)
  65. #define TEST_ARGS(bit, op, init, ret, expect, args...) \
  66. do { \
  67. atomic##bit##_set(&v, init); \
  68. BUG_ON(atomic##bit##_##op(&v, ##args) != ret); \
  69. BUG_ON(atomic##bit##_read(&v) != expect); \
  70. } while (0)
  71. #define XCHG_FAMILY_TEST(bit, init, new) \
  72. do { \
  73. FAMILY_TEST(TEST_ARGS, bit, xchg, init, init, new, new); \
  74. } while (0)
  75. #define CMPXCHG_FAMILY_TEST(bit, init, new, wrong) \
  76. do { \
  77. FAMILY_TEST(TEST_ARGS, bit, cmpxchg, \
  78. init, init, new, init, new); \
  79. FAMILY_TEST(TEST_ARGS, bit, cmpxchg, \
  80. init, init, init, wrong, new); \
  81. } while (0)
  82. #define INC_RETURN_FAMILY_TEST(bit, i) \
  83. do { \
  84. FAMILY_TEST(TEST_ARGS, bit, inc_return, \
  85. i, (i) + one, (i) + one); \
  86. } while (0)
  87. #define DEC_RETURN_FAMILY_TEST(bit, i) \
  88. do { \
  89. FAMILY_TEST(TEST_ARGS, bit, dec_return, \
  90. i, (i) - one, (i) - one); \
  91. } while (0)
  92. static __init void test_atomic(void)
  93. {
  94. int v0 = 0xaaa31337;
  95. int v1 = 0xdeadbeef;
  96. int onestwos = 0x11112222;
  97. int one = 1;
  98. atomic_t v;
  99. int r;
  100. TEST(, add, +=, onestwos);
  101. TEST(, add, +=, -one);
  102. TEST(, sub, -=, onestwos);
  103. TEST(, sub, -=, -one);
  104. TEST(, or, |=, v1);
  105. TEST(, and, &=, v1);
  106. TEST(, xor, ^=, v1);
  107. TEST(, andnot, &= ~, v1);
  108. RETURN_FAMILY_TEST(, add_return, +=, onestwos);
  109. RETURN_FAMILY_TEST(, add_return, +=, -one);
  110. RETURN_FAMILY_TEST(, sub_return, -=, onestwos);
  111. RETURN_FAMILY_TEST(, sub_return, -=, -one);
  112. FETCH_FAMILY_TEST(, fetch_add, +=, onestwos);
  113. FETCH_FAMILY_TEST(, fetch_add, +=, -one);
  114. FETCH_FAMILY_TEST(, fetch_sub, -=, onestwos);
  115. FETCH_FAMILY_TEST(, fetch_sub, -=, -one);
  116. FETCH_FAMILY_TEST(, fetch_or, |=, v1);
  117. FETCH_FAMILY_TEST(, fetch_and, &=, v1);
  118. FETCH_FAMILY_TEST(, fetch_andnot, &= ~, v1);
  119. FETCH_FAMILY_TEST(, fetch_xor, ^=, v1);
  120. INC_RETURN_FAMILY_TEST(, v0);
  121. DEC_RETURN_FAMILY_TEST(, v0);
  122. XCHG_FAMILY_TEST(, v0, v1);
  123. CMPXCHG_FAMILY_TEST(, v0, v1, onestwos);
  124. }
  125. #define INIT(c) do { atomic64_set(&v, c); r = c; } while (0)
  126. static __init void test_atomic64(void)
  127. {
  128. long long v0 = 0xaaa31337c001d00dLL;
  129. long long v1 = 0xdeadbeefdeafcafeLL;
  130. long long v2 = 0xfaceabadf00df001LL;
  131. long long v3 = 0x8000000000000000LL;
  132. long long onestwos = 0x1111111122222222LL;
  133. long long one = 1LL;
  134. int r_int;
  135. atomic64_t v = ATOMIC64_INIT(v0);
  136. long long r = v0;
  137. BUG_ON(v.counter != r);
  138. atomic64_set(&v, v1);
  139. r = v1;
  140. BUG_ON(v.counter != r);
  141. BUG_ON(atomic64_read(&v) != r);
  142. TEST(64, add, +=, onestwos);
  143. TEST(64, add, +=, -one);
  144. TEST(64, sub, -=, onestwos);
  145. TEST(64, sub, -=, -one);
  146. TEST(64, or, |=, v1);
  147. TEST(64, and, &=, v1);
  148. TEST(64, xor, ^=, v1);
  149. TEST(64, andnot, &= ~, v1);
  150. RETURN_FAMILY_TEST(64, add_return, +=, onestwos);
  151. RETURN_FAMILY_TEST(64, add_return, +=, -one);
  152. RETURN_FAMILY_TEST(64, sub_return, -=, onestwos);
  153. RETURN_FAMILY_TEST(64, sub_return, -=, -one);
  154. FETCH_FAMILY_TEST(64, fetch_add, +=, onestwos);
  155. FETCH_FAMILY_TEST(64, fetch_add, +=, -one);
  156. FETCH_FAMILY_TEST(64, fetch_sub, -=, onestwos);
  157. FETCH_FAMILY_TEST(64, fetch_sub, -=, -one);
  158. FETCH_FAMILY_TEST(64, fetch_or, |=, v1);
  159. FETCH_FAMILY_TEST(64, fetch_and, &=, v1);
  160. FETCH_FAMILY_TEST(64, fetch_andnot, &= ~, v1);
  161. FETCH_FAMILY_TEST(64, fetch_xor, ^=, v1);
  162. INIT(v0);
  163. atomic64_inc(&v);
  164. r += one;
  165. BUG_ON(v.counter != r);
  166. INIT(v0);
  167. atomic64_dec(&v);
  168. r -= one;
  169. BUG_ON(v.counter != r);
  170. INC_RETURN_FAMILY_TEST(64, v0);
  171. DEC_RETURN_FAMILY_TEST(64, v0);
  172. XCHG_FAMILY_TEST(64, v0, v1);
  173. CMPXCHG_FAMILY_TEST(64, v0, v1, v2);
  174. INIT(v0);
  175. BUG_ON(atomic64_add_unless(&v, one, v0));
  176. BUG_ON(v.counter != r);
  177. INIT(v0);
  178. BUG_ON(!atomic64_add_unless(&v, one, v1));
  179. r += one;
  180. BUG_ON(v.counter != r);
  181. INIT(onestwos);
  182. BUG_ON(atomic64_dec_if_positive(&v) != (onestwos - 1));
  183. r -= one;
  184. BUG_ON(v.counter != r);
  185. INIT(0);
  186. BUG_ON(atomic64_dec_if_positive(&v) != -one);
  187. BUG_ON(v.counter != r);
  188. INIT(-one);
  189. BUG_ON(atomic64_dec_if_positive(&v) != (-one - one));
  190. BUG_ON(v.counter != r);
  191. INIT(onestwos);
  192. BUG_ON(!atomic64_inc_not_zero(&v));
  193. r += one;
  194. BUG_ON(v.counter != r);
  195. INIT(0);
  196. BUG_ON(atomic64_inc_not_zero(&v));
  197. BUG_ON(v.counter != r);
  198. INIT(-one);
  199. BUG_ON(!atomic64_inc_not_zero(&v));
  200. r += one;
  201. BUG_ON(v.counter != r);
  202. /* Confirm the return value fits in an int, even if the value doesn't */
  203. INIT(v3);
  204. r_int = atomic64_inc_not_zero(&v);
  205. BUG_ON(!r_int);
  206. }
  207. static __init int test_atomics_init(void)
  208. {
  209. test_atomic();
  210. test_atomic64();
  211. #ifdef CONFIG_X86
  212. pr_info("passed for %s platform %s CX8 and %s SSE\n",
  213. #ifdef CONFIG_X86_64
  214. "x86-64",
  215. #elif defined(CONFIG_X86_CMPXCHG64)
  216. "i586+",
  217. #else
  218. "i386+",
  219. #endif
  220. boot_cpu_has(X86_FEATURE_CX8) ? "with" : "without",
  221. boot_cpu_has(X86_FEATURE_XMM) ? "with" : "without");
  222. #else
  223. pr_info("passed\n");
  224. #endif
  225. return 0;
  226. }
  227. static __exit void test_atomics_exit(void) {}
  228. module_init(test_atomics_init);
  229. module_exit(test_atomics_exit);
  230. MODULE_LICENSE("GPL");