pci-epc.h 6.1 KB

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  1. /* SPDX-License-Identifier: GPL-2.0 */
  2. /**
  3. * PCI Endpoint *Controller* (EPC) header file
  4. *
  5. * Copyright (C) 2017 Texas Instruments
  6. * Author: Kishon Vijay Abraham I <kishon@ti.com>
  7. */
  8. #ifndef __LINUX_PCI_EPC_H
  9. #define __LINUX_PCI_EPC_H
  10. #include <linux/pci-epf.h>
  11. struct pci_epc;
  12. enum pci_epc_irq_type {
  13. PCI_EPC_IRQ_UNKNOWN,
  14. PCI_EPC_IRQ_LEGACY,
  15. PCI_EPC_IRQ_MSI,
  16. PCI_EPC_IRQ_MSIX,
  17. };
  18. /**
  19. * struct pci_epc_ops - set of function pointers for performing EPC operations
  20. * @write_header: ops to populate configuration space header
  21. * @set_bar: ops to configure the BAR
  22. * @clear_bar: ops to reset the BAR
  23. * @map_addr: ops to map CPU address to PCI address
  24. * @unmap_addr: ops to unmap CPU address and PCI address
  25. * @set_msi: ops to set the requested number of MSI interrupts in the MSI
  26. * capability register
  27. * @get_msi: ops to get the number of MSI interrupts allocated by the RC from
  28. * the MSI capability register
  29. * @set_msix: ops to set the requested number of MSI-X interrupts in the
  30. * MSI-X capability register
  31. * @get_msix: ops to get the number of MSI-X interrupts allocated by the RC
  32. * from the MSI-X capability register
  33. * @raise_irq: ops to raise a legacy, MSI or MSI-X interrupt
  34. * @start: ops to start the PCI link
  35. * @stop: ops to stop the PCI link
  36. * @owner: the module owner containing the ops
  37. */
  38. struct pci_epc_ops {
  39. int (*write_header)(struct pci_epc *epc, u8 func_no,
  40. struct pci_epf_header *hdr);
  41. int (*set_bar)(struct pci_epc *epc, u8 func_no,
  42. struct pci_epf_bar *epf_bar);
  43. void (*clear_bar)(struct pci_epc *epc, u8 func_no,
  44. struct pci_epf_bar *epf_bar);
  45. int (*map_addr)(struct pci_epc *epc, u8 func_no,
  46. phys_addr_t addr, u64 pci_addr, size_t size);
  47. void (*unmap_addr)(struct pci_epc *epc, u8 func_no,
  48. phys_addr_t addr);
  49. int (*set_msi)(struct pci_epc *epc, u8 func_no, u8 interrupts);
  50. int (*get_msi)(struct pci_epc *epc, u8 func_no);
  51. int (*set_msix)(struct pci_epc *epc, u8 func_no, u16 interrupts);
  52. int (*get_msix)(struct pci_epc *epc, u8 func_no);
  53. int (*raise_irq)(struct pci_epc *epc, u8 func_no,
  54. enum pci_epc_irq_type type, u16 interrupt_num);
  55. int (*start)(struct pci_epc *epc);
  56. void (*stop)(struct pci_epc *epc);
  57. struct module *owner;
  58. };
  59. /**
  60. * struct pci_epc_mem - address space of the endpoint controller
  61. * @phys_base: physical base address of the PCI address space
  62. * @size: the size of the PCI address space
  63. * @bitmap: bitmap to manage the PCI address space
  64. * @pages: number of bits representing the address region
  65. * @page_size: size of each page
  66. */
  67. struct pci_epc_mem {
  68. phys_addr_t phys_base;
  69. size_t size;
  70. unsigned long *bitmap;
  71. size_t page_size;
  72. int pages;
  73. };
  74. /**
  75. * struct pci_epc - represents the PCI EPC device
  76. * @dev: PCI EPC device
  77. * @pci_epf: list of endpoint functions present in this EPC device
  78. * @ops: function pointers for performing endpoint operations
  79. * @mem: address space of the endpoint controller
  80. * @max_functions: max number of functions that can be configured in this EPC
  81. * @group: configfs group representing the PCI EPC device
  82. * @lock: spinlock to protect pci_epc ops
  83. */
  84. struct pci_epc {
  85. struct device dev;
  86. struct list_head pci_epf;
  87. const struct pci_epc_ops *ops;
  88. struct pci_epc_mem *mem;
  89. u8 max_functions;
  90. struct config_group *group;
  91. /* spinlock to protect against concurrent access of EP controller */
  92. spinlock_t lock;
  93. unsigned int features;
  94. };
  95. #define EPC_FEATURE_NO_LINKUP_NOTIFIER BIT(0)
  96. #define EPC_FEATURE_BAR_MASK (BIT(1) | BIT(2) | BIT(3))
  97. #define EPC_FEATURE_MSIX_AVAILABLE BIT(4)
  98. #define EPC_FEATURE_SET_BAR(features, bar) \
  99. (features |= (EPC_FEATURE_BAR_MASK & (bar << 1)))
  100. #define EPC_FEATURE_GET_BAR(features) \
  101. ((features & EPC_FEATURE_BAR_MASK) >> 1)
  102. #define to_pci_epc(device) container_of((device), struct pci_epc, dev)
  103. #define pci_epc_create(dev, ops) \
  104. __pci_epc_create((dev), (ops), THIS_MODULE)
  105. #define devm_pci_epc_create(dev, ops) \
  106. __devm_pci_epc_create((dev), (ops), THIS_MODULE)
  107. #define pci_epc_mem_init(epc, phys_addr, size) \
  108. __pci_epc_mem_init((epc), (phys_addr), (size), PAGE_SIZE)
  109. static inline void epc_set_drvdata(struct pci_epc *epc, void *data)
  110. {
  111. dev_set_drvdata(&epc->dev, data);
  112. }
  113. static inline void *epc_get_drvdata(struct pci_epc *epc)
  114. {
  115. return dev_get_drvdata(&epc->dev);
  116. }
  117. struct pci_epc *
  118. __devm_pci_epc_create(struct device *dev, const struct pci_epc_ops *ops,
  119. struct module *owner);
  120. struct pci_epc *
  121. __pci_epc_create(struct device *dev, const struct pci_epc_ops *ops,
  122. struct module *owner);
  123. void devm_pci_epc_destroy(struct device *dev, struct pci_epc *epc);
  124. void pci_epc_destroy(struct pci_epc *epc);
  125. int pci_epc_add_epf(struct pci_epc *epc, struct pci_epf *epf);
  126. void pci_epc_linkup(struct pci_epc *epc);
  127. void pci_epc_remove_epf(struct pci_epc *epc, struct pci_epf *epf);
  128. int pci_epc_write_header(struct pci_epc *epc, u8 func_no,
  129. struct pci_epf_header *hdr);
  130. int pci_epc_set_bar(struct pci_epc *epc, u8 func_no,
  131. struct pci_epf_bar *epf_bar);
  132. void pci_epc_clear_bar(struct pci_epc *epc, u8 func_no,
  133. struct pci_epf_bar *epf_bar);
  134. int pci_epc_map_addr(struct pci_epc *epc, u8 func_no,
  135. phys_addr_t phys_addr,
  136. u64 pci_addr, size_t size);
  137. void pci_epc_unmap_addr(struct pci_epc *epc, u8 func_no,
  138. phys_addr_t phys_addr);
  139. int pci_epc_set_msi(struct pci_epc *epc, u8 func_no, u8 interrupts);
  140. int pci_epc_get_msi(struct pci_epc *epc, u8 func_no);
  141. int pci_epc_set_msix(struct pci_epc *epc, u8 func_no, u16 interrupts);
  142. int pci_epc_get_msix(struct pci_epc *epc, u8 func_no);
  143. int pci_epc_raise_irq(struct pci_epc *epc, u8 func_no,
  144. enum pci_epc_irq_type type, u16 interrupt_num);
  145. int pci_epc_start(struct pci_epc *epc);
  146. void pci_epc_stop(struct pci_epc *epc);
  147. struct pci_epc *pci_epc_get(const char *epc_name);
  148. void pci_epc_put(struct pci_epc *epc);
  149. int __pci_epc_mem_init(struct pci_epc *epc, phys_addr_t phys_addr, size_t size,
  150. size_t page_size);
  151. void pci_epc_mem_exit(struct pci_epc *epc);
  152. void __iomem *pci_epc_mem_alloc_addr(struct pci_epc *epc,
  153. phys_addr_t *phys_addr, size_t size);
  154. void pci_epc_mem_free_addr(struct pci_epc *epc, phys_addr_t phys_addr,
  155. void __iomem *virt_addr, size_t size);
  156. #endif /* __LINUX_PCI_EPC_H */