cper.h 16 KB

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  1. /*
  2. * UEFI Common Platform Error Record
  3. *
  4. * Copyright (C) 2010, Intel Corp.
  5. * Author: Huang Ying <ying.huang@intel.com>
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License version
  9. * 2 as published by the Free Software Foundation.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  19. */
  20. #ifndef LINUX_CPER_H
  21. #define LINUX_CPER_H
  22. #include <linux/uuid.h>
  23. #include <linux/trace_seq.h>
  24. /* CPER record signature and the size */
  25. #define CPER_SIG_RECORD "CPER"
  26. #define CPER_SIG_SIZE 4
  27. /* Used in signature_end field in struct cper_record_header */
  28. #define CPER_SIG_END 0xffffffff
  29. /*
  30. * CPER record header revision, used in revision field in struct
  31. * cper_record_header
  32. */
  33. #define CPER_RECORD_REV 0x0100
  34. /*
  35. * CPER record length contains the CPER fields which are relevant for further
  36. * handling of a memory error in userspace (we don't carry all the fields
  37. * defined in the UEFI spec because some of them don't make any sense.)
  38. * Currently, a length of 256 should be more than enough.
  39. */
  40. #define CPER_REC_LEN 256
  41. /*
  42. * Severity difinition for error_severity in struct cper_record_header
  43. * and section_severity in struct cper_section_descriptor
  44. */
  45. enum {
  46. CPER_SEV_RECOVERABLE,
  47. CPER_SEV_FATAL,
  48. CPER_SEV_CORRECTED,
  49. CPER_SEV_INFORMATIONAL,
  50. };
  51. /*
  52. * Validation bits difinition for validation_bits in struct
  53. * cper_record_header. If set, corresponding fields in struct
  54. * cper_record_header contain valid information.
  55. *
  56. * corresponds platform_id
  57. */
  58. #define CPER_VALID_PLATFORM_ID 0x0001
  59. /* corresponds timestamp */
  60. #define CPER_VALID_TIMESTAMP 0x0002
  61. /* corresponds partition_id */
  62. #define CPER_VALID_PARTITION_ID 0x0004
  63. /*
  64. * Notification type used to generate error record, used in
  65. * notification_type in struct cper_record_header
  66. *
  67. * Corrected Machine Check
  68. */
  69. #define CPER_NOTIFY_CMC \
  70. GUID_INIT(0x2DCE8BB1, 0xBDD7, 0x450e, 0xB9, 0xAD, 0x9C, 0xF4, \
  71. 0xEB, 0xD4, 0xF8, 0x90)
  72. /* Corrected Platform Error */
  73. #define CPER_NOTIFY_CPE \
  74. GUID_INIT(0x4E292F96, 0xD843, 0x4a55, 0xA8, 0xC2, 0xD4, 0x81, \
  75. 0xF2, 0x7E, 0xBE, 0xEE)
  76. /* Machine Check Exception */
  77. #define CPER_NOTIFY_MCE \
  78. GUID_INIT(0xE8F56FFE, 0x919C, 0x4cc5, 0xBA, 0x88, 0x65, 0xAB, \
  79. 0xE1, 0x49, 0x13, 0xBB)
  80. /* PCI Express Error */
  81. #define CPER_NOTIFY_PCIE \
  82. GUID_INIT(0xCF93C01F, 0x1A16, 0x4dfc, 0xB8, 0xBC, 0x9C, 0x4D, \
  83. 0xAF, 0x67, 0xC1, 0x04)
  84. /* INIT Record (for IPF) */
  85. #define CPER_NOTIFY_INIT \
  86. GUID_INIT(0xCC5263E8, 0x9308, 0x454a, 0x89, 0xD0, 0x34, 0x0B, \
  87. 0xD3, 0x9B, 0xC9, 0x8E)
  88. /* Non-Maskable Interrupt */
  89. #define CPER_NOTIFY_NMI \
  90. GUID_INIT(0x5BAD89FF, 0xB7E6, 0x42c9, 0x81, 0x4A, 0xCF, 0x24, \
  91. 0x85, 0xD6, 0xE9, 0x8A)
  92. /* BOOT Error Record */
  93. #define CPER_NOTIFY_BOOT \
  94. GUID_INIT(0x3D61A466, 0xAB40, 0x409a, 0xA6, 0x98, 0xF3, 0x62, \
  95. 0xD4, 0x64, 0xB3, 0x8F)
  96. /* DMA Remapping Error */
  97. #define CPER_NOTIFY_DMAR \
  98. GUID_INIT(0x667DD791, 0xC6B3, 0x4c27, 0x8A, 0x6B, 0x0F, 0x8E, \
  99. 0x72, 0x2D, 0xEB, 0x41)
  100. /*
  101. * Flags bits definitions for flags in struct cper_record_header
  102. * If set, the error has been recovered
  103. */
  104. #define CPER_HW_ERROR_FLAGS_RECOVERED 0x1
  105. /* If set, the error is for previous boot */
  106. #define CPER_HW_ERROR_FLAGS_PREVERR 0x2
  107. /* If set, the error is injected for testing */
  108. #define CPER_HW_ERROR_FLAGS_SIMULATED 0x4
  109. /*
  110. * CPER section header revision, used in revision field in struct
  111. * cper_section_descriptor
  112. */
  113. #define CPER_SEC_REV 0x0100
  114. /*
  115. * Validation bits difinition for validation_bits in struct
  116. * cper_section_descriptor. If set, corresponding fields in struct
  117. * cper_section_descriptor contain valid information.
  118. *
  119. * corresponds fru_id
  120. */
  121. #define CPER_SEC_VALID_FRU_ID 0x1
  122. /* corresponds fru_text */
  123. #define CPER_SEC_VALID_FRU_TEXT 0x2
  124. /*
  125. * Flags bits definitions for flags in struct cper_section_descriptor
  126. *
  127. * If set, the section is associated with the error condition
  128. * directly, and should be focused on
  129. */
  130. #define CPER_SEC_PRIMARY 0x0001
  131. /*
  132. * If set, the error was not contained within the processor or memory
  133. * hierarchy and the error may have propagated to persistent storage
  134. * or network
  135. */
  136. #define CPER_SEC_CONTAINMENT_WARNING 0x0002
  137. /* If set, the component must be re-initialized or re-enabled prior to use */
  138. #define CPER_SEC_RESET 0x0004
  139. /* If set, Linux may choose to discontinue use of the resource */
  140. #define CPER_SEC_ERROR_THRESHOLD_EXCEEDED 0x0008
  141. /*
  142. * If set, resource could not be queried for error information due to
  143. * conflicts with other system software or resources. Some fields of
  144. * the section will be invalid
  145. */
  146. #define CPER_SEC_RESOURCE_NOT_ACCESSIBLE 0x0010
  147. /*
  148. * If set, action has been taken to ensure error containment (such as
  149. * poisoning data), but the error has not been fully corrected and the
  150. * data has not been consumed. Linux may choose to take further
  151. * corrective action before the data is consumed
  152. */
  153. #define CPER_SEC_LATENT_ERROR 0x0020
  154. /*
  155. * Section type definitions, used in section_type field in struct
  156. * cper_section_descriptor
  157. *
  158. * Processor Generic
  159. */
  160. #define CPER_SEC_PROC_GENERIC \
  161. GUID_INIT(0x9876CCAD, 0x47B4, 0x4bdb, 0xB6, 0x5E, 0x16, 0xF1, \
  162. 0x93, 0xC4, 0xF3, 0xDB)
  163. /* Processor Specific: X86/X86_64 */
  164. #define CPER_SEC_PROC_IA \
  165. GUID_INIT(0xDC3EA0B0, 0xA144, 0x4797, 0xB9, 0x5B, 0x53, 0xFA, \
  166. 0x24, 0x2B, 0x6E, 0x1D)
  167. /* Processor Specific: IA64 */
  168. #define CPER_SEC_PROC_IPF \
  169. GUID_INIT(0xE429FAF1, 0x3CB7, 0x11D4, 0x0B, 0xCA, 0x07, 0x00, \
  170. 0x80, 0xC7, 0x3C, 0x88, 0x81)
  171. /* Processor Specific: ARM */
  172. #define CPER_SEC_PROC_ARM \
  173. GUID_INIT(0xE19E3D16, 0xBC11, 0x11E4, 0x9C, 0xAA, 0xC2, 0x05, \
  174. 0x1D, 0x5D, 0x46, 0xB0)
  175. /* Platform Memory */
  176. #define CPER_SEC_PLATFORM_MEM \
  177. GUID_INIT(0xA5BC1114, 0x6F64, 0x4EDE, 0xB8, 0x63, 0x3E, 0x83, \
  178. 0xED, 0x7C, 0x83, 0xB1)
  179. #define CPER_SEC_PCIE \
  180. GUID_INIT(0xD995E954, 0xBBC1, 0x430F, 0xAD, 0x91, 0xB4, 0x4D, \
  181. 0xCB, 0x3C, 0x6F, 0x35)
  182. /* Firmware Error Record Reference */
  183. #define CPER_SEC_FW_ERR_REC_REF \
  184. GUID_INIT(0x81212A96, 0x09ED, 0x4996, 0x94, 0x71, 0x8D, 0x72, \
  185. 0x9C, 0x8E, 0x69, 0xED)
  186. /* PCI/PCI-X Bus */
  187. #define CPER_SEC_PCI_X_BUS \
  188. GUID_INIT(0xC5753963, 0x3B84, 0x4095, 0xBF, 0x78, 0xED, 0xDA, \
  189. 0xD3, 0xF9, 0xC9, 0xDD)
  190. /* PCI Component/Device */
  191. #define CPER_SEC_PCI_DEV \
  192. GUID_INIT(0xEB5E4685, 0xCA66, 0x4769, 0xB6, 0xA2, 0x26, 0x06, \
  193. 0x8B, 0x00, 0x13, 0x26)
  194. #define CPER_SEC_DMAR_GENERIC \
  195. GUID_INIT(0x5B51FEF7, 0xC79D, 0x4434, 0x8F, 0x1B, 0xAA, 0x62, \
  196. 0xDE, 0x3E, 0x2C, 0x64)
  197. /* Intel VT for Directed I/O specific DMAr */
  198. #define CPER_SEC_DMAR_VT \
  199. GUID_INIT(0x71761D37, 0x32B2, 0x45cd, 0xA7, 0xD0, 0xB0, 0xFE, \
  200. 0xDD, 0x93, 0xE8, 0xCF)
  201. /* IOMMU specific DMAr */
  202. #define CPER_SEC_DMAR_IOMMU \
  203. GUID_INIT(0x036F84E1, 0x7F37, 0x428c, 0xA7, 0x9E, 0x57, 0x5F, \
  204. 0xDF, 0xAA, 0x84, 0xEC)
  205. #define CPER_PROC_VALID_TYPE 0x0001
  206. #define CPER_PROC_VALID_ISA 0x0002
  207. #define CPER_PROC_VALID_ERROR_TYPE 0x0004
  208. #define CPER_PROC_VALID_OPERATION 0x0008
  209. #define CPER_PROC_VALID_FLAGS 0x0010
  210. #define CPER_PROC_VALID_LEVEL 0x0020
  211. #define CPER_PROC_VALID_VERSION 0x0040
  212. #define CPER_PROC_VALID_BRAND_INFO 0x0080
  213. #define CPER_PROC_VALID_ID 0x0100
  214. #define CPER_PROC_VALID_TARGET_ADDRESS 0x0200
  215. #define CPER_PROC_VALID_REQUESTOR_ID 0x0400
  216. #define CPER_PROC_VALID_RESPONDER_ID 0x0800
  217. #define CPER_PROC_VALID_IP 0x1000
  218. #define CPER_MEM_VALID_ERROR_STATUS 0x0001
  219. #define CPER_MEM_VALID_PA 0x0002
  220. #define CPER_MEM_VALID_PA_MASK 0x0004
  221. #define CPER_MEM_VALID_NODE 0x0008
  222. #define CPER_MEM_VALID_CARD 0x0010
  223. #define CPER_MEM_VALID_MODULE 0x0020
  224. #define CPER_MEM_VALID_BANK 0x0040
  225. #define CPER_MEM_VALID_DEVICE 0x0080
  226. #define CPER_MEM_VALID_ROW 0x0100
  227. #define CPER_MEM_VALID_COLUMN 0x0200
  228. #define CPER_MEM_VALID_BIT_POSITION 0x0400
  229. #define CPER_MEM_VALID_REQUESTOR_ID 0x0800
  230. #define CPER_MEM_VALID_RESPONDER_ID 0x1000
  231. #define CPER_MEM_VALID_TARGET_ID 0x2000
  232. #define CPER_MEM_VALID_ERROR_TYPE 0x4000
  233. #define CPER_MEM_VALID_RANK_NUMBER 0x8000
  234. #define CPER_MEM_VALID_CARD_HANDLE 0x10000
  235. #define CPER_MEM_VALID_MODULE_HANDLE 0x20000
  236. #define CPER_PCIE_VALID_PORT_TYPE 0x0001
  237. #define CPER_PCIE_VALID_VERSION 0x0002
  238. #define CPER_PCIE_VALID_COMMAND_STATUS 0x0004
  239. #define CPER_PCIE_VALID_DEVICE_ID 0x0008
  240. #define CPER_PCIE_VALID_SERIAL_NUMBER 0x0010
  241. #define CPER_PCIE_VALID_BRIDGE_CONTROL_STATUS 0x0020
  242. #define CPER_PCIE_VALID_CAPABILITY 0x0040
  243. #define CPER_PCIE_VALID_AER_INFO 0x0080
  244. #define CPER_PCIE_SLOT_SHIFT 3
  245. #define CPER_ARM_VALID_MPIDR BIT(0)
  246. #define CPER_ARM_VALID_AFFINITY_LEVEL BIT(1)
  247. #define CPER_ARM_VALID_RUNNING_STATE BIT(2)
  248. #define CPER_ARM_VALID_VENDOR_INFO BIT(3)
  249. #define CPER_ARM_INFO_VALID_MULTI_ERR BIT(0)
  250. #define CPER_ARM_INFO_VALID_FLAGS BIT(1)
  251. #define CPER_ARM_INFO_VALID_ERR_INFO BIT(2)
  252. #define CPER_ARM_INFO_VALID_VIRT_ADDR BIT(3)
  253. #define CPER_ARM_INFO_VALID_PHYSICAL_ADDR BIT(4)
  254. #define CPER_ARM_INFO_FLAGS_FIRST BIT(0)
  255. #define CPER_ARM_INFO_FLAGS_LAST BIT(1)
  256. #define CPER_ARM_INFO_FLAGS_PROPAGATED BIT(2)
  257. #define CPER_ARM_INFO_FLAGS_OVERFLOW BIT(3)
  258. #define CPER_ARM_CACHE_ERROR 0
  259. #define CPER_ARM_TLB_ERROR 1
  260. #define CPER_ARM_BUS_ERROR 2
  261. #define CPER_ARM_VENDOR_ERROR 3
  262. #define CPER_ARM_MAX_TYPE CPER_ARM_VENDOR_ERROR
  263. #define CPER_ARM_ERR_VALID_TRANSACTION_TYPE BIT(0)
  264. #define CPER_ARM_ERR_VALID_OPERATION_TYPE BIT(1)
  265. #define CPER_ARM_ERR_VALID_LEVEL BIT(2)
  266. #define CPER_ARM_ERR_VALID_PROC_CONTEXT_CORRUPT BIT(3)
  267. #define CPER_ARM_ERR_VALID_CORRECTED BIT(4)
  268. #define CPER_ARM_ERR_VALID_PRECISE_PC BIT(5)
  269. #define CPER_ARM_ERR_VALID_RESTARTABLE_PC BIT(6)
  270. #define CPER_ARM_ERR_VALID_PARTICIPATION_TYPE BIT(7)
  271. #define CPER_ARM_ERR_VALID_TIME_OUT BIT(8)
  272. #define CPER_ARM_ERR_VALID_ADDRESS_SPACE BIT(9)
  273. #define CPER_ARM_ERR_VALID_MEM_ATTRIBUTES BIT(10)
  274. #define CPER_ARM_ERR_VALID_ACCESS_MODE BIT(11)
  275. #define CPER_ARM_ERR_TRANSACTION_SHIFT 16
  276. #define CPER_ARM_ERR_TRANSACTION_MASK GENMASK(1,0)
  277. #define CPER_ARM_ERR_OPERATION_SHIFT 18
  278. #define CPER_ARM_ERR_OPERATION_MASK GENMASK(3,0)
  279. #define CPER_ARM_ERR_LEVEL_SHIFT 22
  280. #define CPER_ARM_ERR_LEVEL_MASK GENMASK(2,0)
  281. #define CPER_ARM_ERR_PC_CORRUPT_SHIFT 25
  282. #define CPER_ARM_ERR_PC_CORRUPT_MASK GENMASK(0,0)
  283. #define CPER_ARM_ERR_CORRECTED_SHIFT 26
  284. #define CPER_ARM_ERR_CORRECTED_MASK GENMASK(0,0)
  285. #define CPER_ARM_ERR_PRECISE_PC_SHIFT 27
  286. #define CPER_ARM_ERR_PRECISE_PC_MASK GENMASK(0,0)
  287. #define CPER_ARM_ERR_RESTARTABLE_PC_SHIFT 28
  288. #define CPER_ARM_ERR_RESTARTABLE_PC_MASK GENMASK(0,0)
  289. #define CPER_ARM_ERR_PARTICIPATION_TYPE_SHIFT 29
  290. #define CPER_ARM_ERR_PARTICIPATION_TYPE_MASK GENMASK(1,0)
  291. #define CPER_ARM_ERR_TIME_OUT_SHIFT 31
  292. #define CPER_ARM_ERR_TIME_OUT_MASK GENMASK(0,0)
  293. #define CPER_ARM_ERR_ADDRESS_SPACE_SHIFT 32
  294. #define CPER_ARM_ERR_ADDRESS_SPACE_MASK GENMASK(1,0)
  295. #define CPER_ARM_ERR_MEM_ATTRIBUTES_SHIFT 34
  296. #define CPER_ARM_ERR_MEM_ATTRIBUTES_MASK GENMASK(8,0)
  297. #define CPER_ARM_ERR_ACCESS_MODE_SHIFT 43
  298. #define CPER_ARM_ERR_ACCESS_MODE_MASK GENMASK(0,0)
  299. /*
  300. * All tables and structs must be byte-packed to match CPER
  301. * specification, since the tables are provided by the system BIOS
  302. */
  303. #pragma pack(1)
  304. struct cper_record_header {
  305. char signature[CPER_SIG_SIZE]; /* must be CPER_SIG_RECORD */
  306. __u16 revision; /* must be CPER_RECORD_REV */
  307. __u32 signature_end; /* must be CPER_SIG_END */
  308. __u16 section_count;
  309. __u32 error_severity;
  310. __u32 validation_bits;
  311. __u32 record_length;
  312. __u64 timestamp;
  313. guid_t platform_id;
  314. guid_t partition_id;
  315. guid_t creator_id;
  316. guid_t notification_type;
  317. __u64 record_id;
  318. __u32 flags;
  319. __u64 persistence_information;
  320. __u8 reserved[12]; /* must be zero */
  321. };
  322. struct cper_section_descriptor {
  323. __u32 section_offset; /* Offset in bytes of the
  324. * section body from the base
  325. * of the record header */
  326. __u32 section_length;
  327. __u16 revision; /* must be CPER_RECORD_REV */
  328. __u8 validation_bits;
  329. __u8 reserved; /* must be zero */
  330. __u32 flags;
  331. guid_t section_type;
  332. guid_t fru_id;
  333. __u32 section_severity;
  334. __u8 fru_text[20];
  335. };
  336. /* Generic Processor Error Section */
  337. struct cper_sec_proc_generic {
  338. __u64 validation_bits;
  339. __u8 proc_type;
  340. __u8 proc_isa;
  341. __u8 proc_error_type;
  342. __u8 operation;
  343. __u8 flags;
  344. __u8 level;
  345. __u16 reserved;
  346. __u64 cpu_version;
  347. char cpu_brand[128];
  348. __u64 proc_id;
  349. __u64 target_addr;
  350. __u64 requestor_id;
  351. __u64 responder_id;
  352. __u64 ip;
  353. };
  354. /* IA32/X64 Processor Error Section */
  355. struct cper_sec_proc_ia {
  356. __u64 validation_bits;
  357. __u64 lapic_id;
  358. __u8 cpuid[48];
  359. };
  360. /* IA32/X64 Processor Error Information Structure */
  361. struct cper_ia_err_info {
  362. guid_t err_type;
  363. __u64 validation_bits;
  364. __u64 check_info;
  365. __u64 target_id;
  366. __u64 requestor_id;
  367. __u64 responder_id;
  368. __u64 ip;
  369. };
  370. /* IA32/X64 Processor Context Information Structure */
  371. struct cper_ia_proc_ctx {
  372. __u16 reg_ctx_type;
  373. __u16 reg_arr_size;
  374. __u32 msr_addr;
  375. __u64 mm_reg_addr;
  376. };
  377. /* ARM Processor Error Section */
  378. struct cper_sec_proc_arm {
  379. __u32 validation_bits;
  380. __u16 err_info_num; /* Number of Processor Error Info */
  381. __u16 context_info_num; /* Number of Processor Context Info Records*/
  382. __u32 section_length;
  383. __u8 affinity_level;
  384. __u8 reserved[3]; /* must be zero */
  385. __u64 mpidr;
  386. __u64 midr;
  387. __u32 running_state; /* Bit 0 set - Processor running. PSCI = 0 */
  388. __u32 psci_state;
  389. };
  390. /* ARM Processor Error Information Structure */
  391. struct cper_arm_err_info {
  392. __u8 version;
  393. __u8 length;
  394. __u16 validation_bits;
  395. __u8 type;
  396. __u16 multiple_error;
  397. __u8 flags;
  398. __u64 error_info;
  399. __u64 virt_fault_addr;
  400. __u64 physical_fault_addr;
  401. };
  402. /* ARM Processor Context Information Structure */
  403. struct cper_arm_ctx_info {
  404. __u16 version;
  405. __u16 type;
  406. __u32 size;
  407. };
  408. /* Old Memory Error Section UEFI 2.1, 2.2 */
  409. struct cper_sec_mem_err_old {
  410. __u64 validation_bits;
  411. __u64 error_status;
  412. __u64 physical_addr;
  413. __u64 physical_addr_mask;
  414. __u16 node;
  415. __u16 card;
  416. __u16 module;
  417. __u16 bank;
  418. __u16 device;
  419. __u16 row;
  420. __u16 column;
  421. __u16 bit_pos;
  422. __u64 requestor_id;
  423. __u64 responder_id;
  424. __u64 target_id;
  425. __u8 error_type;
  426. };
  427. /* Memory Error Section UEFI >= 2.3 */
  428. struct cper_sec_mem_err {
  429. __u64 validation_bits;
  430. __u64 error_status;
  431. __u64 physical_addr;
  432. __u64 physical_addr_mask;
  433. __u16 node;
  434. __u16 card;
  435. __u16 module;
  436. __u16 bank;
  437. __u16 device;
  438. __u16 row;
  439. __u16 column;
  440. __u16 bit_pos;
  441. __u64 requestor_id;
  442. __u64 responder_id;
  443. __u64 target_id;
  444. __u8 error_type;
  445. __u8 reserved;
  446. __u16 rank;
  447. __u16 mem_array_handle; /* card handle in UEFI 2.4 */
  448. __u16 mem_dev_handle; /* module handle in UEFI 2.4 */
  449. };
  450. struct cper_mem_err_compact {
  451. __u64 validation_bits;
  452. __u16 node;
  453. __u16 card;
  454. __u16 module;
  455. __u16 bank;
  456. __u16 device;
  457. __u16 row;
  458. __u16 column;
  459. __u16 bit_pos;
  460. __u64 requestor_id;
  461. __u64 responder_id;
  462. __u64 target_id;
  463. __u16 rank;
  464. __u16 mem_array_handle;
  465. __u16 mem_dev_handle;
  466. };
  467. struct cper_sec_pcie {
  468. __u64 validation_bits;
  469. __u32 port_type;
  470. struct {
  471. __u8 minor;
  472. __u8 major;
  473. __u8 reserved[2];
  474. } version;
  475. __u16 command;
  476. __u16 status;
  477. __u32 reserved;
  478. struct {
  479. __u16 vendor_id;
  480. __u16 device_id;
  481. __u8 class_code[3];
  482. __u8 function;
  483. __u8 device;
  484. __u16 segment;
  485. __u8 bus;
  486. __u8 secondary_bus;
  487. __u16 slot;
  488. __u8 reserved;
  489. } device_id;
  490. struct {
  491. __u32 lower;
  492. __u32 upper;
  493. } serial_number;
  494. struct {
  495. __u16 secondary_status;
  496. __u16 control;
  497. } bridge;
  498. __u8 capability[60];
  499. __u8 aer_info[96];
  500. };
  501. /* Reset to default packing */
  502. #pragma pack()
  503. extern const char * const cper_proc_error_type_strs[4];
  504. u64 cper_next_record_id(void);
  505. const char *cper_severity_str(unsigned int);
  506. const char *cper_mem_err_type_str(unsigned int);
  507. void cper_print_bits(const char *prefix, unsigned int bits,
  508. const char * const strs[], unsigned int strs_size);
  509. void cper_mem_err_pack(const struct cper_sec_mem_err *,
  510. struct cper_mem_err_compact *);
  511. const char *cper_mem_err_unpack(struct trace_seq *,
  512. struct cper_mem_err_compact *);
  513. void cper_print_proc_arm(const char *pfx,
  514. const struct cper_sec_proc_arm *proc);
  515. void cper_print_proc_ia(const char *pfx,
  516. const struct cper_sec_proc_ia *proc);
  517. #endif