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mt2701-larb-port.h

mt2701-larb-port.h 4.0 KB
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  1. /*
    2. 

  2.  * Copyright (c) 2015 MediaTek Inc.
    3. 

  3.  * Author: Honghui Zhang <honghui.zhang@mediatek.com>
    4. 

  4.  *
    5. 

  5.  * This program is free software; you can redistribute it and/or modify
    6. 

  6.  * it under the terms of the GNU General Public License version 2 as
    7. 

  7.  * published by the Free Software Foundation.
    8. 

  8.  *
    9. 

  9.  * This program is distributed in the hope that it will be useful,
    10. 

  10.  * but WITHOUT ANY WARRANTY; without even the implied warranty of
    11. 

  11.  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
    12. 

  12.  * GNU General Public License for more details.
    13. 

  13.  */
    14. 

  14. 

  15. #ifndef _MT2701_LARB_PORT_H_
    16. 

  16. #define _MT2701_LARB_PORT_H_
    17. 

  17. 

  18. /*
    19. 

  19.  * Mediatek m4u generation 1 such as mt2701 has flat m4u port numbers,
    20. 

  20.  * the first port's id for larb[N] would be the last port's id of larb[N - 1]
    21. 

  21.  * plus one while larb[0]'s first port number is 0. The definition of
    22. 

  22.  * MT2701_M4U_ID_LARBx is following HW register spec.
    23. 

  23.  * But m4u generation 2 like mt8173 have different port number, it use fixed
    24. 

  24.  * offset for each larb, the first port's id for larb[N] would be (N * 32).
    25. 

  25.  */
    26. 

  26. #define LARB0_PORT_OFFSET		0
    27. 

  27. #define LARB1_PORT_OFFSET		11
    28. 

  28. #define LARB2_PORT_OFFSET		21
    29. 

  29. #define LARB3_PORT_OFFSET		44
    30. 

  30. 

  31. #define MT2701_M4U_ID_LARB0(port)	((port) + LARB0_PORT_OFFSET)
    32. 

  32. #define MT2701_M4U_ID_LARB1(port)	((port) + LARB1_PORT_OFFSET)
    33. 

  33. #define MT2701_M4U_ID_LARB2(port)	((port) + LARB2_PORT_OFFSET)
    34. 

  34. 

  35. /* Port define for larb0 */
    36. 

  36. #define MT2701_M4U_PORT_DISP_OVL_0		MT2701_M4U_ID_LARB0(0)
    37. 

  37. #define MT2701_M4U_PORT_DISP_RDMA1		MT2701_M4U_ID_LARB0(1)
    38. 

  38. #define MT2701_M4U_PORT_DISP_RDMA		MT2701_M4U_ID_LARB0(2)
    39. 

  39. #define MT2701_M4U_PORT_DISP_WDMA		MT2701_M4U_ID_LARB0(3)
    40. 

  40. #define MT2701_M4U_PORT_MM_CMDQ			MT2701_M4U_ID_LARB0(4)
    41. 

  41. #define MT2701_M4U_PORT_MDP_RDMA		MT2701_M4U_ID_LARB0(5)
    42. 

  42. #define MT2701_M4U_PORT_MDP_WDMA		MT2701_M4U_ID_LARB0(6)
    43. 

  43. #define MT2701_M4U_PORT_MDP_ROTO		MT2701_M4U_ID_LARB0(7)
    44. 

  44. #define MT2701_M4U_PORT_MDP_ROTCO		MT2701_M4U_ID_LARB0(8)
    45. 

  45. #define MT2701_M4U_PORT_MDP_ROTVO		MT2701_M4U_ID_LARB0(9)
    46. 

  46. #define MT2701_M4U_PORT_MDP_RDMA1		MT2701_M4U_ID_LARB0(10)
    47. 

  47. 

  48. /* Port define for larb1 */
    49. 

  49. #define MT2701_M4U_PORT_VDEC_MC_EXT		MT2701_M4U_ID_LARB1(0)
    50. 

  50. #define MT2701_M4U_PORT_VDEC_PP_EXT		MT2701_M4U_ID_LARB1(1)
    51. 

  51. #define MT2701_M4U_PORT_VDEC_PPWRAP_EXT		MT2701_M4U_ID_LARB1(2)
    52. 

  52. #define MT2701_M4U_PORT_VDEC_AVC_MV_EXT		MT2701_M4U_ID_LARB1(3)
    53. 

  53. #define MT2701_M4U_PORT_VDEC_PRED_RD_EXT	MT2701_M4U_ID_LARB1(4)
    54. 

  54. #define MT2701_M4U_PORT_VDEC_PRED_WR_EXT	MT2701_M4U_ID_LARB1(5)
    55. 

  55. #define MT2701_M4U_PORT_VDEC_VLD_EXT		MT2701_M4U_ID_LARB1(6)
    56. 

  56. #define MT2701_M4U_PORT_VDEC_VLD2_EXT		MT2701_M4U_ID_LARB1(7)
    57. 

  57. #define MT2701_M4U_PORT_VDEC_TILE_EXT		MT2701_M4U_ID_LARB1(8)
    58. 

  58. #define MT2701_M4U_PORT_VDEC_IMG_RESZ_EXT	MT2701_M4U_ID_LARB1(9)
    59. 

  59. 

  60. /* Port define for larb2 */
    61. 

  61. #define MT2701_M4U_PORT_VENC_RCPU		MT2701_M4U_ID_LARB2(0)
    62. 

  62. #define MT2701_M4U_PORT_VENC_REC_FRM		MT2701_M4U_ID_LARB2(1)
    63. 

  63. #define MT2701_M4U_PORT_VENC_BSDMA		MT2701_M4U_ID_LARB2(2)
    64. 

  64. #define MT2701_M4U_PORT_JPGENC_RDMA		MT2701_M4U_ID_LARB2(3)
    65. 

  65. #define MT2701_M4U_PORT_VENC_LT_RCPU		MT2701_M4U_ID_LARB2(4)
    66. 

  66. #define MT2701_M4U_PORT_VENC_LT_REC_FRM		MT2701_M4U_ID_LARB2(5)
    67. 

  67. #define MT2701_M4U_PORT_VENC_LT_BSDMA		MT2701_M4U_ID_LARB2(6)
    68. 

  68. #define MT2701_M4U_PORT_JPGDEC_BSDMA		MT2701_M4U_ID_LARB2(7)
    69. 

  69. #define MT2701_M4U_PORT_VENC_SV_COMV		MT2701_M4U_ID_LARB2(8)
    70. 

  70. #define MT2701_M4U_PORT_VENC_RD_COMV		MT2701_M4U_ID_LARB2(9)
    71. 

  71. #define MT2701_M4U_PORT_JPGENC_BSDMA		MT2701_M4U_ID_LARB2(10)
    72. 

  72. #define MT2701_M4U_PORT_VENC_CUR_LUMA		MT2701_M4U_ID_LARB2(11)
    73. 

  73. #define MT2701_M4U_PORT_VENC_CUR_CHROMA		MT2701_M4U_ID_LARB2(12)
    74. 

  74. #define MT2701_M4U_PORT_VENC_REF_LUMA		MT2701_M4U_ID_LARB2(13)
    75. 

  75. #define MT2701_M4U_PORT_VENC_REF_CHROMA		MT2701_M4U_ID_LARB2(14)
    76. 

  76. #define MT2701_M4U_PORT_IMG_RESZ		MT2701_M4U_ID_LARB2(15)
    77. 

  77. #define MT2701_M4U_PORT_VENC_LT_SV_COMV		MT2701_M4U_ID_LARB2(16)
    78. 

  78. #define MT2701_M4U_PORT_VENC_LT_RD_COMV		MT2701_M4U_ID_LARB2(17)
    79. 

  79. #define MT2701_M4U_PORT_VENC_LT_CUR_LUMA	MT2701_M4U_ID_LARB2(18)
    80. 

  80. #define MT2701_M4U_PORT_VENC_LT_CUR_CHROMA	MT2701_M4U_ID_LARB2(19)
    81. 

  81. #define MT2701_M4U_PORT_VENC_LT_REF_LUMA	MT2701_M4U_ID_LARB2(20)
    82. 

  82. #define MT2701_M4U_PORT_VENC_LT_REF_CHROMA	MT2701_M4U_ID_LARB2(21)
    83. 

  83. #define MT2701_M4U_PORT_JPGDEC_WDMA		MT2701_M4U_ID_LARB2(22)
    84. 

  84. 

  85. #endif
    86. 

  86.