mtk_wdt.c 6.2 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Mediatek Watchdog Driver
  4. *
  5. * Copyright (C) 2014 Matthias Brugger
  6. *
  7. * Matthias Brugger <matthias.bgg@gmail.com>
  8. *
  9. * Based on sunxi_wdt.c
  10. */
  11. #include <linux/err.h>
  12. #include <linux/init.h>
  13. #include <linux/io.h>
  14. #include <linux/kernel.h>
  15. #include <linux/module.h>
  16. #include <linux/moduleparam.h>
  17. #include <linux/of.h>
  18. #include <linux/platform_device.h>
  19. #include <linux/types.h>
  20. #include <linux/watchdog.h>
  21. #include <linux/delay.h>
  22. #define WDT_MAX_TIMEOUT 31
  23. #define WDT_MIN_TIMEOUT 1
  24. #define WDT_LENGTH_TIMEOUT(n) ((n) << 5)
  25. #define WDT_LENGTH 0x04
  26. #define WDT_LENGTH_KEY 0x8
  27. #define WDT_RST 0x08
  28. #define WDT_RST_RELOAD 0x1971
  29. #define WDT_MODE 0x00
  30. #define WDT_MODE_EN (1 << 0)
  31. #define WDT_MODE_EXT_POL_LOW (0 << 1)
  32. #define WDT_MODE_EXT_POL_HIGH (1 << 1)
  33. #define WDT_MODE_EXRST_EN (1 << 2)
  34. #define WDT_MODE_IRQ_EN (1 << 3)
  35. #define WDT_MODE_AUTO_START (1 << 4)
  36. #define WDT_MODE_DUAL_EN (1 << 6)
  37. #define WDT_MODE_KEY 0x22000000
  38. #define WDT_SWRST 0x14
  39. #define WDT_SWRST_KEY 0x1209
  40. #define DRV_NAME "mtk-wdt"
  41. #define DRV_VERSION "1.0"
  42. static bool nowayout = WATCHDOG_NOWAYOUT;
  43. static unsigned int timeout;
  44. struct mtk_wdt_dev {
  45. struct watchdog_device wdt_dev;
  46. void __iomem *wdt_base;
  47. };
  48. static int mtk_wdt_restart(struct watchdog_device *wdt_dev,
  49. unsigned long action, void *data)
  50. {
  51. struct mtk_wdt_dev *mtk_wdt = watchdog_get_drvdata(wdt_dev);
  52. void __iomem *wdt_base;
  53. wdt_base = mtk_wdt->wdt_base;
  54. while (1) {
  55. writel(WDT_SWRST_KEY, wdt_base + WDT_SWRST);
  56. mdelay(5);
  57. }
  58. return 0;
  59. }
  60. static int mtk_wdt_ping(struct watchdog_device *wdt_dev)
  61. {
  62. struct mtk_wdt_dev *mtk_wdt = watchdog_get_drvdata(wdt_dev);
  63. void __iomem *wdt_base = mtk_wdt->wdt_base;
  64. iowrite32(WDT_RST_RELOAD, wdt_base + WDT_RST);
  65. return 0;
  66. }
  67. static int mtk_wdt_set_timeout(struct watchdog_device *wdt_dev,
  68. unsigned int timeout)
  69. {
  70. struct mtk_wdt_dev *mtk_wdt = watchdog_get_drvdata(wdt_dev);
  71. void __iomem *wdt_base = mtk_wdt->wdt_base;
  72. u32 reg;
  73. wdt_dev->timeout = timeout;
  74. /*
  75. * One bit is the value of 512 ticks
  76. * The clock has 32 KHz
  77. */
  78. reg = WDT_LENGTH_TIMEOUT(timeout << 6) | WDT_LENGTH_KEY;
  79. iowrite32(reg, wdt_base + WDT_LENGTH);
  80. mtk_wdt_ping(wdt_dev);
  81. return 0;
  82. }
  83. static int mtk_wdt_stop(struct watchdog_device *wdt_dev)
  84. {
  85. struct mtk_wdt_dev *mtk_wdt = watchdog_get_drvdata(wdt_dev);
  86. void __iomem *wdt_base = mtk_wdt->wdt_base;
  87. u32 reg;
  88. reg = readl(wdt_base + WDT_MODE);
  89. reg &= ~WDT_MODE_EN;
  90. reg |= WDT_MODE_KEY;
  91. iowrite32(reg, wdt_base + WDT_MODE);
  92. return 0;
  93. }
  94. static int mtk_wdt_start(struct watchdog_device *wdt_dev)
  95. {
  96. u32 reg;
  97. struct mtk_wdt_dev *mtk_wdt = watchdog_get_drvdata(wdt_dev);
  98. void __iomem *wdt_base = mtk_wdt->wdt_base;
  99. int ret;
  100. ret = mtk_wdt_set_timeout(wdt_dev, wdt_dev->timeout);
  101. if (ret < 0)
  102. return ret;
  103. reg = ioread32(wdt_base + WDT_MODE);
  104. reg &= ~(WDT_MODE_IRQ_EN | WDT_MODE_DUAL_EN);
  105. reg |= (WDT_MODE_EN | WDT_MODE_KEY);
  106. iowrite32(reg, wdt_base + WDT_MODE);
  107. return 0;
  108. }
  109. static const struct watchdog_info mtk_wdt_info = {
  110. .identity = DRV_NAME,
  111. .options = WDIOF_SETTIMEOUT |
  112. WDIOF_KEEPALIVEPING |
  113. WDIOF_MAGICCLOSE,
  114. };
  115. static const struct watchdog_ops mtk_wdt_ops = {
  116. .owner = THIS_MODULE,
  117. .start = mtk_wdt_start,
  118. .stop = mtk_wdt_stop,
  119. .ping = mtk_wdt_ping,
  120. .set_timeout = mtk_wdt_set_timeout,
  121. .restart = mtk_wdt_restart,
  122. };
  123. static int mtk_wdt_probe(struct platform_device *pdev)
  124. {
  125. struct mtk_wdt_dev *mtk_wdt;
  126. struct resource *res;
  127. int err;
  128. mtk_wdt = devm_kzalloc(&pdev->dev, sizeof(*mtk_wdt), GFP_KERNEL);
  129. if (!mtk_wdt)
  130. return -ENOMEM;
  131. platform_set_drvdata(pdev, mtk_wdt);
  132. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  133. mtk_wdt->wdt_base = devm_ioremap_resource(&pdev->dev, res);
  134. if (IS_ERR(mtk_wdt->wdt_base))
  135. return PTR_ERR(mtk_wdt->wdt_base);
  136. mtk_wdt->wdt_dev.info = &mtk_wdt_info;
  137. mtk_wdt->wdt_dev.ops = &mtk_wdt_ops;
  138. mtk_wdt->wdt_dev.timeout = WDT_MAX_TIMEOUT;
  139. mtk_wdt->wdt_dev.max_timeout = WDT_MAX_TIMEOUT;
  140. mtk_wdt->wdt_dev.min_timeout = WDT_MIN_TIMEOUT;
  141. mtk_wdt->wdt_dev.parent = &pdev->dev;
  142. watchdog_init_timeout(&mtk_wdt->wdt_dev, timeout, &pdev->dev);
  143. watchdog_set_nowayout(&mtk_wdt->wdt_dev, nowayout);
  144. watchdog_set_restart_priority(&mtk_wdt->wdt_dev, 128);
  145. watchdog_set_drvdata(&mtk_wdt->wdt_dev, mtk_wdt);
  146. mtk_wdt_stop(&mtk_wdt->wdt_dev);
  147. err = watchdog_register_device(&mtk_wdt->wdt_dev);
  148. if (unlikely(err))
  149. return err;
  150. dev_info(&pdev->dev, "Watchdog enabled (timeout=%d sec, nowayout=%d)\n",
  151. mtk_wdt->wdt_dev.timeout, nowayout);
  152. return 0;
  153. }
  154. static void mtk_wdt_shutdown(struct platform_device *pdev)
  155. {
  156. struct mtk_wdt_dev *mtk_wdt = platform_get_drvdata(pdev);
  157. if (watchdog_active(&mtk_wdt->wdt_dev))
  158. mtk_wdt_stop(&mtk_wdt->wdt_dev);
  159. }
  160. static int mtk_wdt_remove(struct platform_device *pdev)
  161. {
  162. struct mtk_wdt_dev *mtk_wdt = platform_get_drvdata(pdev);
  163. watchdog_unregister_device(&mtk_wdt->wdt_dev);
  164. return 0;
  165. }
  166. #ifdef CONFIG_PM_SLEEP
  167. static int mtk_wdt_suspend(struct device *dev)
  168. {
  169. struct mtk_wdt_dev *mtk_wdt = dev_get_drvdata(dev);
  170. if (watchdog_active(&mtk_wdt->wdt_dev))
  171. mtk_wdt_stop(&mtk_wdt->wdt_dev);
  172. return 0;
  173. }
  174. static int mtk_wdt_resume(struct device *dev)
  175. {
  176. struct mtk_wdt_dev *mtk_wdt = dev_get_drvdata(dev);
  177. if (watchdog_active(&mtk_wdt->wdt_dev)) {
  178. mtk_wdt_start(&mtk_wdt->wdt_dev);
  179. mtk_wdt_ping(&mtk_wdt->wdt_dev);
  180. }
  181. return 0;
  182. }
  183. #endif
  184. static const struct of_device_id mtk_wdt_dt_ids[] = {
  185. { .compatible = "mediatek,mt6589-wdt" },
  186. { /* sentinel */ }
  187. };
  188. MODULE_DEVICE_TABLE(of, mtk_wdt_dt_ids);
  189. static const struct dev_pm_ops mtk_wdt_pm_ops = {
  190. SET_SYSTEM_SLEEP_PM_OPS(mtk_wdt_suspend,
  191. mtk_wdt_resume)
  192. };
  193. static struct platform_driver mtk_wdt_driver = {
  194. .probe = mtk_wdt_probe,
  195. .remove = mtk_wdt_remove,
  196. .shutdown = mtk_wdt_shutdown,
  197. .driver = {
  198. .name = DRV_NAME,
  199. .pm = &mtk_wdt_pm_ops,
  200. .of_match_table = mtk_wdt_dt_ids,
  201. },
  202. };
  203. module_platform_driver(mtk_wdt_driver);
  204. module_param(timeout, uint, 0);
  205. MODULE_PARM_DESC(timeout, "Watchdog heartbeat in seconds");
  206. module_param(nowayout, bool, 0);
  207. MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
  208. __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
  209. MODULE_LICENSE("GPL");
  210. MODULE_AUTHOR("Matthias Brugger <matthias.bgg@gmail.com>");
  211. MODULE_DESCRIPTION("Mediatek WatchDog Timer Driver");
  212. MODULE_VERSION(DRV_VERSION);