bcm2835_wdt.c 6.8 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Watchdog driver for Broadcom BCM2835
  4. *
  5. * "bcm2708_wdog" driver written by Luke Diamand that was obtained from
  6. * branch "rpi-3.6.y" of git://github.com/raspberrypi/linux.git was used
  7. * as a hardware reference for the Broadcom BCM2835 watchdog timer.
  8. *
  9. * Copyright (C) 2013 Lubomir Rintel <lkundrak@v3.sk>
  10. *
  11. */
  12. #include <linux/delay.h>
  13. #include <linux/types.h>
  14. #include <linux/module.h>
  15. #include <linux/io.h>
  16. #include <linux/watchdog.h>
  17. #include <linux/platform_device.h>
  18. #include <linux/of_address.h>
  19. #include <linux/of_platform.h>
  20. #define PM_RSTC 0x1c
  21. #define PM_RSTS 0x20
  22. #define PM_WDOG 0x24
  23. #define PM_PASSWORD 0x5a000000
  24. #define PM_WDOG_TIME_SET 0x000fffff
  25. #define PM_RSTC_WRCFG_CLR 0xffffffcf
  26. #define PM_RSTS_HADWRH_SET 0x00000040
  27. #define PM_RSTC_WRCFG_SET 0x00000030
  28. #define PM_RSTC_WRCFG_FULL_RESET 0x00000020
  29. #define PM_RSTC_RESET 0x00000102
  30. /*
  31. * The Raspberry Pi firmware uses the RSTS register to know which partition
  32. * to boot from. The partition value is spread into bits 0, 2, 4, 6, 8, 10.
  33. * Partition 63 is a special partition used by the firmware to indicate halt.
  34. */
  35. #define PM_RSTS_RASPBERRYPI_HALT 0x555
  36. #define SECS_TO_WDOG_TICKS(x) ((x) << 16)
  37. #define WDOG_TICKS_TO_SECS(x) ((x) >> 16)
  38. struct bcm2835_wdt {
  39. void __iomem *base;
  40. spinlock_t lock;
  41. };
  42. static unsigned int heartbeat;
  43. static bool nowayout = WATCHDOG_NOWAYOUT;
  44. static bool bcm2835_wdt_is_running(struct bcm2835_wdt *wdt)
  45. {
  46. uint32_t cur;
  47. cur = readl(wdt->base + PM_RSTC);
  48. return !!(cur & PM_RSTC_WRCFG_FULL_RESET);
  49. }
  50. static int bcm2835_wdt_start(struct watchdog_device *wdog)
  51. {
  52. struct bcm2835_wdt *wdt = watchdog_get_drvdata(wdog);
  53. uint32_t cur;
  54. unsigned long flags;
  55. spin_lock_irqsave(&wdt->lock, flags);
  56. writel_relaxed(PM_PASSWORD | (SECS_TO_WDOG_TICKS(wdog->timeout) &
  57. PM_WDOG_TIME_SET), wdt->base + PM_WDOG);
  58. cur = readl_relaxed(wdt->base + PM_RSTC);
  59. writel_relaxed(PM_PASSWORD | (cur & PM_RSTC_WRCFG_CLR) |
  60. PM_RSTC_WRCFG_FULL_RESET, wdt->base + PM_RSTC);
  61. spin_unlock_irqrestore(&wdt->lock, flags);
  62. return 0;
  63. }
  64. static int bcm2835_wdt_stop(struct watchdog_device *wdog)
  65. {
  66. struct bcm2835_wdt *wdt = watchdog_get_drvdata(wdog);
  67. writel_relaxed(PM_PASSWORD | PM_RSTC_RESET, wdt->base + PM_RSTC);
  68. return 0;
  69. }
  70. static unsigned int bcm2835_wdt_get_timeleft(struct watchdog_device *wdog)
  71. {
  72. struct bcm2835_wdt *wdt = watchdog_get_drvdata(wdog);
  73. uint32_t ret = readl_relaxed(wdt->base + PM_WDOG);
  74. return WDOG_TICKS_TO_SECS(ret & PM_WDOG_TIME_SET);
  75. }
  76. static void __bcm2835_restart(struct bcm2835_wdt *wdt)
  77. {
  78. u32 val;
  79. /* use a timeout of 10 ticks (~150us) */
  80. writel_relaxed(10 | PM_PASSWORD, wdt->base + PM_WDOG);
  81. val = readl_relaxed(wdt->base + PM_RSTC);
  82. val &= PM_RSTC_WRCFG_CLR;
  83. val |= PM_PASSWORD | PM_RSTC_WRCFG_FULL_RESET;
  84. writel_relaxed(val, wdt->base + PM_RSTC);
  85. /* No sleeping, possibly atomic. */
  86. mdelay(1);
  87. }
  88. static int bcm2835_restart(struct watchdog_device *wdog,
  89. unsigned long action, void *data)
  90. {
  91. struct bcm2835_wdt *wdt = watchdog_get_drvdata(wdog);
  92. __bcm2835_restart(wdt);
  93. return 0;
  94. }
  95. static const struct watchdog_ops bcm2835_wdt_ops = {
  96. .owner = THIS_MODULE,
  97. .start = bcm2835_wdt_start,
  98. .stop = bcm2835_wdt_stop,
  99. .get_timeleft = bcm2835_wdt_get_timeleft,
  100. .restart = bcm2835_restart,
  101. };
  102. static const struct watchdog_info bcm2835_wdt_info = {
  103. .options = WDIOF_SETTIMEOUT | WDIOF_MAGICCLOSE |
  104. WDIOF_KEEPALIVEPING,
  105. .identity = "Broadcom BCM2835 Watchdog timer",
  106. };
  107. static struct watchdog_device bcm2835_wdt_wdd = {
  108. .info = &bcm2835_wdt_info,
  109. .ops = &bcm2835_wdt_ops,
  110. .min_timeout = 1,
  111. .max_timeout = WDOG_TICKS_TO_SECS(PM_WDOG_TIME_SET),
  112. .timeout = WDOG_TICKS_TO_SECS(PM_WDOG_TIME_SET),
  113. };
  114. /*
  115. * We can't really power off, but if we do the normal reset scheme, and
  116. * indicate to bootcode.bin not to reboot, then most of the chip will be
  117. * powered off.
  118. */
  119. static void bcm2835_power_off(void)
  120. {
  121. struct device_node *np =
  122. of_find_compatible_node(NULL, NULL, "brcm,bcm2835-pm-wdt");
  123. struct platform_device *pdev = of_find_device_by_node(np);
  124. struct bcm2835_wdt *wdt = platform_get_drvdata(pdev);
  125. u32 val;
  126. /*
  127. * We set the watchdog hard reset bit here to distinguish this reset
  128. * from the normal (full) reset. bootcode.bin will not reboot after a
  129. * hard reset.
  130. */
  131. val = readl_relaxed(wdt->base + PM_RSTS);
  132. val |= PM_PASSWORD | PM_RSTS_RASPBERRYPI_HALT;
  133. writel_relaxed(val, wdt->base + PM_RSTS);
  134. /* Continue with normal reset mechanism */
  135. __bcm2835_restart(wdt);
  136. }
  137. static int bcm2835_wdt_probe(struct platform_device *pdev)
  138. {
  139. struct resource *res;
  140. struct device *dev = &pdev->dev;
  141. struct bcm2835_wdt *wdt;
  142. int err;
  143. wdt = devm_kzalloc(dev, sizeof(struct bcm2835_wdt), GFP_KERNEL);
  144. if (!wdt)
  145. return -ENOMEM;
  146. platform_set_drvdata(pdev, wdt);
  147. spin_lock_init(&wdt->lock);
  148. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  149. wdt->base = devm_ioremap_resource(dev, res);
  150. if (IS_ERR(wdt->base))
  151. return PTR_ERR(wdt->base);
  152. watchdog_set_drvdata(&bcm2835_wdt_wdd, wdt);
  153. watchdog_init_timeout(&bcm2835_wdt_wdd, heartbeat, dev);
  154. watchdog_set_nowayout(&bcm2835_wdt_wdd, nowayout);
  155. bcm2835_wdt_wdd.parent = dev;
  156. if (bcm2835_wdt_is_running(wdt)) {
  157. /*
  158. * The currently active timeout value (set by the
  159. * bootloader) may be different from the module
  160. * heartbeat parameter or the value in device
  161. * tree. But we just need to set WDOG_HW_RUNNING,
  162. * because then the framework will "immediately" ping
  163. * the device, updating the timeout.
  164. */
  165. set_bit(WDOG_HW_RUNNING, &bcm2835_wdt_wdd.status);
  166. }
  167. watchdog_set_restart_priority(&bcm2835_wdt_wdd, 128);
  168. watchdog_stop_on_reboot(&bcm2835_wdt_wdd);
  169. err = devm_watchdog_register_device(dev, &bcm2835_wdt_wdd);
  170. if (err) {
  171. dev_err(dev, "Failed to register watchdog device");
  172. return err;
  173. }
  174. if (pm_power_off == NULL)
  175. pm_power_off = bcm2835_power_off;
  176. dev_info(dev, "Broadcom BCM2835 watchdog timer");
  177. return 0;
  178. }
  179. static int bcm2835_wdt_remove(struct platform_device *pdev)
  180. {
  181. if (pm_power_off == bcm2835_power_off)
  182. pm_power_off = NULL;
  183. return 0;
  184. }
  185. static const struct of_device_id bcm2835_wdt_of_match[] = {
  186. { .compatible = "brcm,bcm2835-pm-wdt", },
  187. {},
  188. };
  189. MODULE_DEVICE_TABLE(of, bcm2835_wdt_of_match);
  190. static struct platform_driver bcm2835_wdt_driver = {
  191. .probe = bcm2835_wdt_probe,
  192. .remove = bcm2835_wdt_remove,
  193. .driver = {
  194. .name = "bcm2835-wdt",
  195. .of_match_table = bcm2835_wdt_of_match,
  196. },
  197. };
  198. module_platform_driver(bcm2835_wdt_driver);
  199. module_param(heartbeat, uint, 0);
  200. MODULE_PARM_DESC(heartbeat, "Initial watchdog heartbeat in seconds");
  201. module_param(nowayout, bool, 0);
  202. MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
  203. __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
  204. MODULE_ALIAS("platform:bcm2835-wdt");
  205. MODULE_AUTHOR("Lubomir Rintel <lkundrak@v3.sk>");
  206. MODULE_DESCRIPTION("Driver for Broadcom BCM2835 watchdog timer");
  207. MODULE_LICENSE("GPL");