atlas7_wdt.c 5.8 KB

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  1. /*
  2. * Watchdog driver for CSR Atlas7
  3. *
  4. * Copyright (c) 2015 Cambridge Silicon Radio Limited, a CSR plc group company.
  5. *
  6. * Licensed under GPLv2.
  7. */
  8. #include <linux/clk.h>
  9. #include <linux/io.h>
  10. #include <linux/module.h>
  11. #include <linux/moduleparam.h>
  12. #include <linux/of.h>
  13. #include <linux/platform_device.h>
  14. #include <linux/watchdog.h>
  15. #define ATLAS7_TIMER_WDT_INDEX 5
  16. #define ATLAS7_WDT_DEFAULT_TIMEOUT 20
  17. #define ATLAS7_WDT_CNT_CTRL (0 + 4 * ATLAS7_TIMER_WDT_INDEX)
  18. #define ATLAS7_WDT_CNT_MATCH (0x18 + 4 * ATLAS7_TIMER_WDT_INDEX)
  19. #define ATLAS7_WDT_CNT (0x48 + 4 * ATLAS7_TIMER_WDT_INDEX)
  20. #define ATLAS7_WDT_CNT_EN (BIT(0) | BIT(1))
  21. #define ATLAS7_WDT_EN 0x64
  22. static unsigned int timeout = ATLAS7_WDT_DEFAULT_TIMEOUT;
  23. static bool nowayout = WATCHDOG_NOWAYOUT;
  24. module_param(timeout, uint, 0);
  25. module_param(nowayout, bool, 0);
  26. MODULE_PARM_DESC(timeout, "Default watchdog timeout (in seconds)");
  27. MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
  28. __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
  29. struct atlas7_wdog {
  30. struct device *dev;
  31. void __iomem *base;
  32. unsigned long tick_rate;
  33. struct clk *clk;
  34. };
  35. static unsigned int atlas7_wdt_gettimeleft(struct watchdog_device *wdd)
  36. {
  37. struct atlas7_wdog *wdt = watchdog_get_drvdata(wdd);
  38. u32 counter, match, delta;
  39. counter = readl(wdt->base + ATLAS7_WDT_CNT);
  40. match = readl(wdt->base + ATLAS7_WDT_CNT_MATCH);
  41. delta = match - counter;
  42. return delta / wdt->tick_rate;
  43. }
  44. static int atlas7_wdt_ping(struct watchdog_device *wdd)
  45. {
  46. struct atlas7_wdog *wdt = watchdog_get_drvdata(wdd);
  47. u32 counter, match, delta;
  48. counter = readl(wdt->base + ATLAS7_WDT_CNT);
  49. delta = wdd->timeout * wdt->tick_rate;
  50. match = counter + delta;
  51. writel(match, wdt->base + ATLAS7_WDT_CNT_MATCH);
  52. return 0;
  53. }
  54. static int atlas7_wdt_enable(struct watchdog_device *wdd)
  55. {
  56. struct atlas7_wdog *wdt = watchdog_get_drvdata(wdd);
  57. atlas7_wdt_ping(wdd);
  58. writel(readl(wdt->base + ATLAS7_WDT_CNT_CTRL) | ATLAS7_WDT_CNT_EN,
  59. wdt->base + ATLAS7_WDT_CNT_CTRL);
  60. writel(1, wdt->base + ATLAS7_WDT_EN);
  61. return 0;
  62. }
  63. static int atlas7_wdt_disable(struct watchdog_device *wdd)
  64. {
  65. struct atlas7_wdog *wdt = watchdog_get_drvdata(wdd);
  66. writel(0, wdt->base + ATLAS7_WDT_EN);
  67. writel(readl(wdt->base + ATLAS7_WDT_CNT_CTRL) & ~ATLAS7_WDT_CNT_EN,
  68. wdt->base + ATLAS7_WDT_CNT_CTRL);
  69. return 0;
  70. }
  71. static int atlas7_wdt_settimeout(struct watchdog_device *wdd, unsigned int to)
  72. {
  73. wdd->timeout = to;
  74. return 0;
  75. }
  76. #define OPTIONS (WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING | WDIOF_MAGICCLOSE)
  77. static const struct watchdog_info atlas7_wdt_ident = {
  78. .options = OPTIONS,
  79. .firmware_version = 0,
  80. .identity = "atlas7 Watchdog",
  81. };
  82. static const struct watchdog_ops atlas7_wdt_ops = {
  83. .owner = THIS_MODULE,
  84. .start = atlas7_wdt_enable,
  85. .stop = atlas7_wdt_disable,
  86. .get_timeleft = atlas7_wdt_gettimeleft,
  87. .ping = atlas7_wdt_ping,
  88. .set_timeout = atlas7_wdt_settimeout,
  89. };
  90. static struct watchdog_device atlas7_wdd = {
  91. .info = &atlas7_wdt_ident,
  92. .ops = &atlas7_wdt_ops,
  93. .timeout = ATLAS7_WDT_DEFAULT_TIMEOUT,
  94. };
  95. static const struct of_device_id atlas7_wdt_ids[] = {
  96. { .compatible = "sirf,atlas7-tick"},
  97. {}
  98. };
  99. static int atlas7_wdt_probe(struct platform_device *pdev)
  100. {
  101. struct device_node *np = pdev->dev.of_node;
  102. struct atlas7_wdog *wdt;
  103. struct resource *res;
  104. struct clk *clk;
  105. int ret;
  106. wdt = devm_kzalloc(&pdev->dev, sizeof(*wdt), GFP_KERNEL);
  107. if (!wdt)
  108. return -ENOMEM;
  109. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  110. wdt->base = devm_ioremap_resource(&pdev->dev, res);
  111. if (IS_ERR(wdt->base))
  112. return PTR_ERR(wdt->base);
  113. clk = of_clk_get(np, 0);
  114. if (IS_ERR(clk))
  115. return PTR_ERR(clk);
  116. ret = clk_prepare_enable(clk);
  117. if (ret) {
  118. dev_err(&pdev->dev, "clk enable failed\n");
  119. goto err;
  120. }
  121. /* disable watchdog hardware */
  122. writel(0, wdt->base + ATLAS7_WDT_CNT_CTRL);
  123. wdt->tick_rate = clk_get_rate(clk);
  124. if (!wdt->tick_rate) {
  125. ret = -EINVAL;
  126. goto err1;
  127. }
  128. wdt->clk = clk;
  129. atlas7_wdd.min_timeout = 1;
  130. atlas7_wdd.max_timeout = UINT_MAX / wdt->tick_rate;
  131. watchdog_init_timeout(&atlas7_wdd, 0, &pdev->dev);
  132. watchdog_set_nowayout(&atlas7_wdd, nowayout);
  133. watchdog_set_drvdata(&atlas7_wdd, wdt);
  134. platform_set_drvdata(pdev, &atlas7_wdd);
  135. ret = watchdog_register_device(&atlas7_wdd);
  136. if (ret)
  137. goto err1;
  138. return 0;
  139. err1:
  140. clk_disable_unprepare(clk);
  141. err:
  142. clk_put(clk);
  143. return ret;
  144. }
  145. static void atlas7_wdt_shutdown(struct platform_device *pdev)
  146. {
  147. struct watchdog_device *wdd = platform_get_drvdata(pdev);
  148. struct atlas7_wdog *wdt = watchdog_get_drvdata(wdd);
  149. atlas7_wdt_disable(wdd);
  150. clk_disable_unprepare(wdt->clk);
  151. }
  152. static int atlas7_wdt_remove(struct platform_device *pdev)
  153. {
  154. struct watchdog_device *wdd = platform_get_drvdata(pdev);
  155. struct atlas7_wdog *wdt = watchdog_get_drvdata(wdd);
  156. atlas7_wdt_shutdown(pdev);
  157. clk_put(wdt->clk);
  158. return 0;
  159. }
  160. static int __maybe_unused atlas7_wdt_suspend(struct device *dev)
  161. {
  162. /*
  163. * NOTE:timer controller registers settings are saved
  164. * and restored back by the timer-atlas7.c
  165. */
  166. return 0;
  167. }
  168. static int __maybe_unused atlas7_wdt_resume(struct device *dev)
  169. {
  170. struct watchdog_device *wdd = dev_get_drvdata(dev);
  171. /*
  172. * NOTE: Since timer controller registers settings are saved
  173. * and restored back by the timer-atlas7.c, so we need not
  174. * update WD settings except refreshing timeout.
  175. */
  176. atlas7_wdt_ping(wdd);
  177. return 0;
  178. }
  179. static SIMPLE_DEV_PM_OPS(atlas7_wdt_pm_ops,
  180. atlas7_wdt_suspend, atlas7_wdt_resume);
  181. MODULE_DEVICE_TABLE(of, atlas7_wdt_ids);
  182. static struct platform_driver atlas7_wdt_driver = {
  183. .driver = {
  184. .name = "atlas7-wdt",
  185. .pm = &atlas7_wdt_pm_ops,
  186. .of_match_table = atlas7_wdt_ids,
  187. },
  188. .probe = atlas7_wdt_probe,
  189. .remove = atlas7_wdt_remove,
  190. .shutdown = atlas7_wdt_shutdown,
  191. };
  192. module_platform_driver(atlas7_wdt_driver);
  193. MODULE_DESCRIPTION("CSRatlas7 watchdog driver");
  194. MODULE_AUTHOR("Guo Zeng <Guo.Zeng@csr.com>");
  195. MODULE_LICENSE("GPL v2");
  196. MODULE_ALIAS("platform:atlas7-wdt");