net2280.h 11 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * NetChip 2280 high/full speed USB device controller.
  4. * Unlike many such controllers, this one talks PCI.
  5. */
  6. /*
  7. * Copyright (C) 2002 NetChip Technology, Inc. (http://www.netchip.com)
  8. * Copyright (C) 2003 David Brownell
  9. * Copyright (C) 2014 Ricardo Ribalda - Qtechnology/AS
  10. */
  11. #include <linux/usb/net2280.h>
  12. #include <linux/usb/usb338x.h>
  13. /*-------------------------------------------------------------------------*/
  14. #ifdef __KERNEL__
  15. /* indexed registers [11.10] are accessed indirectly
  16. * caller must own the device lock.
  17. */
  18. static inline u32 get_idx_reg(struct net2280_regs __iomem *regs, u32 index)
  19. {
  20. writel(index, &regs->idxaddr);
  21. /* NOTE: synchs device/cpu memory views */
  22. return readl(&regs->idxdata);
  23. }
  24. static inline void
  25. set_idx_reg(struct net2280_regs __iomem *regs, u32 index, u32 value)
  26. {
  27. writel(index, &regs->idxaddr);
  28. writel(value, &regs->idxdata);
  29. /* posted, may not be visible yet */
  30. }
  31. #endif /* __KERNEL__ */
  32. #define PCI_VENDOR_ID_PLX_LEGACY 0x17cc
  33. #define PLX_LEGACY BIT(0)
  34. #define PLX_2280 BIT(1)
  35. #define PLX_SUPERSPEED BIT(2)
  36. #define PLX_PCIE BIT(3)
  37. #define REG_DIAG 0x0
  38. #define RETRY_COUNTER 16
  39. #define FORCE_PCI_SERR 11
  40. #define FORCE_PCI_INTERRUPT 10
  41. #define FORCE_USB_INTERRUPT 9
  42. #define FORCE_CPU_INTERRUPT 8
  43. #define ILLEGAL_BYTE_ENABLES 5
  44. #define FAST_TIMES 4
  45. #define FORCE_RECEIVE_ERROR 2
  46. #define FORCE_TRANSMIT_CRC_ERROR 0
  47. #define REG_FRAME 0x02 /* from last sof */
  48. #define REG_CHIPREV 0x03 /* in bcd */
  49. #define REG_HS_NAK_RATE 0x0a /* NAK per N uframes */
  50. #define CHIPREV_1 0x0100
  51. #define CHIPREV_1A 0x0110
  52. /* DEFECT 7374 */
  53. #define DEFECT_7374_NUMBEROF_MAX_WAIT_LOOPS 200
  54. #define DEFECT_7374_PROCESSOR_WAIT_TIME 10
  55. /* ep0 max packet size */
  56. #define EP0_SS_MAX_PACKET_SIZE 0x200
  57. #define EP0_HS_MAX_PACKET_SIZE 0x40
  58. #ifdef __KERNEL__
  59. /*-------------------------------------------------------------------------*/
  60. /* [8.3] for scatter/gather i/o
  61. * use struct net2280_dma_regs bitfields
  62. */
  63. struct net2280_dma {
  64. __le32 dmacount;
  65. __le32 dmaaddr; /* the buffer */
  66. __le32 dmadesc; /* next dma descriptor */
  67. __le32 _reserved;
  68. } __aligned(16);
  69. /*-------------------------------------------------------------------------*/
  70. /* DRIVER DATA STRUCTURES and UTILITIES */
  71. struct net2280_ep {
  72. struct usb_ep ep;
  73. struct net2280_ep_regs __iomem *cfg;
  74. struct net2280_ep_regs __iomem *regs;
  75. struct net2280_dma_regs __iomem *dma;
  76. struct net2280_dma *dummy;
  77. dma_addr_t td_dma; /* of dummy */
  78. struct net2280 *dev;
  79. unsigned long irqs;
  80. /* analogous to a host-side qh */
  81. struct list_head queue;
  82. const struct usb_endpoint_descriptor *desc;
  83. unsigned num : 8,
  84. fifo_size : 12,
  85. in_fifo_validate : 1,
  86. out_overflow : 1,
  87. stopped : 1,
  88. wedged : 1,
  89. is_in : 1,
  90. is_iso : 1,
  91. responded : 1;
  92. };
  93. static inline void allow_status(struct net2280_ep *ep)
  94. {
  95. /* ep0 only */
  96. writel(BIT(CLEAR_CONTROL_STATUS_PHASE_HANDSHAKE) |
  97. BIT(CLEAR_NAK_OUT_PACKETS) |
  98. BIT(CLEAR_NAK_OUT_PACKETS_MODE),
  99. &ep->regs->ep_rsp);
  100. ep->stopped = 1;
  101. }
  102. static inline void allow_status_338x(struct net2280_ep *ep)
  103. {
  104. /*
  105. * Control Status Phase Handshake was set by the chip when the setup
  106. * packet arrived. While set, the chip automatically NAKs the host's
  107. * Status Phase tokens.
  108. */
  109. writel(BIT(CLEAR_CONTROL_STATUS_PHASE_HANDSHAKE), &ep->regs->ep_rsp);
  110. ep->stopped = 1;
  111. /* TD 9.9 Halt Endpoint test. TD 9.22 set feature test. */
  112. ep->responded = 0;
  113. }
  114. struct net2280_request {
  115. struct usb_request req;
  116. struct net2280_dma *td;
  117. dma_addr_t td_dma;
  118. struct list_head queue;
  119. unsigned mapped : 1,
  120. valid : 1;
  121. };
  122. struct net2280 {
  123. /* each pci device provides one gadget, several endpoints */
  124. struct usb_gadget gadget;
  125. spinlock_t lock;
  126. struct net2280_ep ep[9];
  127. struct usb_gadget_driver *driver;
  128. unsigned enabled : 1,
  129. protocol_stall : 1,
  130. softconnect : 1,
  131. got_irq : 1,
  132. region:1,
  133. u1_enable:1,
  134. u2_enable:1,
  135. ltm_enable:1,
  136. wakeup_enable:1,
  137. addressed_state:1,
  138. bug7734_patched:1;
  139. u16 chiprev;
  140. int enhanced_mode;
  141. int n_ep;
  142. kernel_ulong_t quirks;
  143. /* pci state used to access those endpoints */
  144. struct pci_dev *pdev;
  145. struct net2280_regs __iomem *regs;
  146. struct net2280_usb_regs __iomem *usb;
  147. struct usb338x_usb_ext_regs __iomem *usb_ext;
  148. struct net2280_pci_regs __iomem *pci;
  149. struct net2280_dma_regs __iomem *dma;
  150. struct net2280_dep_regs __iomem *dep;
  151. struct net2280_ep_regs __iomem *epregs;
  152. struct usb338x_ll_regs __iomem *llregs;
  153. struct usb338x_ll_lfps_regs __iomem *ll_lfps_regs;
  154. struct usb338x_ll_tsn_regs __iomem *ll_tsn_regs;
  155. struct usb338x_ll_chi_regs __iomem *ll_chicken_reg;
  156. struct usb338x_pl_regs __iomem *plregs;
  157. struct dma_pool *requests;
  158. /* statistics...*/
  159. };
  160. static inline void set_halt(struct net2280_ep *ep)
  161. {
  162. /* ep0 and bulk/intr endpoints */
  163. writel(BIT(CLEAR_CONTROL_STATUS_PHASE_HANDSHAKE) |
  164. /* set NAK_OUT for erratum 0114 */
  165. ((ep->dev->chiprev == CHIPREV_1) << SET_NAK_OUT_PACKETS) |
  166. BIT(SET_ENDPOINT_HALT),
  167. &ep->regs->ep_rsp);
  168. }
  169. static inline void clear_halt(struct net2280_ep *ep)
  170. {
  171. /* ep0 and bulk/intr endpoints */
  172. writel(BIT(CLEAR_ENDPOINT_HALT) |
  173. BIT(CLEAR_ENDPOINT_TOGGLE) |
  174. /*
  175. * unless the gadget driver left a short packet in the
  176. * fifo, this reverses the erratum 0114 workaround.
  177. */
  178. ((ep->dev->chiprev == CHIPREV_1) << CLEAR_NAK_OUT_PACKETS),
  179. &ep->regs->ep_rsp);
  180. }
  181. /*
  182. * FSM value for Defect 7374 (U1U2 Test) is managed in
  183. * chip's SCRATCH register:
  184. */
  185. #define DEFECT7374_FSM_FIELD 28
  186. /* Waiting for Control Read:
  187. * - A transition to this state indicates a fresh USB connection,
  188. * before the first Setup Packet. The connection speed is not
  189. * known. Firmware is waiting for the first Control Read.
  190. * - Starting state: This state can be thought of as the FSM's typical
  191. * starting state.
  192. * - Tip: Upon the first SS Control Read the FSM never
  193. * returns to this state.
  194. */
  195. #define DEFECT7374_FSM_WAITING_FOR_CONTROL_READ BIT(DEFECT7374_FSM_FIELD)
  196. /* Non-SS Control Read:
  197. * - A transition to this state indicates detection of the first HS
  198. * or FS Control Read.
  199. * - Tip: Upon the first SS Control Read the FSM never
  200. * returns to this state.
  201. */
  202. #define DEFECT7374_FSM_NON_SS_CONTROL_READ (2 << DEFECT7374_FSM_FIELD)
  203. /* SS Control Read:
  204. * - A transition to this state indicates detection of the
  205. * first SS Control Read.
  206. * - This state indicates workaround completion. Workarounds no longer
  207. * need to be applied (as long as the chip remains powered up).
  208. * - Tip: Once in this state the FSM state does not change (until
  209. * the chip's power is lost and restored).
  210. * - This can be thought of as the final state of the FSM;
  211. * the FSM 'locks-up' in this state until the chip loses power.
  212. */
  213. #define DEFECT7374_FSM_SS_CONTROL_READ (3 << DEFECT7374_FSM_FIELD)
  214. #ifdef USE_RDK_LEDS
  215. static inline void net2280_led_init(struct net2280 *dev)
  216. {
  217. /* LED3 (green) is on during USB activity. note erratum 0113. */
  218. writel(BIT(GPIO3_LED_SELECT) |
  219. BIT(GPIO3_OUTPUT_ENABLE) |
  220. BIT(GPIO2_OUTPUT_ENABLE) |
  221. BIT(GPIO1_OUTPUT_ENABLE) |
  222. BIT(GPIO0_OUTPUT_ENABLE),
  223. &dev->regs->gpioctl);
  224. }
  225. /* indicate speed with bi-color LED 0/1 */
  226. static inline
  227. void net2280_led_speed(struct net2280 *dev, enum usb_device_speed speed)
  228. {
  229. u32 val = readl(&dev->regs->gpioctl);
  230. switch (speed) {
  231. case USB_SPEED_SUPER: /* green + red */
  232. val |= BIT(GPIO0_DATA) | BIT(GPIO1_DATA);
  233. break;
  234. case USB_SPEED_HIGH: /* green */
  235. val &= ~BIT(GPIO0_DATA);
  236. val |= BIT(GPIO1_DATA);
  237. break;
  238. case USB_SPEED_FULL: /* red */
  239. val &= ~BIT(GPIO1_DATA);
  240. val |= BIT(GPIO0_DATA);
  241. break;
  242. default: /* (off/black) */
  243. val &= ~(BIT(GPIO1_DATA) | BIT(GPIO0_DATA));
  244. break;
  245. }
  246. writel(val, &dev->regs->gpioctl);
  247. }
  248. /* indicate power with LED 2 */
  249. static inline void net2280_led_active(struct net2280 *dev, int is_active)
  250. {
  251. u32 val = readl(&dev->regs->gpioctl);
  252. /* FIXME this LED never seems to turn on.*/
  253. if (is_active)
  254. val |= GPIO2_DATA;
  255. else
  256. val &= ~GPIO2_DATA;
  257. writel(val, &dev->regs->gpioctl);
  258. }
  259. static inline void net2280_led_shutdown(struct net2280 *dev)
  260. {
  261. /* turn off all four GPIO*_DATA bits */
  262. writel(readl(&dev->regs->gpioctl) & ~0x0f,
  263. &dev->regs->gpioctl);
  264. }
  265. #else
  266. #define net2280_led_init(dev) do { } while (0)
  267. #define net2280_led_speed(dev, speed) do { } while (0)
  268. #define net2280_led_shutdown(dev) do { } while (0)
  269. #endif
  270. /*-------------------------------------------------------------------------*/
  271. #define ep_dbg(ndev, fmt, args...) \
  272. dev_dbg((&((ndev)->pdev->dev)), fmt, ##args)
  273. #define ep_vdbg(ndev, fmt, args...) \
  274. dev_vdbg((&((ndev)->pdev->dev)), fmt, ##args)
  275. #define ep_info(ndev, fmt, args...) \
  276. dev_info((&((ndev)->pdev->dev)), fmt, ##args)
  277. #define ep_warn(ndev, fmt, args...) \
  278. dev_warn((&((ndev)->pdev->dev)), fmt, ##args)
  279. #define ep_err(ndev, fmt, args...) \
  280. dev_err((&((ndev)->pdev->dev)), fmt, ##args)
  281. /*-------------------------------------------------------------------------*/
  282. static inline void set_fifo_bytecount(struct net2280_ep *ep, unsigned count)
  283. {
  284. if (ep->dev->pdev->vendor == 0x17cc)
  285. writeb(count, 2 + (u8 __iomem *) &ep->regs->ep_cfg);
  286. else{
  287. u32 tmp = readl(&ep->cfg->ep_cfg) &
  288. (~(0x07 << EP_FIFO_BYTE_COUNT));
  289. writel(tmp | (count << EP_FIFO_BYTE_COUNT), &ep->cfg->ep_cfg);
  290. }
  291. }
  292. static inline void start_out_naking(struct net2280_ep *ep)
  293. {
  294. /* NOTE: hardware races lurk here, and PING protocol issues */
  295. writel(BIT(SET_NAK_OUT_PACKETS), &ep->regs->ep_rsp);
  296. /* synch with device */
  297. readl(&ep->regs->ep_rsp);
  298. }
  299. static inline void stop_out_naking(struct net2280_ep *ep)
  300. {
  301. u32 tmp;
  302. tmp = readl(&ep->regs->ep_stat);
  303. if ((tmp & BIT(NAK_OUT_PACKETS)) != 0)
  304. writel(BIT(CLEAR_NAK_OUT_PACKETS), &ep->regs->ep_rsp);
  305. }
  306. static inline void set_max_speed(struct net2280_ep *ep, u32 max)
  307. {
  308. u32 reg;
  309. static const u32 ep_enhanced[9] = { 0x10, 0x60, 0x30, 0x80,
  310. 0x50, 0x20, 0x70, 0x40, 0x90 };
  311. if (ep->dev->enhanced_mode) {
  312. reg = ep_enhanced[ep->num];
  313. switch (ep->dev->gadget.speed) {
  314. case USB_SPEED_SUPER:
  315. reg += 2;
  316. break;
  317. case USB_SPEED_FULL:
  318. reg += 1;
  319. break;
  320. case USB_SPEED_HIGH:
  321. default:
  322. break;
  323. }
  324. } else {
  325. reg = (ep->num + 1) * 0x10;
  326. if (ep->dev->gadget.speed != USB_SPEED_HIGH)
  327. reg += 1;
  328. }
  329. set_idx_reg(ep->dev->regs, reg, max);
  330. }
  331. #endif /* __KERNEL__ */