dwc3-of-simple.c 6.0 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /**
  3. * dwc3-of-simple.c - OF glue layer for simple integrations
  4. *
  5. * Copyright (c) 2015 Texas Instruments Incorporated - http://www.ti.com
  6. *
  7. * Author: Felipe Balbi <balbi@ti.com>
  8. *
  9. * This is a combination of the old dwc3-qcom.c by Ivan T. Ivanov
  10. * <iivanov@mm-sol.com> and the original patch adding support for Xilinx' SoC
  11. * by Subbaraya Sundeep Bhatta <subbaraya.sundeep.bhatta@xilinx.com>
  12. */
  13. #include <linux/module.h>
  14. #include <linux/kernel.h>
  15. #include <linux/slab.h>
  16. #include <linux/platform_device.h>
  17. #include <linux/dma-mapping.h>
  18. #include <linux/clk.h>
  19. #include <linux/of.h>
  20. #include <linux/of_platform.h>
  21. #include <linux/pm_runtime.h>
  22. #include <linux/reset.h>
  23. struct dwc3_of_simple {
  24. struct device *dev;
  25. struct clk **clks;
  26. int num_clocks;
  27. struct reset_control *resets;
  28. bool pulse_resets;
  29. bool need_reset;
  30. };
  31. static int dwc3_of_simple_clk_init(struct dwc3_of_simple *simple, int count)
  32. {
  33. struct device *dev = simple->dev;
  34. struct device_node *np = dev->of_node;
  35. int i;
  36. simple->num_clocks = count;
  37. if (!count)
  38. return 0;
  39. simple->clks = devm_kcalloc(dev, simple->num_clocks,
  40. sizeof(struct clk *), GFP_KERNEL);
  41. if (!simple->clks)
  42. return -ENOMEM;
  43. for (i = 0; i < simple->num_clocks; i++) {
  44. struct clk *clk;
  45. int ret;
  46. clk = of_clk_get(np, i);
  47. if (IS_ERR(clk)) {
  48. while (--i >= 0) {
  49. clk_disable_unprepare(simple->clks[i]);
  50. clk_put(simple->clks[i]);
  51. }
  52. return PTR_ERR(clk);
  53. }
  54. ret = clk_prepare_enable(clk);
  55. if (ret < 0) {
  56. while (--i >= 0) {
  57. clk_disable_unprepare(simple->clks[i]);
  58. clk_put(simple->clks[i]);
  59. }
  60. clk_put(clk);
  61. return ret;
  62. }
  63. simple->clks[i] = clk;
  64. }
  65. return 0;
  66. }
  67. static int dwc3_of_simple_probe(struct platform_device *pdev)
  68. {
  69. struct dwc3_of_simple *simple;
  70. struct device *dev = &pdev->dev;
  71. struct device_node *np = dev->of_node;
  72. int ret;
  73. int i;
  74. bool shared_resets = false;
  75. simple = devm_kzalloc(dev, sizeof(*simple), GFP_KERNEL);
  76. if (!simple)
  77. return -ENOMEM;
  78. platform_set_drvdata(pdev, simple);
  79. simple->dev = dev;
  80. /*
  81. * Some controllers need to toggle the usb3-otg reset before trying to
  82. * initialize the PHY, otherwise the PHY times out.
  83. */
  84. if (of_device_is_compatible(np, "rockchip,rk3399-dwc3"))
  85. simple->need_reset = true;
  86. if (of_device_is_compatible(np, "amlogic,meson-axg-dwc3") ||
  87. of_device_is_compatible(np, "amlogic,meson-gxl-dwc3")) {
  88. shared_resets = true;
  89. simple->pulse_resets = true;
  90. }
  91. simple->resets = of_reset_control_array_get(np, shared_resets, true);
  92. if (IS_ERR(simple->resets)) {
  93. ret = PTR_ERR(simple->resets);
  94. dev_err(dev, "failed to get device resets, err=%d\n", ret);
  95. return ret;
  96. }
  97. if (simple->pulse_resets) {
  98. ret = reset_control_reset(simple->resets);
  99. if (ret)
  100. goto err_resetc_put;
  101. } else {
  102. ret = reset_control_deassert(simple->resets);
  103. if (ret)
  104. goto err_resetc_put;
  105. }
  106. ret = dwc3_of_simple_clk_init(simple, of_count_phandle_with_args(np,
  107. "clocks", "#clock-cells"));
  108. if (ret)
  109. goto err_resetc_assert;
  110. ret = of_platform_populate(np, NULL, NULL, dev);
  111. if (ret) {
  112. for (i = 0; i < simple->num_clocks; i++) {
  113. clk_disable_unprepare(simple->clks[i]);
  114. clk_put(simple->clks[i]);
  115. }
  116. goto err_resetc_assert;
  117. }
  118. pm_runtime_set_active(dev);
  119. pm_runtime_enable(dev);
  120. pm_runtime_get_sync(dev);
  121. return 0;
  122. err_resetc_assert:
  123. if (!simple->pulse_resets)
  124. reset_control_assert(simple->resets);
  125. err_resetc_put:
  126. reset_control_put(simple->resets);
  127. return ret;
  128. }
  129. static int dwc3_of_simple_remove(struct platform_device *pdev)
  130. {
  131. struct dwc3_of_simple *simple = platform_get_drvdata(pdev);
  132. struct device *dev = &pdev->dev;
  133. int i;
  134. of_platform_depopulate(dev);
  135. for (i = 0; i < simple->num_clocks; i++) {
  136. clk_disable_unprepare(simple->clks[i]);
  137. clk_put(simple->clks[i]);
  138. }
  139. simple->num_clocks = 0;
  140. if (!simple->pulse_resets)
  141. reset_control_assert(simple->resets);
  142. reset_control_put(simple->resets);
  143. pm_runtime_disable(dev);
  144. pm_runtime_put_noidle(dev);
  145. pm_runtime_set_suspended(dev);
  146. return 0;
  147. }
  148. static int __maybe_unused dwc3_of_simple_runtime_suspend(struct device *dev)
  149. {
  150. struct dwc3_of_simple *simple = dev_get_drvdata(dev);
  151. int i;
  152. for (i = 0; i < simple->num_clocks; i++)
  153. clk_disable(simple->clks[i]);
  154. return 0;
  155. }
  156. static int __maybe_unused dwc3_of_simple_runtime_resume(struct device *dev)
  157. {
  158. struct dwc3_of_simple *simple = dev_get_drvdata(dev);
  159. int ret;
  160. int i;
  161. for (i = 0; i < simple->num_clocks; i++) {
  162. ret = clk_enable(simple->clks[i]);
  163. if (ret < 0) {
  164. while (--i >= 0)
  165. clk_disable(simple->clks[i]);
  166. return ret;
  167. }
  168. }
  169. return 0;
  170. }
  171. static int __maybe_unused dwc3_of_simple_suspend(struct device *dev)
  172. {
  173. struct dwc3_of_simple *simple = dev_get_drvdata(dev);
  174. if (simple->need_reset)
  175. reset_control_assert(simple->resets);
  176. return 0;
  177. }
  178. static int __maybe_unused dwc3_of_simple_resume(struct device *dev)
  179. {
  180. struct dwc3_of_simple *simple = dev_get_drvdata(dev);
  181. if (simple->need_reset)
  182. reset_control_deassert(simple->resets);
  183. return 0;
  184. }
  185. static const struct dev_pm_ops dwc3_of_simple_dev_pm_ops = {
  186. SET_SYSTEM_SLEEP_PM_OPS(dwc3_of_simple_suspend, dwc3_of_simple_resume)
  187. SET_RUNTIME_PM_OPS(dwc3_of_simple_runtime_suspend,
  188. dwc3_of_simple_runtime_resume, NULL)
  189. };
  190. static const struct of_device_id of_dwc3_simple_match[] = {
  191. { .compatible = "rockchip,rk3399-dwc3" },
  192. { .compatible = "xlnx,zynqmp-dwc3" },
  193. { .compatible = "cavium,octeon-7130-usb-uctl" },
  194. { .compatible = "sprd,sc9860-dwc3" },
  195. { .compatible = "amlogic,meson-axg-dwc3" },
  196. { .compatible = "amlogic,meson-gxl-dwc3" },
  197. { .compatible = "allwinner,sun50i-h6-dwc3" },
  198. { /* Sentinel */ }
  199. };
  200. MODULE_DEVICE_TABLE(of, of_dwc3_simple_match);
  201. static struct platform_driver dwc3_of_simple_driver = {
  202. .probe = dwc3_of_simple_probe,
  203. .remove = dwc3_of_simple_remove,
  204. .driver = {
  205. .name = "dwc3-of-simple",
  206. .of_match_table = of_dwc3_simple_match,
  207. .pm = &dwc3_of_simple_dev_pm_ops,
  208. },
  209. };
  210. module_platform_driver(dwc3_of_simple_driver);
  211. MODULE_LICENSE("GPL v2");
  212. MODULE_DESCRIPTION("DesignWare USB3 OF Simple Glue Layer");
  213. MODULE_AUTHOR("Felipe Balbi <balbi@ti.com>");