ms.c 101 KB

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  1. /* Driver for Realtek PCI-Express card reader
  2. *
  3. * Copyright(c) 2009-2013 Realtek Semiconductor Corp. All rights reserved.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of the GNU General Public License as published by the
  7. * Free Software Foundation; either version 2, or (at your option) any
  8. * later version.
  9. *
  10. * This program is distributed in the hope that it will be useful, but
  11. * WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  13. * General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License along
  16. * with this program; if not, see <http://www.gnu.org/licenses/>.
  17. *
  18. * Author:
  19. * Wei WANG (wei_wang@realsil.com.cn)
  20. * Micky Ching (micky_ching@realsil.com.cn)
  21. */
  22. #include <linux/blkdev.h>
  23. #include <linux/kthread.h>
  24. #include <linux/sched.h>
  25. #include <linux/vmalloc.h>
  26. #include "rtsx.h"
  27. #include "ms.h"
  28. static inline void ms_set_err_code(struct rtsx_chip *chip, u8 err_code)
  29. {
  30. struct ms_info *ms_card = &chip->ms_card;
  31. ms_card->err_code = err_code;
  32. }
  33. static inline int ms_check_err_code(struct rtsx_chip *chip, u8 err_code)
  34. {
  35. struct ms_info *ms_card = &chip->ms_card;
  36. return (ms_card->err_code == err_code);
  37. }
  38. static int ms_parse_err_code(struct rtsx_chip *chip)
  39. {
  40. return STATUS_FAIL;
  41. }
  42. static int ms_transfer_tpc(struct rtsx_chip *chip, u8 trans_mode,
  43. u8 tpc, u8 cnt, u8 cfg)
  44. {
  45. struct ms_info *ms_card = &chip->ms_card;
  46. int retval;
  47. u8 *ptr;
  48. dev_dbg(rtsx_dev(chip), "%s: tpc = 0x%x\n", __func__, tpc);
  49. rtsx_init_cmd(chip);
  50. rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC, 0xFF, tpc);
  51. rtsx_add_cmd(chip, WRITE_REG_CMD, MS_BYTE_CNT, 0xFF, cnt);
  52. rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG, 0xFF, cfg);
  53. rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE,
  54. 0x01, PINGPONG_BUFFER);
  55. rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANSFER,
  56. 0xFF, MS_TRANSFER_START | trans_mode);
  57. rtsx_add_cmd(chip, CHECK_REG_CMD, MS_TRANSFER,
  58. MS_TRANSFER_END, MS_TRANSFER_END);
  59. rtsx_add_cmd(chip, READ_REG_CMD, MS_TRANS_CFG, 0, 0);
  60. retval = rtsx_send_cmd(chip, MS_CARD, 5000);
  61. if (retval < 0) {
  62. rtsx_clear_ms_error(chip);
  63. ms_set_err_code(chip, MS_TO_ERROR);
  64. return ms_parse_err_code(chip);
  65. }
  66. ptr = rtsx_get_cmd_data(chip) + 1;
  67. if (!(tpc & 0x08)) { /* Read Packet */
  68. if (*ptr & MS_CRC16_ERR) {
  69. ms_set_err_code(chip, MS_CRC16_ERROR);
  70. return ms_parse_err_code(chip);
  71. }
  72. } else { /* Write Packet */
  73. if (CHK_MSPRO(ms_card) && !(*ptr & 0x80)) {
  74. if (*ptr & (MS_INT_ERR | MS_INT_CMDNK)) {
  75. ms_set_err_code(chip, MS_CMD_NK);
  76. return ms_parse_err_code(chip);
  77. }
  78. }
  79. }
  80. if (*ptr & MS_RDY_TIMEOUT) {
  81. rtsx_clear_ms_error(chip);
  82. ms_set_err_code(chip, MS_TO_ERROR);
  83. return ms_parse_err_code(chip);
  84. }
  85. return STATUS_SUCCESS;
  86. }
  87. static int ms_transfer_data(struct rtsx_chip *chip, u8 trans_mode,
  88. u8 tpc, u16 sec_cnt, u8 cfg, bool mode_2k,
  89. int use_sg, void *buf, int buf_len)
  90. {
  91. int retval;
  92. u8 val, err_code = 0;
  93. enum dma_data_direction dir;
  94. if (!buf || !buf_len) {
  95. return STATUS_FAIL;
  96. }
  97. if (trans_mode == MS_TM_AUTO_READ) {
  98. dir = DMA_FROM_DEVICE;
  99. err_code = MS_FLASH_READ_ERROR;
  100. } else if (trans_mode == MS_TM_AUTO_WRITE) {
  101. dir = DMA_TO_DEVICE;
  102. err_code = MS_FLASH_WRITE_ERROR;
  103. } else {
  104. return STATUS_FAIL;
  105. }
  106. rtsx_init_cmd(chip);
  107. rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC, 0xFF, tpc);
  108. rtsx_add_cmd(chip, WRITE_REG_CMD,
  109. MS_SECTOR_CNT_H, 0xFF, (u8)(sec_cnt >> 8));
  110. rtsx_add_cmd(chip, WRITE_REG_CMD, MS_SECTOR_CNT_L, 0xFF, (u8)sec_cnt);
  111. rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG, 0xFF, cfg);
  112. if (mode_2k) {
  113. rtsx_add_cmd(chip, WRITE_REG_CMD,
  114. MS_CFG, MS_2K_SECTOR_MODE, MS_2K_SECTOR_MODE);
  115. } else {
  116. rtsx_add_cmd(chip, WRITE_REG_CMD, MS_CFG, MS_2K_SECTOR_MODE, 0);
  117. }
  118. trans_dma_enable(dir, chip, sec_cnt * 512, DMA_512);
  119. rtsx_add_cmd(chip, WRITE_REG_CMD,
  120. MS_TRANSFER, 0xFF, MS_TRANSFER_START | trans_mode);
  121. rtsx_add_cmd(chip, CHECK_REG_CMD,
  122. MS_TRANSFER, MS_TRANSFER_END, MS_TRANSFER_END);
  123. rtsx_send_cmd_no_wait(chip);
  124. retval = rtsx_transfer_data(chip, MS_CARD, buf, buf_len,
  125. use_sg, dir, chip->mspro_timeout);
  126. if (retval < 0) {
  127. ms_set_err_code(chip, err_code);
  128. if (retval == -ETIMEDOUT)
  129. retval = STATUS_TIMEDOUT;
  130. else
  131. retval = STATUS_FAIL;
  132. return retval;
  133. }
  134. retval = rtsx_read_register(chip, MS_TRANS_CFG, &val);
  135. if (retval) {
  136. return retval;
  137. }
  138. if (val & (MS_INT_CMDNK | MS_INT_ERR | MS_CRC16_ERR | MS_RDY_TIMEOUT)) {
  139. return STATUS_FAIL;
  140. }
  141. return STATUS_SUCCESS;
  142. }
  143. static int ms_write_bytes(struct rtsx_chip *chip,
  144. u8 tpc, u8 cnt, u8 cfg, u8 *data, int data_len)
  145. {
  146. struct ms_info *ms_card = &chip->ms_card;
  147. int retval, i;
  148. if (!data || (data_len < cnt)) {
  149. return STATUS_ERROR;
  150. }
  151. rtsx_init_cmd(chip);
  152. for (i = 0; i < cnt; i++) {
  153. rtsx_add_cmd(chip, WRITE_REG_CMD,
  154. PPBUF_BASE2 + i, 0xFF, data[i]);
  155. }
  156. if (cnt % 2)
  157. rtsx_add_cmd(chip, WRITE_REG_CMD, PPBUF_BASE2 + i, 0xFF, 0xFF);
  158. rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC, 0xFF, tpc);
  159. rtsx_add_cmd(chip, WRITE_REG_CMD, MS_BYTE_CNT, 0xFF, cnt);
  160. rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG, 0xFF, cfg);
  161. rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE,
  162. 0x01, PINGPONG_BUFFER);
  163. rtsx_add_cmd(chip, WRITE_REG_CMD,
  164. MS_TRANSFER, 0xFF, MS_TRANSFER_START | MS_TM_WRITE_BYTES);
  165. rtsx_add_cmd(chip, CHECK_REG_CMD,
  166. MS_TRANSFER, MS_TRANSFER_END, MS_TRANSFER_END);
  167. retval = rtsx_send_cmd(chip, MS_CARD, 5000);
  168. if (retval < 0) {
  169. u8 val = 0;
  170. rtsx_read_register(chip, MS_TRANS_CFG, &val);
  171. dev_dbg(rtsx_dev(chip), "MS_TRANS_CFG: 0x%02x\n", val);
  172. rtsx_clear_ms_error(chip);
  173. if (!(tpc & 0x08)) {
  174. if (val & MS_CRC16_ERR) {
  175. ms_set_err_code(chip, MS_CRC16_ERROR);
  176. return ms_parse_err_code(chip);
  177. }
  178. } else {
  179. if (CHK_MSPRO(ms_card) && !(val & 0x80)) {
  180. if (val & (MS_INT_ERR | MS_INT_CMDNK)) {
  181. ms_set_err_code(chip, MS_CMD_NK);
  182. return ms_parse_err_code(chip);
  183. }
  184. }
  185. }
  186. if (val & MS_RDY_TIMEOUT) {
  187. ms_set_err_code(chip, MS_TO_ERROR);
  188. return ms_parse_err_code(chip);
  189. }
  190. ms_set_err_code(chip, MS_TO_ERROR);
  191. return ms_parse_err_code(chip);
  192. }
  193. return STATUS_SUCCESS;
  194. }
  195. static int ms_read_bytes(struct rtsx_chip *chip,
  196. u8 tpc, u8 cnt, u8 cfg, u8 *data, int data_len)
  197. {
  198. struct ms_info *ms_card = &chip->ms_card;
  199. int retval, i;
  200. u8 *ptr;
  201. if (!data) {
  202. return STATUS_ERROR;
  203. }
  204. rtsx_init_cmd(chip);
  205. rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC, 0xFF, tpc);
  206. rtsx_add_cmd(chip, WRITE_REG_CMD, MS_BYTE_CNT, 0xFF, cnt);
  207. rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG, 0xFF, cfg);
  208. rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE,
  209. 0x01, PINGPONG_BUFFER);
  210. rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANSFER, 0xFF,
  211. MS_TRANSFER_START | MS_TM_READ_BYTES);
  212. rtsx_add_cmd(chip, CHECK_REG_CMD, MS_TRANSFER,
  213. MS_TRANSFER_END, MS_TRANSFER_END);
  214. for (i = 0; i < data_len - 1; i++)
  215. rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + i, 0, 0);
  216. if (data_len % 2)
  217. rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + data_len, 0, 0);
  218. else
  219. rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + data_len - 1,
  220. 0, 0);
  221. retval = rtsx_send_cmd(chip, MS_CARD, 5000);
  222. if (retval < 0) {
  223. u8 val = 0;
  224. rtsx_read_register(chip, MS_TRANS_CFG, &val);
  225. rtsx_clear_ms_error(chip);
  226. if (!(tpc & 0x08)) {
  227. if (val & MS_CRC16_ERR) {
  228. ms_set_err_code(chip, MS_CRC16_ERROR);
  229. return ms_parse_err_code(chip);
  230. }
  231. } else {
  232. if (CHK_MSPRO(ms_card) && !(val & 0x80)) {
  233. if (val & (MS_INT_ERR | MS_INT_CMDNK)) {
  234. ms_set_err_code(chip, MS_CMD_NK);
  235. return ms_parse_err_code(chip);
  236. }
  237. }
  238. }
  239. if (val & MS_RDY_TIMEOUT) {
  240. ms_set_err_code(chip, MS_TO_ERROR);
  241. return ms_parse_err_code(chip);
  242. }
  243. ms_set_err_code(chip, MS_TO_ERROR);
  244. return ms_parse_err_code(chip);
  245. }
  246. ptr = rtsx_get_cmd_data(chip) + 1;
  247. for (i = 0; i < data_len; i++)
  248. data[i] = ptr[i];
  249. if ((tpc == PRO_READ_SHORT_DATA) && (data_len == 8)) {
  250. dev_dbg(rtsx_dev(chip), "Read format progress:\n");
  251. print_hex_dump_bytes(KBUILD_MODNAME ": ", DUMP_PREFIX_NONE, ptr,
  252. cnt);
  253. }
  254. return STATUS_SUCCESS;
  255. }
  256. static int ms_set_rw_reg_addr(struct rtsx_chip *chip, u8 read_start,
  257. u8 read_cnt, u8 write_start, u8 write_cnt)
  258. {
  259. int retval, i;
  260. u8 data[4];
  261. data[0] = read_start;
  262. data[1] = read_cnt;
  263. data[2] = write_start;
  264. data[3] = write_cnt;
  265. for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
  266. retval = ms_write_bytes(chip, SET_RW_REG_ADRS, 4,
  267. NO_WAIT_INT, data, 4);
  268. if (retval == STATUS_SUCCESS)
  269. return STATUS_SUCCESS;
  270. rtsx_clear_ms_error(chip);
  271. }
  272. return STATUS_FAIL;
  273. }
  274. static int ms_send_cmd(struct rtsx_chip *chip, u8 cmd, u8 cfg)
  275. {
  276. u8 data[2];
  277. data[0] = cmd;
  278. data[1] = 0;
  279. return ms_write_bytes(chip, PRO_SET_CMD, 1, cfg, data, 1);
  280. }
  281. static int ms_set_init_para(struct rtsx_chip *chip)
  282. {
  283. struct ms_info *ms_card = &chip->ms_card;
  284. int retval;
  285. if (CHK_HG8BIT(ms_card)) {
  286. if (chip->asic_code)
  287. ms_card->ms_clock = chip->asic_ms_hg_clk;
  288. else
  289. ms_card->ms_clock = chip->fpga_ms_hg_clk;
  290. } else if (CHK_MSPRO(ms_card) || CHK_MS4BIT(ms_card)) {
  291. if (chip->asic_code)
  292. ms_card->ms_clock = chip->asic_ms_4bit_clk;
  293. else
  294. ms_card->ms_clock = chip->fpga_ms_4bit_clk;
  295. } else {
  296. if (chip->asic_code)
  297. ms_card->ms_clock = chip->asic_ms_1bit_clk;
  298. else
  299. ms_card->ms_clock = chip->fpga_ms_1bit_clk;
  300. }
  301. retval = switch_clock(chip, ms_card->ms_clock);
  302. if (retval != STATUS_SUCCESS) {
  303. return STATUS_FAIL;
  304. }
  305. retval = select_card(chip, MS_CARD);
  306. if (retval != STATUS_SUCCESS) {
  307. return STATUS_FAIL;
  308. }
  309. return STATUS_SUCCESS;
  310. }
  311. static int ms_switch_clock(struct rtsx_chip *chip)
  312. {
  313. struct ms_info *ms_card = &chip->ms_card;
  314. int retval;
  315. retval = select_card(chip, MS_CARD);
  316. if (retval != STATUS_SUCCESS) {
  317. return STATUS_FAIL;
  318. }
  319. retval = switch_clock(chip, ms_card->ms_clock);
  320. if (retval != STATUS_SUCCESS) {
  321. return STATUS_FAIL;
  322. }
  323. return STATUS_SUCCESS;
  324. }
  325. static int ms_pull_ctl_disable(struct rtsx_chip *chip)
  326. {
  327. int retval;
  328. if (CHECK_PID(chip, 0x5208)) {
  329. retval = rtsx_write_register(chip, CARD_PULL_CTL1, 0xFF,
  330. MS_D1_PD | MS_D2_PD | MS_CLK_PD |
  331. MS_D6_PD);
  332. if (retval) {
  333. return retval;
  334. }
  335. retval = rtsx_write_register(chip, CARD_PULL_CTL2, 0xFF,
  336. MS_D3_PD | MS_D0_PD | MS_BS_PD |
  337. XD_D4_PD);
  338. if (retval) {
  339. return retval;
  340. }
  341. retval = rtsx_write_register(chip, CARD_PULL_CTL3, 0xFF,
  342. MS_D7_PD | XD_CE_PD | XD_CLE_PD |
  343. XD_CD_PU);
  344. if (retval) {
  345. return retval;
  346. }
  347. retval = rtsx_write_register(chip, CARD_PULL_CTL4, 0xFF,
  348. XD_RDY_PD | SD_D3_PD | SD_D2_PD |
  349. XD_ALE_PD);
  350. if (retval) {
  351. return retval;
  352. }
  353. retval = rtsx_write_register(chip, CARD_PULL_CTL5, 0xFF,
  354. MS_INS_PU | SD_WP_PD | SD_CD_PU |
  355. SD_CMD_PD);
  356. if (retval) {
  357. return retval;
  358. }
  359. retval = rtsx_write_register(chip, CARD_PULL_CTL6, 0xFF,
  360. MS_D5_PD | MS_D4_PD);
  361. if (retval) {
  362. return retval;
  363. }
  364. } else if (CHECK_PID(chip, 0x5288)) {
  365. if (CHECK_BARO_PKG(chip, QFN)) {
  366. retval = rtsx_write_register(chip, CARD_PULL_CTL1,
  367. 0xFF, 0x55);
  368. if (retval) {
  369. return retval;
  370. }
  371. retval = rtsx_write_register(chip, CARD_PULL_CTL2,
  372. 0xFF, 0x55);
  373. if (retval) {
  374. return retval;
  375. }
  376. retval = rtsx_write_register(chip, CARD_PULL_CTL3,
  377. 0xFF, 0x4B);
  378. if (retval) {
  379. return retval;
  380. }
  381. retval = rtsx_write_register(chip, CARD_PULL_CTL4,
  382. 0xFF, 0x69);
  383. if (retval) {
  384. return retval;
  385. }
  386. }
  387. }
  388. return STATUS_SUCCESS;
  389. }
  390. static int ms_pull_ctl_enable(struct rtsx_chip *chip)
  391. {
  392. int retval;
  393. rtsx_init_cmd(chip);
  394. if (CHECK_PID(chip, 0x5208)) {
  395. rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL1, 0xFF,
  396. MS_D1_PD | MS_D2_PD | MS_CLK_NP | MS_D6_PD);
  397. rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL2, 0xFF,
  398. MS_D3_PD | MS_D0_PD | MS_BS_NP | XD_D4_PD);
  399. rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL3, 0xFF,
  400. MS_D7_PD | XD_CE_PD | XD_CLE_PD | XD_CD_PU);
  401. rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL4, 0xFF,
  402. XD_RDY_PD | SD_D3_PD | SD_D2_PD | XD_ALE_PD);
  403. rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL5, 0xFF,
  404. MS_INS_PU | SD_WP_PD | SD_CD_PU | SD_CMD_PD);
  405. rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL6, 0xFF,
  406. MS_D5_PD | MS_D4_PD);
  407. } else if (CHECK_PID(chip, 0x5288)) {
  408. if (CHECK_BARO_PKG(chip, QFN)) {
  409. rtsx_add_cmd(chip, WRITE_REG_CMD,
  410. CARD_PULL_CTL1, 0xFF, 0x55);
  411. rtsx_add_cmd(chip, WRITE_REG_CMD,
  412. CARD_PULL_CTL2, 0xFF, 0x45);
  413. rtsx_add_cmd(chip, WRITE_REG_CMD,
  414. CARD_PULL_CTL3, 0xFF, 0x4B);
  415. rtsx_add_cmd(chip, WRITE_REG_CMD,
  416. CARD_PULL_CTL4, 0xFF, 0x29);
  417. }
  418. }
  419. retval = rtsx_send_cmd(chip, MS_CARD, 100);
  420. if (retval < 0) {
  421. return STATUS_FAIL;
  422. }
  423. return STATUS_SUCCESS;
  424. }
  425. static int ms_prepare_reset(struct rtsx_chip *chip)
  426. {
  427. struct ms_info *ms_card = &chip->ms_card;
  428. int retval;
  429. u8 oc_mask = 0;
  430. ms_card->ms_type = 0;
  431. ms_card->check_ms_flow = 0;
  432. ms_card->switch_8bit_fail = 0;
  433. ms_card->delay_write.delay_write_flag = 0;
  434. ms_card->pro_under_formatting = 0;
  435. retval = ms_power_off_card3v3(chip);
  436. if (retval != STATUS_SUCCESS) {
  437. return STATUS_FAIL;
  438. }
  439. if (!chip->ft2_fast_mode)
  440. wait_timeout(250);
  441. retval = enable_card_clock(chip, MS_CARD);
  442. if (retval != STATUS_SUCCESS) {
  443. return STATUS_FAIL;
  444. }
  445. if (chip->asic_code) {
  446. retval = ms_pull_ctl_enable(chip);
  447. if (retval != STATUS_SUCCESS) {
  448. return STATUS_FAIL;
  449. }
  450. } else {
  451. retval = rtsx_write_register(chip, FPGA_PULL_CTL,
  452. FPGA_MS_PULL_CTL_BIT | 0x20, 0);
  453. if (retval) {
  454. return retval;
  455. }
  456. }
  457. if (!chip->ft2_fast_mode) {
  458. retval = card_power_on(chip, MS_CARD);
  459. if (retval != STATUS_SUCCESS) {
  460. return STATUS_FAIL;
  461. }
  462. wait_timeout(150);
  463. #ifdef SUPPORT_OCP
  464. if (CHECK_LUN_MODE(chip, SD_MS_2LUN))
  465. oc_mask = MS_OC_NOW | MS_OC_EVER;
  466. else
  467. oc_mask = SD_OC_NOW | SD_OC_EVER;
  468. if (chip->ocp_stat & oc_mask) {
  469. dev_dbg(rtsx_dev(chip), "Over current, OCPSTAT is 0x%x\n",
  470. chip->ocp_stat);
  471. return STATUS_FAIL;
  472. }
  473. #endif
  474. }
  475. retval = rtsx_write_register(chip, CARD_OE, MS_OUTPUT_EN,
  476. MS_OUTPUT_EN);
  477. if (retval) {
  478. return retval;
  479. }
  480. if (chip->asic_code) {
  481. retval = rtsx_write_register(chip, MS_CFG, 0xFF,
  482. SAMPLE_TIME_RISING |
  483. PUSH_TIME_DEFAULT |
  484. NO_EXTEND_TOGGLE |
  485. MS_BUS_WIDTH_1);
  486. if (retval) {
  487. return retval;
  488. }
  489. } else {
  490. retval = rtsx_write_register(chip, MS_CFG, 0xFF,
  491. SAMPLE_TIME_FALLING |
  492. PUSH_TIME_DEFAULT |
  493. NO_EXTEND_TOGGLE |
  494. MS_BUS_WIDTH_1);
  495. if (retval) {
  496. return retval;
  497. }
  498. }
  499. retval = rtsx_write_register(chip, MS_TRANS_CFG, 0xFF,
  500. NO_WAIT_INT | NO_AUTO_READ_INT_REG);
  501. if (retval) {
  502. return retval;
  503. }
  504. retval = rtsx_write_register(chip, CARD_STOP, MS_STOP | MS_CLR_ERR,
  505. MS_STOP | MS_CLR_ERR);
  506. if (retval) {
  507. return retval;
  508. }
  509. retval = ms_set_init_para(chip);
  510. if (retval != STATUS_SUCCESS) {
  511. return STATUS_FAIL;
  512. }
  513. return STATUS_SUCCESS;
  514. }
  515. static int ms_identify_media_type(struct rtsx_chip *chip, int switch_8bit_bus)
  516. {
  517. struct ms_info *ms_card = &chip->ms_card;
  518. int retval, i;
  519. u8 val;
  520. retval = ms_set_rw_reg_addr(chip, Pro_StatusReg, 6, SystemParm, 1);
  521. if (retval != STATUS_SUCCESS) {
  522. return STATUS_FAIL;
  523. }
  524. for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
  525. retval = ms_transfer_tpc(chip, MS_TM_READ_BYTES, READ_REG,
  526. 6, NO_WAIT_INT);
  527. if (retval == STATUS_SUCCESS)
  528. break;
  529. }
  530. if (i == MS_MAX_RETRY_COUNT) {
  531. return STATUS_FAIL;
  532. }
  533. retval = rtsx_read_register(chip, PPBUF_BASE2 + 2, &val);
  534. if (retval) {
  535. return retval;
  536. }
  537. dev_dbg(rtsx_dev(chip), "Type register: 0x%x\n", val);
  538. if (val != 0x01) {
  539. if (val != 0x02)
  540. ms_card->check_ms_flow = 1;
  541. return STATUS_FAIL;
  542. }
  543. retval = rtsx_read_register(chip, PPBUF_BASE2 + 4, &val);
  544. if (retval) {
  545. return retval;
  546. }
  547. dev_dbg(rtsx_dev(chip), "Category register: 0x%x\n", val);
  548. if (val != 0) {
  549. ms_card->check_ms_flow = 1;
  550. return STATUS_FAIL;
  551. }
  552. retval = rtsx_read_register(chip, PPBUF_BASE2 + 5, &val);
  553. if (retval) {
  554. return retval;
  555. }
  556. dev_dbg(rtsx_dev(chip), "Class register: 0x%x\n", val);
  557. if (val == 0) {
  558. retval = rtsx_read_register(chip, PPBUF_BASE2, &val);
  559. if (retval) {
  560. return retval;
  561. }
  562. if (val & WRT_PRTCT)
  563. chip->card_wp |= MS_CARD;
  564. else
  565. chip->card_wp &= ~MS_CARD;
  566. } else if ((val == 0x01) || (val == 0x02) || (val == 0x03)) {
  567. chip->card_wp |= MS_CARD;
  568. } else {
  569. ms_card->check_ms_flow = 1;
  570. return STATUS_FAIL;
  571. }
  572. ms_card->ms_type |= TYPE_MSPRO;
  573. retval = rtsx_read_register(chip, PPBUF_BASE2 + 3, &val);
  574. if (retval) {
  575. return retval;
  576. }
  577. dev_dbg(rtsx_dev(chip), "IF Mode register: 0x%x\n", val);
  578. if (val == 0) {
  579. ms_card->ms_type &= 0x0F;
  580. } else if (val == 7) {
  581. if (switch_8bit_bus)
  582. ms_card->ms_type |= MS_HG;
  583. else
  584. ms_card->ms_type &= 0x0F;
  585. } else {
  586. return STATUS_FAIL;
  587. }
  588. return STATUS_SUCCESS;
  589. }
  590. static int ms_confirm_cpu_startup(struct rtsx_chip *chip)
  591. {
  592. int retval, i, k;
  593. u8 val;
  594. /* Confirm CPU StartUp */
  595. k = 0;
  596. do {
  597. if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
  598. ms_set_err_code(chip, MS_NO_CARD);
  599. return STATUS_FAIL;
  600. }
  601. for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
  602. retval = ms_read_bytes(chip, GET_INT, 1,
  603. NO_WAIT_INT, &val, 1);
  604. if (retval == STATUS_SUCCESS)
  605. break;
  606. }
  607. if (i == MS_MAX_RETRY_COUNT) {
  608. return STATUS_FAIL;
  609. }
  610. if (k > 100) {
  611. return STATUS_FAIL;
  612. }
  613. k++;
  614. wait_timeout(100);
  615. } while (!(val & INT_REG_CED));
  616. for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
  617. retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
  618. if (retval == STATUS_SUCCESS)
  619. break;
  620. }
  621. if (i == MS_MAX_RETRY_COUNT) {
  622. return STATUS_FAIL;
  623. }
  624. if (val & INT_REG_ERR) {
  625. if (val & INT_REG_CMDNK) {
  626. chip->card_wp |= (MS_CARD);
  627. } else {
  628. return STATUS_FAIL;
  629. }
  630. }
  631. /* -- end confirm CPU startup */
  632. return STATUS_SUCCESS;
  633. }
  634. static int ms_switch_parallel_bus(struct rtsx_chip *chip)
  635. {
  636. int retval, i;
  637. u8 data[2];
  638. data[0] = PARALLEL_4BIT_IF;
  639. data[1] = 0;
  640. for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
  641. retval = ms_write_bytes(chip, WRITE_REG, 1, NO_WAIT_INT,
  642. data, 2);
  643. if (retval == STATUS_SUCCESS)
  644. break;
  645. }
  646. if (retval != STATUS_SUCCESS) {
  647. return STATUS_FAIL;
  648. }
  649. return STATUS_SUCCESS;
  650. }
  651. static int ms_switch_8bit_bus(struct rtsx_chip *chip)
  652. {
  653. struct ms_info *ms_card = &chip->ms_card;
  654. int retval, i;
  655. u8 data[2];
  656. data[0] = PARALLEL_8BIT_IF;
  657. data[1] = 0;
  658. for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
  659. retval = ms_write_bytes(chip, WRITE_REG, 1,
  660. NO_WAIT_INT, data, 2);
  661. if (retval == STATUS_SUCCESS)
  662. break;
  663. }
  664. if (retval != STATUS_SUCCESS) {
  665. return STATUS_FAIL;
  666. }
  667. retval = rtsx_write_register(chip, MS_CFG, 0x98,
  668. MS_BUS_WIDTH_8 | SAMPLE_TIME_FALLING);
  669. if (retval) {
  670. return retval;
  671. }
  672. ms_card->ms_type |= MS_8BIT;
  673. retval = ms_set_init_para(chip);
  674. if (retval != STATUS_SUCCESS) {
  675. return STATUS_FAIL;
  676. }
  677. for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
  678. retval = ms_transfer_tpc(chip, MS_TM_READ_BYTES, GET_INT,
  679. 1, NO_WAIT_INT);
  680. if (retval != STATUS_SUCCESS) {
  681. return STATUS_FAIL;
  682. }
  683. }
  684. return STATUS_SUCCESS;
  685. }
  686. static int ms_pro_reset_flow(struct rtsx_chip *chip, int switch_8bit_bus)
  687. {
  688. struct ms_info *ms_card = &chip->ms_card;
  689. int retval, i;
  690. for (i = 0; i < 3; i++) {
  691. retval = ms_prepare_reset(chip);
  692. if (retval != STATUS_SUCCESS) {
  693. return STATUS_FAIL;
  694. }
  695. retval = ms_identify_media_type(chip, switch_8bit_bus);
  696. if (retval != STATUS_SUCCESS) {
  697. return STATUS_FAIL;
  698. }
  699. retval = ms_confirm_cpu_startup(chip);
  700. if (retval != STATUS_SUCCESS) {
  701. return STATUS_FAIL;
  702. }
  703. retval = ms_switch_parallel_bus(chip);
  704. if (retval != STATUS_SUCCESS) {
  705. if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
  706. ms_set_err_code(chip, MS_NO_CARD);
  707. return STATUS_FAIL;
  708. }
  709. continue;
  710. } else {
  711. break;
  712. }
  713. }
  714. if (retval != STATUS_SUCCESS) {
  715. return STATUS_FAIL;
  716. }
  717. /* Switch MS-PRO into Parallel mode */
  718. retval = rtsx_write_register(chip, MS_CFG, 0x18, MS_BUS_WIDTH_4);
  719. if (retval) {
  720. return retval;
  721. }
  722. retval = rtsx_write_register(chip, MS_CFG, PUSH_TIME_ODD,
  723. PUSH_TIME_ODD);
  724. if (retval) {
  725. return retval;
  726. }
  727. retval = ms_set_init_para(chip);
  728. if (retval != STATUS_SUCCESS) {
  729. return STATUS_FAIL;
  730. }
  731. /* If MSPro HG Card, We shall try to switch to 8-bit bus */
  732. if (CHK_MSHG(ms_card) && chip->support_ms_8bit && switch_8bit_bus) {
  733. retval = ms_switch_8bit_bus(chip);
  734. if (retval != STATUS_SUCCESS) {
  735. ms_card->switch_8bit_fail = 1;
  736. return STATUS_FAIL;
  737. }
  738. }
  739. return STATUS_SUCCESS;
  740. }
  741. #ifdef XC_POWERCLASS
  742. static int msxc_change_power(struct rtsx_chip *chip, u8 mode)
  743. {
  744. int retval;
  745. u8 buf[6];
  746. ms_cleanup_work(chip);
  747. retval = ms_set_rw_reg_addr(chip, 0, 0, Pro_DataCount1, 6);
  748. if (retval != STATUS_SUCCESS) {
  749. return STATUS_FAIL;
  750. }
  751. buf[0] = 0;
  752. buf[1] = mode;
  753. buf[2] = 0;
  754. buf[3] = 0;
  755. buf[4] = 0;
  756. buf[5] = 0;
  757. retval = ms_write_bytes(chip, PRO_WRITE_REG, 6, NO_WAIT_INT, buf, 6);
  758. if (retval != STATUS_SUCCESS) {
  759. return STATUS_FAIL;
  760. }
  761. retval = ms_send_cmd(chip, XC_CHG_POWER, WAIT_INT);
  762. if (retval != STATUS_SUCCESS) {
  763. return STATUS_FAIL;
  764. }
  765. retval = rtsx_read_register(chip, MS_TRANS_CFG, buf);
  766. if (retval) {
  767. return retval;
  768. }
  769. if (buf[0] & (MS_INT_CMDNK | MS_INT_ERR)) {
  770. return STATUS_FAIL;
  771. }
  772. return STATUS_SUCCESS;
  773. }
  774. #endif
  775. static int ms_read_attribute_info(struct rtsx_chip *chip)
  776. {
  777. struct ms_info *ms_card = &chip->ms_card;
  778. int retval, i;
  779. u8 val, *buf, class_code, device_type, sub_class, data[16];
  780. u16 total_blk = 0, blk_size = 0;
  781. #ifdef SUPPORT_MSXC
  782. u32 xc_total_blk = 0, xc_blk_size = 0;
  783. #endif
  784. u32 sys_info_addr = 0, sys_info_size;
  785. #ifdef SUPPORT_PCGL_1P18
  786. u32 model_name_addr = 0, model_name_size;
  787. int found_sys_info = 0, found_model_name = 0;
  788. #endif
  789. retval = ms_set_rw_reg_addr(chip, Pro_IntReg, 2, Pro_SystemParm, 7);
  790. if (retval != STATUS_SUCCESS) {
  791. return STATUS_FAIL;
  792. }
  793. if (CHK_MS8BIT(ms_card))
  794. data[0] = PARALLEL_8BIT_IF;
  795. else
  796. data[0] = PARALLEL_4BIT_IF;
  797. data[1] = 0;
  798. data[2] = 0x40;
  799. data[3] = 0;
  800. data[4] = 0;
  801. data[5] = 0;
  802. data[6] = 0;
  803. data[7] = 0;
  804. for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
  805. retval = ms_write_bytes(chip, PRO_WRITE_REG, 7, NO_WAIT_INT,
  806. data, 8);
  807. if (retval == STATUS_SUCCESS)
  808. break;
  809. }
  810. if (retval != STATUS_SUCCESS) {
  811. return STATUS_FAIL;
  812. }
  813. buf = kmalloc(64 * 512, GFP_KERNEL);
  814. if (!buf) {
  815. return STATUS_ERROR;
  816. }
  817. for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
  818. retval = ms_send_cmd(chip, PRO_READ_ATRB, WAIT_INT);
  819. if (retval != STATUS_SUCCESS)
  820. continue;
  821. retval = rtsx_read_register(chip, MS_TRANS_CFG, &val);
  822. if (retval != STATUS_SUCCESS) {
  823. kfree(buf);
  824. return STATUS_FAIL;
  825. }
  826. if (!(val & MS_INT_BREQ)) {
  827. kfree(buf);
  828. return STATUS_FAIL;
  829. }
  830. retval = ms_transfer_data(chip, MS_TM_AUTO_READ,
  831. PRO_READ_LONG_DATA, 0x40, WAIT_INT,
  832. 0, 0, buf, 64 * 512);
  833. if (retval == STATUS_SUCCESS)
  834. break;
  835. rtsx_clear_ms_error(chip);
  836. }
  837. if (retval != STATUS_SUCCESS) {
  838. kfree(buf);
  839. return STATUS_FAIL;
  840. }
  841. i = 0;
  842. do {
  843. retval = rtsx_read_register(chip, MS_TRANS_CFG, &val);
  844. if (retval != STATUS_SUCCESS) {
  845. kfree(buf);
  846. return STATUS_FAIL;
  847. }
  848. if ((val & MS_INT_CED) || !(val & MS_INT_BREQ))
  849. break;
  850. retval = ms_transfer_tpc(chip, MS_TM_NORMAL_READ,
  851. PRO_READ_LONG_DATA, 0, WAIT_INT);
  852. if (retval != STATUS_SUCCESS) {
  853. kfree(buf);
  854. return STATUS_FAIL;
  855. }
  856. i++;
  857. } while (i < 1024);
  858. if ((buf[0] != 0xa5) && (buf[1] != 0xc3)) {
  859. /* Signature code is wrong */
  860. kfree(buf);
  861. return STATUS_FAIL;
  862. }
  863. if ((buf[4] < 1) || (buf[4] > 12)) {
  864. kfree(buf);
  865. return STATUS_FAIL;
  866. }
  867. for (i = 0; i < buf[4]; i++) {
  868. int cur_addr_off = 16 + i * 12;
  869. #ifdef SUPPORT_MSXC
  870. if ((buf[cur_addr_off + 8] == 0x10) ||
  871. (buf[cur_addr_off + 8] == 0x13)) {
  872. #else
  873. if (buf[cur_addr_off + 8] == 0x10) {
  874. #endif
  875. sys_info_addr = ((u32)buf[cur_addr_off + 0] << 24) |
  876. ((u32)buf[cur_addr_off + 1] << 16) |
  877. ((u32)buf[cur_addr_off + 2] << 8) |
  878. buf[cur_addr_off + 3];
  879. sys_info_size = ((u32)buf[cur_addr_off + 4] << 24) |
  880. ((u32)buf[cur_addr_off + 5] << 16) |
  881. ((u32)buf[cur_addr_off + 6] << 8) |
  882. buf[cur_addr_off + 7];
  883. dev_dbg(rtsx_dev(chip), "sys_info_addr = 0x%x, sys_info_size = 0x%x\n",
  884. sys_info_addr, sys_info_size);
  885. if (sys_info_size != 96) {
  886. kfree(buf);
  887. return STATUS_FAIL;
  888. }
  889. if (sys_info_addr < 0x1A0) {
  890. kfree(buf);
  891. return STATUS_FAIL;
  892. }
  893. if ((sys_info_size + sys_info_addr) > 0x8000) {
  894. kfree(buf);
  895. return STATUS_FAIL;
  896. }
  897. #ifdef SUPPORT_MSXC
  898. if (buf[cur_addr_off + 8] == 0x13)
  899. ms_card->ms_type |= MS_XC;
  900. #endif
  901. #ifdef SUPPORT_PCGL_1P18
  902. found_sys_info = 1;
  903. #else
  904. break;
  905. #endif
  906. }
  907. #ifdef SUPPORT_PCGL_1P18
  908. if (buf[cur_addr_off + 8] == 0x15) {
  909. model_name_addr = ((u32)buf[cur_addr_off + 0] << 24) |
  910. ((u32)buf[cur_addr_off + 1] << 16) |
  911. ((u32)buf[cur_addr_off + 2] << 8) |
  912. buf[cur_addr_off + 3];
  913. model_name_size = ((u32)buf[cur_addr_off + 4] << 24) |
  914. ((u32)buf[cur_addr_off + 5] << 16) |
  915. ((u32)buf[cur_addr_off + 6] << 8) |
  916. buf[cur_addr_off + 7];
  917. dev_dbg(rtsx_dev(chip), "model_name_addr = 0x%x, model_name_size = 0x%x\n",
  918. model_name_addr, model_name_size);
  919. if (model_name_size != 48) {
  920. kfree(buf);
  921. return STATUS_FAIL;
  922. }
  923. if (model_name_addr < 0x1A0) {
  924. kfree(buf);
  925. return STATUS_FAIL;
  926. }
  927. if ((model_name_size + model_name_addr) > 0x8000) {
  928. kfree(buf);
  929. return STATUS_FAIL;
  930. }
  931. found_model_name = 1;
  932. }
  933. if (found_sys_info && found_model_name)
  934. break;
  935. #endif
  936. }
  937. if (i == buf[4]) {
  938. kfree(buf);
  939. return STATUS_FAIL;
  940. }
  941. class_code = buf[sys_info_addr + 0];
  942. device_type = buf[sys_info_addr + 56];
  943. sub_class = buf[sys_info_addr + 46];
  944. #ifdef SUPPORT_MSXC
  945. if (CHK_MSXC(ms_card)) {
  946. xc_total_blk = ((u32)buf[sys_info_addr + 6] << 24) |
  947. ((u32)buf[sys_info_addr + 7] << 16) |
  948. ((u32)buf[sys_info_addr + 8] << 8) |
  949. buf[sys_info_addr + 9];
  950. xc_blk_size = ((u32)buf[sys_info_addr + 32] << 24) |
  951. ((u32)buf[sys_info_addr + 33] << 16) |
  952. ((u32)buf[sys_info_addr + 34] << 8) |
  953. buf[sys_info_addr + 35];
  954. dev_dbg(rtsx_dev(chip), "xc_total_blk = 0x%x, xc_blk_size = 0x%x\n",
  955. xc_total_blk, xc_blk_size);
  956. } else {
  957. total_blk = ((u16)buf[sys_info_addr + 6] << 8) |
  958. buf[sys_info_addr + 7];
  959. blk_size = ((u16)buf[sys_info_addr + 2] << 8) |
  960. buf[sys_info_addr + 3];
  961. dev_dbg(rtsx_dev(chip), "total_blk = 0x%x, blk_size = 0x%x\n",
  962. total_blk, blk_size);
  963. }
  964. #else
  965. total_blk = ((u16)buf[sys_info_addr + 6] << 8) | buf[sys_info_addr + 7];
  966. blk_size = ((u16)buf[sys_info_addr + 2] << 8) | buf[sys_info_addr + 3];
  967. dev_dbg(rtsx_dev(chip), "total_blk = 0x%x, blk_size = 0x%x\n",
  968. total_blk, blk_size);
  969. #endif
  970. dev_dbg(rtsx_dev(chip), "class_code = 0x%x, device_type = 0x%x, sub_class = 0x%x\n",
  971. class_code, device_type, sub_class);
  972. memcpy(ms_card->raw_sys_info, buf + sys_info_addr, 96);
  973. #ifdef SUPPORT_PCGL_1P18
  974. memcpy(ms_card->raw_model_name, buf + model_name_addr, 48);
  975. #endif
  976. kfree(buf);
  977. #ifdef SUPPORT_MSXC
  978. if (CHK_MSXC(ms_card)) {
  979. if (class_code != 0x03) {
  980. return STATUS_FAIL;
  981. }
  982. } else {
  983. if (class_code != 0x02) {
  984. return STATUS_FAIL;
  985. }
  986. }
  987. #else
  988. if (class_code != 0x02) {
  989. return STATUS_FAIL;
  990. }
  991. #endif
  992. if (device_type != 0x00) {
  993. if ((device_type == 0x01) || (device_type == 0x02) ||
  994. (device_type == 0x03)) {
  995. chip->card_wp |= MS_CARD;
  996. } else {
  997. return STATUS_FAIL;
  998. }
  999. }
  1000. if (sub_class & 0xC0) {
  1001. return STATUS_FAIL;
  1002. }
  1003. dev_dbg(rtsx_dev(chip), "class_code: 0x%x, device_type: 0x%x, sub_class: 0x%x\n",
  1004. class_code, device_type, sub_class);
  1005. #ifdef SUPPORT_MSXC
  1006. if (CHK_MSXC(ms_card)) {
  1007. chip->capacity[chip->card2lun[MS_CARD]] =
  1008. ms_card->capacity = xc_total_blk * xc_blk_size;
  1009. } else {
  1010. chip->capacity[chip->card2lun[MS_CARD]] =
  1011. ms_card->capacity = total_blk * blk_size;
  1012. }
  1013. #else
  1014. ms_card->capacity = total_blk * blk_size;
  1015. chip->capacity[chip->card2lun[MS_CARD]] = ms_card->capacity;
  1016. #endif
  1017. return STATUS_SUCCESS;
  1018. }
  1019. #ifdef SUPPORT_MAGIC_GATE
  1020. static int mg_set_tpc_para_sub(struct rtsx_chip *chip,
  1021. int type, u8 mg_entry_num);
  1022. #endif
  1023. static int reset_ms_pro(struct rtsx_chip *chip)
  1024. {
  1025. struct ms_info *ms_card = &chip->ms_card;
  1026. int retval;
  1027. #ifdef XC_POWERCLASS
  1028. u8 change_power_class;
  1029. if (chip->ms_power_class_en & 0x02)
  1030. change_power_class = 2;
  1031. else if (chip->ms_power_class_en & 0x01)
  1032. change_power_class = 1;
  1033. else
  1034. change_power_class = 0;
  1035. #endif
  1036. #ifdef XC_POWERCLASS
  1037. retry:
  1038. #endif
  1039. retval = ms_pro_reset_flow(chip, 1);
  1040. if (retval != STATUS_SUCCESS) {
  1041. if (ms_card->switch_8bit_fail) {
  1042. retval = ms_pro_reset_flow(chip, 0);
  1043. if (retval != STATUS_SUCCESS) {
  1044. return STATUS_FAIL;
  1045. }
  1046. } else {
  1047. return STATUS_FAIL;
  1048. }
  1049. }
  1050. retval = ms_read_attribute_info(chip);
  1051. if (retval != STATUS_SUCCESS) {
  1052. return STATUS_FAIL;
  1053. }
  1054. #ifdef XC_POWERCLASS
  1055. if (CHK_HG8BIT(ms_card))
  1056. change_power_class = 0;
  1057. if (change_power_class && CHK_MSXC(ms_card)) {
  1058. u8 power_class_en = chip->ms_power_class_en;
  1059. dev_dbg(rtsx_dev(chip), "power_class_en = 0x%x\n",
  1060. power_class_en);
  1061. dev_dbg(rtsx_dev(chip), "change_power_class = %d\n",
  1062. change_power_class);
  1063. if (change_power_class)
  1064. power_class_en &= (1 << (change_power_class - 1));
  1065. else
  1066. power_class_en = 0;
  1067. if (power_class_en) {
  1068. u8 power_class_mode =
  1069. (ms_card->raw_sys_info[46] & 0x18) >> 3;
  1070. dev_dbg(rtsx_dev(chip), "power_class_mode = 0x%x",
  1071. power_class_mode);
  1072. if (change_power_class > power_class_mode)
  1073. change_power_class = power_class_mode;
  1074. if (change_power_class) {
  1075. retval = msxc_change_power(chip,
  1076. change_power_class);
  1077. if (retval != STATUS_SUCCESS) {
  1078. change_power_class--;
  1079. goto retry;
  1080. }
  1081. }
  1082. }
  1083. }
  1084. #endif
  1085. #ifdef SUPPORT_MAGIC_GATE
  1086. retval = mg_set_tpc_para_sub(chip, 0, 0);
  1087. if (retval != STATUS_SUCCESS) {
  1088. return STATUS_FAIL;
  1089. }
  1090. #endif
  1091. if (CHK_HG8BIT(ms_card))
  1092. chip->card_bus_width[chip->card2lun[MS_CARD]] = 8;
  1093. else
  1094. chip->card_bus_width[chip->card2lun[MS_CARD]] = 4;
  1095. return STATUS_SUCCESS;
  1096. }
  1097. static int ms_read_status_reg(struct rtsx_chip *chip)
  1098. {
  1099. int retval;
  1100. u8 val[2];
  1101. retval = ms_set_rw_reg_addr(chip, StatusReg0, 2, 0, 0);
  1102. if (retval != STATUS_SUCCESS) {
  1103. return STATUS_FAIL;
  1104. }
  1105. retval = ms_read_bytes(chip, READ_REG, 2, NO_WAIT_INT, val, 2);
  1106. if (retval != STATUS_SUCCESS) {
  1107. return STATUS_FAIL;
  1108. }
  1109. if (val[1] & (STS_UCDT | STS_UCEX | STS_UCFG)) {
  1110. ms_set_err_code(chip, MS_FLASH_READ_ERROR);
  1111. return STATUS_FAIL;
  1112. }
  1113. return STATUS_SUCCESS;
  1114. }
  1115. static int ms_read_extra_data(struct rtsx_chip *chip,
  1116. u16 block_addr, u8 page_num, u8 *buf, int buf_len)
  1117. {
  1118. struct ms_info *ms_card = &chip->ms_card;
  1119. int retval, i;
  1120. u8 val, data[10];
  1121. retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE,
  1122. SystemParm, 6);
  1123. if (retval != STATUS_SUCCESS) {
  1124. return STATUS_FAIL;
  1125. }
  1126. if (CHK_MS4BIT(ms_card)) {
  1127. /* Parallel interface */
  1128. data[0] = 0x88;
  1129. } else {
  1130. /* Serial interface */
  1131. data[0] = 0x80;
  1132. }
  1133. data[1] = 0;
  1134. data[2] = (u8)(block_addr >> 8);
  1135. data[3] = (u8)block_addr;
  1136. data[4] = 0x40;
  1137. data[5] = page_num;
  1138. for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
  1139. retval = ms_write_bytes(chip, WRITE_REG, 6, NO_WAIT_INT,
  1140. data, 6);
  1141. if (retval == STATUS_SUCCESS)
  1142. break;
  1143. }
  1144. if (i == MS_MAX_RETRY_COUNT) {
  1145. return STATUS_FAIL;
  1146. }
  1147. ms_set_err_code(chip, MS_NO_ERROR);
  1148. for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
  1149. retval = ms_send_cmd(chip, BLOCK_READ, WAIT_INT);
  1150. if (retval == STATUS_SUCCESS)
  1151. break;
  1152. }
  1153. if (i == MS_MAX_RETRY_COUNT) {
  1154. return STATUS_FAIL;
  1155. }
  1156. ms_set_err_code(chip, MS_NO_ERROR);
  1157. retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
  1158. if (retval != STATUS_SUCCESS) {
  1159. return STATUS_FAIL;
  1160. }
  1161. if (val & INT_REG_CMDNK) {
  1162. ms_set_err_code(chip, MS_CMD_NK);
  1163. return STATUS_FAIL;
  1164. }
  1165. if (val & INT_REG_CED) {
  1166. if (val & INT_REG_ERR) {
  1167. retval = ms_read_status_reg(chip);
  1168. if (retval != STATUS_SUCCESS) {
  1169. return STATUS_FAIL;
  1170. }
  1171. retval = ms_set_rw_reg_addr(chip, OverwriteFlag,
  1172. MS_EXTRA_SIZE, SystemParm,
  1173. 6);
  1174. if (retval != STATUS_SUCCESS) {
  1175. return STATUS_FAIL;
  1176. }
  1177. }
  1178. }
  1179. retval = ms_read_bytes(chip, READ_REG, MS_EXTRA_SIZE, NO_WAIT_INT,
  1180. data, MS_EXTRA_SIZE);
  1181. if (retval != STATUS_SUCCESS) {
  1182. return STATUS_FAIL;
  1183. }
  1184. if (buf && buf_len) {
  1185. if (buf_len > MS_EXTRA_SIZE)
  1186. buf_len = MS_EXTRA_SIZE;
  1187. memcpy(buf, data, buf_len);
  1188. }
  1189. return STATUS_SUCCESS;
  1190. }
  1191. static int ms_write_extra_data(struct rtsx_chip *chip, u16 block_addr,
  1192. u8 page_num, u8 *buf, int buf_len)
  1193. {
  1194. struct ms_info *ms_card = &chip->ms_card;
  1195. int retval, i;
  1196. u8 val, data[16];
  1197. if (!buf || (buf_len < MS_EXTRA_SIZE)) {
  1198. return STATUS_FAIL;
  1199. }
  1200. retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE,
  1201. SystemParm, 6 + MS_EXTRA_SIZE);
  1202. if (retval != STATUS_SUCCESS) {
  1203. return STATUS_FAIL;
  1204. }
  1205. if (CHK_MS4BIT(ms_card))
  1206. data[0] = 0x88;
  1207. else
  1208. data[0] = 0x80;
  1209. data[1] = 0;
  1210. data[2] = (u8)(block_addr >> 8);
  1211. data[3] = (u8)block_addr;
  1212. data[4] = 0x40;
  1213. data[5] = page_num;
  1214. for (i = 6; i < MS_EXTRA_SIZE + 6; i++)
  1215. data[i] = buf[i - 6];
  1216. retval = ms_write_bytes(chip, WRITE_REG, (6 + MS_EXTRA_SIZE),
  1217. NO_WAIT_INT, data, 16);
  1218. if (retval != STATUS_SUCCESS) {
  1219. return STATUS_FAIL;
  1220. }
  1221. retval = ms_send_cmd(chip, BLOCK_WRITE, WAIT_INT);
  1222. if (retval != STATUS_SUCCESS) {
  1223. return STATUS_FAIL;
  1224. }
  1225. ms_set_err_code(chip, MS_NO_ERROR);
  1226. retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
  1227. if (retval != STATUS_SUCCESS) {
  1228. return STATUS_FAIL;
  1229. }
  1230. if (val & INT_REG_CMDNK) {
  1231. ms_set_err_code(chip, MS_CMD_NK);
  1232. return STATUS_FAIL;
  1233. }
  1234. if (val & INT_REG_CED) {
  1235. if (val & INT_REG_ERR) {
  1236. ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
  1237. return STATUS_FAIL;
  1238. }
  1239. }
  1240. return STATUS_SUCCESS;
  1241. }
  1242. static int ms_read_page(struct rtsx_chip *chip, u16 block_addr, u8 page_num)
  1243. {
  1244. struct ms_info *ms_card = &chip->ms_card;
  1245. int retval;
  1246. u8 val, data[6];
  1247. retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE,
  1248. SystemParm, 6);
  1249. if (retval != STATUS_SUCCESS) {
  1250. return STATUS_FAIL;
  1251. }
  1252. if (CHK_MS4BIT(ms_card))
  1253. data[0] = 0x88;
  1254. else
  1255. data[0] = 0x80;
  1256. data[1] = 0;
  1257. data[2] = (u8)(block_addr >> 8);
  1258. data[3] = (u8)block_addr;
  1259. data[4] = 0x20;
  1260. data[5] = page_num;
  1261. retval = ms_write_bytes(chip, WRITE_REG, 6, NO_WAIT_INT, data, 6);
  1262. if (retval != STATUS_SUCCESS) {
  1263. return STATUS_FAIL;
  1264. }
  1265. retval = ms_send_cmd(chip, BLOCK_READ, WAIT_INT);
  1266. if (retval != STATUS_SUCCESS) {
  1267. return STATUS_FAIL;
  1268. }
  1269. ms_set_err_code(chip, MS_NO_ERROR);
  1270. retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
  1271. if (retval != STATUS_SUCCESS) {
  1272. return STATUS_FAIL;
  1273. }
  1274. if (val & INT_REG_CMDNK) {
  1275. ms_set_err_code(chip, MS_CMD_NK);
  1276. return STATUS_FAIL;
  1277. }
  1278. if (val & INT_REG_CED) {
  1279. if (val & INT_REG_ERR) {
  1280. if (!(val & INT_REG_BREQ)) {
  1281. ms_set_err_code(chip, MS_FLASH_READ_ERROR);
  1282. return STATUS_FAIL;
  1283. }
  1284. retval = ms_read_status_reg(chip);
  1285. if (retval != STATUS_SUCCESS)
  1286. ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
  1287. } else {
  1288. if (!(val & INT_REG_BREQ)) {
  1289. ms_set_err_code(chip, MS_BREQ_ERROR);
  1290. return STATUS_FAIL;
  1291. }
  1292. }
  1293. }
  1294. retval = ms_transfer_tpc(chip, MS_TM_NORMAL_READ, READ_PAGE_DATA,
  1295. 0, NO_WAIT_INT);
  1296. if (retval != STATUS_SUCCESS) {
  1297. return STATUS_FAIL;
  1298. }
  1299. if (ms_check_err_code(chip, MS_FLASH_WRITE_ERROR)) {
  1300. return STATUS_FAIL;
  1301. }
  1302. return STATUS_SUCCESS;
  1303. }
  1304. static int ms_set_bad_block(struct rtsx_chip *chip, u16 phy_blk)
  1305. {
  1306. struct ms_info *ms_card = &chip->ms_card;
  1307. int retval;
  1308. u8 val, data[8], extra[MS_EXTRA_SIZE];
  1309. retval = ms_read_extra_data(chip, phy_blk, 0, extra, MS_EXTRA_SIZE);
  1310. if (retval != STATUS_SUCCESS) {
  1311. return STATUS_FAIL;
  1312. }
  1313. retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE,
  1314. SystemParm, 7);
  1315. if (retval != STATUS_SUCCESS) {
  1316. return STATUS_FAIL;
  1317. }
  1318. ms_set_err_code(chip, MS_NO_ERROR);
  1319. if (CHK_MS4BIT(ms_card))
  1320. data[0] = 0x88;
  1321. else
  1322. data[0] = 0x80;
  1323. data[1] = 0;
  1324. data[2] = (u8)(phy_blk >> 8);
  1325. data[3] = (u8)phy_blk;
  1326. data[4] = 0x80;
  1327. data[5] = 0;
  1328. data[6] = extra[0] & 0x7F;
  1329. data[7] = 0xFF;
  1330. retval = ms_write_bytes(chip, WRITE_REG, 7, NO_WAIT_INT, data, 7);
  1331. if (retval != STATUS_SUCCESS) {
  1332. return STATUS_FAIL;
  1333. }
  1334. retval = ms_send_cmd(chip, BLOCK_WRITE, WAIT_INT);
  1335. if (retval != STATUS_SUCCESS) {
  1336. return STATUS_FAIL;
  1337. }
  1338. ms_set_err_code(chip, MS_NO_ERROR);
  1339. retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
  1340. if (retval != STATUS_SUCCESS) {
  1341. return STATUS_FAIL;
  1342. }
  1343. if (val & INT_REG_CMDNK) {
  1344. ms_set_err_code(chip, MS_CMD_NK);
  1345. return STATUS_FAIL;
  1346. }
  1347. if (val & INT_REG_CED) {
  1348. if (val & INT_REG_ERR) {
  1349. ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
  1350. return STATUS_FAIL;
  1351. }
  1352. }
  1353. return STATUS_SUCCESS;
  1354. }
  1355. static int ms_erase_block(struct rtsx_chip *chip, u16 phy_blk)
  1356. {
  1357. struct ms_info *ms_card = &chip->ms_card;
  1358. int retval, i = 0;
  1359. u8 val, data[6];
  1360. retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE,
  1361. SystemParm, 6);
  1362. if (retval != STATUS_SUCCESS) {
  1363. return STATUS_FAIL;
  1364. }
  1365. ms_set_err_code(chip, MS_NO_ERROR);
  1366. if (CHK_MS4BIT(ms_card))
  1367. data[0] = 0x88;
  1368. else
  1369. data[0] = 0x80;
  1370. data[1] = 0;
  1371. data[2] = (u8)(phy_blk >> 8);
  1372. data[3] = (u8)phy_blk;
  1373. data[4] = 0;
  1374. data[5] = 0;
  1375. retval = ms_write_bytes(chip, WRITE_REG, 6, NO_WAIT_INT, data, 6);
  1376. if (retval != STATUS_SUCCESS) {
  1377. return STATUS_FAIL;
  1378. }
  1379. ERASE_RTY:
  1380. retval = ms_send_cmd(chip, BLOCK_ERASE, WAIT_INT);
  1381. if (retval != STATUS_SUCCESS) {
  1382. return STATUS_FAIL;
  1383. }
  1384. ms_set_err_code(chip, MS_NO_ERROR);
  1385. retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
  1386. if (retval != STATUS_SUCCESS) {
  1387. return STATUS_FAIL;
  1388. }
  1389. if (val & INT_REG_CMDNK) {
  1390. if (i < 3) {
  1391. i++;
  1392. goto ERASE_RTY;
  1393. }
  1394. ms_set_err_code(chip, MS_CMD_NK);
  1395. ms_set_bad_block(chip, phy_blk);
  1396. return STATUS_FAIL;
  1397. }
  1398. if (val & INT_REG_CED) {
  1399. if (val & INT_REG_ERR) {
  1400. ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
  1401. return STATUS_FAIL;
  1402. }
  1403. }
  1404. return STATUS_SUCCESS;
  1405. }
  1406. static void ms_set_page_status(u16 log_blk, u8 type, u8 *extra, int extra_len)
  1407. {
  1408. if (!extra || (extra_len < MS_EXTRA_SIZE))
  1409. return;
  1410. memset(extra, 0xFF, MS_EXTRA_SIZE);
  1411. if (type == setPS_NG) {
  1412. /* set page status as 1:NG,and block status keep 1:OK */
  1413. extra[0] = 0xB8;
  1414. } else {
  1415. /* set page status as 0:Data Error,and block status keep 1:OK */
  1416. extra[0] = 0x98;
  1417. }
  1418. extra[2] = (u8)(log_blk >> 8);
  1419. extra[3] = (u8)log_blk;
  1420. }
  1421. static int ms_init_page(struct rtsx_chip *chip, u16 phy_blk, u16 log_blk,
  1422. u8 start_page, u8 end_page)
  1423. {
  1424. int retval;
  1425. u8 extra[MS_EXTRA_SIZE], i;
  1426. memset(extra, 0xff, MS_EXTRA_SIZE);
  1427. extra[0] = 0xf8; /* Block, page OK, data erased */
  1428. extra[1] = 0xff;
  1429. extra[2] = (u8)(log_blk >> 8);
  1430. extra[3] = (u8)log_blk;
  1431. for (i = start_page; i < end_page; i++) {
  1432. if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
  1433. ms_set_err_code(chip, MS_NO_CARD);
  1434. return STATUS_FAIL;
  1435. }
  1436. retval = ms_write_extra_data(chip, phy_blk, i,
  1437. extra, MS_EXTRA_SIZE);
  1438. if (retval != STATUS_SUCCESS) {
  1439. return STATUS_FAIL;
  1440. }
  1441. }
  1442. return STATUS_SUCCESS;
  1443. }
  1444. static int ms_copy_page(struct rtsx_chip *chip, u16 old_blk, u16 new_blk,
  1445. u16 log_blk, u8 start_page, u8 end_page)
  1446. {
  1447. struct ms_info *ms_card = &chip->ms_card;
  1448. bool uncorrect_flag = false;
  1449. int retval, rty_cnt;
  1450. u8 extra[MS_EXTRA_SIZE], val, i, j, data[16];
  1451. dev_dbg(rtsx_dev(chip), "Copy page from 0x%x to 0x%x, logical block is 0x%x\n",
  1452. old_blk, new_blk, log_blk);
  1453. dev_dbg(rtsx_dev(chip), "start_page = %d, end_page = %d\n",
  1454. start_page, end_page);
  1455. retval = ms_read_extra_data(chip, new_blk, 0, extra, MS_EXTRA_SIZE);
  1456. if (retval != STATUS_SUCCESS) {
  1457. return STATUS_FAIL;
  1458. }
  1459. retval = ms_read_status_reg(chip);
  1460. if (retval != STATUS_SUCCESS) {
  1461. return STATUS_FAIL;
  1462. }
  1463. retval = rtsx_read_register(chip, PPBUF_BASE2, &val);
  1464. if (retval) {
  1465. return retval;
  1466. }
  1467. if (val & BUF_FULL) {
  1468. retval = ms_send_cmd(chip, CLEAR_BUF, WAIT_INT);
  1469. if (retval != STATUS_SUCCESS) {
  1470. return STATUS_FAIL;
  1471. }
  1472. retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
  1473. if (retval != STATUS_SUCCESS) {
  1474. return STATUS_FAIL;
  1475. }
  1476. if (!(val & INT_REG_CED)) {
  1477. ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
  1478. return STATUS_FAIL;
  1479. }
  1480. }
  1481. for (i = start_page; i < end_page; i++) {
  1482. if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
  1483. ms_set_err_code(chip, MS_NO_CARD);
  1484. return STATUS_FAIL;
  1485. }
  1486. ms_read_extra_data(chip, old_blk, i, extra, MS_EXTRA_SIZE);
  1487. retval = ms_set_rw_reg_addr(chip, OverwriteFlag,
  1488. MS_EXTRA_SIZE, SystemParm, 6);
  1489. if (retval != STATUS_SUCCESS) {
  1490. return STATUS_FAIL;
  1491. }
  1492. ms_set_err_code(chip, MS_NO_ERROR);
  1493. if (CHK_MS4BIT(ms_card))
  1494. data[0] = 0x88;
  1495. else
  1496. data[0] = 0x80;
  1497. data[1] = 0;
  1498. data[2] = (u8)(old_blk >> 8);
  1499. data[3] = (u8)old_blk;
  1500. data[4] = 0x20;
  1501. data[5] = i;
  1502. retval = ms_write_bytes(chip, WRITE_REG, 6, NO_WAIT_INT,
  1503. data, 6);
  1504. if (retval != STATUS_SUCCESS) {
  1505. return STATUS_FAIL;
  1506. }
  1507. retval = ms_send_cmd(chip, BLOCK_READ, WAIT_INT);
  1508. if (retval != STATUS_SUCCESS) {
  1509. return STATUS_FAIL;
  1510. }
  1511. ms_set_err_code(chip, MS_NO_ERROR);
  1512. retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
  1513. if (retval != STATUS_SUCCESS) {
  1514. return STATUS_FAIL;
  1515. }
  1516. if (val & INT_REG_CMDNK) {
  1517. ms_set_err_code(chip, MS_CMD_NK);
  1518. return STATUS_FAIL;
  1519. }
  1520. if (val & INT_REG_CED) {
  1521. if (val & INT_REG_ERR) {
  1522. retval = ms_read_status_reg(chip);
  1523. if (retval != STATUS_SUCCESS) {
  1524. uncorrect_flag = true;
  1525. dev_dbg(rtsx_dev(chip), "Uncorrectable error\n");
  1526. } else {
  1527. uncorrect_flag = false;
  1528. }
  1529. retval = ms_transfer_tpc(chip,
  1530. MS_TM_NORMAL_READ,
  1531. READ_PAGE_DATA,
  1532. 0, NO_WAIT_INT);
  1533. if (retval != STATUS_SUCCESS) {
  1534. return STATUS_FAIL;
  1535. }
  1536. if (uncorrect_flag) {
  1537. ms_set_page_status(log_blk, setPS_NG,
  1538. extra,
  1539. MS_EXTRA_SIZE);
  1540. if (i == 0)
  1541. extra[0] &= 0xEF;
  1542. ms_write_extra_data(chip, old_blk, i,
  1543. extra,
  1544. MS_EXTRA_SIZE);
  1545. dev_dbg(rtsx_dev(chip), "page %d : extra[0] = 0x%x\n",
  1546. i, extra[0]);
  1547. MS_SET_BAD_BLOCK_FLG(ms_card);
  1548. ms_set_page_status(log_blk, setPS_Error,
  1549. extra,
  1550. MS_EXTRA_SIZE);
  1551. ms_write_extra_data(chip, new_blk, i,
  1552. extra,
  1553. MS_EXTRA_SIZE);
  1554. continue;
  1555. }
  1556. for (rty_cnt = 0; rty_cnt < MS_MAX_RETRY_COUNT;
  1557. rty_cnt++) {
  1558. retval = ms_transfer_tpc(
  1559. chip,
  1560. MS_TM_NORMAL_WRITE,
  1561. WRITE_PAGE_DATA,
  1562. 0, NO_WAIT_INT);
  1563. if (retval == STATUS_SUCCESS)
  1564. break;
  1565. }
  1566. if (rty_cnt == MS_MAX_RETRY_COUNT) {
  1567. return STATUS_FAIL;
  1568. }
  1569. }
  1570. if (!(val & INT_REG_BREQ)) {
  1571. ms_set_err_code(chip, MS_BREQ_ERROR);
  1572. return STATUS_FAIL;
  1573. }
  1574. }
  1575. retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE,
  1576. SystemParm, (6 + MS_EXTRA_SIZE));
  1577. ms_set_err_code(chip, MS_NO_ERROR);
  1578. if (CHK_MS4BIT(ms_card))
  1579. data[0] = 0x88;
  1580. else
  1581. data[0] = 0x80;
  1582. data[1] = 0;
  1583. data[2] = (u8)(new_blk >> 8);
  1584. data[3] = (u8)new_blk;
  1585. data[4] = 0x20;
  1586. data[5] = i;
  1587. if ((extra[0] & 0x60) != 0x60)
  1588. data[6] = extra[0];
  1589. else
  1590. data[6] = 0xF8;
  1591. data[6 + 1] = 0xFF;
  1592. data[6 + 2] = (u8)(log_blk >> 8);
  1593. data[6 + 3] = (u8)log_blk;
  1594. for (j = 4; j <= MS_EXTRA_SIZE; j++)
  1595. data[6 + j] = 0xFF;
  1596. retval = ms_write_bytes(chip, WRITE_REG, (6 + MS_EXTRA_SIZE),
  1597. NO_WAIT_INT, data, 16);
  1598. if (retval != STATUS_SUCCESS) {
  1599. return STATUS_FAIL;
  1600. }
  1601. retval = ms_send_cmd(chip, BLOCK_WRITE, WAIT_INT);
  1602. if (retval != STATUS_SUCCESS) {
  1603. return STATUS_FAIL;
  1604. }
  1605. ms_set_err_code(chip, MS_NO_ERROR);
  1606. retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
  1607. if (retval != STATUS_SUCCESS) {
  1608. return STATUS_FAIL;
  1609. }
  1610. if (val & INT_REG_CMDNK) {
  1611. ms_set_err_code(chip, MS_CMD_NK);
  1612. return STATUS_FAIL;
  1613. }
  1614. if (val & INT_REG_CED) {
  1615. if (val & INT_REG_ERR) {
  1616. ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
  1617. return STATUS_FAIL;
  1618. }
  1619. }
  1620. if (i == 0) {
  1621. retval = ms_set_rw_reg_addr(chip, OverwriteFlag,
  1622. MS_EXTRA_SIZE, SystemParm,
  1623. 7);
  1624. if (retval != STATUS_SUCCESS) {
  1625. return STATUS_FAIL;
  1626. }
  1627. ms_set_err_code(chip, MS_NO_ERROR);
  1628. if (CHK_MS4BIT(ms_card))
  1629. data[0] = 0x88;
  1630. else
  1631. data[0] = 0x80;
  1632. data[1] = 0;
  1633. data[2] = (u8)(old_blk >> 8);
  1634. data[3] = (u8)old_blk;
  1635. data[4] = 0x80;
  1636. data[5] = 0;
  1637. data[6] = 0xEF;
  1638. data[7] = 0xFF;
  1639. retval = ms_write_bytes(chip, WRITE_REG, 7,
  1640. NO_WAIT_INT, data, 8);
  1641. if (retval != STATUS_SUCCESS) {
  1642. return STATUS_FAIL;
  1643. }
  1644. retval = ms_send_cmd(chip, BLOCK_WRITE, WAIT_INT);
  1645. if (retval != STATUS_SUCCESS) {
  1646. return STATUS_FAIL;
  1647. }
  1648. ms_set_err_code(chip, MS_NO_ERROR);
  1649. retval = ms_read_bytes(chip, GET_INT, 1,
  1650. NO_WAIT_INT, &val, 1);
  1651. if (retval != STATUS_SUCCESS) {
  1652. return STATUS_FAIL;
  1653. }
  1654. if (val & INT_REG_CMDNK) {
  1655. ms_set_err_code(chip, MS_CMD_NK);
  1656. return STATUS_FAIL;
  1657. }
  1658. if (val & INT_REG_CED) {
  1659. if (val & INT_REG_ERR) {
  1660. ms_set_err_code(chip,
  1661. MS_FLASH_WRITE_ERROR);
  1662. return STATUS_FAIL;
  1663. }
  1664. }
  1665. }
  1666. }
  1667. return STATUS_SUCCESS;
  1668. }
  1669. static int reset_ms(struct rtsx_chip *chip)
  1670. {
  1671. struct ms_info *ms_card = &chip->ms_card;
  1672. int retval;
  1673. u16 i, reg_addr, block_size;
  1674. u8 val, extra[MS_EXTRA_SIZE], j, *ptr;
  1675. #ifndef SUPPORT_MAGIC_GATE
  1676. u16 eblock_cnt;
  1677. #endif
  1678. retval = ms_prepare_reset(chip);
  1679. if (retval != STATUS_SUCCESS) {
  1680. return STATUS_FAIL;
  1681. }
  1682. ms_card->ms_type |= TYPE_MS;
  1683. retval = ms_send_cmd(chip, MS_RESET, NO_WAIT_INT);
  1684. if (retval != STATUS_SUCCESS) {
  1685. return STATUS_FAIL;
  1686. }
  1687. retval = ms_read_status_reg(chip);
  1688. if (retval != STATUS_SUCCESS) {
  1689. return STATUS_FAIL;
  1690. }
  1691. retval = rtsx_read_register(chip, PPBUF_BASE2, &val);
  1692. if (retval) {
  1693. return retval;
  1694. }
  1695. if (val & WRT_PRTCT)
  1696. chip->card_wp |= MS_CARD;
  1697. else
  1698. chip->card_wp &= ~MS_CARD;
  1699. i = 0;
  1700. RE_SEARCH:
  1701. /* Search Boot Block */
  1702. while (i < (MAX_DEFECTIVE_BLOCK + 2)) {
  1703. if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
  1704. ms_set_err_code(chip, MS_NO_CARD);
  1705. return STATUS_FAIL;
  1706. }
  1707. retval = ms_read_extra_data(chip, i, 0, extra, MS_EXTRA_SIZE);
  1708. if (retval != STATUS_SUCCESS) {
  1709. i++;
  1710. continue;
  1711. }
  1712. if (extra[0] & BLOCK_OK) {
  1713. if (!(extra[1] & NOT_BOOT_BLOCK)) {
  1714. ms_card->boot_block = i;
  1715. break;
  1716. }
  1717. }
  1718. i++;
  1719. }
  1720. if (i == (MAX_DEFECTIVE_BLOCK + 2)) {
  1721. dev_dbg(rtsx_dev(chip), "No boot block found!");
  1722. return STATUS_FAIL;
  1723. }
  1724. for (j = 0; j < 3; j++) {
  1725. retval = ms_read_page(chip, ms_card->boot_block, j);
  1726. if (retval != STATUS_SUCCESS) {
  1727. if (ms_check_err_code(chip, MS_FLASH_WRITE_ERROR)) {
  1728. i = ms_card->boot_block + 1;
  1729. ms_set_err_code(chip, MS_NO_ERROR);
  1730. goto RE_SEARCH;
  1731. }
  1732. }
  1733. }
  1734. retval = ms_read_page(chip, ms_card->boot_block, 0);
  1735. if (retval != STATUS_SUCCESS) {
  1736. return STATUS_FAIL;
  1737. }
  1738. /* Read MS system information as sys_info */
  1739. rtsx_init_cmd(chip);
  1740. for (i = 0; i < 96; i++)
  1741. rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + 0x1A0 + i, 0, 0);
  1742. retval = rtsx_send_cmd(chip, MS_CARD, 100);
  1743. if (retval < 0) {
  1744. return STATUS_FAIL;
  1745. }
  1746. ptr = rtsx_get_cmd_data(chip);
  1747. memcpy(ms_card->raw_sys_info, ptr, 96);
  1748. /* Read useful block contents */
  1749. rtsx_init_cmd(chip);
  1750. rtsx_add_cmd(chip, READ_REG_CMD, HEADER_ID0, 0, 0);
  1751. rtsx_add_cmd(chip, READ_REG_CMD, HEADER_ID1, 0, 0);
  1752. for (reg_addr = DISABLED_BLOCK0; reg_addr <= DISABLED_BLOCK3;
  1753. reg_addr++)
  1754. rtsx_add_cmd(chip, READ_REG_CMD, reg_addr, 0, 0);
  1755. for (reg_addr = BLOCK_SIZE_0; reg_addr <= PAGE_SIZE_1; reg_addr++)
  1756. rtsx_add_cmd(chip, READ_REG_CMD, reg_addr, 0, 0);
  1757. rtsx_add_cmd(chip, READ_REG_CMD, MS_Device_Type, 0, 0);
  1758. rtsx_add_cmd(chip, READ_REG_CMD, MS_4bit_Support, 0, 0);
  1759. retval = rtsx_send_cmd(chip, MS_CARD, 100);
  1760. if (retval < 0) {
  1761. return STATUS_FAIL;
  1762. }
  1763. ptr = rtsx_get_cmd_data(chip);
  1764. dev_dbg(rtsx_dev(chip), "Boot block data:\n");
  1765. dev_dbg(rtsx_dev(chip), "%*ph\n", 16, ptr);
  1766. /* Block ID error
  1767. * HEADER_ID0, HEADER_ID1
  1768. */
  1769. if (ptr[0] != 0x00 || ptr[1] != 0x01) {
  1770. i = ms_card->boot_block + 1;
  1771. goto RE_SEARCH;
  1772. }
  1773. /* Page size error
  1774. * PAGE_SIZE_0, PAGE_SIZE_1
  1775. */
  1776. if (ptr[12] != 0x02 || ptr[13] != 0x00) {
  1777. i = ms_card->boot_block + 1;
  1778. goto RE_SEARCH;
  1779. }
  1780. if ((ptr[14] == 1) || (ptr[14] == 3))
  1781. chip->card_wp |= MS_CARD;
  1782. /* BLOCK_SIZE_0, BLOCK_SIZE_1 */
  1783. block_size = ((u16)ptr[6] << 8) | ptr[7];
  1784. if (block_size == 0x0010) {
  1785. /* Block size 16KB */
  1786. ms_card->block_shift = 5;
  1787. ms_card->page_off = 0x1F;
  1788. } else if (block_size == 0x0008) {
  1789. /* Block size 8KB */
  1790. ms_card->block_shift = 4;
  1791. ms_card->page_off = 0x0F;
  1792. }
  1793. /* BLOCK_COUNT_0, BLOCK_COUNT_1 */
  1794. ms_card->total_block = ((u16)ptr[8] << 8) | ptr[9];
  1795. #ifdef SUPPORT_MAGIC_GATE
  1796. j = ptr[10];
  1797. if (ms_card->block_shift == 4) { /* 4MB or 8MB */
  1798. if (j < 2) { /* Effective block for 4MB: 0x1F0 */
  1799. ms_card->capacity = 0x1EE0;
  1800. } else { /* Effective block for 8MB: 0x3E0 */
  1801. ms_card->capacity = 0x3DE0;
  1802. }
  1803. } else { /* 16MB, 32MB, 64MB or 128MB */
  1804. if (j < 5) { /* Effective block for 16MB: 0x3E0 */
  1805. ms_card->capacity = 0x7BC0;
  1806. } else if (j < 0xA) { /* Effective block for 32MB: 0x7C0 */
  1807. ms_card->capacity = 0xF7C0;
  1808. } else if (j < 0x11) { /* Effective block for 64MB: 0xF80 */
  1809. ms_card->capacity = 0x1EF80;
  1810. } else { /* Effective block for 128MB: 0x1F00 */
  1811. ms_card->capacity = 0x3DF00;
  1812. }
  1813. }
  1814. #else
  1815. /* EBLOCK_COUNT_0, EBLOCK_COUNT_1 */
  1816. eblock_cnt = ((u16)ptr[10] << 8) | ptr[11];
  1817. ms_card->capacity = ((u32)eblock_cnt - 2) << ms_card->block_shift;
  1818. #endif
  1819. chip->capacity[chip->card2lun[MS_CARD]] = ms_card->capacity;
  1820. /* Switch I/F Mode */
  1821. if (ptr[15]) {
  1822. retval = ms_set_rw_reg_addr(chip, 0, 0, SystemParm, 1);
  1823. if (retval != STATUS_SUCCESS) {
  1824. return STATUS_FAIL;
  1825. }
  1826. retval = rtsx_write_register(chip, PPBUF_BASE2, 0xFF, 0x88);
  1827. if (retval) {
  1828. return retval;
  1829. }
  1830. retval = rtsx_write_register(chip, PPBUF_BASE2 + 1, 0xFF, 0);
  1831. if (retval) {
  1832. return retval;
  1833. }
  1834. retval = ms_transfer_tpc(chip, MS_TM_WRITE_BYTES, WRITE_REG, 1,
  1835. NO_WAIT_INT);
  1836. if (retval != STATUS_SUCCESS) {
  1837. return STATUS_FAIL;
  1838. }
  1839. retval = rtsx_write_register(chip, MS_CFG,
  1840. 0x58 | MS_NO_CHECK_INT,
  1841. MS_BUS_WIDTH_4 |
  1842. PUSH_TIME_ODD |
  1843. MS_NO_CHECK_INT);
  1844. if (retval) {
  1845. return retval;
  1846. }
  1847. ms_card->ms_type |= MS_4BIT;
  1848. }
  1849. if (CHK_MS4BIT(ms_card))
  1850. chip->card_bus_width[chip->card2lun[MS_CARD]] = 4;
  1851. else
  1852. chip->card_bus_width[chip->card2lun[MS_CARD]] = 1;
  1853. return STATUS_SUCCESS;
  1854. }
  1855. static int ms_init_l2p_tbl(struct rtsx_chip *chip)
  1856. {
  1857. struct ms_info *ms_card = &chip->ms_card;
  1858. int size, i, seg_no, retval;
  1859. u16 defect_block, reg_addr;
  1860. u8 val1, val2;
  1861. ms_card->segment_cnt = ms_card->total_block >> 9;
  1862. dev_dbg(rtsx_dev(chip), "ms_card->segment_cnt = %d\n",
  1863. ms_card->segment_cnt);
  1864. size = ms_card->segment_cnt * sizeof(struct zone_entry);
  1865. ms_card->segment = vzalloc(size);
  1866. if (!ms_card->segment) {
  1867. return STATUS_FAIL;
  1868. }
  1869. retval = ms_read_page(chip, ms_card->boot_block, 1);
  1870. if (retval != STATUS_SUCCESS) {
  1871. goto INIT_FAIL;
  1872. }
  1873. reg_addr = PPBUF_BASE2;
  1874. for (i = 0; i < (((ms_card->total_block >> 9) * 10) + 1); i++) {
  1875. int block_no;
  1876. retval = rtsx_read_register(chip, reg_addr++, &val1);
  1877. if (retval != STATUS_SUCCESS) {
  1878. goto INIT_FAIL;
  1879. }
  1880. retval = rtsx_read_register(chip, reg_addr++, &val2);
  1881. if (retval != STATUS_SUCCESS) {
  1882. goto INIT_FAIL;
  1883. }
  1884. defect_block = ((u16)val1 << 8) | val2;
  1885. if (defect_block == 0xFFFF)
  1886. break;
  1887. seg_no = defect_block / 512;
  1888. block_no = ms_card->segment[seg_no].disable_count++;
  1889. ms_card->segment[seg_no].defect_list[block_no] = defect_block;
  1890. }
  1891. for (i = 0; i < ms_card->segment_cnt; i++) {
  1892. ms_card->segment[i].build_flag = 0;
  1893. ms_card->segment[i].l2p_table = NULL;
  1894. ms_card->segment[i].free_table = NULL;
  1895. ms_card->segment[i].get_index = 0;
  1896. ms_card->segment[i].set_index = 0;
  1897. ms_card->segment[i].unused_blk_cnt = 0;
  1898. dev_dbg(rtsx_dev(chip), "defective block count of segment %d is %d\n",
  1899. i, ms_card->segment[i].disable_count);
  1900. }
  1901. return STATUS_SUCCESS;
  1902. INIT_FAIL:
  1903. vfree(ms_card->segment);
  1904. ms_card->segment = NULL;
  1905. return STATUS_FAIL;
  1906. }
  1907. static u16 ms_get_l2p_tbl(struct rtsx_chip *chip, int seg_no, u16 log_off)
  1908. {
  1909. struct ms_info *ms_card = &chip->ms_card;
  1910. struct zone_entry *segment;
  1911. if (!ms_card->segment)
  1912. return 0xFFFF;
  1913. segment = &ms_card->segment[seg_no];
  1914. if (segment->l2p_table)
  1915. return segment->l2p_table[log_off];
  1916. return 0xFFFF;
  1917. }
  1918. static void ms_set_l2p_tbl(struct rtsx_chip *chip,
  1919. int seg_no, u16 log_off, u16 phy_blk)
  1920. {
  1921. struct ms_info *ms_card = &chip->ms_card;
  1922. struct zone_entry *segment;
  1923. if (!ms_card->segment)
  1924. return;
  1925. segment = &ms_card->segment[seg_no];
  1926. if (segment->l2p_table)
  1927. segment->l2p_table[log_off] = phy_blk;
  1928. }
  1929. static void ms_set_unused_block(struct rtsx_chip *chip, u16 phy_blk)
  1930. {
  1931. struct ms_info *ms_card = &chip->ms_card;
  1932. struct zone_entry *segment;
  1933. int seg_no;
  1934. seg_no = (int)phy_blk >> 9;
  1935. segment = &ms_card->segment[seg_no];
  1936. segment->free_table[segment->set_index++] = phy_blk;
  1937. if (segment->set_index >= MS_FREE_TABLE_CNT)
  1938. segment->set_index = 0;
  1939. segment->unused_blk_cnt++;
  1940. }
  1941. static u16 ms_get_unused_block(struct rtsx_chip *chip, int seg_no)
  1942. {
  1943. struct ms_info *ms_card = &chip->ms_card;
  1944. struct zone_entry *segment;
  1945. u16 phy_blk;
  1946. segment = &ms_card->segment[seg_no];
  1947. if (segment->unused_blk_cnt <= 0)
  1948. return 0xFFFF;
  1949. phy_blk = segment->free_table[segment->get_index];
  1950. segment->free_table[segment->get_index++] = 0xFFFF;
  1951. if (segment->get_index >= MS_FREE_TABLE_CNT)
  1952. segment->get_index = 0;
  1953. segment->unused_blk_cnt--;
  1954. return phy_blk;
  1955. }
  1956. static const unsigned short ms_start_idx[] = {0, 494, 990, 1486, 1982, 2478,
  1957. 2974, 3470, 3966, 4462, 4958,
  1958. 5454, 5950, 6446, 6942, 7438,
  1959. 7934};
  1960. static int ms_arbitrate_l2p(struct rtsx_chip *chip, u16 phy_blk,
  1961. u16 log_off, u8 us1, u8 us2)
  1962. {
  1963. struct ms_info *ms_card = &chip->ms_card;
  1964. struct zone_entry *segment;
  1965. int seg_no;
  1966. u16 tmp_blk;
  1967. seg_no = (int)phy_blk >> 9;
  1968. segment = &ms_card->segment[seg_no];
  1969. tmp_blk = segment->l2p_table[log_off];
  1970. if (us1 != us2) {
  1971. if (us1 == 0) {
  1972. if (!(chip->card_wp & MS_CARD))
  1973. ms_erase_block(chip, tmp_blk);
  1974. ms_set_unused_block(chip, tmp_blk);
  1975. segment->l2p_table[log_off] = phy_blk;
  1976. } else {
  1977. if (!(chip->card_wp & MS_CARD))
  1978. ms_erase_block(chip, phy_blk);
  1979. ms_set_unused_block(chip, phy_blk);
  1980. }
  1981. } else {
  1982. if (phy_blk < tmp_blk) {
  1983. if (!(chip->card_wp & MS_CARD))
  1984. ms_erase_block(chip, phy_blk);
  1985. ms_set_unused_block(chip, phy_blk);
  1986. } else {
  1987. if (!(chip->card_wp & MS_CARD))
  1988. ms_erase_block(chip, tmp_blk);
  1989. ms_set_unused_block(chip, tmp_blk);
  1990. segment->l2p_table[log_off] = phy_blk;
  1991. }
  1992. }
  1993. return STATUS_SUCCESS;
  1994. }
  1995. static int ms_build_l2p_tbl(struct rtsx_chip *chip, int seg_no)
  1996. {
  1997. struct ms_info *ms_card = &chip->ms_card;
  1998. struct zone_entry *segment;
  1999. bool defect_flag;
  2000. int retval, table_size, disable_cnt, i;
  2001. u16 start, end, phy_blk, log_blk, tmp_blk, idx;
  2002. u8 extra[MS_EXTRA_SIZE], us1, us2;
  2003. dev_dbg(rtsx_dev(chip), "%s: %d\n", __func__, seg_no);
  2004. if (!ms_card->segment) {
  2005. retval = ms_init_l2p_tbl(chip);
  2006. if (retval != STATUS_SUCCESS) {
  2007. return retval;
  2008. }
  2009. }
  2010. if (ms_card->segment[seg_no].build_flag) {
  2011. dev_dbg(rtsx_dev(chip), "l2p table of segment %d has been built\n",
  2012. seg_no);
  2013. return STATUS_SUCCESS;
  2014. }
  2015. if (seg_no == 0)
  2016. table_size = 494;
  2017. else
  2018. table_size = 496;
  2019. segment = &ms_card->segment[seg_no];
  2020. if (!segment->l2p_table) {
  2021. segment->l2p_table = vmalloc(array_size(table_size, 2));
  2022. if (!segment->l2p_table) {
  2023. goto BUILD_FAIL;
  2024. }
  2025. }
  2026. memset((u8 *)(segment->l2p_table), 0xff, table_size * 2);
  2027. if (!segment->free_table) {
  2028. segment->free_table = vmalloc(MS_FREE_TABLE_CNT * 2);
  2029. if (!segment->free_table) {
  2030. goto BUILD_FAIL;
  2031. }
  2032. }
  2033. memset((u8 *)(segment->free_table), 0xff, MS_FREE_TABLE_CNT * 2);
  2034. start = (u16)seg_no << 9;
  2035. end = (u16)(seg_no + 1) << 9;
  2036. disable_cnt = segment->disable_count;
  2037. segment->get_index = 0;
  2038. segment->set_index = 0;
  2039. segment->unused_blk_cnt = 0;
  2040. for (phy_blk = start; phy_blk < end; phy_blk++) {
  2041. if (disable_cnt) {
  2042. defect_flag = false;
  2043. for (i = 0; i < segment->disable_count; i++) {
  2044. if (phy_blk == segment->defect_list[i]) {
  2045. defect_flag = true;
  2046. break;
  2047. }
  2048. }
  2049. if (defect_flag) {
  2050. disable_cnt--;
  2051. continue;
  2052. }
  2053. }
  2054. retval = ms_read_extra_data(chip, phy_blk, 0,
  2055. extra, MS_EXTRA_SIZE);
  2056. if (retval != STATUS_SUCCESS) {
  2057. dev_dbg(rtsx_dev(chip), "read extra data fail\n");
  2058. ms_set_bad_block(chip, phy_blk);
  2059. continue;
  2060. }
  2061. if (seg_no == ms_card->segment_cnt - 1) {
  2062. if (!(extra[1] & NOT_TRANSLATION_TABLE)) {
  2063. if (!(chip->card_wp & MS_CARD)) {
  2064. retval = ms_erase_block(chip, phy_blk);
  2065. if (retval != STATUS_SUCCESS)
  2066. continue;
  2067. extra[2] = 0xff;
  2068. extra[3] = 0xff;
  2069. }
  2070. }
  2071. }
  2072. if (!(extra[0] & BLOCK_OK))
  2073. continue;
  2074. if (!(extra[1] & NOT_BOOT_BLOCK))
  2075. continue;
  2076. if ((extra[0] & PAGE_OK) != PAGE_OK)
  2077. continue;
  2078. log_blk = ((u16)extra[2] << 8) | extra[3];
  2079. if (log_blk == 0xFFFF) {
  2080. if (!(chip->card_wp & MS_CARD)) {
  2081. retval = ms_erase_block(chip, phy_blk);
  2082. if (retval != STATUS_SUCCESS)
  2083. continue;
  2084. }
  2085. ms_set_unused_block(chip, phy_blk);
  2086. continue;
  2087. }
  2088. if ((log_blk < ms_start_idx[seg_no]) ||
  2089. (log_blk >= ms_start_idx[seg_no + 1])) {
  2090. if (!(chip->card_wp & MS_CARD)) {
  2091. retval = ms_erase_block(chip, phy_blk);
  2092. if (retval != STATUS_SUCCESS)
  2093. continue;
  2094. }
  2095. ms_set_unused_block(chip, phy_blk);
  2096. continue;
  2097. }
  2098. idx = log_blk - ms_start_idx[seg_no];
  2099. if (segment->l2p_table[idx] == 0xFFFF) {
  2100. segment->l2p_table[idx] = phy_blk;
  2101. continue;
  2102. }
  2103. us1 = extra[0] & 0x10;
  2104. tmp_blk = segment->l2p_table[idx];
  2105. retval = ms_read_extra_data(chip, tmp_blk, 0,
  2106. extra, MS_EXTRA_SIZE);
  2107. if (retval != STATUS_SUCCESS)
  2108. continue;
  2109. us2 = extra[0] & 0x10;
  2110. (void)ms_arbitrate_l2p(chip, phy_blk,
  2111. log_blk - ms_start_idx[seg_no], us1, us2);
  2112. continue;
  2113. }
  2114. segment->build_flag = 1;
  2115. dev_dbg(rtsx_dev(chip), "unused block count: %d\n",
  2116. segment->unused_blk_cnt);
  2117. /* Logical Address Confirmation Process */
  2118. if (seg_no == ms_card->segment_cnt - 1) {
  2119. if (segment->unused_blk_cnt < 2)
  2120. chip->card_wp |= MS_CARD;
  2121. } else {
  2122. if (segment->unused_blk_cnt < 1)
  2123. chip->card_wp |= MS_CARD;
  2124. }
  2125. if (chip->card_wp & MS_CARD)
  2126. return STATUS_SUCCESS;
  2127. for (log_blk = ms_start_idx[seg_no];
  2128. log_blk < ms_start_idx[seg_no + 1]; log_blk++) {
  2129. idx = log_blk - ms_start_idx[seg_no];
  2130. if (segment->l2p_table[idx] == 0xFFFF) {
  2131. phy_blk = ms_get_unused_block(chip, seg_no);
  2132. if (phy_blk == 0xFFFF) {
  2133. chip->card_wp |= MS_CARD;
  2134. return STATUS_SUCCESS;
  2135. }
  2136. retval = ms_init_page(chip, phy_blk, log_blk, 0, 1);
  2137. if (retval != STATUS_SUCCESS) {
  2138. goto BUILD_FAIL;
  2139. }
  2140. segment->l2p_table[idx] = phy_blk;
  2141. if (seg_no == ms_card->segment_cnt - 1) {
  2142. if (segment->unused_blk_cnt < 2) {
  2143. chip->card_wp |= MS_CARD;
  2144. return STATUS_SUCCESS;
  2145. }
  2146. } else {
  2147. if (segment->unused_blk_cnt < 1) {
  2148. chip->card_wp |= MS_CARD;
  2149. return STATUS_SUCCESS;
  2150. }
  2151. }
  2152. }
  2153. }
  2154. /* Make boot block be the first normal block */
  2155. if (seg_no == 0) {
  2156. for (log_blk = 0; log_blk < 494; log_blk++) {
  2157. tmp_blk = segment->l2p_table[log_blk];
  2158. if (tmp_blk < ms_card->boot_block) {
  2159. dev_dbg(rtsx_dev(chip), "Boot block is not the first normal block.\n");
  2160. if (chip->card_wp & MS_CARD)
  2161. break;
  2162. phy_blk = ms_get_unused_block(chip, 0);
  2163. retval = ms_copy_page(chip, tmp_blk, phy_blk,
  2164. log_blk, 0,
  2165. ms_card->page_off + 1);
  2166. if (retval != STATUS_SUCCESS) {
  2167. return STATUS_FAIL;
  2168. }
  2169. segment->l2p_table[log_blk] = phy_blk;
  2170. retval = ms_set_bad_block(chip, tmp_blk);
  2171. if (retval != STATUS_SUCCESS) {
  2172. return STATUS_FAIL;
  2173. }
  2174. }
  2175. }
  2176. }
  2177. return STATUS_SUCCESS;
  2178. BUILD_FAIL:
  2179. segment->build_flag = 0;
  2180. vfree(segment->l2p_table);
  2181. segment->l2p_table = NULL;
  2182. vfree(segment->free_table);
  2183. segment->free_table = NULL;
  2184. return STATUS_FAIL;
  2185. }
  2186. int reset_ms_card(struct rtsx_chip *chip)
  2187. {
  2188. struct ms_info *ms_card = &chip->ms_card;
  2189. int seg_no = ms_card->total_block / 512 - 1;
  2190. int retval;
  2191. memset(ms_card, 0, sizeof(struct ms_info));
  2192. retval = enable_card_clock(chip, MS_CARD);
  2193. if (retval != STATUS_SUCCESS) {
  2194. return STATUS_FAIL;
  2195. }
  2196. retval = select_card(chip, MS_CARD);
  2197. if (retval != STATUS_SUCCESS) {
  2198. return STATUS_FAIL;
  2199. }
  2200. ms_card->ms_type = 0;
  2201. retval = reset_ms_pro(chip);
  2202. if (retval != STATUS_SUCCESS) {
  2203. if (ms_card->check_ms_flow) {
  2204. retval = reset_ms(chip);
  2205. if (retval != STATUS_SUCCESS) {
  2206. return STATUS_FAIL;
  2207. }
  2208. } else {
  2209. return STATUS_FAIL;
  2210. }
  2211. }
  2212. retval = ms_set_init_para(chip);
  2213. if (retval != STATUS_SUCCESS) {
  2214. return STATUS_FAIL;
  2215. }
  2216. if (!CHK_MSPRO(ms_card)) {
  2217. /* Build table for the last segment,
  2218. * to check if L2P table block exists, erasing it
  2219. */
  2220. retval = ms_build_l2p_tbl(chip, seg_no);
  2221. if (retval != STATUS_SUCCESS) {
  2222. return STATUS_FAIL;
  2223. }
  2224. }
  2225. dev_dbg(rtsx_dev(chip), "ms_card->ms_type = 0x%x\n", ms_card->ms_type);
  2226. return STATUS_SUCCESS;
  2227. }
  2228. static int mspro_set_rw_cmd(struct rtsx_chip *chip,
  2229. u32 start_sec, u16 sec_cnt, u8 cmd)
  2230. {
  2231. int retval, i;
  2232. u8 data[8];
  2233. data[0] = cmd;
  2234. data[1] = (u8)(sec_cnt >> 8);
  2235. data[2] = (u8)sec_cnt;
  2236. data[3] = (u8)(start_sec >> 24);
  2237. data[4] = (u8)(start_sec >> 16);
  2238. data[5] = (u8)(start_sec >> 8);
  2239. data[6] = (u8)start_sec;
  2240. data[7] = 0;
  2241. for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
  2242. retval = ms_write_bytes(chip, PRO_EX_SET_CMD, 7,
  2243. WAIT_INT, data, 8);
  2244. if (retval == STATUS_SUCCESS)
  2245. break;
  2246. }
  2247. if (i == MS_MAX_RETRY_COUNT) {
  2248. return STATUS_FAIL;
  2249. }
  2250. return STATUS_SUCCESS;
  2251. }
  2252. void mspro_stop_seq_mode(struct rtsx_chip *chip)
  2253. {
  2254. struct ms_info *ms_card = &chip->ms_card;
  2255. int retval;
  2256. if (ms_card->seq_mode) {
  2257. retval = ms_switch_clock(chip);
  2258. if (retval != STATUS_SUCCESS)
  2259. return;
  2260. ms_card->seq_mode = 0;
  2261. ms_card->total_sec_cnt = 0;
  2262. ms_send_cmd(chip, PRO_STOP, WAIT_INT);
  2263. rtsx_write_register(chip, RBCTL, RB_FLUSH, RB_FLUSH);
  2264. }
  2265. }
  2266. static inline int ms_auto_tune_clock(struct rtsx_chip *chip)
  2267. {
  2268. struct ms_info *ms_card = &chip->ms_card;
  2269. int retval;
  2270. if (chip->asic_code) {
  2271. if (ms_card->ms_clock > 30)
  2272. ms_card->ms_clock -= 20;
  2273. } else {
  2274. if (ms_card->ms_clock == CLK_80)
  2275. ms_card->ms_clock = CLK_60;
  2276. else if (ms_card->ms_clock == CLK_60)
  2277. ms_card->ms_clock = CLK_40;
  2278. }
  2279. retval = ms_switch_clock(chip);
  2280. if (retval != STATUS_SUCCESS) {
  2281. return STATUS_FAIL;
  2282. }
  2283. return STATUS_SUCCESS;
  2284. }
  2285. static int mspro_rw_multi_sector(struct scsi_cmnd *srb,
  2286. struct rtsx_chip *chip, u32 start_sector,
  2287. u16 sector_cnt)
  2288. {
  2289. struct ms_info *ms_card = &chip->ms_card;
  2290. bool mode_2k = false;
  2291. int retval;
  2292. u16 count;
  2293. u8 val, trans_mode, rw_tpc, rw_cmd;
  2294. ms_set_err_code(chip, MS_NO_ERROR);
  2295. ms_card->cleanup_counter = 0;
  2296. if (CHK_MSHG(ms_card)) {
  2297. if ((start_sector % 4) || (sector_cnt % 4)) {
  2298. if (srb->sc_data_direction == DMA_FROM_DEVICE) {
  2299. rw_tpc = PRO_READ_LONG_DATA;
  2300. rw_cmd = PRO_READ_DATA;
  2301. } else {
  2302. rw_tpc = PRO_WRITE_LONG_DATA;
  2303. rw_cmd = PRO_WRITE_DATA;
  2304. }
  2305. } else {
  2306. if (srb->sc_data_direction == DMA_FROM_DEVICE) {
  2307. rw_tpc = PRO_READ_QUAD_DATA;
  2308. rw_cmd = PRO_READ_2K_DATA;
  2309. } else {
  2310. rw_tpc = PRO_WRITE_QUAD_DATA;
  2311. rw_cmd = PRO_WRITE_2K_DATA;
  2312. }
  2313. mode_2k = true;
  2314. }
  2315. } else {
  2316. if (srb->sc_data_direction == DMA_FROM_DEVICE) {
  2317. rw_tpc = PRO_READ_LONG_DATA;
  2318. rw_cmd = PRO_READ_DATA;
  2319. } else {
  2320. rw_tpc = PRO_WRITE_LONG_DATA;
  2321. rw_cmd = PRO_WRITE_DATA;
  2322. }
  2323. }
  2324. retval = ms_switch_clock(chip);
  2325. if (retval != STATUS_SUCCESS) {
  2326. return STATUS_FAIL;
  2327. }
  2328. if (srb->sc_data_direction == DMA_FROM_DEVICE)
  2329. trans_mode = MS_TM_AUTO_READ;
  2330. else
  2331. trans_mode = MS_TM_AUTO_WRITE;
  2332. retval = rtsx_read_register(chip, MS_TRANS_CFG, &val);
  2333. if (retval) {
  2334. return retval;
  2335. }
  2336. if (ms_card->seq_mode) {
  2337. if ((ms_card->pre_dir != srb->sc_data_direction) ||
  2338. ((ms_card->pre_sec_addr + ms_card->pre_sec_cnt) !=
  2339. start_sector) ||
  2340. (mode_2k && (ms_card->seq_mode & MODE_512_SEQ)) ||
  2341. (!mode_2k && (ms_card->seq_mode & MODE_2K_SEQ)) ||
  2342. !(val & MS_INT_BREQ) ||
  2343. ((ms_card->total_sec_cnt + sector_cnt) > 0xFE00)) {
  2344. ms_card->seq_mode = 0;
  2345. ms_card->total_sec_cnt = 0;
  2346. if (val & MS_INT_BREQ) {
  2347. retval = ms_send_cmd(chip, PRO_STOP, WAIT_INT);
  2348. if (retval != STATUS_SUCCESS) {
  2349. return STATUS_FAIL;
  2350. }
  2351. rtsx_write_register(chip, RBCTL, RB_FLUSH,
  2352. RB_FLUSH);
  2353. }
  2354. }
  2355. }
  2356. if (!ms_card->seq_mode) {
  2357. ms_card->total_sec_cnt = 0;
  2358. if (sector_cnt >= SEQ_START_CRITERIA) {
  2359. if ((ms_card->capacity - start_sector) > 0xFE00)
  2360. count = 0xFE00;
  2361. else
  2362. count = (u16)(ms_card->capacity - start_sector);
  2363. if (count > sector_cnt) {
  2364. if (mode_2k)
  2365. ms_card->seq_mode = MODE_2K_SEQ;
  2366. else
  2367. ms_card->seq_mode = MODE_512_SEQ;
  2368. }
  2369. } else {
  2370. count = sector_cnt;
  2371. }
  2372. retval = mspro_set_rw_cmd(chip, start_sector, count, rw_cmd);
  2373. if (retval != STATUS_SUCCESS) {
  2374. ms_card->seq_mode = 0;
  2375. return STATUS_FAIL;
  2376. }
  2377. }
  2378. retval = ms_transfer_data(chip, trans_mode, rw_tpc, sector_cnt,
  2379. WAIT_INT, mode_2k, scsi_sg_count(srb),
  2380. scsi_sglist(srb), scsi_bufflen(srb));
  2381. if (retval != STATUS_SUCCESS) {
  2382. ms_card->seq_mode = 0;
  2383. rtsx_read_register(chip, MS_TRANS_CFG, &val);
  2384. rtsx_clear_ms_error(chip);
  2385. if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
  2386. chip->rw_need_retry = 0;
  2387. dev_dbg(rtsx_dev(chip), "No card exist, exit %s\n",
  2388. __func__);
  2389. return STATUS_FAIL;
  2390. }
  2391. if (val & MS_INT_BREQ)
  2392. ms_send_cmd(chip, PRO_STOP, WAIT_INT);
  2393. if (val & (MS_CRC16_ERR | MS_RDY_TIMEOUT)) {
  2394. dev_dbg(rtsx_dev(chip), "MSPro CRC error, tune clock!\n");
  2395. chip->rw_need_retry = 1;
  2396. ms_auto_tune_clock(chip);
  2397. }
  2398. return retval;
  2399. }
  2400. if (ms_card->seq_mode) {
  2401. ms_card->pre_sec_addr = start_sector;
  2402. ms_card->pre_sec_cnt = sector_cnt;
  2403. ms_card->pre_dir = srb->sc_data_direction;
  2404. ms_card->total_sec_cnt += sector_cnt;
  2405. }
  2406. return STATUS_SUCCESS;
  2407. }
  2408. static int mspro_read_format_progress(struct rtsx_chip *chip,
  2409. const int short_data_len)
  2410. {
  2411. struct ms_info *ms_card = &chip->ms_card;
  2412. int retval, i;
  2413. u32 total_progress, cur_progress;
  2414. u8 cnt, tmp;
  2415. u8 data[8];
  2416. dev_dbg(rtsx_dev(chip), "%s, short_data_len = %d\n", __func__,
  2417. short_data_len);
  2418. retval = ms_switch_clock(chip);
  2419. if (retval != STATUS_SUCCESS) {
  2420. ms_card->format_status = FORMAT_FAIL;
  2421. return STATUS_FAIL;
  2422. }
  2423. retval = rtsx_read_register(chip, MS_TRANS_CFG, &tmp);
  2424. if (retval != STATUS_SUCCESS) {
  2425. ms_card->format_status = FORMAT_FAIL;
  2426. return STATUS_FAIL;
  2427. }
  2428. if (!(tmp & MS_INT_BREQ)) {
  2429. if ((tmp & (MS_INT_CED | MS_INT_BREQ | MS_INT_CMDNK |
  2430. MS_INT_ERR)) == MS_INT_CED) {
  2431. ms_card->format_status = FORMAT_SUCCESS;
  2432. return STATUS_SUCCESS;
  2433. }
  2434. ms_card->format_status = FORMAT_FAIL;
  2435. return STATUS_FAIL;
  2436. }
  2437. if (short_data_len >= 256)
  2438. cnt = 0;
  2439. else
  2440. cnt = (u8)short_data_len;
  2441. retval = rtsx_write_register(chip, MS_CFG, MS_NO_CHECK_INT,
  2442. MS_NO_CHECK_INT);
  2443. if (retval != STATUS_SUCCESS) {
  2444. ms_card->format_status = FORMAT_FAIL;
  2445. return STATUS_FAIL;
  2446. }
  2447. retval = ms_read_bytes(chip, PRO_READ_SHORT_DATA, cnt, WAIT_INT,
  2448. data, 8);
  2449. if (retval != STATUS_SUCCESS) {
  2450. ms_card->format_status = FORMAT_FAIL;
  2451. return STATUS_FAIL;
  2452. }
  2453. total_progress = (data[0] << 24) | (data[1] << 16) |
  2454. (data[2] << 8) | data[3];
  2455. cur_progress = (data[4] << 24) | (data[5] << 16) |
  2456. (data[6] << 8) | data[7];
  2457. dev_dbg(rtsx_dev(chip), "total_progress = %d, cur_progress = %d\n",
  2458. total_progress, cur_progress);
  2459. if (total_progress == 0) {
  2460. ms_card->progress = 0;
  2461. } else {
  2462. u64 ulltmp = (u64)cur_progress * (u64)65535;
  2463. do_div(ulltmp, total_progress);
  2464. ms_card->progress = (u16)ulltmp;
  2465. }
  2466. dev_dbg(rtsx_dev(chip), "progress = %d\n", ms_card->progress);
  2467. for (i = 0; i < 5000; i++) {
  2468. retval = rtsx_read_register(chip, MS_TRANS_CFG, &tmp);
  2469. if (retval != STATUS_SUCCESS) {
  2470. ms_card->format_status = FORMAT_FAIL;
  2471. return STATUS_FAIL;
  2472. }
  2473. if (tmp & (MS_INT_CED | MS_INT_CMDNK |
  2474. MS_INT_BREQ | MS_INT_ERR))
  2475. break;
  2476. wait_timeout(1);
  2477. }
  2478. retval = rtsx_write_register(chip, MS_CFG, MS_NO_CHECK_INT, 0);
  2479. if (retval != STATUS_SUCCESS) {
  2480. ms_card->format_status = FORMAT_FAIL;
  2481. return STATUS_FAIL;
  2482. }
  2483. if (i == 5000) {
  2484. ms_card->format_status = FORMAT_FAIL;
  2485. return STATUS_FAIL;
  2486. }
  2487. if (tmp & (MS_INT_CMDNK | MS_INT_ERR)) {
  2488. ms_card->format_status = FORMAT_FAIL;
  2489. return STATUS_FAIL;
  2490. }
  2491. if (tmp & MS_INT_CED) {
  2492. ms_card->format_status = FORMAT_SUCCESS;
  2493. ms_card->pro_under_formatting = 0;
  2494. } else if (tmp & MS_INT_BREQ) {
  2495. ms_card->format_status = FORMAT_IN_PROGRESS;
  2496. } else {
  2497. ms_card->format_status = FORMAT_FAIL;
  2498. ms_card->pro_under_formatting = 0;
  2499. return STATUS_FAIL;
  2500. }
  2501. return STATUS_SUCCESS;
  2502. }
  2503. void mspro_polling_format_status(struct rtsx_chip *chip)
  2504. {
  2505. struct ms_info *ms_card = &chip->ms_card;
  2506. int i;
  2507. if (ms_card->pro_under_formatting &&
  2508. (rtsx_get_stat(chip) != RTSX_STAT_SS)) {
  2509. rtsx_set_stat(chip, RTSX_STAT_RUN);
  2510. for (i = 0; i < 65535; i++) {
  2511. mspro_read_format_progress(chip, MS_SHORT_DATA_LEN);
  2512. if (ms_card->format_status != FORMAT_IN_PROGRESS)
  2513. break;
  2514. }
  2515. }
  2516. }
  2517. int mspro_format(struct scsi_cmnd *srb, struct rtsx_chip *chip,
  2518. int short_data_len, bool quick_format)
  2519. {
  2520. struct ms_info *ms_card = &chip->ms_card;
  2521. int retval, i;
  2522. u8 buf[8], tmp;
  2523. u16 para;
  2524. retval = ms_switch_clock(chip);
  2525. if (retval != STATUS_SUCCESS) {
  2526. return STATUS_FAIL;
  2527. }
  2528. retval = ms_set_rw_reg_addr(chip, 0x00, 0x00, Pro_TPCParm, 0x01);
  2529. if (retval != STATUS_SUCCESS) {
  2530. return STATUS_FAIL;
  2531. }
  2532. memset(buf, 0, 2);
  2533. switch (short_data_len) {
  2534. case 32:
  2535. buf[0] = 0;
  2536. break;
  2537. case 64:
  2538. buf[0] = 1;
  2539. break;
  2540. case 128:
  2541. buf[0] = 2;
  2542. break;
  2543. case 256:
  2544. default:
  2545. buf[0] = 3;
  2546. break;
  2547. }
  2548. for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
  2549. retval = ms_write_bytes(chip, PRO_WRITE_REG, 1,
  2550. NO_WAIT_INT, buf, 2);
  2551. if (retval == STATUS_SUCCESS)
  2552. break;
  2553. }
  2554. if (i == MS_MAX_RETRY_COUNT) {
  2555. return STATUS_FAIL;
  2556. }
  2557. if (quick_format)
  2558. para = 0x0000;
  2559. else
  2560. para = 0x0001;
  2561. retval = mspro_set_rw_cmd(chip, 0, para, PRO_FORMAT);
  2562. if (retval != STATUS_SUCCESS) {
  2563. return STATUS_FAIL;
  2564. }
  2565. retval = rtsx_read_register(chip, MS_TRANS_CFG, &tmp);
  2566. if (retval) {
  2567. return retval;
  2568. }
  2569. if (tmp & (MS_INT_CMDNK | MS_INT_ERR)) {
  2570. return STATUS_FAIL;
  2571. }
  2572. if ((tmp & (MS_INT_BREQ | MS_INT_CED)) == MS_INT_BREQ) {
  2573. ms_card->pro_under_formatting = 1;
  2574. ms_card->progress = 0;
  2575. ms_card->format_status = FORMAT_IN_PROGRESS;
  2576. return STATUS_SUCCESS;
  2577. }
  2578. if (tmp & MS_INT_CED) {
  2579. ms_card->pro_under_formatting = 0;
  2580. ms_card->progress = 0;
  2581. ms_card->format_status = FORMAT_SUCCESS;
  2582. set_sense_type(chip, SCSI_LUN(srb), SENSE_TYPE_NO_SENSE);
  2583. return STATUS_SUCCESS;
  2584. }
  2585. return STATUS_FAIL;
  2586. }
  2587. static int ms_read_multiple_pages(struct rtsx_chip *chip, u16 phy_blk,
  2588. u16 log_blk, u8 start_page, u8 end_page,
  2589. u8 *buf, unsigned int *index,
  2590. unsigned int *offset)
  2591. {
  2592. struct ms_info *ms_card = &chip->ms_card;
  2593. int retval, i;
  2594. u8 extra[MS_EXTRA_SIZE], page_addr, val, trans_cfg, data[6];
  2595. u8 *ptr;
  2596. retval = ms_read_extra_data(chip, phy_blk, start_page,
  2597. extra, MS_EXTRA_SIZE);
  2598. if (retval == STATUS_SUCCESS) {
  2599. if ((extra[1] & 0x30) != 0x30) {
  2600. ms_set_err_code(chip, MS_FLASH_READ_ERROR);
  2601. return STATUS_FAIL;
  2602. }
  2603. }
  2604. retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE,
  2605. SystemParm, 6);
  2606. if (retval != STATUS_SUCCESS) {
  2607. return STATUS_FAIL;
  2608. }
  2609. if (CHK_MS4BIT(ms_card))
  2610. data[0] = 0x88;
  2611. else
  2612. data[0] = 0x80;
  2613. data[1] = 0;
  2614. data[2] = (u8)(phy_blk >> 8);
  2615. data[3] = (u8)phy_blk;
  2616. data[4] = 0;
  2617. data[5] = start_page;
  2618. for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
  2619. retval = ms_write_bytes(chip, WRITE_REG, 6, NO_WAIT_INT,
  2620. data, 6);
  2621. if (retval == STATUS_SUCCESS)
  2622. break;
  2623. }
  2624. if (i == MS_MAX_RETRY_COUNT) {
  2625. return STATUS_FAIL;
  2626. }
  2627. ms_set_err_code(chip, MS_NO_ERROR);
  2628. retval = ms_send_cmd(chip, BLOCK_READ, WAIT_INT);
  2629. if (retval != STATUS_SUCCESS) {
  2630. return STATUS_FAIL;
  2631. }
  2632. ptr = buf;
  2633. for (page_addr = start_page; page_addr < end_page; page_addr++) {
  2634. ms_set_err_code(chip, MS_NO_ERROR);
  2635. if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
  2636. ms_set_err_code(chip, MS_NO_CARD);
  2637. return STATUS_FAIL;
  2638. }
  2639. retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
  2640. if (retval != STATUS_SUCCESS) {
  2641. return STATUS_FAIL;
  2642. }
  2643. if (val & INT_REG_CMDNK) {
  2644. ms_set_err_code(chip, MS_CMD_NK);
  2645. return STATUS_FAIL;
  2646. }
  2647. if (val & INT_REG_ERR) {
  2648. if (val & INT_REG_BREQ) {
  2649. retval = ms_read_status_reg(chip);
  2650. if (retval != STATUS_SUCCESS) {
  2651. if (!(chip->card_wp & MS_CARD)) {
  2652. reset_ms(chip);
  2653. ms_set_page_status
  2654. (log_blk, setPS_NG,
  2655. extra,
  2656. MS_EXTRA_SIZE);
  2657. ms_write_extra_data
  2658. (chip, phy_blk,
  2659. page_addr, extra,
  2660. MS_EXTRA_SIZE);
  2661. }
  2662. ms_set_err_code(chip,
  2663. MS_FLASH_READ_ERROR);
  2664. return STATUS_FAIL;
  2665. }
  2666. } else {
  2667. ms_set_err_code(chip, MS_FLASH_READ_ERROR);
  2668. return STATUS_FAIL;
  2669. }
  2670. } else {
  2671. if (!(val & INT_REG_BREQ)) {
  2672. ms_set_err_code(chip, MS_BREQ_ERROR);
  2673. return STATUS_FAIL;
  2674. }
  2675. }
  2676. if (page_addr == (end_page - 1)) {
  2677. if (!(val & INT_REG_CED)) {
  2678. retval = ms_send_cmd(chip, BLOCK_END, WAIT_INT);
  2679. if (retval != STATUS_SUCCESS) {
  2680. return STATUS_FAIL;
  2681. }
  2682. }
  2683. retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT,
  2684. &val, 1);
  2685. if (retval != STATUS_SUCCESS) {
  2686. return STATUS_FAIL;
  2687. }
  2688. if (!(val & INT_REG_CED)) {
  2689. ms_set_err_code(chip, MS_FLASH_READ_ERROR);
  2690. return STATUS_FAIL;
  2691. }
  2692. trans_cfg = NO_WAIT_INT;
  2693. } else {
  2694. trans_cfg = WAIT_INT;
  2695. }
  2696. rtsx_init_cmd(chip);
  2697. rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC, 0xFF, READ_PAGE_DATA);
  2698. rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG,
  2699. 0xFF, trans_cfg);
  2700. rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE,
  2701. 0x01, RING_BUFFER);
  2702. trans_dma_enable(DMA_FROM_DEVICE, chip, 512, DMA_512);
  2703. rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANSFER, 0xFF,
  2704. MS_TRANSFER_START | MS_TM_NORMAL_READ);
  2705. rtsx_add_cmd(chip, CHECK_REG_CMD, MS_TRANSFER,
  2706. MS_TRANSFER_END, MS_TRANSFER_END);
  2707. rtsx_send_cmd_no_wait(chip);
  2708. retval = rtsx_transfer_data_partial(chip, MS_CARD, ptr, 512,
  2709. scsi_sg_count(chip->srb),
  2710. index, offset,
  2711. DMA_FROM_DEVICE,
  2712. chip->ms_timeout);
  2713. if (retval < 0) {
  2714. if (retval == -ETIMEDOUT) {
  2715. ms_set_err_code(chip, MS_TO_ERROR);
  2716. rtsx_clear_ms_error(chip);
  2717. return STATUS_TIMEDOUT;
  2718. }
  2719. retval = rtsx_read_register(chip, MS_TRANS_CFG, &val);
  2720. if (retval != STATUS_SUCCESS) {
  2721. ms_set_err_code(chip, MS_TO_ERROR);
  2722. rtsx_clear_ms_error(chip);
  2723. return STATUS_TIMEDOUT;
  2724. }
  2725. if (val & (MS_CRC16_ERR | MS_RDY_TIMEOUT)) {
  2726. ms_set_err_code(chip, MS_CRC16_ERROR);
  2727. rtsx_clear_ms_error(chip);
  2728. return STATUS_FAIL;
  2729. }
  2730. }
  2731. if (scsi_sg_count(chip->srb) == 0)
  2732. ptr += 512;
  2733. }
  2734. return STATUS_SUCCESS;
  2735. }
  2736. static int ms_write_multiple_pages(struct rtsx_chip *chip, u16 old_blk,
  2737. u16 new_blk, u16 log_blk, u8 start_page,
  2738. u8 end_page, u8 *buf, unsigned int *index,
  2739. unsigned int *offset)
  2740. {
  2741. struct ms_info *ms_card = &chip->ms_card;
  2742. int retval, i;
  2743. u8 page_addr, val, data[16];
  2744. u8 *ptr;
  2745. if (!start_page) {
  2746. retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE,
  2747. SystemParm, 7);
  2748. if (retval != STATUS_SUCCESS) {
  2749. return STATUS_FAIL;
  2750. }
  2751. if (CHK_MS4BIT(ms_card))
  2752. data[0] = 0x88;
  2753. else
  2754. data[0] = 0x80;
  2755. data[1] = 0;
  2756. data[2] = (u8)(old_blk >> 8);
  2757. data[3] = (u8)old_blk;
  2758. data[4] = 0x80;
  2759. data[5] = 0;
  2760. data[6] = 0xEF;
  2761. data[7] = 0xFF;
  2762. retval = ms_write_bytes(chip, WRITE_REG, 7, NO_WAIT_INT,
  2763. data, 8);
  2764. if (retval != STATUS_SUCCESS) {
  2765. return STATUS_FAIL;
  2766. }
  2767. retval = ms_send_cmd(chip, BLOCK_WRITE, WAIT_INT);
  2768. if (retval != STATUS_SUCCESS) {
  2769. return STATUS_FAIL;
  2770. }
  2771. ms_set_err_code(chip, MS_NO_ERROR);
  2772. retval = ms_transfer_tpc(chip, MS_TM_READ_BYTES, GET_INT, 1,
  2773. NO_WAIT_INT);
  2774. if (retval != STATUS_SUCCESS) {
  2775. return STATUS_FAIL;
  2776. }
  2777. }
  2778. retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE,
  2779. SystemParm, (6 + MS_EXTRA_SIZE));
  2780. if (retval != STATUS_SUCCESS) {
  2781. return STATUS_FAIL;
  2782. }
  2783. ms_set_err_code(chip, MS_NO_ERROR);
  2784. if (CHK_MS4BIT(ms_card))
  2785. data[0] = 0x88;
  2786. else
  2787. data[0] = 0x80;
  2788. data[1] = 0;
  2789. data[2] = (u8)(new_blk >> 8);
  2790. data[3] = (u8)new_blk;
  2791. if ((end_page - start_page) == 1)
  2792. data[4] = 0x20;
  2793. else
  2794. data[4] = 0;
  2795. data[5] = start_page;
  2796. data[6] = 0xF8;
  2797. data[7] = 0xFF;
  2798. data[8] = (u8)(log_blk >> 8);
  2799. data[9] = (u8)log_blk;
  2800. for (i = 0x0A; i < 0x10; i++)
  2801. data[i] = 0xFF;
  2802. for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
  2803. retval = ms_write_bytes(chip, WRITE_REG, 6 + MS_EXTRA_SIZE,
  2804. NO_WAIT_INT, data, 16);
  2805. if (retval == STATUS_SUCCESS)
  2806. break;
  2807. }
  2808. if (i == MS_MAX_RETRY_COUNT) {
  2809. return STATUS_FAIL;
  2810. }
  2811. for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
  2812. retval = ms_send_cmd(chip, BLOCK_WRITE, WAIT_INT);
  2813. if (retval == STATUS_SUCCESS)
  2814. break;
  2815. }
  2816. if (i == MS_MAX_RETRY_COUNT) {
  2817. return STATUS_FAIL;
  2818. }
  2819. retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
  2820. if (retval != STATUS_SUCCESS) {
  2821. return STATUS_FAIL;
  2822. }
  2823. ptr = buf;
  2824. for (page_addr = start_page; page_addr < end_page; page_addr++) {
  2825. ms_set_err_code(chip, MS_NO_ERROR);
  2826. if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
  2827. ms_set_err_code(chip, MS_NO_CARD);
  2828. return STATUS_FAIL;
  2829. }
  2830. if (val & INT_REG_CMDNK) {
  2831. ms_set_err_code(chip, MS_CMD_NK);
  2832. return STATUS_FAIL;
  2833. }
  2834. if (val & INT_REG_ERR) {
  2835. ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
  2836. return STATUS_FAIL;
  2837. }
  2838. if (!(val & INT_REG_BREQ)) {
  2839. ms_set_err_code(chip, MS_BREQ_ERROR);
  2840. return STATUS_FAIL;
  2841. }
  2842. udelay(30);
  2843. rtsx_init_cmd(chip);
  2844. rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC,
  2845. 0xFF, WRITE_PAGE_DATA);
  2846. rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG,
  2847. 0xFF, WAIT_INT);
  2848. rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE,
  2849. 0x01, RING_BUFFER);
  2850. trans_dma_enable(DMA_TO_DEVICE, chip, 512, DMA_512);
  2851. rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANSFER, 0xFF,
  2852. MS_TRANSFER_START | MS_TM_NORMAL_WRITE);
  2853. rtsx_add_cmd(chip, CHECK_REG_CMD, MS_TRANSFER,
  2854. MS_TRANSFER_END, MS_TRANSFER_END);
  2855. rtsx_send_cmd_no_wait(chip);
  2856. retval = rtsx_transfer_data_partial(chip, MS_CARD, ptr, 512,
  2857. scsi_sg_count(chip->srb),
  2858. index, offset,
  2859. DMA_TO_DEVICE,
  2860. chip->ms_timeout);
  2861. if (retval < 0) {
  2862. ms_set_err_code(chip, MS_TO_ERROR);
  2863. rtsx_clear_ms_error(chip);
  2864. if (retval == -ETIMEDOUT) {
  2865. return STATUS_TIMEDOUT;
  2866. }
  2867. return STATUS_FAIL;
  2868. }
  2869. retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
  2870. if (retval != STATUS_SUCCESS) {
  2871. return STATUS_FAIL;
  2872. }
  2873. if ((end_page - start_page) == 1) {
  2874. if (!(val & INT_REG_CED)) {
  2875. ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
  2876. return STATUS_FAIL;
  2877. }
  2878. } else {
  2879. if (page_addr == (end_page - 1)) {
  2880. if (!(val & INT_REG_CED)) {
  2881. retval = ms_send_cmd(chip, BLOCK_END,
  2882. WAIT_INT);
  2883. if (retval != STATUS_SUCCESS) {
  2884. return STATUS_FAIL;
  2885. }
  2886. }
  2887. retval = ms_read_bytes(chip, GET_INT, 1,
  2888. NO_WAIT_INT, &val, 1);
  2889. if (retval != STATUS_SUCCESS) {
  2890. return STATUS_FAIL;
  2891. }
  2892. }
  2893. if ((page_addr == (end_page - 1)) ||
  2894. (page_addr == ms_card->page_off)) {
  2895. if (!(val & INT_REG_CED)) {
  2896. ms_set_err_code(chip,
  2897. MS_FLASH_WRITE_ERROR);
  2898. return STATUS_FAIL;
  2899. }
  2900. }
  2901. }
  2902. if (scsi_sg_count(chip->srb) == 0)
  2903. ptr += 512;
  2904. }
  2905. return STATUS_SUCCESS;
  2906. }
  2907. static int ms_finish_write(struct rtsx_chip *chip, u16 old_blk, u16 new_blk,
  2908. u16 log_blk, u8 page_off)
  2909. {
  2910. struct ms_info *ms_card = &chip->ms_card;
  2911. int retval, seg_no;
  2912. retval = ms_copy_page(chip, old_blk, new_blk, log_blk,
  2913. page_off, ms_card->page_off + 1);
  2914. if (retval != STATUS_SUCCESS) {
  2915. return STATUS_FAIL;
  2916. }
  2917. seg_no = old_blk >> 9;
  2918. if (MS_TST_BAD_BLOCK_FLG(ms_card)) {
  2919. MS_CLR_BAD_BLOCK_FLG(ms_card);
  2920. ms_set_bad_block(chip, old_blk);
  2921. } else {
  2922. retval = ms_erase_block(chip, old_blk);
  2923. if (retval == STATUS_SUCCESS)
  2924. ms_set_unused_block(chip, old_blk);
  2925. }
  2926. ms_set_l2p_tbl(chip, seg_no, log_blk - ms_start_idx[seg_no], new_blk);
  2927. return STATUS_SUCCESS;
  2928. }
  2929. static int ms_prepare_write(struct rtsx_chip *chip, u16 old_blk, u16 new_blk,
  2930. u16 log_blk, u8 start_page)
  2931. {
  2932. int retval;
  2933. if (start_page) {
  2934. retval = ms_copy_page(chip, old_blk, new_blk, log_blk,
  2935. 0, start_page);
  2936. if (retval != STATUS_SUCCESS) {
  2937. return STATUS_FAIL;
  2938. }
  2939. }
  2940. return STATUS_SUCCESS;
  2941. }
  2942. #ifdef MS_DELAY_WRITE
  2943. int ms_delay_write(struct rtsx_chip *chip)
  2944. {
  2945. struct ms_info *ms_card = &chip->ms_card;
  2946. struct ms_delay_write_tag *delay_write = &ms_card->delay_write;
  2947. int retval;
  2948. if (delay_write->delay_write_flag) {
  2949. retval = ms_set_init_para(chip);
  2950. if (retval != STATUS_SUCCESS) {
  2951. return STATUS_FAIL;
  2952. }
  2953. delay_write->delay_write_flag = 0;
  2954. retval = ms_finish_write(chip,
  2955. delay_write->old_phyblock,
  2956. delay_write->new_phyblock,
  2957. delay_write->logblock,
  2958. delay_write->pageoff);
  2959. if (retval != STATUS_SUCCESS) {
  2960. return STATUS_FAIL;
  2961. }
  2962. }
  2963. return STATUS_SUCCESS;
  2964. }
  2965. #endif
  2966. static inline void ms_rw_fail(struct scsi_cmnd *srb, struct rtsx_chip *chip)
  2967. {
  2968. if (srb->sc_data_direction == DMA_FROM_DEVICE)
  2969. set_sense_type(chip, SCSI_LUN(srb),
  2970. SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
  2971. else
  2972. set_sense_type(chip, SCSI_LUN(srb), SENSE_TYPE_MEDIA_WRITE_ERR);
  2973. }
  2974. static int ms_rw_multi_sector(struct scsi_cmnd *srb, struct rtsx_chip *chip,
  2975. u32 start_sector, u16 sector_cnt)
  2976. {
  2977. struct ms_info *ms_card = &chip->ms_card;
  2978. unsigned int lun = SCSI_LUN(srb);
  2979. int retval, seg_no;
  2980. unsigned int index = 0, offset = 0;
  2981. u16 old_blk = 0, new_blk = 0, log_blk, total_sec_cnt = sector_cnt;
  2982. u8 start_page, end_page = 0, page_cnt;
  2983. u8 *ptr;
  2984. #ifdef MS_DELAY_WRITE
  2985. struct ms_delay_write_tag *delay_write = &ms_card->delay_write;
  2986. #endif
  2987. ms_set_err_code(chip, MS_NO_ERROR);
  2988. ms_card->cleanup_counter = 0;
  2989. ptr = (u8 *)scsi_sglist(srb);
  2990. retval = ms_switch_clock(chip);
  2991. if (retval != STATUS_SUCCESS) {
  2992. ms_rw_fail(srb, chip);
  2993. return STATUS_FAIL;
  2994. }
  2995. log_blk = (u16)(start_sector >> ms_card->block_shift);
  2996. start_page = (u8)(start_sector & ms_card->page_off);
  2997. for (seg_no = 0; seg_no < ARRAY_SIZE(ms_start_idx) - 1; seg_no++) {
  2998. if (log_blk < ms_start_idx[seg_no + 1])
  2999. break;
  3000. }
  3001. if (ms_card->segment[seg_no].build_flag == 0) {
  3002. retval = ms_build_l2p_tbl(chip, seg_no);
  3003. if (retval != STATUS_SUCCESS) {
  3004. chip->card_fail |= MS_CARD;
  3005. set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT);
  3006. return STATUS_FAIL;
  3007. }
  3008. }
  3009. if (srb->sc_data_direction == DMA_TO_DEVICE) {
  3010. #ifdef MS_DELAY_WRITE
  3011. if (delay_write->delay_write_flag &&
  3012. (delay_write->logblock == log_blk) &&
  3013. (start_page > delay_write->pageoff)) {
  3014. delay_write->delay_write_flag = 0;
  3015. retval = ms_copy_page(chip,
  3016. delay_write->old_phyblock,
  3017. delay_write->new_phyblock,
  3018. log_blk,
  3019. delay_write->pageoff, start_page);
  3020. if (retval != STATUS_SUCCESS) {
  3021. set_sense_type(chip, lun,
  3022. SENSE_TYPE_MEDIA_WRITE_ERR);
  3023. return STATUS_FAIL;
  3024. }
  3025. old_blk = delay_write->old_phyblock;
  3026. new_blk = delay_write->new_phyblock;
  3027. } else if (delay_write->delay_write_flag &&
  3028. (delay_write->logblock == log_blk) &&
  3029. (start_page == delay_write->pageoff)) {
  3030. delay_write->delay_write_flag = 0;
  3031. old_blk = delay_write->old_phyblock;
  3032. new_blk = delay_write->new_phyblock;
  3033. } else {
  3034. retval = ms_delay_write(chip);
  3035. if (retval != STATUS_SUCCESS) {
  3036. set_sense_type(chip, lun,
  3037. SENSE_TYPE_MEDIA_WRITE_ERR);
  3038. return STATUS_FAIL;
  3039. }
  3040. #endif
  3041. old_blk = ms_get_l2p_tbl
  3042. (chip, seg_no,
  3043. log_blk - ms_start_idx[seg_no]);
  3044. new_blk = ms_get_unused_block(chip, seg_no);
  3045. if ((old_blk == 0xFFFF) || (new_blk == 0xFFFF)) {
  3046. set_sense_type(chip, lun,
  3047. SENSE_TYPE_MEDIA_WRITE_ERR);
  3048. return STATUS_FAIL;
  3049. }
  3050. retval = ms_prepare_write(chip, old_blk, new_blk,
  3051. log_blk, start_page);
  3052. if (retval != STATUS_SUCCESS) {
  3053. if (detect_card_cd(chip, MS_CARD) !=
  3054. STATUS_SUCCESS) {
  3055. set_sense_type
  3056. (chip, lun,
  3057. SENSE_TYPE_MEDIA_NOT_PRESENT);
  3058. return STATUS_FAIL;
  3059. }
  3060. set_sense_type(chip, lun,
  3061. SENSE_TYPE_MEDIA_WRITE_ERR);
  3062. return STATUS_FAIL;
  3063. }
  3064. #ifdef MS_DELAY_WRITE
  3065. }
  3066. #endif
  3067. } else {
  3068. #ifdef MS_DELAY_WRITE
  3069. retval = ms_delay_write(chip);
  3070. if (retval != STATUS_SUCCESS) {
  3071. if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
  3072. set_sense_type(chip, lun,
  3073. SENSE_TYPE_MEDIA_NOT_PRESENT);
  3074. return STATUS_FAIL;
  3075. }
  3076. set_sense_type(chip, lun,
  3077. SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
  3078. return STATUS_FAIL;
  3079. }
  3080. #endif
  3081. old_blk = ms_get_l2p_tbl(chip, seg_no,
  3082. log_blk - ms_start_idx[seg_no]);
  3083. if (old_blk == 0xFFFF) {
  3084. set_sense_type(chip, lun,
  3085. SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
  3086. return STATUS_FAIL;
  3087. }
  3088. }
  3089. dev_dbg(rtsx_dev(chip), "seg_no = %d, old_blk = 0x%x, new_blk = 0x%x\n",
  3090. seg_no, old_blk, new_blk);
  3091. while (total_sec_cnt) {
  3092. if ((start_page + total_sec_cnt) > (ms_card->page_off + 1))
  3093. end_page = ms_card->page_off + 1;
  3094. else
  3095. end_page = start_page + (u8)total_sec_cnt;
  3096. page_cnt = end_page - start_page;
  3097. dev_dbg(rtsx_dev(chip), "start_page = %d, end_page = %d, page_cnt = %d\n",
  3098. start_page, end_page, page_cnt);
  3099. if (srb->sc_data_direction == DMA_FROM_DEVICE) {
  3100. retval = ms_read_multiple_pages(chip,
  3101. old_blk, log_blk,
  3102. start_page, end_page,
  3103. ptr, &index, &offset);
  3104. } else {
  3105. retval = ms_write_multiple_pages(chip, old_blk, new_blk,
  3106. log_blk, start_page,
  3107. end_page, ptr, &index,
  3108. &offset);
  3109. }
  3110. if (retval != STATUS_SUCCESS) {
  3111. toggle_gpio(chip, 1);
  3112. if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
  3113. set_sense_type(chip, lun,
  3114. SENSE_TYPE_MEDIA_NOT_PRESENT);
  3115. return STATUS_FAIL;
  3116. }
  3117. ms_rw_fail(srb, chip);
  3118. return STATUS_FAIL;
  3119. }
  3120. if (srb->sc_data_direction == DMA_TO_DEVICE) {
  3121. if (end_page == (ms_card->page_off + 1)) {
  3122. retval = ms_erase_block(chip, old_blk);
  3123. if (retval == STATUS_SUCCESS)
  3124. ms_set_unused_block(chip, old_blk);
  3125. ms_set_l2p_tbl(chip, seg_no,
  3126. log_blk - ms_start_idx[seg_no],
  3127. new_blk);
  3128. }
  3129. }
  3130. total_sec_cnt -= page_cnt;
  3131. if (scsi_sg_count(srb) == 0)
  3132. ptr += page_cnt * 512;
  3133. if (total_sec_cnt == 0)
  3134. break;
  3135. log_blk++;
  3136. for (seg_no = 0; seg_no < ARRAY_SIZE(ms_start_idx) - 1;
  3137. seg_no++) {
  3138. if (log_blk < ms_start_idx[seg_no + 1])
  3139. break;
  3140. }
  3141. if (ms_card->segment[seg_no].build_flag == 0) {
  3142. retval = ms_build_l2p_tbl(chip, seg_no);
  3143. if (retval != STATUS_SUCCESS) {
  3144. chip->card_fail |= MS_CARD;
  3145. set_sense_type(chip, lun,
  3146. SENSE_TYPE_MEDIA_NOT_PRESENT);
  3147. return STATUS_FAIL;
  3148. }
  3149. }
  3150. old_blk = ms_get_l2p_tbl(chip, seg_no,
  3151. log_blk - ms_start_idx[seg_no]);
  3152. if (old_blk == 0xFFFF) {
  3153. ms_rw_fail(srb, chip);
  3154. return STATUS_FAIL;
  3155. }
  3156. if (srb->sc_data_direction == DMA_TO_DEVICE) {
  3157. new_blk = ms_get_unused_block(chip, seg_no);
  3158. if (new_blk == 0xFFFF) {
  3159. ms_rw_fail(srb, chip);
  3160. return STATUS_FAIL;
  3161. }
  3162. }
  3163. dev_dbg(rtsx_dev(chip), "seg_no = %d, old_blk = 0x%x, new_blk = 0x%x\n",
  3164. seg_no, old_blk, new_blk);
  3165. start_page = 0;
  3166. }
  3167. if (srb->sc_data_direction == DMA_TO_DEVICE) {
  3168. if (end_page < (ms_card->page_off + 1)) {
  3169. #ifdef MS_DELAY_WRITE
  3170. delay_write->delay_write_flag = 1;
  3171. delay_write->old_phyblock = old_blk;
  3172. delay_write->new_phyblock = new_blk;
  3173. delay_write->logblock = log_blk;
  3174. delay_write->pageoff = end_page;
  3175. #else
  3176. retval = ms_finish_write(chip, old_blk, new_blk,
  3177. log_blk, end_page);
  3178. if (retval != STATUS_SUCCESS) {
  3179. if (detect_card_cd(chip, MS_CARD) !=
  3180. STATUS_SUCCESS) {
  3181. set_sense_type
  3182. (chip, lun,
  3183. SENSE_TYPE_MEDIA_NOT_PRESENT);
  3184. return STATUS_FAIL;
  3185. }
  3186. ms_rw_fail(srb, chip);
  3187. return STATUS_FAIL;
  3188. }
  3189. #endif
  3190. }
  3191. }
  3192. scsi_set_resid(srb, 0);
  3193. return STATUS_SUCCESS;
  3194. }
  3195. int ms_rw(struct scsi_cmnd *srb, struct rtsx_chip *chip,
  3196. u32 start_sector, u16 sector_cnt)
  3197. {
  3198. struct ms_info *ms_card = &chip->ms_card;
  3199. int retval;
  3200. if (CHK_MSPRO(ms_card))
  3201. retval = mspro_rw_multi_sector(srb, chip, start_sector,
  3202. sector_cnt);
  3203. else
  3204. retval = ms_rw_multi_sector(srb, chip, start_sector,
  3205. sector_cnt);
  3206. return retval;
  3207. }
  3208. void ms_free_l2p_tbl(struct rtsx_chip *chip)
  3209. {
  3210. struct ms_info *ms_card = &chip->ms_card;
  3211. int i = 0;
  3212. if (ms_card->segment) {
  3213. for (i = 0; i < ms_card->segment_cnt; i++) {
  3214. vfree(ms_card->segment[i].l2p_table);
  3215. ms_card->segment[i].l2p_table = NULL;
  3216. vfree(ms_card->segment[i].free_table);
  3217. ms_card->segment[i].free_table = NULL;
  3218. }
  3219. vfree(ms_card->segment);
  3220. ms_card->segment = NULL;
  3221. }
  3222. }
  3223. #ifdef SUPPORT_MAGIC_GATE
  3224. #ifdef READ_BYTES_WAIT_INT
  3225. static int ms_poll_int(struct rtsx_chip *chip)
  3226. {
  3227. int retval;
  3228. u8 val;
  3229. rtsx_init_cmd(chip);
  3230. rtsx_add_cmd(chip, CHECK_REG_CMD, MS_TRANS_CFG, MS_INT_CED, MS_INT_CED);
  3231. retval = rtsx_send_cmd(chip, MS_CARD, 5000);
  3232. if (retval != STATUS_SUCCESS) {
  3233. return STATUS_FAIL;
  3234. }
  3235. val = *rtsx_get_cmd_data(chip);
  3236. if (val & MS_INT_ERR) {
  3237. return STATUS_FAIL;
  3238. }
  3239. return STATUS_SUCCESS;
  3240. }
  3241. #endif
  3242. #ifdef MS_SAMPLE_INT_ERR
  3243. static int check_ms_err(struct rtsx_chip *chip)
  3244. {
  3245. int retval;
  3246. u8 val;
  3247. retval = rtsx_read_register(chip, MS_TRANSFER, &val);
  3248. if (retval != STATUS_SUCCESS)
  3249. return 1;
  3250. if (val & MS_TRANSFER_ERR)
  3251. return 1;
  3252. retval = rtsx_read_register(chip, MS_TRANS_CFG, &val);
  3253. if (retval != STATUS_SUCCESS)
  3254. return 1;
  3255. if (val & (MS_INT_ERR | MS_INT_CMDNK))
  3256. return 1;
  3257. return 0;
  3258. }
  3259. #else
  3260. static int check_ms_err(struct rtsx_chip *chip)
  3261. {
  3262. int retval;
  3263. u8 val;
  3264. retval = rtsx_read_register(chip, MS_TRANSFER, &val);
  3265. if (retval != STATUS_SUCCESS)
  3266. return 1;
  3267. if (val & MS_TRANSFER_ERR)
  3268. return 1;
  3269. return 0;
  3270. }
  3271. #endif
  3272. static int mg_send_ex_cmd(struct rtsx_chip *chip, u8 cmd, u8 entry_num)
  3273. {
  3274. int retval, i;
  3275. u8 data[8];
  3276. data[0] = cmd;
  3277. data[1] = 0;
  3278. data[2] = 0;
  3279. data[3] = 0;
  3280. data[4] = 0;
  3281. data[5] = 0;
  3282. data[6] = entry_num;
  3283. data[7] = 0;
  3284. for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
  3285. retval = ms_write_bytes(chip, PRO_EX_SET_CMD, 7, WAIT_INT,
  3286. data, 8);
  3287. if (retval == STATUS_SUCCESS)
  3288. break;
  3289. }
  3290. if (i == MS_MAX_RETRY_COUNT) {
  3291. return STATUS_FAIL;
  3292. }
  3293. if (check_ms_err(chip)) {
  3294. rtsx_clear_ms_error(chip);
  3295. return STATUS_FAIL;
  3296. }
  3297. return STATUS_SUCCESS;
  3298. }
  3299. static int mg_set_tpc_para_sub(struct rtsx_chip *chip, int type,
  3300. u8 mg_entry_num)
  3301. {
  3302. int retval;
  3303. u8 buf[6];
  3304. if (type == 0)
  3305. retval = ms_set_rw_reg_addr(chip, 0, 0, Pro_TPCParm, 1);
  3306. else
  3307. retval = ms_set_rw_reg_addr(chip, 0, 0, Pro_DataCount1, 6);
  3308. if (retval != STATUS_SUCCESS) {
  3309. return STATUS_FAIL;
  3310. }
  3311. buf[0] = 0;
  3312. buf[1] = 0;
  3313. if (type == 1) {
  3314. buf[2] = 0;
  3315. buf[3] = 0;
  3316. buf[4] = 0;
  3317. buf[5] = mg_entry_num;
  3318. }
  3319. retval = ms_write_bytes(chip, PRO_WRITE_REG, (type == 0) ? 1 : 6,
  3320. NO_WAIT_INT, buf, 6);
  3321. if (retval != STATUS_SUCCESS) {
  3322. return STATUS_FAIL;
  3323. }
  3324. return STATUS_SUCCESS;
  3325. }
  3326. int mg_set_leaf_id(struct scsi_cmnd *srb, struct rtsx_chip *chip)
  3327. {
  3328. int retval;
  3329. int i;
  3330. unsigned int lun = SCSI_LUN(srb);
  3331. u8 buf1[32], buf2[12];
  3332. if (scsi_bufflen(srb) < 12) {
  3333. set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
  3334. return STATUS_FAIL;
  3335. }
  3336. ms_cleanup_work(chip);
  3337. retval = ms_switch_clock(chip);
  3338. if (retval != STATUS_SUCCESS) {
  3339. return STATUS_FAIL;
  3340. }
  3341. retval = mg_send_ex_cmd(chip, MG_SET_LID, 0);
  3342. if (retval != STATUS_SUCCESS) {
  3343. set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_ESTAB);
  3344. return STATUS_FAIL;
  3345. }
  3346. memset(buf1, 0, 32);
  3347. rtsx_stor_get_xfer_buf(buf2, min_t(int, 12, scsi_bufflen(srb)), srb);
  3348. for (i = 0; i < 8; i++)
  3349. buf1[8 + i] = buf2[4 + i];
  3350. retval = ms_write_bytes(chip, PRO_WRITE_SHORT_DATA, 32, WAIT_INT,
  3351. buf1, 32);
  3352. if (retval != STATUS_SUCCESS) {
  3353. set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_ESTAB);
  3354. return STATUS_FAIL;
  3355. }
  3356. if (check_ms_err(chip)) {
  3357. set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_ESTAB);
  3358. rtsx_clear_ms_error(chip);
  3359. return STATUS_FAIL;
  3360. }
  3361. return STATUS_SUCCESS;
  3362. }
  3363. int mg_get_local_EKB(struct scsi_cmnd *srb, struct rtsx_chip *chip)
  3364. {
  3365. int retval = STATUS_FAIL;
  3366. int bufflen;
  3367. unsigned int lun = SCSI_LUN(srb);
  3368. u8 *buf = NULL;
  3369. ms_cleanup_work(chip);
  3370. retval = ms_switch_clock(chip);
  3371. if (retval != STATUS_SUCCESS) {
  3372. return STATUS_FAIL;
  3373. }
  3374. buf = kmalloc(1540, GFP_KERNEL);
  3375. if (!buf) {
  3376. return STATUS_ERROR;
  3377. }
  3378. buf[0] = 0x04;
  3379. buf[1] = 0x1A;
  3380. buf[2] = 0x00;
  3381. buf[3] = 0x00;
  3382. retval = mg_send_ex_cmd(chip, MG_GET_LEKB, 0);
  3383. if (retval != STATUS_SUCCESS) {
  3384. set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
  3385. goto free_buffer;
  3386. }
  3387. retval = ms_transfer_data(chip, MS_TM_AUTO_READ, PRO_READ_LONG_DATA,
  3388. 3, WAIT_INT, 0, 0, buf + 4, 1536);
  3389. if (retval != STATUS_SUCCESS) {
  3390. set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
  3391. rtsx_clear_ms_error(chip);
  3392. goto free_buffer;
  3393. }
  3394. if (check_ms_err(chip)) {
  3395. set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
  3396. rtsx_clear_ms_error(chip);
  3397. retval = STATUS_FAIL;
  3398. goto free_buffer;
  3399. }
  3400. bufflen = min_t(int, 1052, scsi_bufflen(srb));
  3401. rtsx_stor_set_xfer_buf(buf, bufflen, srb);
  3402. free_buffer:
  3403. kfree(buf);
  3404. return retval;
  3405. }
  3406. int mg_chg(struct scsi_cmnd *srb, struct rtsx_chip *chip)
  3407. {
  3408. struct ms_info *ms_card = &chip->ms_card;
  3409. int retval;
  3410. int bufflen;
  3411. int i;
  3412. unsigned int lun = SCSI_LUN(srb);
  3413. u8 buf[32];
  3414. ms_cleanup_work(chip);
  3415. retval = ms_switch_clock(chip);
  3416. if (retval != STATUS_SUCCESS) {
  3417. return STATUS_FAIL;
  3418. }
  3419. retval = mg_send_ex_cmd(chip, MG_GET_ID, 0);
  3420. if (retval != STATUS_SUCCESS) {
  3421. set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM);
  3422. return STATUS_FAIL;
  3423. }
  3424. retval = ms_read_bytes(chip, PRO_READ_SHORT_DATA, 32, WAIT_INT,
  3425. buf, 32);
  3426. if (retval != STATUS_SUCCESS) {
  3427. set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM);
  3428. return STATUS_FAIL;
  3429. }
  3430. if (check_ms_err(chip)) {
  3431. set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM);
  3432. rtsx_clear_ms_error(chip);
  3433. return STATUS_FAIL;
  3434. }
  3435. memcpy(ms_card->magic_gate_id, buf, 16);
  3436. #ifdef READ_BYTES_WAIT_INT
  3437. retval = ms_poll_int(chip);
  3438. if (retval != STATUS_SUCCESS) {
  3439. set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM);
  3440. return STATUS_FAIL;
  3441. }
  3442. #endif
  3443. retval = mg_send_ex_cmd(chip, MG_SET_RD, 0);
  3444. if (retval != STATUS_SUCCESS) {
  3445. set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM);
  3446. return STATUS_FAIL;
  3447. }
  3448. bufflen = min_t(int, 12, scsi_bufflen(srb));
  3449. rtsx_stor_get_xfer_buf(buf, bufflen, srb);
  3450. for (i = 0; i < 8; i++)
  3451. buf[i] = buf[4 + i];
  3452. for (i = 0; i < 24; i++)
  3453. buf[8 + i] = 0;
  3454. retval = ms_write_bytes(chip, PRO_WRITE_SHORT_DATA,
  3455. 32, WAIT_INT, buf, 32);
  3456. if (retval != STATUS_SUCCESS) {
  3457. set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM);
  3458. return STATUS_FAIL;
  3459. }
  3460. if (check_ms_err(chip)) {
  3461. set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM);
  3462. rtsx_clear_ms_error(chip);
  3463. return STATUS_FAIL;
  3464. }
  3465. ms_card->mg_auth = 0;
  3466. return STATUS_SUCCESS;
  3467. }
  3468. int mg_get_rsp_chg(struct scsi_cmnd *srb, struct rtsx_chip *chip)
  3469. {
  3470. struct ms_info *ms_card = &chip->ms_card;
  3471. int retval;
  3472. int bufflen;
  3473. unsigned int lun = SCSI_LUN(srb);
  3474. u8 buf1[32], buf2[36];
  3475. ms_cleanup_work(chip);
  3476. retval = ms_switch_clock(chip);
  3477. if (retval != STATUS_SUCCESS) {
  3478. return STATUS_FAIL;
  3479. }
  3480. retval = mg_send_ex_cmd(chip, MG_MAKE_RMS, 0);
  3481. if (retval != STATUS_SUCCESS) {
  3482. set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
  3483. return STATUS_FAIL;
  3484. }
  3485. retval = ms_read_bytes(chip, PRO_READ_SHORT_DATA, 32, WAIT_INT,
  3486. buf1, 32);
  3487. if (retval != STATUS_SUCCESS) {
  3488. set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
  3489. return STATUS_FAIL;
  3490. }
  3491. if (check_ms_err(chip)) {
  3492. set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
  3493. rtsx_clear_ms_error(chip);
  3494. return STATUS_FAIL;
  3495. }
  3496. buf2[0] = 0x00;
  3497. buf2[1] = 0x22;
  3498. buf2[2] = 0x00;
  3499. buf2[3] = 0x00;
  3500. memcpy(buf2 + 4, ms_card->magic_gate_id, 16);
  3501. memcpy(buf2 + 20, buf1, 16);
  3502. bufflen = min_t(int, 36, scsi_bufflen(srb));
  3503. rtsx_stor_set_xfer_buf(buf2, bufflen, srb);
  3504. #ifdef READ_BYTES_WAIT_INT
  3505. retval = ms_poll_int(chip);
  3506. if (retval != STATUS_SUCCESS) {
  3507. set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
  3508. return STATUS_FAIL;
  3509. }
  3510. #endif
  3511. return STATUS_SUCCESS;
  3512. }
  3513. int mg_rsp(struct scsi_cmnd *srb, struct rtsx_chip *chip)
  3514. {
  3515. struct ms_info *ms_card = &chip->ms_card;
  3516. int retval;
  3517. int i;
  3518. int bufflen;
  3519. unsigned int lun = SCSI_LUN(srb);
  3520. u8 buf[32];
  3521. ms_cleanup_work(chip);
  3522. retval = ms_switch_clock(chip);
  3523. if (retval != STATUS_SUCCESS) {
  3524. return STATUS_FAIL;
  3525. }
  3526. retval = mg_send_ex_cmd(chip, MG_MAKE_KSE, 0);
  3527. if (retval != STATUS_SUCCESS) {
  3528. set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
  3529. return STATUS_FAIL;
  3530. }
  3531. bufflen = min_t(int, 12, scsi_bufflen(srb));
  3532. rtsx_stor_get_xfer_buf(buf, bufflen, srb);
  3533. for (i = 0; i < 8; i++)
  3534. buf[i] = buf[4 + i];
  3535. for (i = 0; i < 24; i++)
  3536. buf[8 + i] = 0;
  3537. retval = ms_write_bytes(chip, PRO_WRITE_SHORT_DATA, 32, WAIT_INT,
  3538. buf, 32);
  3539. if (retval != STATUS_SUCCESS) {
  3540. set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
  3541. return STATUS_FAIL;
  3542. }
  3543. if (check_ms_err(chip)) {
  3544. set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
  3545. rtsx_clear_ms_error(chip);
  3546. return STATUS_FAIL;
  3547. }
  3548. ms_card->mg_auth = 1;
  3549. return STATUS_SUCCESS;
  3550. }
  3551. int mg_get_ICV(struct scsi_cmnd *srb, struct rtsx_chip *chip)
  3552. {
  3553. struct ms_info *ms_card = &chip->ms_card;
  3554. int retval;
  3555. int bufflen;
  3556. unsigned int lun = SCSI_LUN(srb);
  3557. u8 *buf = NULL;
  3558. ms_cleanup_work(chip);
  3559. retval = ms_switch_clock(chip);
  3560. if (retval != STATUS_SUCCESS) {
  3561. return STATUS_FAIL;
  3562. }
  3563. buf = kmalloc(1028, GFP_KERNEL);
  3564. if (!buf) {
  3565. return STATUS_ERROR;
  3566. }
  3567. buf[0] = 0x04;
  3568. buf[1] = 0x02;
  3569. buf[2] = 0x00;
  3570. buf[3] = 0x00;
  3571. retval = mg_send_ex_cmd(chip, MG_GET_IBD, ms_card->mg_entry_num);
  3572. if (retval != STATUS_SUCCESS) {
  3573. set_sense_type(chip, lun, SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
  3574. goto free_buffer;
  3575. }
  3576. retval = ms_transfer_data(chip, MS_TM_AUTO_READ, PRO_READ_LONG_DATA,
  3577. 2, WAIT_INT, 0, 0, buf + 4, 1024);
  3578. if (retval != STATUS_SUCCESS) {
  3579. set_sense_type(chip, lun, SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
  3580. rtsx_clear_ms_error(chip);
  3581. goto free_buffer;
  3582. }
  3583. if (check_ms_err(chip)) {
  3584. set_sense_type(chip, lun, SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
  3585. rtsx_clear_ms_error(chip);
  3586. retval = STATUS_FAIL;
  3587. goto free_buffer;
  3588. }
  3589. bufflen = min_t(int, 1028, scsi_bufflen(srb));
  3590. rtsx_stor_set_xfer_buf(buf, bufflen, srb);
  3591. free_buffer:
  3592. kfree(buf);
  3593. return retval;
  3594. }
  3595. int mg_set_ICV(struct scsi_cmnd *srb, struct rtsx_chip *chip)
  3596. {
  3597. struct ms_info *ms_card = &chip->ms_card;
  3598. int retval;
  3599. int bufflen;
  3600. #ifdef MG_SET_ICV_SLOW
  3601. int i;
  3602. #endif
  3603. unsigned int lun = SCSI_LUN(srb);
  3604. u8 *buf = NULL;
  3605. ms_cleanup_work(chip);
  3606. retval = ms_switch_clock(chip);
  3607. if (retval != STATUS_SUCCESS) {
  3608. return STATUS_FAIL;
  3609. }
  3610. buf = kmalloc(1028, GFP_KERNEL);
  3611. if (!buf) {
  3612. return STATUS_ERROR;
  3613. }
  3614. bufflen = min_t(int, 1028, scsi_bufflen(srb));
  3615. rtsx_stor_get_xfer_buf(buf, bufflen, srb);
  3616. retval = mg_send_ex_cmd(chip, MG_SET_IBD, ms_card->mg_entry_num);
  3617. if (retval != STATUS_SUCCESS) {
  3618. if (ms_card->mg_auth == 0) {
  3619. if ((buf[5] & 0xC0) != 0)
  3620. set_sense_type
  3621. (chip, lun,
  3622. SENSE_TYPE_MG_KEY_FAIL_NOT_ESTAB);
  3623. else
  3624. set_sense_type(chip, lun,
  3625. SENSE_TYPE_MG_WRITE_ERR);
  3626. } else {
  3627. set_sense_type(chip, lun, SENSE_TYPE_MG_WRITE_ERR);
  3628. }
  3629. goto SetICVFinish;
  3630. }
  3631. #ifdef MG_SET_ICV_SLOW
  3632. for (i = 0; i < 2; i++) {
  3633. udelay(50);
  3634. rtsx_init_cmd(chip);
  3635. rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC,
  3636. 0xFF, PRO_WRITE_LONG_DATA);
  3637. rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG, 0xFF, WAIT_INT);
  3638. rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE,
  3639. 0x01, RING_BUFFER);
  3640. trans_dma_enable(DMA_TO_DEVICE, chip, 512, DMA_512);
  3641. rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANSFER, 0xFF,
  3642. MS_TRANSFER_START | MS_TM_NORMAL_WRITE);
  3643. rtsx_add_cmd(chip, CHECK_REG_CMD, MS_TRANSFER,
  3644. MS_TRANSFER_END, MS_TRANSFER_END);
  3645. rtsx_send_cmd_no_wait(chip);
  3646. retval = rtsx_transfer_data(chip, MS_CARD, buf + 4 + i * 512,
  3647. 512, 0, DMA_TO_DEVICE, 3000);
  3648. if ((retval < 0) || check_ms_err(chip)) {
  3649. rtsx_clear_ms_error(chip);
  3650. if (ms_card->mg_auth == 0) {
  3651. if ((buf[5] & 0xC0) != 0)
  3652. set_sense_type
  3653. (chip, lun,
  3654. SENSE_TYPE_MG_KEY_FAIL_NOT_ESTAB);
  3655. else
  3656. set_sense_type(chip, lun,
  3657. SENSE_TYPE_MG_WRITE_ERR);
  3658. } else {
  3659. set_sense_type(chip, lun,
  3660. SENSE_TYPE_MG_WRITE_ERR);
  3661. }
  3662. retval = STATUS_FAIL;
  3663. goto SetICVFinish;
  3664. }
  3665. }
  3666. #else
  3667. retval = ms_transfer_data(chip, MS_TM_AUTO_WRITE, PRO_WRITE_LONG_DATA,
  3668. 2, WAIT_INT, 0, 0, buf + 4, 1024);
  3669. if ((retval != STATUS_SUCCESS) || check_ms_err(chip)) {
  3670. rtsx_clear_ms_error(chip);
  3671. if (ms_card->mg_auth == 0) {
  3672. if ((buf[5] & 0xC0) != 0)
  3673. set_sense_type
  3674. (chip, lun,
  3675. SENSE_TYPE_MG_KEY_FAIL_NOT_ESTAB);
  3676. else
  3677. set_sense_type(chip, lun,
  3678. SENSE_TYPE_MG_WRITE_ERR);
  3679. } else {
  3680. set_sense_type(chip, lun, SENSE_TYPE_MG_WRITE_ERR);
  3681. }
  3682. goto SetICVFinish;
  3683. }
  3684. #endif
  3685. SetICVFinish:
  3686. kfree(buf);
  3687. return retval;
  3688. }
  3689. #endif /* SUPPORT_MAGIC_GATE */
  3690. void ms_cleanup_work(struct rtsx_chip *chip)
  3691. {
  3692. struct ms_info *ms_card = &chip->ms_card;
  3693. if (CHK_MSPRO(ms_card)) {
  3694. if (ms_card->seq_mode) {
  3695. dev_dbg(rtsx_dev(chip), "MS Pro: stop transmission\n");
  3696. mspro_stop_seq_mode(chip);
  3697. ms_card->cleanup_counter = 0;
  3698. }
  3699. if (CHK_MSHG(ms_card)) {
  3700. rtsx_write_register(chip, MS_CFG,
  3701. MS_2K_SECTOR_MODE, 0x00);
  3702. }
  3703. }
  3704. #ifdef MS_DELAY_WRITE
  3705. else if ((!CHK_MSPRO(ms_card)) &&
  3706. ms_card->delay_write.delay_write_flag) {
  3707. dev_dbg(rtsx_dev(chip), "MS: delay write\n");
  3708. ms_delay_write(chip);
  3709. ms_card->cleanup_counter = 0;
  3710. }
  3711. #endif
  3712. }
  3713. int ms_power_off_card3v3(struct rtsx_chip *chip)
  3714. {
  3715. int retval;
  3716. retval = disable_card_clock(chip, MS_CARD);
  3717. if (retval != STATUS_SUCCESS) {
  3718. return STATUS_FAIL;
  3719. }
  3720. if (chip->asic_code) {
  3721. retval = ms_pull_ctl_disable(chip);
  3722. if (retval != STATUS_SUCCESS) {
  3723. return STATUS_FAIL;
  3724. }
  3725. } else {
  3726. retval = rtsx_write_register(chip, FPGA_PULL_CTL,
  3727. FPGA_MS_PULL_CTL_BIT | 0x20,
  3728. FPGA_MS_PULL_CTL_BIT);
  3729. if (retval) {
  3730. return retval;
  3731. }
  3732. }
  3733. retval = rtsx_write_register(chip, CARD_OE, MS_OUTPUT_EN, 0);
  3734. if (retval) {
  3735. return retval;
  3736. }
  3737. if (!chip->ft2_fast_mode) {
  3738. retval = card_power_off(chip, MS_CARD);
  3739. if (retval != STATUS_SUCCESS) {
  3740. return STATUS_FAIL;
  3741. }
  3742. }
  3743. return STATUS_SUCCESS;
  3744. }
  3745. int release_ms_card(struct rtsx_chip *chip)
  3746. {
  3747. struct ms_info *ms_card = &chip->ms_card;
  3748. int retval;
  3749. #ifdef MS_DELAY_WRITE
  3750. ms_card->delay_write.delay_write_flag = 0;
  3751. #endif
  3752. ms_card->pro_under_formatting = 0;
  3753. chip->card_ready &= ~MS_CARD;
  3754. chip->card_fail &= ~MS_CARD;
  3755. chip->card_wp &= ~MS_CARD;
  3756. ms_free_l2p_tbl(chip);
  3757. memset(ms_card->raw_sys_info, 0, 96);
  3758. #ifdef SUPPORT_PCGL_1P18
  3759. memset(ms_card->raw_model_name, 0, 48);
  3760. #endif
  3761. retval = ms_power_off_card3v3(chip);
  3762. if (retval != STATUS_SUCCESS) {
  3763. return STATUS_FAIL;
  3764. }
  3765. return STATUS_SUCCESS;
  3766. }