spi-altera.c 5.9 KB

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  1. /*
  2. * Altera SPI driver
  3. *
  4. * Copyright (C) 2008 Thomas Chou <thomas@wytron.com.tw>
  5. *
  6. * Based on spi_s3c24xx.c, which is:
  7. * Copyright (c) 2006 Ben Dooks
  8. * Copyright (c) 2006 Simtec Electronics
  9. * Ben Dooks <ben@simtec.co.uk>
  10. *
  11. * This program is free software; you can redistribute it and/or modify
  12. * it under the terms of the GNU General Public License version 2 as
  13. * published by the Free Software Foundation.
  14. */
  15. #include <linux/interrupt.h>
  16. #include <linux/errno.h>
  17. #include <linux/module.h>
  18. #include <linux/platform_device.h>
  19. #include <linux/spi/spi.h>
  20. #include <linux/io.h>
  21. #include <linux/of.h>
  22. #define DRV_NAME "spi_altera"
  23. #define ALTERA_SPI_RXDATA 0
  24. #define ALTERA_SPI_TXDATA 4
  25. #define ALTERA_SPI_STATUS 8
  26. #define ALTERA_SPI_CONTROL 12
  27. #define ALTERA_SPI_SLAVE_SEL 20
  28. #define ALTERA_SPI_STATUS_ROE_MSK 0x8
  29. #define ALTERA_SPI_STATUS_TOE_MSK 0x10
  30. #define ALTERA_SPI_STATUS_TMT_MSK 0x20
  31. #define ALTERA_SPI_STATUS_TRDY_MSK 0x40
  32. #define ALTERA_SPI_STATUS_RRDY_MSK 0x80
  33. #define ALTERA_SPI_STATUS_E_MSK 0x100
  34. #define ALTERA_SPI_CONTROL_IROE_MSK 0x8
  35. #define ALTERA_SPI_CONTROL_ITOE_MSK 0x10
  36. #define ALTERA_SPI_CONTROL_ITRDY_MSK 0x40
  37. #define ALTERA_SPI_CONTROL_IRRDY_MSK 0x80
  38. #define ALTERA_SPI_CONTROL_IE_MSK 0x100
  39. #define ALTERA_SPI_CONTROL_SSO_MSK 0x400
  40. struct altera_spi {
  41. void __iomem *base;
  42. int irq;
  43. int len;
  44. int count;
  45. int bytes_per_word;
  46. unsigned long imr;
  47. /* data buffers */
  48. const unsigned char *tx;
  49. unsigned char *rx;
  50. };
  51. static inline struct altera_spi *altera_spi_to_hw(struct spi_device *sdev)
  52. {
  53. return spi_master_get_devdata(sdev->master);
  54. }
  55. static void altera_spi_set_cs(struct spi_device *spi, bool is_high)
  56. {
  57. struct altera_spi *hw = altera_spi_to_hw(spi);
  58. if (is_high) {
  59. hw->imr &= ~ALTERA_SPI_CONTROL_SSO_MSK;
  60. writel(hw->imr, hw->base + ALTERA_SPI_CONTROL);
  61. writel(0, hw->base + ALTERA_SPI_SLAVE_SEL);
  62. } else {
  63. writel(BIT(spi->chip_select), hw->base + ALTERA_SPI_SLAVE_SEL);
  64. hw->imr |= ALTERA_SPI_CONTROL_SSO_MSK;
  65. writel(hw->imr, hw->base + ALTERA_SPI_CONTROL);
  66. }
  67. }
  68. static void altera_spi_tx_word(struct altera_spi *hw)
  69. {
  70. unsigned int txd = 0;
  71. if (hw->tx) {
  72. switch (hw->bytes_per_word) {
  73. case 1:
  74. txd = hw->tx[hw->count];
  75. break;
  76. case 2:
  77. txd = (hw->tx[hw->count * 2]
  78. | (hw->tx[hw->count * 2 + 1] << 8));
  79. break;
  80. }
  81. }
  82. writel(txd, hw->base + ALTERA_SPI_TXDATA);
  83. }
  84. static void altera_spi_rx_word(struct altera_spi *hw)
  85. {
  86. unsigned int rxd;
  87. rxd = readl(hw->base + ALTERA_SPI_RXDATA);
  88. if (hw->rx) {
  89. switch (hw->bytes_per_word) {
  90. case 1:
  91. hw->rx[hw->count] = rxd;
  92. break;
  93. case 2:
  94. hw->rx[hw->count * 2] = rxd;
  95. hw->rx[hw->count * 2 + 1] = rxd >> 8;
  96. break;
  97. }
  98. }
  99. hw->count++;
  100. }
  101. static int altera_spi_txrx(struct spi_master *master,
  102. struct spi_device *spi, struct spi_transfer *t)
  103. {
  104. struct altera_spi *hw = spi_master_get_devdata(master);
  105. hw->tx = t->tx_buf;
  106. hw->rx = t->rx_buf;
  107. hw->count = 0;
  108. hw->bytes_per_word = DIV_ROUND_UP(t->bits_per_word, 8);
  109. hw->len = t->len / hw->bytes_per_word;
  110. if (hw->irq >= 0) {
  111. /* enable receive interrupt */
  112. hw->imr |= ALTERA_SPI_CONTROL_IRRDY_MSK;
  113. writel(hw->imr, hw->base + ALTERA_SPI_CONTROL);
  114. /* send the first byte */
  115. altera_spi_tx_word(hw);
  116. } else {
  117. while (hw->count < hw->len) {
  118. altera_spi_tx_word(hw);
  119. while (!(readl(hw->base + ALTERA_SPI_STATUS) &
  120. ALTERA_SPI_STATUS_RRDY_MSK))
  121. cpu_relax();
  122. altera_spi_rx_word(hw);
  123. }
  124. spi_finalize_current_transfer(master);
  125. }
  126. return t->len;
  127. }
  128. static irqreturn_t altera_spi_irq(int irq, void *dev)
  129. {
  130. struct spi_master *master = dev;
  131. struct altera_spi *hw = spi_master_get_devdata(master);
  132. altera_spi_rx_word(hw);
  133. if (hw->count < hw->len) {
  134. altera_spi_tx_word(hw);
  135. } else {
  136. /* disable receive interrupt */
  137. hw->imr &= ~ALTERA_SPI_CONTROL_IRRDY_MSK;
  138. writel(hw->imr, hw->base + ALTERA_SPI_CONTROL);
  139. spi_finalize_current_transfer(master);
  140. }
  141. return IRQ_HANDLED;
  142. }
  143. static int altera_spi_probe(struct platform_device *pdev)
  144. {
  145. struct altera_spi *hw;
  146. struct spi_master *master;
  147. struct resource *res;
  148. int err = -ENODEV;
  149. master = spi_alloc_master(&pdev->dev, sizeof(struct altera_spi));
  150. if (!master)
  151. return err;
  152. /* setup the master state. */
  153. master->bus_num = pdev->id;
  154. master->num_chipselect = 16;
  155. master->mode_bits = SPI_CS_HIGH;
  156. master->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 16);
  157. master->dev.of_node = pdev->dev.of_node;
  158. master->transfer_one = altera_spi_txrx;
  159. master->set_cs = altera_spi_set_cs;
  160. hw = spi_master_get_devdata(master);
  161. /* find and map our resources */
  162. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  163. hw->base = devm_ioremap_resource(&pdev->dev, res);
  164. if (IS_ERR(hw->base)) {
  165. err = PTR_ERR(hw->base);
  166. goto exit;
  167. }
  168. /* program defaults into the registers */
  169. hw->imr = 0; /* disable spi interrupts */
  170. writel(hw->imr, hw->base + ALTERA_SPI_CONTROL);
  171. writel(0, hw->base + ALTERA_SPI_STATUS); /* clear status reg */
  172. if (readl(hw->base + ALTERA_SPI_STATUS) & ALTERA_SPI_STATUS_RRDY_MSK)
  173. readl(hw->base + ALTERA_SPI_RXDATA); /* flush rxdata */
  174. /* irq is optional */
  175. hw->irq = platform_get_irq(pdev, 0);
  176. if (hw->irq >= 0) {
  177. err = devm_request_irq(&pdev->dev, hw->irq, altera_spi_irq, 0,
  178. pdev->name, master);
  179. if (err)
  180. goto exit;
  181. }
  182. err = devm_spi_register_master(&pdev->dev, master);
  183. if (err)
  184. goto exit;
  185. dev_info(&pdev->dev, "base %p, irq %d\n", hw->base, hw->irq);
  186. return 0;
  187. exit:
  188. spi_master_put(master);
  189. return err;
  190. }
  191. #ifdef CONFIG_OF
  192. static const struct of_device_id altera_spi_match[] = {
  193. { .compatible = "ALTR,spi-1.0", },
  194. { .compatible = "altr,spi-1.0", },
  195. {},
  196. };
  197. MODULE_DEVICE_TABLE(of, altera_spi_match);
  198. #endif /* CONFIG_OF */
  199. static struct platform_driver altera_spi_driver = {
  200. .probe = altera_spi_probe,
  201. .driver = {
  202. .name = DRV_NAME,
  203. .pm = NULL,
  204. .of_match_table = of_match_ptr(altera_spi_match),
  205. },
  206. };
  207. module_platform_driver(altera_spi_driver);
  208. MODULE_DESCRIPTION("Altera SPI driver");
  209. MODULE_AUTHOR("Thomas Chou <thomas@wytron.com.tw>");
  210. MODULE_LICENSE("GPL");
  211. MODULE_ALIAS("platform:" DRV_NAME);