bus.c 24 KB

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  1. // SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
  2. // Copyright(c) 2015-17 Intel Corporation.
  3. #include <linux/acpi.h>
  4. #include <linux/mod_devicetable.h>
  5. #include <linux/pm_runtime.h>
  6. #include <linux/soundwire/sdw_registers.h>
  7. #include <linux/soundwire/sdw.h>
  8. #include "bus.h"
  9. /**
  10. * sdw_add_bus_master() - add a bus Master instance
  11. * @bus: bus instance
  12. *
  13. * Initializes the bus instance, read properties and create child
  14. * devices.
  15. */
  16. int sdw_add_bus_master(struct sdw_bus *bus)
  17. {
  18. struct sdw_master_prop *prop = NULL;
  19. int ret;
  20. if (!bus->dev) {
  21. pr_err("SoundWire bus has no device");
  22. return -ENODEV;
  23. }
  24. if (!bus->ops) {
  25. dev_err(bus->dev, "SoundWire Bus ops are not set");
  26. return -EINVAL;
  27. }
  28. mutex_init(&bus->msg_lock);
  29. mutex_init(&bus->bus_lock);
  30. INIT_LIST_HEAD(&bus->slaves);
  31. INIT_LIST_HEAD(&bus->m_rt_list);
  32. if (bus->ops->read_prop) {
  33. ret = bus->ops->read_prop(bus);
  34. if (ret < 0) {
  35. dev_err(bus->dev, "Bus read properties failed:%d", ret);
  36. return ret;
  37. }
  38. }
  39. /*
  40. * Device numbers in SoundWire are 0 thru 15. Enumeration device
  41. * number (0), Broadcast device number (15), Group numbers (12 and
  42. * 13) and Master device number (14) are not used for assignment so
  43. * mask these and other higher bits.
  44. */
  45. /* Set higher order bits */
  46. *bus->assigned = ~GENMASK(SDW_BROADCAST_DEV_NUM, SDW_ENUM_DEV_NUM);
  47. /* Set enumuration device number and broadcast device number */
  48. set_bit(SDW_ENUM_DEV_NUM, bus->assigned);
  49. set_bit(SDW_BROADCAST_DEV_NUM, bus->assigned);
  50. /* Set group device numbers and master device number */
  51. set_bit(SDW_GROUP12_DEV_NUM, bus->assigned);
  52. set_bit(SDW_GROUP13_DEV_NUM, bus->assigned);
  53. set_bit(SDW_MASTER_DEV_NUM, bus->assigned);
  54. /*
  55. * SDW is an enumerable bus, but devices can be powered off. So,
  56. * they won't be able to report as present.
  57. *
  58. * Create Slave devices based on Slaves described in
  59. * the respective firmware (ACPI/DT)
  60. */
  61. if (IS_ENABLED(CONFIG_ACPI) && ACPI_HANDLE(bus->dev))
  62. ret = sdw_acpi_find_slaves(bus);
  63. else
  64. ret = -ENOTSUPP; /* No ACPI/DT so error out */
  65. if (ret) {
  66. dev_err(bus->dev, "Finding slaves failed:%d\n", ret);
  67. return ret;
  68. }
  69. /*
  70. * Initialize clock values based on Master properties. The max
  71. * frequency is read from max_freq property. Current assumption
  72. * is that the bus will start at highest clock frequency when
  73. * powered on.
  74. *
  75. * Default active bank will be 0 as out of reset the Slaves have
  76. * to start with bank 0 (Table 40 of Spec)
  77. */
  78. prop = &bus->prop;
  79. bus->params.max_dr_freq = prop->max_freq * SDW_DOUBLE_RATE_FACTOR;
  80. bus->params.curr_dr_freq = bus->params.max_dr_freq;
  81. bus->params.curr_bank = SDW_BANK0;
  82. bus->params.next_bank = SDW_BANK1;
  83. return 0;
  84. }
  85. EXPORT_SYMBOL(sdw_add_bus_master);
  86. static int sdw_delete_slave(struct device *dev, void *data)
  87. {
  88. struct sdw_slave *slave = dev_to_sdw_dev(dev);
  89. struct sdw_bus *bus = slave->bus;
  90. mutex_lock(&bus->bus_lock);
  91. if (slave->dev_num) /* clear dev_num if assigned */
  92. clear_bit(slave->dev_num, bus->assigned);
  93. list_del_init(&slave->node);
  94. mutex_unlock(&bus->bus_lock);
  95. device_unregister(dev);
  96. return 0;
  97. }
  98. /**
  99. * sdw_delete_bus_master() - delete the bus master instance
  100. * @bus: bus to be deleted
  101. *
  102. * Remove the instance, delete the child devices.
  103. */
  104. void sdw_delete_bus_master(struct sdw_bus *bus)
  105. {
  106. device_for_each_child(bus->dev, NULL, sdw_delete_slave);
  107. }
  108. EXPORT_SYMBOL(sdw_delete_bus_master);
  109. /*
  110. * SDW IO Calls
  111. */
  112. static inline int find_response_code(enum sdw_command_response resp)
  113. {
  114. switch (resp) {
  115. case SDW_CMD_OK:
  116. return 0;
  117. case SDW_CMD_IGNORED:
  118. return -ENODATA;
  119. case SDW_CMD_TIMEOUT:
  120. return -ETIMEDOUT;
  121. default:
  122. return -EIO;
  123. }
  124. }
  125. static inline int do_transfer(struct sdw_bus *bus, struct sdw_msg *msg)
  126. {
  127. int retry = bus->prop.err_threshold;
  128. enum sdw_command_response resp;
  129. int ret = 0, i;
  130. for (i = 0; i <= retry; i++) {
  131. resp = bus->ops->xfer_msg(bus, msg);
  132. ret = find_response_code(resp);
  133. /* if cmd is ok or ignored return */
  134. if (ret == 0 || ret == -ENODATA)
  135. return ret;
  136. }
  137. return ret;
  138. }
  139. static inline int do_transfer_defer(struct sdw_bus *bus,
  140. struct sdw_msg *msg, struct sdw_defer *defer)
  141. {
  142. int retry = bus->prop.err_threshold;
  143. enum sdw_command_response resp;
  144. int ret = 0, i;
  145. defer->msg = msg;
  146. defer->length = msg->len;
  147. init_completion(&defer->complete);
  148. for (i = 0; i <= retry; i++) {
  149. resp = bus->ops->xfer_msg_defer(bus, msg, defer);
  150. ret = find_response_code(resp);
  151. /* if cmd is ok or ignored return */
  152. if (ret == 0 || ret == -ENODATA)
  153. return ret;
  154. }
  155. return ret;
  156. }
  157. static int sdw_reset_page(struct sdw_bus *bus, u16 dev_num)
  158. {
  159. int retry = bus->prop.err_threshold;
  160. enum sdw_command_response resp;
  161. int ret = 0, i;
  162. for (i = 0; i <= retry; i++) {
  163. resp = bus->ops->reset_page_addr(bus, dev_num);
  164. ret = find_response_code(resp);
  165. /* if cmd is ok or ignored return */
  166. if (ret == 0 || ret == -ENODATA)
  167. return ret;
  168. }
  169. return ret;
  170. }
  171. /**
  172. * sdw_transfer() - Synchronous transfer message to a SDW Slave device
  173. * @bus: SDW bus
  174. * @msg: SDW message to be xfered
  175. */
  176. int sdw_transfer(struct sdw_bus *bus, struct sdw_msg *msg)
  177. {
  178. int ret;
  179. mutex_lock(&bus->msg_lock);
  180. ret = do_transfer(bus, msg);
  181. if (ret != 0 && ret != -ENODATA)
  182. dev_err(bus->dev, "trf on Slave %d failed:%d\n",
  183. msg->dev_num, ret);
  184. if (msg->page)
  185. sdw_reset_page(bus, msg->dev_num);
  186. mutex_unlock(&bus->msg_lock);
  187. return ret;
  188. }
  189. /**
  190. * sdw_transfer_defer() - Asynchronously transfer message to a SDW Slave device
  191. * @bus: SDW bus
  192. * @msg: SDW message to be xfered
  193. * @defer: Defer block for signal completion
  194. *
  195. * Caller needs to hold the msg_lock lock while calling this
  196. */
  197. int sdw_transfer_defer(struct sdw_bus *bus, struct sdw_msg *msg,
  198. struct sdw_defer *defer)
  199. {
  200. int ret;
  201. if (!bus->ops->xfer_msg_defer)
  202. return -ENOTSUPP;
  203. ret = do_transfer_defer(bus, msg, defer);
  204. if (ret != 0 && ret != -ENODATA)
  205. dev_err(bus->dev, "Defer trf on Slave %d failed:%d\n",
  206. msg->dev_num, ret);
  207. if (msg->page)
  208. sdw_reset_page(bus, msg->dev_num);
  209. return ret;
  210. }
  211. int sdw_fill_msg(struct sdw_msg *msg, struct sdw_slave *slave,
  212. u32 addr, size_t count, u16 dev_num, u8 flags, u8 *buf)
  213. {
  214. memset(msg, 0, sizeof(*msg));
  215. msg->addr = addr; /* addr is 16 bit and truncated here */
  216. msg->len = count;
  217. msg->dev_num = dev_num;
  218. msg->flags = flags;
  219. msg->buf = buf;
  220. msg->ssp_sync = false;
  221. msg->page = false;
  222. if (addr < SDW_REG_NO_PAGE) { /* no paging area */
  223. return 0;
  224. } else if (addr >= SDW_REG_MAX) { /* illegal addr */
  225. pr_err("SDW: Invalid address %x passed\n", addr);
  226. return -EINVAL;
  227. }
  228. if (addr < SDW_REG_OPTIONAL_PAGE) { /* 32k but no page */
  229. if (slave && !slave->prop.paging_support)
  230. return 0;
  231. /* no need for else as that will fall thru to paging */
  232. }
  233. /* paging mandatory */
  234. if (dev_num == SDW_ENUM_DEV_NUM || dev_num == SDW_BROADCAST_DEV_NUM) {
  235. pr_err("SDW: Invalid device for paging :%d\n", dev_num);
  236. return -EINVAL;
  237. }
  238. if (!slave) {
  239. pr_err("SDW: No slave for paging addr\n");
  240. return -EINVAL;
  241. } else if (!slave->prop.paging_support) {
  242. dev_err(&slave->dev,
  243. "address %x needs paging but no support", addr);
  244. return -EINVAL;
  245. }
  246. msg->addr_page1 = (addr >> SDW_REG_SHIFT(SDW_SCP_ADDRPAGE1_MASK));
  247. msg->addr_page2 = (addr >> SDW_REG_SHIFT(SDW_SCP_ADDRPAGE2_MASK));
  248. msg->addr |= BIT(15);
  249. msg->page = true;
  250. return 0;
  251. }
  252. /**
  253. * sdw_nread() - Read "n" contiguous SDW Slave registers
  254. * @slave: SDW Slave
  255. * @addr: Register address
  256. * @count: length
  257. * @val: Buffer for values to be read
  258. */
  259. int sdw_nread(struct sdw_slave *slave, u32 addr, size_t count, u8 *val)
  260. {
  261. struct sdw_msg msg;
  262. int ret;
  263. ret = sdw_fill_msg(&msg, slave, addr, count,
  264. slave->dev_num, SDW_MSG_FLAG_READ, val);
  265. if (ret < 0)
  266. return ret;
  267. ret = pm_runtime_get_sync(slave->bus->dev);
  268. if (ret < 0)
  269. return ret;
  270. ret = sdw_transfer(slave->bus, &msg);
  271. pm_runtime_put(slave->bus->dev);
  272. return ret;
  273. }
  274. EXPORT_SYMBOL(sdw_nread);
  275. /**
  276. * sdw_nwrite() - Write "n" contiguous SDW Slave registers
  277. * @slave: SDW Slave
  278. * @addr: Register address
  279. * @count: length
  280. * @val: Buffer for values to be read
  281. */
  282. int sdw_nwrite(struct sdw_slave *slave, u32 addr, size_t count, u8 *val)
  283. {
  284. struct sdw_msg msg;
  285. int ret;
  286. ret = sdw_fill_msg(&msg, slave, addr, count,
  287. slave->dev_num, SDW_MSG_FLAG_WRITE, val);
  288. if (ret < 0)
  289. return ret;
  290. ret = pm_runtime_get_sync(slave->bus->dev);
  291. if (ret < 0)
  292. return ret;
  293. ret = sdw_transfer(slave->bus, &msg);
  294. pm_runtime_put(slave->bus->dev);
  295. return ret;
  296. }
  297. EXPORT_SYMBOL(sdw_nwrite);
  298. /**
  299. * sdw_read() - Read a SDW Slave register
  300. * @slave: SDW Slave
  301. * @addr: Register address
  302. */
  303. int sdw_read(struct sdw_slave *slave, u32 addr)
  304. {
  305. u8 buf;
  306. int ret;
  307. ret = sdw_nread(slave, addr, 1, &buf);
  308. if (ret < 0)
  309. return ret;
  310. else
  311. return buf;
  312. }
  313. EXPORT_SYMBOL(sdw_read);
  314. /**
  315. * sdw_write() - Write a SDW Slave register
  316. * @slave: SDW Slave
  317. * @addr: Register address
  318. * @value: Register value
  319. */
  320. int sdw_write(struct sdw_slave *slave, u32 addr, u8 value)
  321. {
  322. return sdw_nwrite(slave, addr, 1, &value);
  323. }
  324. EXPORT_SYMBOL(sdw_write);
  325. /*
  326. * SDW alert handling
  327. */
  328. /* called with bus_lock held */
  329. static struct sdw_slave *sdw_get_slave(struct sdw_bus *bus, int i)
  330. {
  331. struct sdw_slave *slave = NULL;
  332. list_for_each_entry(slave, &bus->slaves, node) {
  333. if (slave->dev_num == i)
  334. return slave;
  335. }
  336. return NULL;
  337. }
  338. static int sdw_compare_devid(struct sdw_slave *slave, struct sdw_slave_id id)
  339. {
  340. if ((slave->id.unique_id != id.unique_id) ||
  341. (slave->id.mfg_id != id.mfg_id) ||
  342. (slave->id.part_id != id.part_id) ||
  343. (slave->id.class_id != id.class_id))
  344. return -ENODEV;
  345. return 0;
  346. }
  347. /* called with bus_lock held */
  348. static int sdw_get_device_num(struct sdw_slave *slave)
  349. {
  350. int bit;
  351. bit = find_first_zero_bit(slave->bus->assigned, SDW_MAX_DEVICES);
  352. if (bit == SDW_MAX_DEVICES) {
  353. bit = -ENODEV;
  354. goto err;
  355. }
  356. /*
  357. * Do not update dev_num in Slave data structure here,
  358. * Update once program dev_num is successful
  359. */
  360. set_bit(bit, slave->bus->assigned);
  361. err:
  362. return bit;
  363. }
  364. static int sdw_assign_device_num(struct sdw_slave *slave)
  365. {
  366. int ret, dev_num;
  367. /* check first if device number is assigned, if so reuse that */
  368. if (!slave->dev_num) {
  369. mutex_lock(&slave->bus->bus_lock);
  370. dev_num = sdw_get_device_num(slave);
  371. mutex_unlock(&slave->bus->bus_lock);
  372. if (dev_num < 0) {
  373. dev_err(slave->bus->dev, "Get dev_num failed: %d",
  374. dev_num);
  375. return dev_num;
  376. }
  377. } else {
  378. dev_info(slave->bus->dev,
  379. "Slave already registered dev_num:%d",
  380. slave->dev_num);
  381. /* Clear the slave->dev_num to transfer message on device 0 */
  382. dev_num = slave->dev_num;
  383. slave->dev_num = 0;
  384. }
  385. ret = sdw_write(slave, SDW_SCP_DEVNUMBER, dev_num);
  386. if (ret < 0) {
  387. dev_err(&slave->dev, "Program device_num failed: %d", ret);
  388. return ret;
  389. }
  390. /* After xfer of msg, restore dev_num */
  391. slave->dev_num = dev_num;
  392. return 0;
  393. }
  394. void sdw_extract_slave_id(struct sdw_bus *bus,
  395. u64 addr, struct sdw_slave_id *id)
  396. {
  397. dev_dbg(bus->dev, "SDW Slave Addr: %llx", addr);
  398. /*
  399. * Spec definition
  400. * Register Bit Contents
  401. * DevId_0 [7:4] 47:44 sdw_version
  402. * DevId_0 [3:0] 43:40 unique_id
  403. * DevId_1 39:32 mfg_id [15:8]
  404. * DevId_2 31:24 mfg_id [7:0]
  405. * DevId_3 23:16 part_id [15:8]
  406. * DevId_4 15:08 part_id [7:0]
  407. * DevId_5 07:00 class_id
  408. */
  409. id->sdw_version = (addr >> 44) & GENMASK(3, 0);
  410. id->unique_id = (addr >> 40) & GENMASK(3, 0);
  411. id->mfg_id = (addr >> 24) & GENMASK(15, 0);
  412. id->part_id = (addr >> 8) & GENMASK(15, 0);
  413. id->class_id = addr & GENMASK(7, 0);
  414. dev_dbg(bus->dev,
  415. "SDW Slave class_id %x, part_id %x, mfg_id %x, unique_id %x, version %x",
  416. id->class_id, id->part_id, id->mfg_id,
  417. id->unique_id, id->sdw_version);
  418. }
  419. static int sdw_program_device_num(struct sdw_bus *bus)
  420. {
  421. u8 buf[SDW_NUM_DEV_ID_REGISTERS] = {0};
  422. struct sdw_slave *slave, *_s;
  423. struct sdw_slave_id id;
  424. struct sdw_msg msg;
  425. bool found = false;
  426. int count = 0, ret;
  427. u64 addr;
  428. /* No Slave, so use raw xfer api */
  429. ret = sdw_fill_msg(&msg, NULL, SDW_SCP_DEVID_0,
  430. SDW_NUM_DEV_ID_REGISTERS, 0, SDW_MSG_FLAG_READ, buf);
  431. if (ret < 0)
  432. return ret;
  433. do {
  434. ret = sdw_transfer(bus, &msg);
  435. if (ret == -ENODATA) { /* end of device id reads */
  436. ret = 0;
  437. break;
  438. }
  439. if (ret < 0) {
  440. dev_err(bus->dev, "DEVID read fail:%d\n", ret);
  441. break;
  442. }
  443. /*
  444. * Construct the addr and extract. Cast the higher shift
  445. * bits to avoid truncation due to size limit.
  446. */
  447. addr = buf[5] | (buf[4] << 8) | (buf[3] << 16) |
  448. ((u64)buf[2] << 24) | ((u64)buf[1] << 32) |
  449. ((u64)buf[0] << 40);
  450. sdw_extract_slave_id(bus, addr, &id);
  451. /* Now compare with entries */
  452. list_for_each_entry_safe(slave, _s, &bus->slaves, node) {
  453. if (sdw_compare_devid(slave, id) == 0) {
  454. found = true;
  455. /*
  456. * Assign a new dev_num to this Slave and
  457. * not mark it present. It will be marked
  458. * present after it reports ATTACHED on new
  459. * dev_num
  460. */
  461. ret = sdw_assign_device_num(slave);
  462. if (ret) {
  463. dev_err(slave->bus->dev,
  464. "Assign dev_num failed:%d",
  465. ret);
  466. return ret;
  467. }
  468. break;
  469. }
  470. }
  471. if (found == false) {
  472. /* TODO: Park this device in Group 13 */
  473. dev_err(bus->dev, "Slave Entry not found");
  474. }
  475. count++;
  476. /*
  477. * Check till error out or retry (count) exhausts.
  478. * Device can drop off and rejoin during enumeration
  479. * so count till twice the bound.
  480. */
  481. } while (ret == 0 && count < (SDW_MAX_DEVICES * 2));
  482. return ret;
  483. }
  484. static void sdw_modify_slave_status(struct sdw_slave *slave,
  485. enum sdw_slave_status status)
  486. {
  487. mutex_lock(&slave->bus->bus_lock);
  488. slave->status = status;
  489. mutex_unlock(&slave->bus->bus_lock);
  490. }
  491. int sdw_configure_dpn_intr(struct sdw_slave *slave,
  492. int port, bool enable, int mask)
  493. {
  494. u32 addr;
  495. int ret;
  496. u8 val = 0;
  497. addr = SDW_DPN_INTMASK(port);
  498. /* Set/Clear port ready interrupt mask */
  499. if (enable) {
  500. val |= mask;
  501. val |= SDW_DPN_INT_PORT_READY;
  502. } else {
  503. val &= ~(mask);
  504. val &= ~SDW_DPN_INT_PORT_READY;
  505. }
  506. ret = sdw_update(slave, addr, (mask | SDW_DPN_INT_PORT_READY), val);
  507. if (ret < 0)
  508. dev_err(slave->bus->dev,
  509. "SDW_DPN_INTMASK write failed:%d", val);
  510. return ret;
  511. }
  512. static int sdw_initialize_slave(struct sdw_slave *slave)
  513. {
  514. struct sdw_slave_prop *prop = &slave->prop;
  515. int ret;
  516. u8 val;
  517. /*
  518. * Set bus clash, parity and SCP implementation
  519. * defined interrupt mask
  520. * TODO: Read implementation defined interrupt mask
  521. * from Slave property
  522. */
  523. val = SDW_SCP_INT1_IMPL_DEF | SDW_SCP_INT1_BUS_CLASH |
  524. SDW_SCP_INT1_PARITY;
  525. /* Enable SCP interrupts */
  526. ret = sdw_update(slave, SDW_SCP_INTMASK1, val, val);
  527. if (ret < 0) {
  528. dev_err(slave->bus->dev,
  529. "SDW_SCP_INTMASK1 write failed:%d", ret);
  530. return ret;
  531. }
  532. /* No need to continue if DP0 is not present */
  533. if (!slave->prop.dp0_prop)
  534. return 0;
  535. /* Enable DP0 interrupts */
  536. val = prop->dp0_prop->device_interrupts;
  537. val |= SDW_DP0_INT_PORT_READY | SDW_DP0_INT_BRA_FAILURE;
  538. ret = sdw_update(slave, SDW_DP0_INTMASK, val, val);
  539. if (ret < 0) {
  540. dev_err(slave->bus->dev,
  541. "SDW_DP0_INTMASK read failed:%d", ret);
  542. return val;
  543. }
  544. return 0;
  545. }
  546. static int sdw_handle_dp0_interrupt(struct sdw_slave *slave, u8 *slave_status)
  547. {
  548. u8 clear = 0, impl_int_mask;
  549. int status, status2, ret, count = 0;
  550. status = sdw_read(slave, SDW_DP0_INT);
  551. if (status < 0) {
  552. dev_err(slave->bus->dev,
  553. "SDW_DP0_INT read failed:%d", status);
  554. return status;
  555. }
  556. do {
  557. if (status & SDW_DP0_INT_TEST_FAIL) {
  558. dev_err(&slave->dev, "Test fail for port 0");
  559. clear |= SDW_DP0_INT_TEST_FAIL;
  560. }
  561. /*
  562. * Assumption: PORT_READY interrupt will be received only for
  563. * ports implementing Channel Prepare state machine (CP_SM)
  564. */
  565. if (status & SDW_DP0_INT_PORT_READY) {
  566. complete(&slave->port_ready[0]);
  567. clear |= SDW_DP0_INT_PORT_READY;
  568. }
  569. if (status & SDW_DP0_INT_BRA_FAILURE) {
  570. dev_err(&slave->dev, "BRA failed");
  571. clear |= SDW_DP0_INT_BRA_FAILURE;
  572. }
  573. impl_int_mask = SDW_DP0_INT_IMPDEF1 |
  574. SDW_DP0_INT_IMPDEF2 | SDW_DP0_INT_IMPDEF3;
  575. if (status & impl_int_mask) {
  576. clear |= impl_int_mask;
  577. *slave_status = clear;
  578. }
  579. /* clear the interrupt */
  580. ret = sdw_write(slave, SDW_DP0_INT, clear);
  581. if (ret < 0) {
  582. dev_err(slave->bus->dev,
  583. "SDW_DP0_INT write failed:%d", ret);
  584. return ret;
  585. }
  586. /* Read DP0 interrupt again */
  587. status2 = sdw_read(slave, SDW_DP0_INT);
  588. if (status2 < 0) {
  589. dev_err(slave->bus->dev,
  590. "SDW_DP0_INT read failed:%d", status2);
  591. return status2;
  592. }
  593. status &= status2;
  594. count++;
  595. /* we can get alerts while processing so keep retrying */
  596. } while (status != 0 && count < SDW_READ_INTR_CLEAR_RETRY);
  597. if (count == SDW_READ_INTR_CLEAR_RETRY)
  598. dev_warn(slave->bus->dev, "Reached MAX_RETRY on DP0 read");
  599. return ret;
  600. }
  601. static int sdw_handle_port_interrupt(struct sdw_slave *slave,
  602. int port, u8 *slave_status)
  603. {
  604. u8 clear = 0, impl_int_mask;
  605. int status, status2, ret, count = 0;
  606. u32 addr;
  607. if (port == 0)
  608. return sdw_handle_dp0_interrupt(slave, slave_status);
  609. addr = SDW_DPN_INT(port);
  610. status = sdw_read(slave, addr);
  611. if (status < 0) {
  612. dev_err(slave->bus->dev,
  613. "SDW_DPN_INT read failed:%d", status);
  614. return status;
  615. }
  616. do {
  617. if (status & SDW_DPN_INT_TEST_FAIL) {
  618. dev_err(&slave->dev, "Test fail for port:%d", port);
  619. clear |= SDW_DPN_INT_TEST_FAIL;
  620. }
  621. /*
  622. * Assumption: PORT_READY interrupt will be received only
  623. * for ports implementing CP_SM.
  624. */
  625. if (status & SDW_DPN_INT_PORT_READY) {
  626. complete(&slave->port_ready[port]);
  627. clear |= SDW_DPN_INT_PORT_READY;
  628. }
  629. impl_int_mask = SDW_DPN_INT_IMPDEF1 |
  630. SDW_DPN_INT_IMPDEF2 | SDW_DPN_INT_IMPDEF3;
  631. if (status & impl_int_mask) {
  632. clear |= impl_int_mask;
  633. *slave_status = clear;
  634. }
  635. /* clear the interrupt */
  636. ret = sdw_write(slave, addr, clear);
  637. if (ret < 0) {
  638. dev_err(slave->bus->dev,
  639. "SDW_DPN_INT write failed:%d", ret);
  640. return ret;
  641. }
  642. /* Read DPN interrupt again */
  643. status2 = sdw_read(slave, addr);
  644. if (status2 < 0) {
  645. dev_err(slave->bus->dev,
  646. "SDW_DPN_INT read failed:%d", status2);
  647. return status2;
  648. }
  649. status &= status2;
  650. count++;
  651. /* we can get alerts while processing so keep retrying */
  652. } while (status != 0 && count < SDW_READ_INTR_CLEAR_RETRY);
  653. if (count == SDW_READ_INTR_CLEAR_RETRY)
  654. dev_warn(slave->bus->dev, "Reached MAX_RETRY on port read");
  655. return ret;
  656. }
  657. static int sdw_handle_slave_alerts(struct sdw_slave *slave)
  658. {
  659. struct sdw_slave_intr_status slave_intr;
  660. u8 clear = 0, bit, port_status[15] = {0};
  661. int port_num, stat, ret, count = 0;
  662. unsigned long port;
  663. bool slave_notify = false;
  664. u8 buf, buf2[2], _buf, _buf2[2];
  665. sdw_modify_slave_status(slave, SDW_SLAVE_ALERT);
  666. /* Read Instat 1, Instat 2 and Instat 3 registers */
  667. buf = ret = sdw_read(slave, SDW_SCP_INT1);
  668. if (ret < 0) {
  669. dev_err(slave->bus->dev,
  670. "SDW_SCP_INT1 read failed:%d", ret);
  671. return ret;
  672. }
  673. ret = sdw_nread(slave, SDW_SCP_INTSTAT2, 2, buf2);
  674. if (ret < 0) {
  675. dev_err(slave->bus->dev,
  676. "SDW_SCP_INT2/3 read failed:%d", ret);
  677. return ret;
  678. }
  679. do {
  680. /*
  681. * Check parity, bus clash and Slave (impl defined)
  682. * interrupt
  683. */
  684. if (buf & SDW_SCP_INT1_PARITY) {
  685. dev_err(&slave->dev, "Parity error detected");
  686. clear |= SDW_SCP_INT1_PARITY;
  687. }
  688. if (buf & SDW_SCP_INT1_BUS_CLASH) {
  689. dev_err(&slave->dev, "Bus clash error detected");
  690. clear |= SDW_SCP_INT1_BUS_CLASH;
  691. }
  692. /*
  693. * When bus clash or parity errors are detected, such errors
  694. * are unlikely to be recoverable errors.
  695. * TODO: In such scenario, reset bus. Make this configurable
  696. * via sysfs property with bus reset being the default.
  697. */
  698. if (buf & SDW_SCP_INT1_IMPL_DEF) {
  699. dev_dbg(&slave->dev, "Slave impl defined interrupt\n");
  700. clear |= SDW_SCP_INT1_IMPL_DEF;
  701. slave_notify = true;
  702. }
  703. /* Check port 0 - 3 interrupts */
  704. port = buf & SDW_SCP_INT1_PORT0_3;
  705. /* To get port number corresponding to bits, shift it */
  706. port = port >> SDW_REG_SHIFT(SDW_SCP_INT1_PORT0_3);
  707. for_each_set_bit(bit, &port, 8) {
  708. sdw_handle_port_interrupt(slave, bit,
  709. &port_status[bit]);
  710. }
  711. /* Check if cascade 2 interrupt is present */
  712. if (buf & SDW_SCP_INT1_SCP2_CASCADE) {
  713. port = buf2[0] & SDW_SCP_INTSTAT2_PORT4_10;
  714. for_each_set_bit(bit, &port, 8) {
  715. /* scp2 ports start from 4 */
  716. port_num = bit + 3;
  717. sdw_handle_port_interrupt(slave,
  718. port_num,
  719. &port_status[port_num]);
  720. }
  721. }
  722. /* now check last cascade */
  723. if (buf2[0] & SDW_SCP_INTSTAT2_SCP3_CASCADE) {
  724. port = buf2[1] & SDW_SCP_INTSTAT3_PORT11_14;
  725. for_each_set_bit(bit, &port, 8) {
  726. /* scp3 ports start from 11 */
  727. port_num = bit + 10;
  728. sdw_handle_port_interrupt(slave,
  729. port_num,
  730. &port_status[port_num]);
  731. }
  732. }
  733. /* Update the Slave driver */
  734. if (slave_notify && (slave->ops) &&
  735. (slave->ops->interrupt_callback)) {
  736. slave_intr.control_port = clear;
  737. memcpy(slave_intr.port, &port_status,
  738. sizeof(slave_intr.port));
  739. slave->ops->interrupt_callback(slave, &slave_intr);
  740. }
  741. /* Ack interrupt */
  742. ret = sdw_write(slave, SDW_SCP_INT1, clear);
  743. if (ret < 0) {
  744. dev_err(slave->bus->dev,
  745. "SDW_SCP_INT1 write failed:%d", ret);
  746. return ret;
  747. }
  748. /*
  749. * Read status again to ensure no new interrupts arrived
  750. * while servicing interrupts.
  751. */
  752. _buf = ret = sdw_read(slave, SDW_SCP_INT1);
  753. if (ret < 0) {
  754. dev_err(slave->bus->dev,
  755. "SDW_SCP_INT1 read failed:%d", ret);
  756. return ret;
  757. }
  758. ret = sdw_nread(slave, SDW_SCP_INTSTAT2, 2, _buf2);
  759. if (ret < 0) {
  760. dev_err(slave->bus->dev,
  761. "SDW_SCP_INT2/3 read failed:%d", ret);
  762. return ret;
  763. }
  764. /* Make sure no interrupts are pending */
  765. buf &= _buf;
  766. buf2[0] &= _buf2[0];
  767. buf2[1] &= _buf2[1];
  768. stat = buf || buf2[0] || buf2[1];
  769. /*
  770. * Exit loop if Slave is continuously in ALERT state even
  771. * after servicing the interrupt multiple times.
  772. */
  773. count++;
  774. /* we can get alerts while processing so keep retrying */
  775. } while (stat != 0 && count < SDW_READ_INTR_CLEAR_RETRY);
  776. if (count == SDW_READ_INTR_CLEAR_RETRY)
  777. dev_warn(slave->bus->dev, "Reached MAX_RETRY on alert read");
  778. return ret;
  779. }
  780. static int sdw_update_slave_status(struct sdw_slave *slave,
  781. enum sdw_slave_status status)
  782. {
  783. if ((slave->ops) && (slave->ops->update_status))
  784. return slave->ops->update_status(slave, status);
  785. return 0;
  786. }
  787. /**
  788. * sdw_handle_slave_status() - Handle Slave status
  789. * @bus: SDW bus instance
  790. * @status: Status for all Slave(s)
  791. */
  792. int sdw_handle_slave_status(struct sdw_bus *bus,
  793. enum sdw_slave_status status[])
  794. {
  795. enum sdw_slave_status prev_status;
  796. struct sdw_slave *slave;
  797. int i, ret = 0;
  798. if (status[0] == SDW_SLAVE_ATTACHED) {
  799. ret = sdw_program_device_num(bus);
  800. if (ret)
  801. dev_err(bus->dev, "Slave attach failed: %d", ret);
  802. }
  803. /* Continue to check other slave statuses */
  804. for (i = 1; i <= SDW_MAX_DEVICES; i++) {
  805. mutex_lock(&bus->bus_lock);
  806. if (test_bit(i, bus->assigned) == false) {
  807. mutex_unlock(&bus->bus_lock);
  808. continue;
  809. }
  810. mutex_unlock(&bus->bus_lock);
  811. slave = sdw_get_slave(bus, i);
  812. if (!slave)
  813. continue;
  814. switch (status[i]) {
  815. case SDW_SLAVE_UNATTACHED:
  816. if (slave->status == SDW_SLAVE_UNATTACHED)
  817. break;
  818. sdw_modify_slave_status(slave, SDW_SLAVE_UNATTACHED);
  819. break;
  820. case SDW_SLAVE_ALERT:
  821. ret = sdw_handle_slave_alerts(slave);
  822. if (ret)
  823. dev_err(bus->dev,
  824. "Slave %d alert handling failed: %d",
  825. i, ret);
  826. break;
  827. case SDW_SLAVE_ATTACHED:
  828. if (slave->status == SDW_SLAVE_ATTACHED)
  829. break;
  830. prev_status = slave->status;
  831. sdw_modify_slave_status(slave, SDW_SLAVE_ATTACHED);
  832. if (prev_status == SDW_SLAVE_ALERT)
  833. break;
  834. ret = sdw_initialize_slave(slave);
  835. if (ret)
  836. dev_err(bus->dev,
  837. "Slave %d initialization failed: %d",
  838. i, ret);
  839. break;
  840. default:
  841. dev_err(bus->dev, "Invalid slave %d status:%d",
  842. i, status[i]);
  843. break;
  844. }
  845. ret = sdw_update_slave_status(slave, status[i]);
  846. if (ret)
  847. dev_err(slave->bus->dev,
  848. "Update Slave status failed:%d", ret);
  849. }
  850. return ret;
  851. }
  852. EXPORT_SYMBOL(sdw_handle_slave_status);