qla_iocb.c 99 KB

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  1. /*
  2. * QLogic Fibre Channel HBA Driver
  3. * Copyright (c) 2003-2014 QLogic Corporation
  4. *
  5. * See LICENSE.qla2xxx for copyright and licensing details.
  6. */
  7. #include "qla_def.h"
  8. #include "qla_target.h"
  9. #include <linux/blkdev.h>
  10. #include <linux/delay.h>
  11. #include <scsi/scsi_tcq.h>
  12. /**
  13. * qla2x00_get_cmd_direction() - Determine control_flag data direction.
  14. * @sp: SCSI command
  15. *
  16. * Returns the proper CF_* direction based on CDB.
  17. */
  18. static inline uint16_t
  19. qla2x00_get_cmd_direction(srb_t *sp)
  20. {
  21. uint16_t cflags;
  22. struct scsi_cmnd *cmd = GET_CMD_SP(sp);
  23. struct scsi_qla_host *vha = sp->vha;
  24. cflags = 0;
  25. /* Set transfer direction */
  26. if (cmd->sc_data_direction == DMA_TO_DEVICE) {
  27. cflags = CF_WRITE;
  28. vha->qla_stats.output_bytes += scsi_bufflen(cmd);
  29. vha->qla_stats.output_requests++;
  30. } else if (cmd->sc_data_direction == DMA_FROM_DEVICE) {
  31. cflags = CF_READ;
  32. vha->qla_stats.input_bytes += scsi_bufflen(cmd);
  33. vha->qla_stats.input_requests++;
  34. }
  35. return (cflags);
  36. }
  37. /**
  38. * qla2x00_calc_iocbs_32() - Determine number of Command Type 2 and
  39. * Continuation Type 0 IOCBs to allocate.
  40. *
  41. * @dsds: number of data segment decriptors needed
  42. *
  43. * Returns the number of IOCB entries needed to store @dsds.
  44. */
  45. uint16_t
  46. qla2x00_calc_iocbs_32(uint16_t dsds)
  47. {
  48. uint16_t iocbs;
  49. iocbs = 1;
  50. if (dsds > 3) {
  51. iocbs += (dsds - 3) / 7;
  52. if ((dsds - 3) % 7)
  53. iocbs++;
  54. }
  55. return (iocbs);
  56. }
  57. /**
  58. * qla2x00_calc_iocbs_64() - Determine number of Command Type 3 and
  59. * Continuation Type 1 IOCBs to allocate.
  60. *
  61. * @dsds: number of data segment decriptors needed
  62. *
  63. * Returns the number of IOCB entries needed to store @dsds.
  64. */
  65. uint16_t
  66. qla2x00_calc_iocbs_64(uint16_t dsds)
  67. {
  68. uint16_t iocbs;
  69. iocbs = 1;
  70. if (dsds > 2) {
  71. iocbs += (dsds - 2) / 5;
  72. if ((dsds - 2) % 5)
  73. iocbs++;
  74. }
  75. return (iocbs);
  76. }
  77. /**
  78. * qla2x00_prep_cont_type0_iocb() - Initialize a Continuation Type 0 IOCB.
  79. * @vha: HA context
  80. *
  81. * Returns a pointer to the Continuation Type 0 IOCB packet.
  82. */
  83. static inline cont_entry_t *
  84. qla2x00_prep_cont_type0_iocb(struct scsi_qla_host *vha)
  85. {
  86. cont_entry_t *cont_pkt;
  87. struct req_que *req = vha->req;
  88. /* Adjust ring index. */
  89. req->ring_index++;
  90. if (req->ring_index == req->length) {
  91. req->ring_index = 0;
  92. req->ring_ptr = req->ring;
  93. } else {
  94. req->ring_ptr++;
  95. }
  96. cont_pkt = (cont_entry_t *)req->ring_ptr;
  97. /* Load packet defaults. */
  98. *((uint32_t *)(&cont_pkt->entry_type)) = cpu_to_le32(CONTINUE_TYPE);
  99. return (cont_pkt);
  100. }
  101. /**
  102. * qla2x00_prep_cont_type1_iocb() - Initialize a Continuation Type 1 IOCB.
  103. * @vha: HA context
  104. * @req: request queue
  105. *
  106. * Returns a pointer to the continuation type 1 IOCB packet.
  107. */
  108. static inline cont_a64_entry_t *
  109. qla2x00_prep_cont_type1_iocb(scsi_qla_host_t *vha, struct req_que *req)
  110. {
  111. cont_a64_entry_t *cont_pkt;
  112. /* Adjust ring index. */
  113. req->ring_index++;
  114. if (req->ring_index == req->length) {
  115. req->ring_index = 0;
  116. req->ring_ptr = req->ring;
  117. } else {
  118. req->ring_ptr++;
  119. }
  120. cont_pkt = (cont_a64_entry_t *)req->ring_ptr;
  121. /* Load packet defaults. */
  122. *((uint32_t *)(&cont_pkt->entry_type)) = IS_QLAFX00(vha->hw) ?
  123. cpu_to_le32(CONTINUE_A64_TYPE_FX00) :
  124. cpu_to_le32(CONTINUE_A64_TYPE);
  125. return (cont_pkt);
  126. }
  127. inline int
  128. qla24xx_configure_prot_mode(srb_t *sp, uint16_t *fw_prot_opts)
  129. {
  130. struct scsi_cmnd *cmd = GET_CMD_SP(sp);
  131. uint8_t guard = scsi_host_get_guard(cmd->device->host);
  132. /* We always use DIFF Bundling for best performance */
  133. *fw_prot_opts = 0;
  134. /* Translate SCSI opcode to a protection opcode */
  135. switch (scsi_get_prot_op(cmd)) {
  136. case SCSI_PROT_READ_STRIP:
  137. *fw_prot_opts |= PO_MODE_DIF_REMOVE;
  138. break;
  139. case SCSI_PROT_WRITE_INSERT:
  140. *fw_prot_opts |= PO_MODE_DIF_INSERT;
  141. break;
  142. case SCSI_PROT_READ_INSERT:
  143. *fw_prot_opts |= PO_MODE_DIF_INSERT;
  144. break;
  145. case SCSI_PROT_WRITE_STRIP:
  146. *fw_prot_opts |= PO_MODE_DIF_REMOVE;
  147. break;
  148. case SCSI_PROT_READ_PASS:
  149. case SCSI_PROT_WRITE_PASS:
  150. if (guard & SHOST_DIX_GUARD_IP)
  151. *fw_prot_opts |= PO_MODE_DIF_TCP_CKSUM;
  152. else
  153. *fw_prot_opts |= PO_MODE_DIF_PASS;
  154. break;
  155. default: /* Normal Request */
  156. *fw_prot_opts |= PO_MODE_DIF_PASS;
  157. break;
  158. }
  159. return scsi_prot_sg_count(cmd);
  160. }
  161. /*
  162. * qla2x00_build_scsi_iocbs_32() - Build IOCB command utilizing 32bit
  163. * capable IOCB types.
  164. *
  165. * @sp: SRB command to process
  166. * @cmd_pkt: Command type 2 IOCB
  167. * @tot_dsds: Total number of segments to transfer
  168. */
  169. void qla2x00_build_scsi_iocbs_32(srb_t *sp, cmd_entry_t *cmd_pkt,
  170. uint16_t tot_dsds)
  171. {
  172. uint16_t avail_dsds;
  173. uint32_t *cur_dsd;
  174. scsi_qla_host_t *vha;
  175. struct scsi_cmnd *cmd;
  176. struct scatterlist *sg;
  177. int i;
  178. cmd = GET_CMD_SP(sp);
  179. /* Update entry type to indicate Command Type 2 IOCB */
  180. *((uint32_t *)(&cmd_pkt->entry_type)) =
  181. cpu_to_le32(COMMAND_TYPE);
  182. /* No data transfer */
  183. if (!scsi_bufflen(cmd) || cmd->sc_data_direction == DMA_NONE) {
  184. cmd_pkt->byte_count = cpu_to_le32(0);
  185. return;
  186. }
  187. vha = sp->vha;
  188. cmd_pkt->control_flags |= cpu_to_le16(qla2x00_get_cmd_direction(sp));
  189. /* Three DSDs are available in the Command Type 2 IOCB */
  190. avail_dsds = 3;
  191. cur_dsd = (uint32_t *)&cmd_pkt->dseg_0_address;
  192. /* Load data segments */
  193. scsi_for_each_sg(cmd, sg, tot_dsds, i) {
  194. cont_entry_t *cont_pkt;
  195. /* Allocate additional continuation packets? */
  196. if (avail_dsds == 0) {
  197. /*
  198. * Seven DSDs are available in the Continuation
  199. * Type 0 IOCB.
  200. */
  201. cont_pkt = qla2x00_prep_cont_type0_iocb(vha);
  202. cur_dsd = (uint32_t *)&cont_pkt->dseg_0_address;
  203. avail_dsds = 7;
  204. }
  205. *cur_dsd++ = cpu_to_le32(sg_dma_address(sg));
  206. *cur_dsd++ = cpu_to_le32(sg_dma_len(sg));
  207. avail_dsds--;
  208. }
  209. }
  210. /**
  211. * qla2x00_build_scsi_iocbs_64() - Build IOCB command utilizing 64bit
  212. * capable IOCB types.
  213. *
  214. * @sp: SRB command to process
  215. * @cmd_pkt: Command type 3 IOCB
  216. * @tot_dsds: Total number of segments to transfer
  217. */
  218. void qla2x00_build_scsi_iocbs_64(srb_t *sp, cmd_entry_t *cmd_pkt,
  219. uint16_t tot_dsds)
  220. {
  221. uint16_t avail_dsds;
  222. uint32_t *cur_dsd;
  223. scsi_qla_host_t *vha;
  224. struct scsi_cmnd *cmd;
  225. struct scatterlist *sg;
  226. int i;
  227. cmd = GET_CMD_SP(sp);
  228. /* Update entry type to indicate Command Type 3 IOCB */
  229. *((uint32_t *)(&cmd_pkt->entry_type)) = cpu_to_le32(COMMAND_A64_TYPE);
  230. /* No data transfer */
  231. if (!scsi_bufflen(cmd) || cmd->sc_data_direction == DMA_NONE) {
  232. cmd_pkt->byte_count = cpu_to_le32(0);
  233. return;
  234. }
  235. vha = sp->vha;
  236. cmd_pkt->control_flags |= cpu_to_le16(qla2x00_get_cmd_direction(sp));
  237. /* Two DSDs are available in the Command Type 3 IOCB */
  238. avail_dsds = 2;
  239. cur_dsd = (uint32_t *)&cmd_pkt->dseg_0_address;
  240. /* Load data segments */
  241. scsi_for_each_sg(cmd, sg, tot_dsds, i) {
  242. dma_addr_t sle_dma;
  243. cont_a64_entry_t *cont_pkt;
  244. /* Allocate additional continuation packets? */
  245. if (avail_dsds == 0) {
  246. /*
  247. * Five DSDs are available in the Continuation
  248. * Type 1 IOCB.
  249. */
  250. cont_pkt = qla2x00_prep_cont_type1_iocb(vha, vha->req);
  251. cur_dsd = (uint32_t *)cont_pkt->dseg_0_address;
  252. avail_dsds = 5;
  253. }
  254. sle_dma = sg_dma_address(sg);
  255. *cur_dsd++ = cpu_to_le32(LSD(sle_dma));
  256. *cur_dsd++ = cpu_to_le32(MSD(sle_dma));
  257. *cur_dsd++ = cpu_to_le32(sg_dma_len(sg));
  258. avail_dsds--;
  259. }
  260. }
  261. /**
  262. * qla2x00_start_scsi() - Send a SCSI command to the ISP
  263. * @sp: command to send to the ISP
  264. *
  265. * Returns non-zero if a failure occurred, else zero.
  266. */
  267. int
  268. qla2x00_start_scsi(srb_t *sp)
  269. {
  270. int nseg;
  271. unsigned long flags;
  272. scsi_qla_host_t *vha;
  273. struct scsi_cmnd *cmd;
  274. uint32_t *clr_ptr;
  275. uint32_t index;
  276. uint32_t handle;
  277. cmd_entry_t *cmd_pkt;
  278. uint16_t cnt;
  279. uint16_t req_cnt;
  280. uint16_t tot_dsds;
  281. struct device_reg_2xxx __iomem *reg;
  282. struct qla_hw_data *ha;
  283. struct req_que *req;
  284. struct rsp_que *rsp;
  285. /* Setup device pointers. */
  286. vha = sp->vha;
  287. ha = vha->hw;
  288. reg = &ha->iobase->isp;
  289. cmd = GET_CMD_SP(sp);
  290. req = ha->req_q_map[0];
  291. rsp = ha->rsp_q_map[0];
  292. /* So we know we haven't pci_map'ed anything yet */
  293. tot_dsds = 0;
  294. /* Send marker if required */
  295. if (vha->marker_needed != 0) {
  296. if (qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL) !=
  297. QLA_SUCCESS) {
  298. return (QLA_FUNCTION_FAILED);
  299. }
  300. vha->marker_needed = 0;
  301. }
  302. /* Acquire ring specific lock */
  303. spin_lock_irqsave(&ha->hardware_lock, flags);
  304. /* Check for room in outstanding command list. */
  305. handle = req->current_outstanding_cmd;
  306. for (index = 1; index < req->num_outstanding_cmds; index++) {
  307. handle++;
  308. if (handle == req->num_outstanding_cmds)
  309. handle = 1;
  310. if (!req->outstanding_cmds[handle])
  311. break;
  312. }
  313. if (index == req->num_outstanding_cmds)
  314. goto queuing_error;
  315. /* Map the sg table so we have an accurate count of sg entries needed */
  316. if (scsi_sg_count(cmd)) {
  317. nseg = dma_map_sg(&ha->pdev->dev, scsi_sglist(cmd),
  318. scsi_sg_count(cmd), cmd->sc_data_direction);
  319. if (unlikely(!nseg))
  320. goto queuing_error;
  321. } else
  322. nseg = 0;
  323. tot_dsds = nseg;
  324. /* Calculate the number of request entries needed. */
  325. req_cnt = ha->isp_ops->calc_req_entries(tot_dsds);
  326. if (req->cnt < (req_cnt + 2)) {
  327. cnt = RD_REG_WORD_RELAXED(ISP_REQ_Q_OUT(ha, reg));
  328. if (req->ring_index < cnt)
  329. req->cnt = cnt - req->ring_index;
  330. else
  331. req->cnt = req->length -
  332. (req->ring_index - cnt);
  333. /* If still no head room then bail out */
  334. if (req->cnt < (req_cnt + 2))
  335. goto queuing_error;
  336. }
  337. /* Build command packet */
  338. req->current_outstanding_cmd = handle;
  339. req->outstanding_cmds[handle] = sp;
  340. sp->handle = handle;
  341. cmd->host_scribble = (unsigned char *)(unsigned long)handle;
  342. req->cnt -= req_cnt;
  343. cmd_pkt = (cmd_entry_t *)req->ring_ptr;
  344. cmd_pkt->handle = handle;
  345. /* Zero out remaining portion of packet. */
  346. clr_ptr = (uint32_t *)cmd_pkt + 2;
  347. memset(clr_ptr, 0, REQUEST_ENTRY_SIZE - 8);
  348. cmd_pkt->dseg_count = cpu_to_le16(tot_dsds);
  349. /* Set target ID and LUN number*/
  350. SET_TARGET_ID(ha, cmd_pkt->target, sp->fcport->loop_id);
  351. cmd_pkt->lun = cpu_to_le16(cmd->device->lun);
  352. cmd_pkt->control_flags = cpu_to_le16(CF_SIMPLE_TAG);
  353. /* Load SCSI command packet. */
  354. memcpy(cmd_pkt->scsi_cdb, cmd->cmnd, cmd->cmd_len);
  355. cmd_pkt->byte_count = cpu_to_le32((uint32_t)scsi_bufflen(cmd));
  356. /* Build IOCB segments */
  357. ha->isp_ops->build_iocbs(sp, cmd_pkt, tot_dsds);
  358. /* Set total data segment count. */
  359. cmd_pkt->entry_count = (uint8_t)req_cnt;
  360. wmb();
  361. /* Adjust ring index. */
  362. req->ring_index++;
  363. if (req->ring_index == req->length) {
  364. req->ring_index = 0;
  365. req->ring_ptr = req->ring;
  366. } else
  367. req->ring_ptr++;
  368. sp->flags |= SRB_DMA_VALID;
  369. /* Set chip new ring index. */
  370. WRT_REG_WORD(ISP_REQ_Q_IN(ha, reg), req->ring_index);
  371. RD_REG_WORD_RELAXED(ISP_REQ_Q_IN(ha, reg)); /* PCI Posting. */
  372. /* Manage unprocessed RIO/ZIO commands in response queue. */
  373. if (vha->flags.process_response_queue &&
  374. rsp->ring_ptr->signature != RESPONSE_PROCESSED)
  375. qla2x00_process_response_queue(rsp);
  376. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  377. return (QLA_SUCCESS);
  378. queuing_error:
  379. if (tot_dsds)
  380. scsi_dma_unmap(cmd);
  381. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  382. return (QLA_FUNCTION_FAILED);
  383. }
  384. /**
  385. * qla2x00_start_iocbs() - Execute the IOCB command
  386. * @vha: HA context
  387. * @req: request queue
  388. */
  389. void
  390. qla2x00_start_iocbs(struct scsi_qla_host *vha, struct req_que *req)
  391. {
  392. struct qla_hw_data *ha = vha->hw;
  393. device_reg_t *reg = ISP_QUE_REG(ha, req->id);
  394. if (IS_P3P_TYPE(ha)) {
  395. qla82xx_start_iocbs(vha);
  396. } else {
  397. /* Adjust ring index. */
  398. req->ring_index++;
  399. if (req->ring_index == req->length) {
  400. req->ring_index = 0;
  401. req->ring_ptr = req->ring;
  402. } else
  403. req->ring_ptr++;
  404. /* Set chip new ring index. */
  405. if (ha->mqenable || IS_QLA27XX(ha)) {
  406. WRT_REG_DWORD(req->req_q_in, req->ring_index);
  407. } else if (IS_QLA83XX(ha)) {
  408. WRT_REG_DWORD(req->req_q_in, req->ring_index);
  409. RD_REG_DWORD_RELAXED(&ha->iobase->isp24.hccr);
  410. } else if (IS_QLAFX00(ha)) {
  411. WRT_REG_DWORD(&reg->ispfx00.req_q_in, req->ring_index);
  412. RD_REG_DWORD_RELAXED(&reg->ispfx00.req_q_in);
  413. QLAFX00_SET_HST_INTR(ha, ha->rqstq_intr_code);
  414. } else if (IS_FWI2_CAPABLE(ha)) {
  415. WRT_REG_DWORD(&reg->isp24.req_q_in, req->ring_index);
  416. RD_REG_DWORD_RELAXED(&reg->isp24.req_q_in);
  417. } else {
  418. WRT_REG_WORD(ISP_REQ_Q_IN(ha, &reg->isp),
  419. req->ring_index);
  420. RD_REG_WORD_RELAXED(ISP_REQ_Q_IN(ha, &reg->isp));
  421. }
  422. }
  423. }
  424. /**
  425. * qla2x00_marker() - Send a marker IOCB to the firmware.
  426. * @vha: HA context
  427. * @req: request queue
  428. * @rsp: response queue
  429. * @loop_id: loop ID
  430. * @lun: LUN
  431. * @type: marker modifier
  432. *
  433. * Can be called from both normal and interrupt context.
  434. *
  435. * Returns non-zero if a failure occurred, else zero.
  436. */
  437. static int
  438. __qla2x00_marker(struct scsi_qla_host *vha, struct req_que *req,
  439. struct rsp_que *rsp, uint16_t loop_id,
  440. uint64_t lun, uint8_t type)
  441. {
  442. mrk_entry_t *mrk;
  443. struct mrk_entry_24xx *mrk24 = NULL;
  444. struct qla_hw_data *ha = vha->hw;
  445. scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
  446. req = ha->req_q_map[0];
  447. mrk = (mrk_entry_t *)qla2x00_alloc_iocbs(vha, NULL);
  448. if (mrk == NULL) {
  449. ql_log(ql_log_warn, base_vha, 0x3026,
  450. "Failed to allocate Marker IOCB.\n");
  451. return (QLA_FUNCTION_FAILED);
  452. }
  453. mrk->entry_type = MARKER_TYPE;
  454. mrk->modifier = type;
  455. if (type != MK_SYNC_ALL) {
  456. if (IS_FWI2_CAPABLE(ha)) {
  457. mrk24 = (struct mrk_entry_24xx *) mrk;
  458. mrk24->nport_handle = cpu_to_le16(loop_id);
  459. int_to_scsilun(lun, (struct scsi_lun *)&mrk24->lun);
  460. host_to_fcp_swap(mrk24->lun, sizeof(mrk24->lun));
  461. mrk24->vp_index = vha->vp_idx;
  462. mrk24->handle = MAKE_HANDLE(req->id, mrk24->handle);
  463. } else {
  464. SET_TARGET_ID(ha, mrk->target, loop_id);
  465. mrk->lun = cpu_to_le16((uint16_t)lun);
  466. }
  467. }
  468. wmb();
  469. qla2x00_start_iocbs(vha, req);
  470. return (QLA_SUCCESS);
  471. }
  472. int
  473. qla2x00_marker(struct scsi_qla_host *vha, struct req_que *req,
  474. struct rsp_que *rsp, uint16_t loop_id, uint64_t lun,
  475. uint8_t type)
  476. {
  477. int ret;
  478. unsigned long flags = 0;
  479. spin_lock_irqsave(&vha->hw->hardware_lock, flags);
  480. ret = __qla2x00_marker(vha, req, rsp, loop_id, lun, type);
  481. spin_unlock_irqrestore(&vha->hw->hardware_lock, flags);
  482. return (ret);
  483. }
  484. /*
  485. * qla2x00_issue_marker
  486. *
  487. * Issue marker
  488. * Caller CAN have hardware lock held as specified by ha_locked parameter.
  489. * Might release it, then reaquire.
  490. */
  491. int qla2x00_issue_marker(scsi_qla_host_t *vha, int ha_locked)
  492. {
  493. if (ha_locked) {
  494. if (__qla2x00_marker(vha, vha->req, vha->req->rsp, 0, 0,
  495. MK_SYNC_ALL) != QLA_SUCCESS)
  496. return QLA_FUNCTION_FAILED;
  497. } else {
  498. if (qla2x00_marker(vha, vha->req, vha->req->rsp, 0, 0,
  499. MK_SYNC_ALL) != QLA_SUCCESS)
  500. return QLA_FUNCTION_FAILED;
  501. }
  502. vha->marker_needed = 0;
  503. return QLA_SUCCESS;
  504. }
  505. static inline int
  506. qla24xx_build_scsi_type_6_iocbs(srb_t *sp, struct cmd_type_6 *cmd_pkt,
  507. uint16_t tot_dsds)
  508. {
  509. uint32_t *cur_dsd = NULL;
  510. scsi_qla_host_t *vha;
  511. struct qla_hw_data *ha;
  512. struct scsi_cmnd *cmd;
  513. struct scatterlist *cur_seg;
  514. uint32_t *dsd_seg;
  515. void *next_dsd;
  516. uint8_t avail_dsds;
  517. uint8_t first_iocb = 1;
  518. uint32_t dsd_list_len;
  519. struct dsd_dma *dsd_ptr;
  520. struct ct6_dsd *ctx;
  521. cmd = GET_CMD_SP(sp);
  522. /* Update entry type to indicate Command Type 3 IOCB */
  523. *((uint32_t *)(&cmd_pkt->entry_type)) = cpu_to_le32(COMMAND_TYPE_6);
  524. /* No data transfer */
  525. if (!scsi_bufflen(cmd) || cmd->sc_data_direction == DMA_NONE) {
  526. cmd_pkt->byte_count = cpu_to_le32(0);
  527. return 0;
  528. }
  529. vha = sp->vha;
  530. ha = vha->hw;
  531. /* Set transfer direction */
  532. if (cmd->sc_data_direction == DMA_TO_DEVICE) {
  533. cmd_pkt->control_flags = cpu_to_le16(CF_WRITE_DATA);
  534. vha->qla_stats.output_bytes += scsi_bufflen(cmd);
  535. vha->qla_stats.output_requests++;
  536. } else if (cmd->sc_data_direction == DMA_FROM_DEVICE) {
  537. cmd_pkt->control_flags = cpu_to_le16(CF_READ_DATA);
  538. vha->qla_stats.input_bytes += scsi_bufflen(cmd);
  539. vha->qla_stats.input_requests++;
  540. }
  541. cur_seg = scsi_sglist(cmd);
  542. ctx = GET_CMD_CTX_SP(sp);
  543. while (tot_dsds) {
  544. avail_dsds = (tot_dsds > QLA_DSDS_PER_IOCB) ?
  545. QLA_DSDS_PER_IOCB : tot_dsds;
  546. tot_dsds -= avail_dsds;
  547. dsd_list_len = (avail_dsds + 1) * QLA_DSD_SIZE;
  548. dsd_ptr = list_first_entry(&ha->gbl_dsd_list,
  549. struct dsd_dma, list);
  550. next_dsd = dsd_ptr->dsd_addr;
  551. list_del(&dsd_ptr->list);
  552. ha->gbl_dsd_avail--;
  553. list_add_tail(&dsd_ptr->list, &ctx->dsd_list);
  554. ctx->dsd_use_cnt++;
  555. ha->gbl_dsd_inuse++;
  556. if (first_iocb) {
  557. first_iocb = 0;
  558. dsd_seg = (uint32_t *)&cmd_pkt->fcp_data_dseg_address;
  559. *dsd_seg++ = cpu_to_le32(LSD(dsd_ptr->dsd_list_dma));
  560. *dsd_seg++ = cpu_to_le32(MSD(dsd_ptr->dsd_list_dma));
  561. cmd_pkt->fcp_data_dseg_len = cpu_to_le32(dsd_list_len);
  562. } else {
  563. *cur_dsd++ = cpu_to_le32(LSD(dsd_ptr->dsd_list_dma));
  564. *cur_dsd++ = cpu_to_le32(MSD(dsd_ptr->dsd_list_dma));
  565. *cur_dsd++ = cpu_to_le32(dsd_list_len);
  566. }
  567. cur_dsd = (uint32_t *)next_dsd;
  568. while (avail_dsds) {
  569. dma_addr_t sle_dma;
  570. sle_dma = sg_dma_address(cur_seg);
  571. *cur_dsd++ = cpu_to_le32(LSD(sle_dma));
  572. *cur_dsd++ = cpu_to_le32(MSD(sle_dma));
  573. *cur_dsd++ = cpu_to_le32(sg_dma_len(cur_seg));
  574. cur_seg = sg_next(cur_seg);
  575. avail_dsds--;
  576. }
  577. }
  578. /* Null termination */
  579. *cur_dsd++ = 0;
  580. *cur_dsd++ = 0;
  581. *cur_dsd++ = 0;
  582. cmd_pkt->control_flags |= CF_DATA_SEG_DESCR_ENABLE;
  583. return 0;
  584. }
  585. /*
  586. * qla24xx_calc_dsd_lists() - Determine number of DSD list required
  587. * for Command Type 6.
  588. *
  589. * @dsds: number of data segment decriptors needed
  590. *
  591. * Returns the number of dsd list needed to store @dsds.
  592. */
  593. static inline uint16_t
  594. qla24xx_calc_dsd_lists(uint16_t dsds)
  595. {
  596. uint16_t dsd_lists = 0;
  597. dsd_lists = (dsds/QLA_DSDS_PER_IOCB);
  598. if (dsds % QLA_DSDS_PER_IOCB)
  599. dsd_lists++;
  600. return dsd_lists;
  601. }
  602. /**
  603. * qla24xx_build_scsi_iocbs() - Build IOCB command utilizing Command Type 7
  604. * IOCB types.
  605. *
  606. * @sp: SRB command to process
  607. * @cmd_pkt: Command type 3 IOCB
  608. * @tot_dsds: Total number of segments to transfer
  609. * @req: pointer to request queue
  610. */
  611. inline void
  612. qla24xx_build_scsi_iocbs(srb_t *sp, struct cmd_type_7 *cmd_pkt,
  613. uint16_t tot_dsds, struct req_que *req)
  614. {
  615. uint16_t avail_dsds;
  616. uint32_t *cur_dsd;
  617. scsi_qla_host_t *vha;
  618. struct scsi_cmnd *cmd;
  619. struct scatterlist *sg;
  620. int i;
  621. cmd = GET_CMD_SP(sp);
  622. /* Update entry type to indicate Command Type 3 IOCB */
  623. *((uint32_t *)(&cmd_pkt->entry_type)) = cpu_to_le32(COMMAND_TYPE_7);
  624. /* No data transfer */
  625. if (!scsi_bufflen(cmd) || cmd->sc_data_direction == DMA_NONE) {
  626. cmd_pkt->byte_count = cpu_to_le32(0);
  627. return;
  628. }
  629. vha = sp->vha;
  630. /* Set transfer direction */
  631. if (cmd->sc_data_direction == DMA_TO_DEVICE) {
  632. cmd_pkt->task_mgmt_flags = cpu_to_le16(TMF_WRITE_DATA);
  633. vha->qla_stats.output_bytes += scsi_bufflen(cmd);
  634. vha->qla_stats.output_requests++;
  635. } else if (cmd->sc_data_direction == DMA_FROM_DEVICE) {
  636. cmd_pkt->task_mgmt_flags = cpu_to_le16(TMF_READ_DATA);
  637. vha->qla_stats.input_bytes += scsi_bufflen(cmd);
  638. vha->qla_stats.input_requests++;
  639. }
  640. /* One DSD is available in the Command Type 3 IOCB */
  641. avail_dsds = 1;
  642. cur_dsd = (uint32_t *)&cmd_pkt->dseg_0_address;
  643. /* Load data segments */
  644. scsi_for_each_sg(cmd, sg, tot_dsds, i) {
  645. dma_addr_t sle_dma;
  646. cont_a64_entry_t *cont_pkt;
  647. /* Allocate additional continuation packets? */
  648. if (avail_dsds == 0) {
  649. /*
  650. * Five DSDs are available in the Continuation
  651. * Type 1 IOCB.
  652. */
  653. cont_pkt = qla2x00_prep_cont_type1_iocb(vha, req);
  654. cur_dsd = (uint32_t *)cont_pkt->dseg_0_address;
  655. avail_dsds = 5;
  656. }
  657. sle_dma = sg_dma_address(sg);
  658. *cur_dsd++ = cpu_to_le32(LSD(sle_dma));
  659. *cur_dsd++ = cpu_to_le32(MSD(sle_dma));
  660. *cur_dsd++ = cpu_to_le32(sg_dma_len(sg));
  661. avail_dsds--;
  662. }
  663. }
  664. struct fw_dif_context {
  665. uint32_t ref_tag;
  666. uint16_t app_tag;
  667. uint8_t ref_tag_mask[4]; /* Validation/Replacement Mask*/
  668. uint8_t app_tag_mask[2]; /* Validation/Replacement Mask*/
  669. };
  670. /*
  671. * qla24xx_set_t10dif_tags_from_cmd - Extract Ref and App tags from SCSI command
  672. *
  673. */
  674. static inline void
  675. qla24xx_set_t10dif_tags(srb_t *sp, struct fw_dif_context *pkt,
  676. unsigned int protcnt)
  677. {
  678. struct scsi_cmnd *cmd = GET_CMD_SP(sp);
  679. switch (scsi_get_prot_type(cmd)) {
  680. case SCSI_PROT_DIF_TYPE0:
  681. /*
  682. * No check for ql2xenablehba_err_chk, as it would be an
  683. * I/O error if hba tag generation is not done.
  684. */
  685. pkt->ref_tag = cpu_to_le32((uint32_t)
  686. (0xffffffff & scsi_get_lba(cmd)));
  687. if (!qla2x00_hba_err_chk_enabled(sp))
  688. break;
  689. pkt->ref_tag_mask[0] = 0xff;
  690. pkt->ref_tag_mask[1] = 0xff;
  691. pkt->ref_tag_mask[2] = 0xff;
  692. pkt->ref_tag_mask[3] = 0xff;
  693. break;
  694. /*
  695. * For TYPE 2 protection: 16 bit GUARD + 32 bit REF tag has to
  696. * match LBA in CDB + N
  697. */
  698. case SCSI_PROT_DIF_TYPE2:
  699. pkt->app_tag = cpu_to_le16(0);
  700. pkt->app_tag_mask[0] = 0x0;
  701. pkt->app_tag_mask[1] = 0x0;
  702. pkt->ref_tag = cpu_to_le32((uint32_t)
  703. (0xffffffff & scsi_get_lba(cmd)));
  704. if (!qla2x00_hba_err_chk_enabled(sp))
  705. break;
  706. /* enable ALL bytes of the ref tag */
  707. pkt->ref_tag_mask[0] = 0xff;
  708. pkt->ref_tag_mask[1] = 0xff;
  709. pkt->ref_tag_mask[2] = 0xff;
  710. pkt->ref_tag_mask[3] = 0xff;
  711. break;
  712. /* For Type 3 protection: 16 bit GUARD only */
  713. case SCSI_PROT_DIF_TYPE3:
  714. pkt->ref_tag_mask[0] = pkt->ref_tag_mask[1] =
  715. pkt->ref_tag_mask[2] = pkt->ref_tag_mask[3] =
  716. 0x00;
  717. break;
  718. /*
  719. * For TYpe 1 protection: 16 bit GUARD tag, 32 bit REF tag, and
  720. * 16 bit app tag.
  721. */
  722. case SCSI_PROT_DIF_TYPE1:
  723. pkt->ref_tag = cpu_to_le32((uint32_t)
  724. (0xffffffff & scsi_get_lba(cmd)));
  725. pkt->app_tag = cpu_to_le16(0);
  726. pkt->app_tag_mask[0] = 0x0;
  727. pkt->app_tag_mask[1] = 0x0;
  728. if (!qla2x00_hba_err_chk_enabled(sp))
  729. break;
  730. /* enable ALL bytes of the ref tag */
  731. pkt->ref_tag_mask[0] = 0xff;
  732. pkt->ref_tag_mask[1] = 0xff;
  733. pkt->ref_tag_mask[2] = 0xff;
  734. pkt->ref_tag_mask[3] = 0xff;
  735. break;
  736. }
  737. }
  738. int
  739. qla24xx_get_one_block_sg(uint32_t blk_sz, struct qla2_sgx *sgx,
  740. uint32_t *partial)
  741. {
  742. struct scatterlist *sg;
  743. uint32_t cumulative_partial, sg_len;
  744. dma_addr_t sg_dma_addr;
  745. if (sgx->num_bytes == sgx->tot_bytes)
  746. return 0;
  747. sg = sgx->cur_sg;
  748. cumulative_partial = sgx->tot_partial;
  749. sg_dma_addr = sg_dma_address(sg);
  750. sg_len = sg_dma_len(sg);
  751. sgx->dma_addr = sg_dma_addr + sgx->bytes_consumed;
  752. if ((cumulative_partial + (sg_len - sgx->bytes_consumed)) >= blk_sz) {
  753. sgx->dma_len = (blk_sz - cumulative_partial);
  754. sgx->tot_partial = 0;
  755. sgx->num_bytes += blk_sz;
  756. *partial = 0;
  757. } else {
  758. sgx->dma_len = sg_len - sgx->bytes_consumed;
  759. sgx->tot_partial += sgx->dma_len;
  760. *partial = 1;
  761. }
  762. sgx->bytes_consumed += sgx->dma_len;
  763. if (sg_len == sgx->bytes_consumed) {
  764. sg = sg_next(sg);
  765. sgx->num_sg++;
  766. sgx->cur_sg = sg;
  767. sgx->bytes_consumed = 0;
  768. }
  769. return 1;
  770. }
  771. int
  772. qla24xx_walk_and_build_sglist_no_difb(struct qla_hw_data *ha, srb_t *sp,
  773. uint32_t *dsd, uint16_t tot_dsds, struct qla_tc_param *tc)
  774. {
  775. void *next_dsd;
  776. uint8_t avail_dsds = 0;
  777. uint32_t dsd_list_len;
  778. struct dsd_dma *dsd_ptr;
  779. struct scatterlist *sg_prot;
  780. uint32_t *cur_dsd = dsd;
  781. uint16_t used_dsds = tot_dsds;
  782. uint32_t prot_int; /* protection interval */
  783. uint32_t partial;
  784. struct qla2_sgx sgx;
  785. dma_addr_t sle_dma;
  786. uint32_t sle_dma_len, tot_prot_dma_len = 0;
  787. struct scsi_cmnd *cmd;
  788. memset(&sgx, 0, sizeof(struct qla2_sgx));
  789. if (sp) {
  790. cmd = GET_CMD_SP(sp);
  791. prot_int = cmd->device->sector_size;
  792. sgx.tot_bytes = scsi_bufflen(cmd);
  793. sgx.cur_sg = scsi_sglist(cmd);
  794. sgx.sp = sp;
  795. sg_prot = scsi_prot_sglist(cmd);
  796. } else if (tc) {
  797. prot_int = tc->blk_sz;
  798. sgx.tot_bytes = tc->bufflen;
  799. sgx.cur_sg = tc->sg;
  800. sg_prot = tc->prot_sg;
  801. } else {
  802. BUG();
  803. return 1;
  804. }
  805. while (qla24xx_get_one_block_sg(prot_int, &sgx, &partial)) {
  806. sle_dma = sgx.dma_addr;
  807. sle_dma_len = sgx.dma_len;
  808. alloc_and_fill:
  809. /* Allocate additional continuation packets? */
  810. if (avail_dsds == 0) {
  811. avail_dsds = (used_dsds > QLA_DSDS_PER_IOCB) ?
  812. QLA_DSDS_PER_IOCB : used_dsds;
  813. dsd_list_len = (avail_dsds + 1) * 12;
  814. used_dsds -= avail_dsds;
  815. /* allocate tracking DS */
  816. dsd_ptr = kzalloc(sizeof(struct dsd_dma), GFP_ATOMIC);
  817. if (!dsd_ptr)
  818. return 1;
  819. /* allocate new list */
  820. dsd_ptr->dsd_addr = next_dsd =
  821. dma_pool_alloc(ha->dl_dma_pool, GFP_ATOMIC,
  822. &dsd_ptr->dsd_list_dma);
  823. if (!next_dsd) {
  824. /*
  825. * Need to cleanup only this dsd_ptr, rest
  826. * will be done by sp_free_dma()
  827. */
  828. kfree(dsd_ptr);
  829. return 1;
  830. }
  831. if (sp) {
  832. list_add_tail(&dsd_ptr->list,
  833. &((struct crc_context *)
  834. sp->u.scmd.ctx)->dsd_list);
  835. sp->flags |= SRB_CRC_CTX_DSD_VALID;
  836. } else {
  837. list_add_tail(&dsd_ptr->list,
  838. &(tc->ctx->dsd_list));
  839. *tc->ctx_dsd_alloced = 1;
  840. }
  841. /* add new list to cmd iocb or last list */
  842. *cur_dsd++ = cpu_to_le32(LSD(dsd_ptr->dsd_list_dma));
  843. *cur_dsd++ = cpu_to_le32(MSD(dsd_ptr->dsd_list_dma));
  844. *cur_dsd++ = dsd_list_len;
  845. cur_dsd = (uint32_t *)next_dsd;
  846. }
  847. *cur_dsd++ = cpu_to_le32(LSD(sle_dma));
  848. *cur_dsd++ = cpu_to_le32(MSD(sle_dma));
  849. *cur_dsd++ = cpu_to_le32(sle_dma_len);
  850. avail_dsds--;
  851. if (partial == 0) {
  852. /* Got a full protection interval */
  853. sle_dma = sg_dma_address(sg_prot) + tot_prot_dma_len;
  854. sle_dma_len = 8;
  855. tot_prot_dma_len += sle_dma_len;
  856. if (tot_prot_dma_len == sg_dma_len(sg_prot)) {
  857. tot_prot_dma_len = 0;
  858. sg_prot = sg_next(sg_prot);
  859. }
  860. partial = 1; /* So as to not re-enter this block */
  861. goto alloc_and_fill;
  862. }
  863. }
  864. /* Null termination */
  865. *cur_dsd++ = 0;
  866. *cur_dsd++ = 0;
  867. *cur_dsd++ = 0;
  868. return 0;
  869. }
  870. int
  871. qla24xx_walk_and_build_sglist(struct qla_hw_data *ha, srb_t *sp, uint32_t *dsd,
  872. uint16_t tot_dsds, struct qla_tc_param *tc)
  873. {
  874. void *next_dsd;
  875. uint8_t avail_dsds = 0;
  876. uint32_t dsd_list_len;
  877. struct dsd_dma *dsd_ptr;
  878. struct scatterlist *sg, *sgl;
  879. uint32_t *cur_dsd = dsd;
  880. int i;
  881. uint16_t used_dsds = tot_dsds;
  882. struct scsi_cmnd *cmd;
  883. if (sp) {
  884. cmd = GET_CMD_SP(sp);
  885. sgl = scsi_sglist(cmd);
  886. } else if (tc) {
  887. sgl = tc->sg;
  888. } else {
  889. BUG();
  890. return 1;
  891. }
  892. for_each_sg(sgl, sg, tot_dsds, i) {
  893. dma_addr_t sle_dma;
  894. /* Allocate additional continuation packets? */
  895. if (avail_dsds == 0) {
  896. avail_dsds = (used_dsds > QLA_DSDS_PER_IOCB) ?
  897. QLA_DSDS_PER_IOCB : used_dsds;
  898. dsd_list_len = (avail_dsds + 1) * 12;
  899. used_dsds -= avail_dsds;
  900. /* allocate tracking DS */
  901. dsd_ptr = kzalloc(sizeof(struct dsd_dma), GFP_ATOMIC);
  902. if (!dsd_ptr)
  903. return 1;
  904. /* allocate new list */
  905. dsd_ptr->dsd_addr = next_dsd =
  906. dma_pool_alloc(ha->dl_dma_pool, GFP_ATOMIC,
  907. &dsd_ptr->dsd_list_dma);
  908. if (!next_dsd) {
  909. /*
  910. * Need to cleanup only this dsd_ptr, rest
  911. * will be done by sp_free_dma()
  912. */
  913. kfree(dsd_ptr);
  914. return 1;
  915. }
  916. if (sp) {
  917. list_add_tail(&dsd_ptr->list,
  918. &((struct crc_context *)
  919. sp->u.scmd.ctx)->dsd_list);
  920. sp->flags |= SRB_CRC_CTX_DSD_VALID;
  921. } else {
  922. list_add_tail(&dsd_ptr->list,
  923. &(tc->ctx->dsd_list));
  924. *tc->ctx_dsd_alloced = 1;
  925. }
  926. /* add new list to cmd iocb or last list */
  927. *cur_dsd++ = cpu_to_le32(LSD(dsd_ptr->dsd_list_dma));
  928. *cur_dsd++ = cpu_to_le32(MSD(dsd_ptr->dsd_list_dma));
  929. *cur_dsd++ = dsd_list_len;
  930. cur_dsd = (uint32_t *)next_dsd;
  931. }
  932. sle_dma = sg_dma_address(sg);
  933. *cur_dsd++ = cpu_to_le32(LSD(sle_dma));
  934. *cur_dsd++ = cpu_to_le32(MSD(sle_dma));
  935. *cur_dsd++ = cpu_to_le32(sg_dma_len(sg));
  936. avail_dsds--;
  937. }
  938. /* Null termination */
  939. *cur_dsd++ = 0;
  940. *cur_dsd++ = 0;
  941. *cur_dsd++ = 0;
  942. return 0;
  943. }
  944. int
  945. qla24xx_walk_and_build_prot_sglist(struct qla_hw_data *ha, srb_t *sp,
  946. uint32_t *dsd, uint16_t tot_dsds, struct qla_tc_param *tc)
  947. {
  948. void *next_dsd;
  949. uint8_t avail_dsds = 0;
  950. uint32_t dsd_list_len;
  951. struct dsd_dma *dsd_ptr;
  952. struct scatterlist *sg, *sgl;
  953. int i;
  954. struct scsi_cmnd *cmd;
  955. uint32_t *cur_dsd = dsd;
  956. uint16_t used_dsds = tot_dsds;
  957. struct scsi_qla_host *vha;
  958. if (sp) {
  959. cmd = GET_CMD_SP(sp);
  960. sgl = scsi_prot_sglist(cmd);
  961. vha = sp->vha;
  962. } else if (tc) {
  963. vha = tc->vha;
  964. sgl = tc->prot_sg;
  965. } else {
  966. BUG();
  967. return 1;
  968. }
  969. ql_dbg(ql_dbg_tgt, vha, 0xe021,
  970. "%s: enter\n", __func__);
  971. for_each_sg(sgl, sg, tot_dsds, i) {
  972. dma_addr_t sle_dma;
  973. /* Allocate additional continuation packets? */
  974. if (avail_dsds == 0) {
  975. avail_dsds = (used_dsds > QLA_DSDS_PER_IOCB) ?
  976. QLA_DSDS_PER_IOCB : used_dsds;
  977. dsd_list_len = (avail_dsds + 1) * 12;
  978. used_dsds -= avail_dsds;
  979. /* allocate tracking DS */
  980. dsd_ptr = kzalloc(sizeof(struct dsd_dma), GFP_ATOMIC);
  981. if (!dsd_ptr)
  982. return 1;
  983. /* allocate new list */
  984. dsd_ptr->dsd_addr = next_dsd =
  985. dma_pool_alloc(ha->dl_dma_pool, GFP_ATOMIC,
  986. &dsd_ptr->dsd_list_dma);
  987. if (!next_dsd) {
  988. /*
  989. * Need to cleanup only this dsd_ptr, rest
  990. * will be done by sp_free_dma()
  991. */
  992. kfree(dsd_ptr);
  993. return 1;
  994. }
  995. if (sp) {
  996. list_add_tail(&dsd_ptr->list,
  997. &((struct crc_context *)
  998. sp->u.scmd.ctx)->dsd_list);
  999. sp->flags |= SRB_CRC_CTX_DSD_VALID;
  1000. } else {
  1001. list_add_tail(&dsd_ptr->list,
  1002. &(tc->ctx->dsd_list));
  1003. *tc->ctx_dsd_alloced = 1;
  1004. }
  1005. /* add new list to cmd iocb or last list */
  1006. *cur_dsd++ = cpu_to_le32(LSD(dsd_ptr->dsd_list_dma));
  1007. *cur_dsd++ = cpu_to_le32(MSD(dsd_ptr->dsd_list_dma));
  1008. *cur_dsd++ = dsd_list_len;
  1009. cur_dsd = (uint32_t *)next_dsd;
  1010. }
  1011. sle_dma = sg_dma_address(sg);
  1012. *cur_dsd++ = cpu_to_le32(LSD(sle_dma));
  1013. *cur_dsd++ = cpu_to_le32(MSD(sle_dma));
  1014. *cur_dsd++ = cpu_to_le32(sg_dma_len(sg));
  1015. avail_dsds--;
  1016. }
  1017. /* Null termination */
  1018. *cur_dsd++ = 0;
  1019. *cur_dsd++ = 0;
  1020. *cur_dsd++ = 0;
  1021. return 0;
  1022. }
  1023. /**
  1024. * qla24xx_build_scsi_crc_2_iocbs() - Build IOCB command utilizing Command
  1025. * Type 6 IOCB types.
  1026. *
  1027. * @sp: SRB command to process
  1028. * @cmd_pkt: Command type 3 IOCB
  1029. * @tot_dsds: Total number of segments to transfer
  1030. * @tot_prot_dsds:
  1031. * @fw_prot_opts:
  1032. */
  1033. inline int
  1034. qla24xx_build_scsi_crc_2_iocbs(srb_t *sp, struct cmd_type_crc_2 *cmd_pkt,
  1035. uint16_t tot_dsds, uint16_t tot_prot_dsds, uint16_t fw_prot_opts)
  1036. {
  1037. uint32_t *cur_dsd, *fcp_dl;
  1038. scsi_qla_host_t *vha;
  1039. struct scsi_cmnd *cmd;
  1040. uint32_t total_bytes = 0;
  1041. uint32_t data_bytes;
  1042. uint32_t dif_bytes;
  1043. uint8_t bundling = 1;
  1044. uint16_t blk_size;
  1045. struct crc_context *crc_ctx_pkt = NULL;
  1046. struct qla_hw_data *ha;
  1047. uint8_t additional_fcpcdb_len;
  1048. uint16_t fcp_cmnd_len;
  1049. struct fcp_cmnd *fcp_cmnd;
  1050. dma_addr_t crc_ctx_dma;
  1051. cmd = GET_CMD_SP(sp);
  1052. /* Update entry type to indicate Command Type CRC_2 IOCB */
  1053. *((uint32_t *)(&cmd_pkt->entry_type)) = cpu_to_le32(COMMAND_TYPE_CRC_2);
  1054. vha = sp->vha;
  1055. ha = vha->hw;
  1056. /* No data transfer */
  1057. data_bytes = scsi_bufflen(cmd);
  1058. if (!data_bytes || cmd->sc_data_direction == DMA_NONE) {
  1059. cmd_pkt->byte_count = cpu_to_le32(0);
  1060. return QLA_SUCCESS;
  1061. }
  1062. cmd_pkt->vp_index = sp->vha->vp_idx;
  1063. /* Set transfer direction */
  1064. if (cmd->sc_data_direction == DMA_TO_DEVICE) {
  1065. cmd_pkt->control_flags =
  1066. cpu_to_le16(CF_WRITE_DATA);
  1067. } else if (cmd->sc_data_direction == DMA_FROM_DEVICE) {
  1068. cmd_pkt->control_flags =
  1069. cpu_to_le16(CF_READ_DATA);
  1070. }
  1071. if ((scsi_get_prot_op(cmd) == SCSI_PROT_READ_INSERT) ||
  1072. (scsi_get_prot_op(cmd) == SCSI_PROT_WRITE_STRIP) ||
  1073. (scsi_get_prot_op(cmd) == SCSI_PROT_READ_STRIP) ||
  1074. (scsi_get_prot_op(cmd) == SCSI_PROT_WRITE_INSERT))
  1075. bundling = 0;
  1076. /* Allocate CRC context from global pool */
  1077. crc_ctx_pkt = sp->u.scmd.ctx =
  1078. dma_pool_zalloc(ha->dl_dma_pool, GFP_ATOMIC, &crc_ctx_dma);
  1079. if (!crc_ctx_pkt)
  1080. goto crc_queuing_error;
  1081. crc_ctx_pkt->crc_ctx_dma = crc_ctx_dma;
  1082. sp->flags |= SRB_CRC_CTX_DMA_VALID;
  1083. /* Set handle */
  1084. crc_ctx_pkt->handle = cmd_pkt->handle;
  1085. INIT_LIST_HEAD(&crc_ctx_pkt->dsd_list);
  1086. qla24xx_set_t10dif_tags(sp, (struct fw_dif_context *)
  1087. &crc_ctx_pkt->ref_tag, tot_prot_dsds);
  1088. cmd_pkt->crc_context_address[0] = cpu_to_le32(LSD(crc_ctx_dma));
  1089. cmd_pkt->crc_context_address[1] = cpu_to_le32(MSD(crc_ctx_dma));
  1090. cmd_pkt->crc_context_len = CRC_CONTEXT_LEN_FW;
  1091. /* Determine SCSI command length -- align to 4 byte boundary */
  1092. if (cmd->cmd_len > 16) {
  1093. additional_fcpcdb_len = cmd->cmd_len - 16;
  1094. if ((cmd->cmd_len % 4) != 0) {
  1095. /* SCSI cmd > 16 bytes must be multiple of 4 */
  1096. goto crc_queuing_error;
  1097. }
  1098. fcp_cmnd_len = 12 + cmd->cmd_len + 4;
  1099. } else {
  1100. additional_fcpcdb_len = 0;
  1101. fcp_cmnd_len = 12 + 16 + 4;
  1102. }
  1103. fcp_cmnd = &crc_ctx_pkt->fcp_cmnd;
  1104. fcp_cmnd->additional_cdb_len = additional_fcpcdb_len;
  1105. if (cmd->sc_data_direction == DMA_TO_DEVICE)
  1106. fcp_cmnd->additional_cdb_len |= 1;
  1107. else if (cmd->sc_data_direction == DMA_FROM_DEVICE)
  1108. fcp_cmnd->additional_cdb_len |= 2;
  1109. int_to_scsilun(cmd->device->lun, &fcp_cmnd->lun);
  1110. memcpy(fcp_cmnd->cdb, cmd->cmnd, cmd->cmd_len);
  1111. cmd_pkt->fcp_cmnd_dseg_len = cpu_to_le16(fcp_cmnd_len);
  1112. cmd_pkt->fcp_cmnd_dseg_address[0] = cpu_to_le32(
  1113. LSD(crc_ctx_dma + CRC_CONTEXT_FCPCMND_OFF));
  1114. cmd_pkt->fcp_cmnd_dseg_address[1] = cpu_to_le32(
  1115. MSD(crc_ctx_dma + CRC_CONTEXT_FCPCMND_OFF));
  1116. fcp_cmnd->task_management = 0;
  1117. fcp_cmnd->task_attribute = TSK_SIMPLE;
  1118. cmd_pkt->fcp_rsp_dseg_len = 0; /* Let response come in status iocb */
  1119. /* Compute dif len and adjust data len to incude protection */
  1120. dif_bytes = 0;
  1121. blk_size = cmd->device->sector_size;
  1122. dif_bytes = (data_bytes / blk_size) * 8;
  1123. switch (scsi_get_prot_op(GET_CMD_SP(sp))) {
  1124. case SCSI_PROT_READ_INSERT:
  1125. case SCSI_PROT_WRITE_STRIP:
  1126. total_bytes = data_bytes;
  1127. data_bytes += dif_bytes;
  1128. break;
  1129. case SCSI_PROT_READ_STRIP:
  1130. case SCSI_PROT_WRITE_INSERT:
  1131. case SCSI_PROT_READ_PASS:
  1132. case SCSI_PROT_WRITE_PASS:
  1133. total_bytes = data_bytes + dif_bytes;
  1134. break;
  1135. default:
  1136. BUG();
  1137. }
  1138. if (!qla2x00_hba_err_chk_enabled(sp))
  1139. fw_prot_opts |= 0x10; /* Disable Guard tag checking */
  1140. /* HBA error checking enabled */
  1141. else if (IS_PI_UNINIT_CAPABLE(ha)) {
  1142. if ((scsi_get_prot_type(GET_CMD_SP(sp)) == SCSI_PROT_DIF_TYPE1)
  1143. || (scsi_get_prot_type(GET_CMD_SP(sp)) ==
  1144. SCSI_PROT_DIF_TYPE2))
  1145. fw_prot_opts |= BIT_10;
  1146. else if (scsi_get_prot_type(GET_CMD_SP(sp)) ==
  1147. SCSI_PROT_DIF_TYPE3)
  1148. fw_prot_opts |= BIT_11;
  1149. }
  1150. if (!bundling) {
  1151. cur_dsd = (uint32_t *) &crc_ctx_pkt->u.nobundling.data_address;
  1152. } else {
  1153. /*
  1154. * Configure Bundling if we need to fetch interlaving
  1155. * protection PCI accesses
  1156. */
  1157. fw_prot_opts |= PO_ENABLE_DIF_BUNDLING;
  1158. crc_ctx_pkt->u.bundling.dif_byte_count = cpu_to_le32(dif_bytes);
  1159. crc_ctx_pkt->u.bundling.dseg_count = cpu_to_le16(tot_dsds -
  1160. tot_prot_dsds);
  1161. cur_dsd = (uint32_t *) &crc_ctx_pkt->u.bundling.data_address;
  1162. }
  1163. /* Finish the common fields of CRC pkt */
  1164. crc_ctx_pkt->blk_size = cpu_to_le16(blk_size);
  1165. crc_ctx_pkt->prot_opts = cpu_to_le16(fw_prot_opts);
  1166. crc_ctx_pkt->byte_count = cpu_to_le32(data_bytes);
  1167. crc_ctx_pkt->guard_seed = cpu_to_le16(0);
  1168. /* Fibre channel byte count */
  1169. cmd_pkt->byte_count = cpu_to_le32(total_bytes);
  1170. fcp_dl = (uint32_t *)(crc_ctx_pkt->fcp_cmnd.cdb + 16 +
  1171. additional_fcpcdb_len);
  1172. *fcp_dl = htonl(total_bytes);
  1173. if (!data_bytes || cmd->sc_data_direction == DMA_NONE) {
  1174. cmd_pkt->byte_count = cpu_to_le32(0);
  1175. return QLA_SUCCESS;
  1176. }
  1177. /* Walks data segments */
  1178. cmd_pkt->control_flags |= cpu_to_le16(CF_DATA_SEG_DESCR_ENABLE);
  1179. if (!bundling && tot_prot_dsds) {
  1180. if (qla24xx_walk_and_build_sglist_no_difb(ha, sp,
  1181. cur_dsd, tot_dsds, NULL))
  1182. goto crc_queuing_error;
  1183. } else if (qla24xx_walk_and_build_sglist(ha, sp, cur_dsd,
  1184. (tot_dsds - tot_prot_dsds), NULL))
  1185. goto crc_queuing_error;
  1186. if (bundling && tot_prot_dsds) {
  1187. /* Walks dif segments */
  1188. cmd_pkt->control_flags |= cpu_to_le16(CF_DIF_SEG_DESCR_ENABLE);
  1189. cur_dsd = (uint32_t *) &crc_ctx_pkt->u.bundling.dif_address;
  1190. if (qla24xx_walk_and_build_prot_sglist(ha, sp, cur_dsd,
  1191. tot_prot_dsds, NULL))
  1192. goto crc_queuing_error;
  1193. }
  1194. return QLA_SUCCESS;
  1195. crc_queuing_error:
  1196. /* Cleanup will be performed by the caller */
  1197. return QLA_FUNCTION_FAILED;
  1198. }
  1199. /**
  1200. * qla24xx_start_scsi() - Send a SCSI command to the ISP
  1201. * @sp: command to send to the ISP
  1202. *
  1203. * Returns non-zero if a failure occurred, else zero.
  1204. */
  1205. int
  1206. qla24xx_start_scsi(srb_t *sp)
  1207. {
  1208. int nseg;
  1209. unsigned long flags;
  1210. uint32_t *clr_ptr;
  1211. uint32_t index;
  1212. uint32_t handle;
  1213. struct cmd_type_7 *cmd_pkt;
  1214. uint16_t cnt;
  1215. uint16_t req_cnt;
  1216. uint16_t tot_dsds;
  1217. struct req_que *req = NULL;
  1218. struct rsp_que *rsp = NULL;
  1219. struct scsi_cmnd *cmd = GET_CMD_SP(sp);
  1220. struct scsi_qla_host *vha = sp->vha;
  1221. struct qla_hw_data *ha = vha->hw;
  1222. /* Setup device pointers. */
  1223. req = vha->req;
  1224. rsp = req->rsp;
  1225. /* So we know we haven't pci_map'ed anything yet */
  1226. tot_dsds = 0;
  1227. /* Send marker if required */
  1228. if (vha->marker_needed != 0) {
  1229. if (qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL) !=
  1230. QLA_SUCCESS)
  1231. return QLA_FUNCTION_FAILED;
  1232. vha->marker_needed = 0;
  1233. }
  1234. /* Acquire ring specific lock */
  1235. spin_lock_irqsave(&ha->hardware_lock, flags);
  1236. /* Check for room in outstanding command list. */
  1237. handle = req->current_outstanding_cmd;
  1238. for (index = 1; index < req->num_outstanding_cmds; index++) {
  1239. handle++;
  1240. if (handle == req->num_outstanding_cmds)
  1241. handle = 1;
  1242. if (!req->outstanding_cmds[handle])
  1243. break;
  1244. }
  1245. if (index == req->num_outstanding_cmds)
  1246. goto queuing_error;
  1247. /* Map the sg table so we have an accurate count of sg entries needed */
  1248. if (scsi_sg_count(cmd)) {
  1249. nseg = dma_map_sg(&ha->pdev->dev, scsi_sglist(cmd),
  1250. scsi_sg_count(cmd), cmd->sc_data_direction);
  1251. if (unlikely(!nseg))
  1252. goto queuing_error;
  1253. } else
  1254. nseg = 0;
  1255. tot_dsds = nseg;
  1256. req_cnt = qla24xx_calc_iocbs(vha, tot_dsds);
  1257. if (req->cnt < (req_cnt + 2)) {
  1258. cnt = IS_SHADOW_REG_CAPABLE(ha) ? *req->out_ptr :
  1259. RD_REG_DWORD_RELAXED(req->req_q_out);
  1260. if (req->ring_index < cnt)
  1261. req->cnt = cnt - req->ring_index;
  1262. else
  1263. req->cnt = req->length -
  1264. (req->ring_index - cnt);
  1265. if (req->cnt < (req_cnt + 2))
  1266. goto queuing_error;
  1267. }
  1268. /* Build command packet. */
  1269. req->current_outstanding_cmd = handle;
  1270. req->outstanding_cmds[handle] = sp;
  1271. sp->handle = handle;
  1272. cmd->host_scribble = (unsigned char *)(unsigned long)handle;
  1273. req->cnt -= req_cnt;
  1274. cmd_pkt = (struct cmd_type_7 *)req->ring_ptr;
  1275. cmd_pkt->handle = MAKE_HANDLE(req->id, handle);
  1276. /* Zero out remaining portion of packet. */
  1277. /* tagged queuing modifier -- default is TSK_SIMPLE (0). */
  1278. clr_ptr = (uint32_t *)cmd_pkt + 2;
  1279. memset(clr_ptr, 0, REQUEST_ENTRY_SIZE - 8);
  1280. cmd_pkt->dseg_count = cpu_to_le16(tot_dsds);
  1281. /* Set NPORT-ID and LUN number*/
  1282. cmd_pkt->nport_handle = cpu_to_le16(sp->fcport->loop_id);
  1283. cmd_pkt->port_id[0] = sp->fcport->d_id.b.al_pa;
  1284. cmd_pkt->port_id[1] = sp->fcport->d_id.b.area;
  1285. cmd_pkt->port_id[2] = sp->fcport->d_id.b.domain;
  1286. cmd_pkt->vp_index = sp->vha->vp_idx;
  1287. int_to_scsilun(cmd->device->lun, &cmd_pkt->lun);
  1288. host_to_fcp_swap((uint8_t *)&cmd_pkt->lun, sizeof(cmd_pkt->lun));
  1289. cmd_pkt->task = TSK_SIMPLE;
  1290. /* Load SCSI command packet. */
  1291. memcpy(cmd_pkt->fcp_cdb, cmd->cmnd, cmd->cmd_len);
  1292. host_to_fcp_swap(cmd_pkt->fcp_cdb, sizeof(cmd_pkt->fcp_cdb));
  1293. cmd_pkt->byte_count = cpu_to_le32((uint32_t)scsi_bufflen(cmd));
  1294. /* Build IOCB segments */
  1295. qla24xx_build_scsi_iocbs(sp, cmd_pkt, tot_dsds, req);
  1296. /* Set total data segment count. */
  1297. cmd_pkt->entry_count = (uint8_t)req_cnt;
  1298. wmb();
  1299. /* Adjust ring index. */
  1300. req->ring_index++;
  1301. if (req->ring_index == req->length) {
  1302. req->ring_index = 0;
  1303. req->ring_ptr = req->ring;
  1304. } else
  1305. req->ring_ptr++;
  1306. sp->flags |= SRB_DMA_VALID;
  1307. /* Set chip new ring index. */
  1308. WRT_REG_DWORD(req->req_q_in, req->ring_index);
  1309. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1310. return QLA_SUCCESS;
  1311. queuing_error:
  1312. if (tot_dsds)
  1313. scsi_dma_unmap(cmd);
  1314. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1315. return QLA_FUNCTION_FAILED;
  1316. }
  1317. /**
  1318. * qla24xx_dif_start_scsi() - Send a SCSI command to the ISP
  1319. * @sp: command to send to the ISP
  1320. *
  1321. * Returns non-zero if a failure occurred, else zero.
  1322. */
  1323. int
  1324. qla24xx_dif_start_scsi(srb_t *sp)
  1325. {
  1326. int nseg;
  1327. unsigned long flags;
  1328. uint32_t *clr_ptr;
  1329. uint32_t index;
  1330. uint32_t handle;
  1331. uint16_t cnt;
  1332. uint16_t req_cnt = 0;
  1333. uint16_t tot_dsds;
  1334. uint16_t tot_prot_dsds;
  1335. uint16_t fw_prot_opts = 0;
  1336. struct req_que *req = NULL;
  1337. struct rsp_que *rsp = NULL;
  1338. struct scsi_cmnd *cmd = GET_CMD_SP(sp);
  1339. struct scsi_qla_host *vha = sp->vha;
  1340. struct qla_hw_data *ha = vha->hw;
  1341. struct cmd_type_crc_2 *cmd_pkt;
  1342. uint32_t status = 0;
  1343. #define QDSS_GOT_Q_SPACE BIT_0
  1344. /* Only process protection or >16 cdb in this routine */
  1345. if (scsi_get_prot_op(cmd) == SCSI_PROT_NORMAL) {
  1346. if (cmd->cmd_len <= 16)
  1347. return qla24xx_start_scsi(sp);
  1348. }
  1349. /* Setup device pointers. */
  1350. req = vha->req;
  1351. rsp = req->rsp;
  1352. /* So we know we haven't pci_map'ed anything yet */
  1353. tot_dsds = 0;
  1354. /* Send marker if required */
  1355. if (vha->marker_needed != 0) {
  1356. if (qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL) !=
  1357. QLA_SUCCESS)
  1358. return QLA_FUNCTION_FAILED;
  1359. vha->marker_needed = 0;
  1360. }
  1361. /* Acquire ring specific lock */
  1362. spin_lock_irqsave(&ha->hardware_lock, flags);
  1363. /* Check for room in outstanding command list. */
  1364. handle = req->current_outstanding_cmd;
  1365. for (index = 1; index < req->num_outstanding_cmds; index++) {
  1366. handle++;
  1367. if (handle == req->num_outstanding_cmds)
  1368. handle = 1;
  1369. if (!req->outstanding_cmds[handle])
  1370. break;
  1371. }
  1372. if (index == req->num_outstanding_cmds)
  1373. goto queuing_error;
  1374. /* Compute number of required data segments */
  1375. /* Map the sg table so we have an accurate count of sg entries needed */
  1376. if (scsi_sg_count(cmd)) {
  1377. nseg = dma_map_sg(&ha->pdev->dev, scsi_sglist(cmd),
  1378. scsi_sg_count(cmd), cmd->sc_data_direction);
  1379. if (unlikely(!nseg))
  1380. goto queuing_error;
  1381. else
  1382. sp->flags |= SRB_DMA_VALID;
  1383. if ((scsi_get_prot_op(cmd) == SCSI_PROT_READ_INSERT) ||
  1384. (scsi_get_prot_op(cmd) == SCSI_PROT_WRITE_STRIP)) {
  1385. struct qla2_sgx sgx;
  1386. uint32_t partial;
  1387. memset(&sgx, 0, sizeof(struct qla2_sgx));
  1388. sgx.tot_bytes = scsi_bufflen(cmd);
  1389. sgx.cur_sg = scsi_sglist(cmd);
  1390. sgx.sp = sp;
  1391. nseg = 0;
  1392. while (qla24xx_get_one_block_sg(
  1393. cmd->device->sector_size, &sgx, &partial))
  1394. nseg++;
  1395. }
  1396. } else
  1397. nseg = 0;
  1398. /* number of required data segments */
  1399. tot_dsds = nseg;
  1400. /* Compute number of required protection segments */
  1401. if (qla24xx_configure_prot_mode(sp, &fw_prot_opts)) {
  1402. nseg = dma_map_sg(&ha->pdev->dev, scsi_prot_sglist(cmd),
  1403. scsi_prot_sg_count(cmd), cmd->sc_data_direction);
  1404. if (unlikely(!nseg))
  1405. goto queuing_error;
  1406. else
  1407. sp->flags |= SRB_CRC_PROT_DMA_VALID;
  1408. if ((scsi_get_prot_op(cmd) == SCSI_PROT_READ_INSERT) ||
  1409. (scsi_get_prot_op(cmd) == SCSI_PROT_WRITE_STRIP)) {
  1410. nseg = scsi_bufflen(cmd) / cmd->device->sector_size;
  1411. }
  1412. } else {
  1413. nseg = 0;
  1414. }
  1415. req_cnt = 1;
  1416. /* Total Data and protection sg segment(s) */
  1417. tot_prot_dsds = nseg;
  1418. tot_dsds += nseg;
  1419. if (req->cnt < (req_cnt + 2)) {
  1420. cnt = IS_SHADOW_REG_CAPABLE(ha) ? *req->out_ptr :
  1421. RD_REG_DWORD_RELAXED(req->req_q_out);
  1422. if (req->ring_index < cnt)
  1423. req->cnt = cnt - req->ring_index;
  1424. else
  1425. req->cnt = req->length -
  1426. (req->ring_index - cnt);
  1427. if (req->cnt < (req_cnt + 2))
  1428. goto queuing_error;
  1429. }
  1430. status |= QDSS_GOT_Q_SPACE;
  1431. /* Build header part of command packet (excluding the OPCODE). */
  1432. req->current_outstanding_cmd = handle;
  1433. req->outstanding_cmds[handle] = sp;
  1434. sp->handle = handle;
  1435. cmd->host_scribble = (unsigned char *)(unsigned long)handle;
  1436. req->cnt -= req_cnt;
  1437. /* Fill-in common area */
  1438. cmd_pkt = (struct cmd_type_crc_2 *)req->ring_ptr;
  1439. cmd_pkt->handle = MAKE_HANDLE(req->id, handle);
  1440. clr_ptr = (uint32_t *)cmd_pkt + 2;
  1441. memset(clr_ptr, 0, REQUEST_ENTRY_SIZE - 8);
  1442. /* Set NPORT-ID and LUN number*/
  1443. cmd_pkt->nport_handle = cpu_to_le16(sp->fcport->loop_id);
  1444. cmd_pkt->port_id[0] = sp->fcport->d_id.b.al_pa;
  1445. cmd_pkt->port_id[1] = sp->fcport->d_id.b.area;
  1446. cmd_pkt->port_id[2] = sp->fcport->d_id.b.domain;
  1447. int_to_scsilun(cmd->device->lun, &cmd_pkt->lun);
  1448. host_to_fcp_swap((uint8_t *)&cmd_pkt->lun, sizeof(cmd_pkt->lun));
  1449. /* Total Data and protection segment(s) */
  1450. cmd_pkt->dseg_count = cpu_to_le16(tot_dsds);
  1451. /* Build IOCB segments and adjust for data protection segments */
  1452. if (qla24xx_build_scsi_crc_2_iocbs(sp, (struct cmd_type_crc_2 *)
  1453. req->ring_ptr, tot_dsds, tot_prot_dsds, fw_prot_opts) !=
  1454. QLA_SUCCESS)
  1455. goto queuing_error;
  1456. cmd_pkt->entry_count = (uint8_t)req_cnt;
  1457. /* Specify response queue number where completion should happen */
  1458. cmd_pkt->entry_status = (uint8_t) rsp->id;
  1459. cmd_pkt->timeout = cpu_to_le16(0);
  1460. wmb();
  1461. /* Adjust ring index. */
  1462. req->ring_index++;
  1463. if (req->ring_index == req->length) {
  1464. req->ring_index = 0;
  1465. req->ring_ptr = req->ring;
  1466. } else
  1467. req->ring_ptr++;
  1468. /* Set chip new ring index. */
  1469. WRT_REG_DWORD(req->req_q_in, req->ring_index);
  1470. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1471. return QLA_SUCCESS;
  1472. queuing_error:
  1473. if (status & QDSS_GOT_Q_SPACE) {
  1474. req->outstanding_cmds[handle] = NULL;
  1475. req->cnt += req_cnt;
  1476. }
  1477. /* Cleanup will be performed by the caller (queuecommand) */
  1478. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1479. return QLA_FUNCTION_FAILED;
  1480. }
  1481. /**
  1482. * qla2xxx_start_scsi_mq() - Send a SCSI command to the ISP
  1483. * @sp: command to send to the ISP
  1484. *
  1485. * Returns non-zero if a failure occurred, else zero.
  1486. */
  1487. static int
  1488. qla2xxx_start_scsi_mq(srb_t *sp)
  1489. {
  1490. int nseg;
  1491. unsigned long flags;
  1492. uint32_t *clr_ptr;
  1493. uint32_t index;
  1494. uint32_t handle;
  1495. struct cmd_type_7 *cmd_pkt;
  1496. uint16_t cnt;
  1497. uint16_t req_cnt;
  1498. uint16_t tot_dsds;
  1499. struct req_que *req = NULL;
  1500. struct rsp_que *rsp = NULL;
  1501. struct scsi_cmnd *cmd = GET_CMD_SP(sp);
  1502. struct scsi_qla_host *vha = sp->fcport->vha;
  1503. struct qla_hw_data *ha = vha->hw;
  1504. struct qla_qpair *qpair = sp->qpair;
  1505. /* Acquire qpair specific lock */
  1506. spin_lock_irqsave(&qpair->qp_lock, flags);
  1507. /* Setup qpair pointers */
  1508. rsp = qpair->rsp;
  1509. req = qpair->req;
  1510. /* So we know we haven't pci_map'ed anything yet */
  1511. tot_dsds = 0;
  1512. /* Send marker if required */
  1513. if (vha->marker_needed != 0) {
  1514. if (__qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL) !=
  1515. QLA_SUCCESS) {
  1516. spin_unlock_irqrestore(&qpair->qp_lock, flags);
  1517. return QLA_FUNCTION_FAILED;
  1518. }
  1519. vha->marker_needed = 0;
  1520. }
  1521. /* Check for room in outstanding command list. */
  1522. handle = req->current_outstanding_cmd;
  1523. for (index = 1; index < req->num_outstanding_cmds; index++) {
  1524. handle++;
  1525. if (handle == req->num_outstanding_cmds)
  1526. handle = 1;
  1527. if (!req->outstanding_cmds[handle])
  1528. break;
  1529. }
  1530. if (index == req->num_outstanding_cmds)
  1531. goto queuing_error;
  1532. /* Map the sg table so we have an accurate count of sg entries needed */
  1533. if (scsi_sg_count(cmd)) {
  1534. nseg = dma_map_sg(&ha->pdev->dev, scsi_sglist(cmd),
  1535. scsi_sg_count(cmd), cmd->sc_data_direction);
  1536. if (unlikely(!nseg))
  1537. goto queuing_error;
  1538. } else
  1539. nseg = 0;
  1540. tot_dsds = nseg;
  1541. req_cnt = qla24xx_calc_iocbs(vha, tot_dsds);
  1542. if (req->cnt < (req_cnt + 2)) {
  1543. cnt = IS_SHADOW_REG_CAPABLE(ha) ? *req->out_ptr :
  1544. RD_REG_DWORD_RELAXED(req->req_q_out);
  1545. if (req->ring_index < cnt)
  1546. req->cnt = cnt - req->ring_index;
  1547. else
  1548. req->cnt = req->length -
  1549. (req->ring_index - cnt);
  1550. if (req->cnt < (req_cnt + 2))
  1551. goto queuing_error;
  1552. }
  1553. /* Build command packet. */
  1554. req->current_outstanding_cmd = handle;
  1555. req->outstanding_cmds[handle] = sp;
  1556. sp->handle = handle;
  1557. cmd->host_scribble = (unsigned char *)(unsigned long)handle;
  1558. req->cnt -= req_cnt;
  1559. cmd_pkt = (struct cmd_type_7 *)req->ring_ptr;
  1560. cmd_pkt->handle = MAKE_HANDLE(req->id, handle);
  1561. /* Zero out remaining portion of packet. */
  1562. /* tagged queuing modifier -- default is TSK_SIMPLE (0). */
  1563. clr_ptr = (uint32_t *)cmd_pkt + 2;
  1564. memset(clr_ptr, 0, REQUEST_ENTRY_SIZE - 8);
  1565. cmd_pkt->dseg_count = cpu_to_le16(tot_dsds);
  1566. /* Set NPORT-ID and LUN number*/
  1567. cmd_pkt->nport_handle = cpu_to_le16(sp->fcport->loop_id);
  1568. cmd_pkt->port_id[0] = sp->fcport->d_id.b.al_pa;
  1569. cmd_pkt->port_id[1] = sp->fcport->d_id.b.area;
  1570. cmd_pkt->port_id[2] = sp->fcport->d_id.b.domain;
  1571. cmd_pkt->vp_index = sp->fcport->vha->vp_idx;
  1572. int_to_scsilun(cmd->device->lun, &cmd_pkt->lun);
  1573. host_to_fcp_swap((uint8_t *)&cmd_pkt->lun, sizeof(cmd_pkt->lun));
  1574. cmd_pkt->task = TSK_SIMPLE;
  1575. /* Load SCSI command packet. */
  1576. memcpy(cmd_pkt->fcp_cdb, cmd->cmnd, cmd->cmd_len);
  1577. host_to_fcp_swap(cmd_pkt->fcp_cdb, sizeof(cmd_pkt->fcp_cdb));
  1578. cmd_pkt->byte_count = cpu_to_le32((uint32_t)scsi_bufflen(cmd));
  1579. /* Build IOCB segments */
  1580. qla24xx_build_scsi_iocbs(sp, cmd_pkt, tot_dsds, req);
  1581. /* Set total data segment count. */
  1582. cmd_pkt->entry_count = (uint8_t)req_cnt;
  1583. wmb();
  1584. /* Adjust ring index. */
  1585. req->ring_index++;
  1586. if (req->ring_index == req->length) {
  1587. req->ring_index = 0;
  1588. req->ring_ptr = req->ring;
  1589. } else
  1590. req->ring_ptr++;
  1591. sp->flags |= SRB_DMA_VALID;
  1592. /* Set chip new ring index. */
  1593. WRT_REG_DWORD(req->req_q_in, req->ring_index);
  1594. spin_unlock_irqrestore(&qpair->qp_lock, flags);
  1595. return QLA_SUCCESS;
  1596. queuing_error:
  1597. if (tot_dsds)
  1598. scsi_dma_unmap(cmd);
  1599. spin_unlock_irqrestore(&qpair->qp_lock, flags);
  1600. return QLA_FUNCTION_FAILED;
  1601. }
  1602. /**
  1603. * qla2xxx_dif_start_scsi_mq() - Send a SCSI command to the ISP
  1604. * @sp: command to send to the ISP
  1605. *
  1606. * Returns non-zero if a failure occurred, else zero.
  1607. */
  1608. int
  1609. qla2xxx_dif_start_scsi_mq(srb_t *sp)
  1610. {
  1611. int nseg;
  1612. unsigned long flags;
  1613. uint32_t *clr_ptr;
  1614. uint32_t index;
  1615. uint32_t handle;
  1616. uint16_t cnt;
  1617. uint16_t req_cnt = 0;
  1618. uint16_t tot_dsds;
  1619. uint16_t tot_prot_dsds;
  1620. uint16_t fw_prot_opts = 0;
  1621. struct req_que *req = NULL;
  1622. struct rsp_que *rsp = NULL;
  1623. struct scsi_cmnd *cmd = GET_CMD_SP(sp);
  1624. struct scsi_qla_host *vha = sp->fcport->vha;
  1625. struct qla_hw_data *ha = vha->hw;
  1626. struct cmd_type_crc_2 *cmd_pkt;
  1627. uint32_t status = 0;
  1628. struct qla_qpair *qpair = sp->qpair;
  1629. #define QDSS_GOT_Q_SPACE BIT_0
  1630. /* Check for host side state */
  1631. if (!qpair->online) {
  1632. cmd->result = DID_NO_CONNECT << 16;
  1633. return QLA_INTERFACE_ERROR;
  1634. }
  1635. if (!qpair->difdix_supported &&
  1636. scsi_get_prot_op(cmd) != SCSI_PROT_NORMAL) {
  1637. cmd->result = DID_NO_CONNECT << 16;
  1638. return QLA_INTERFACE_ERROR;
  1639. }
  1640. /* Only process protection or >16 cdb in this routine */
  1641. if (scsi_get_prot_op(cmd) == SCSI_PROT_NORMAL) {
  1642. if (cmd->cmd_len <= 16)
  1643. return qla2xxx_start_scsi_mq(sp);
  1644. }
  1645. spin_lock_irqsave(&qpair->qp_lock, flags);
  1646. /* Setup qpair pointers */
  1647. rsp = qpair->rsp;
  1648. req = qpair->req;
  1649. /* So we know we haven't pci_map'ed anything yet */
  1650. tot_dsds = 0;
  1651. /* Send marker if required */
  1652. if (vha->marker_needed != 0) {
  1653. if (__qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL) !=
  1654. QLA_SUCCESS) {
  1655. spin_unlock_irqrestore(&qpair->qp_lock, flags);
  1656. return QLA_FUNCTION_FAILED;
  1657. }
  1658. vha->marker_needed = 0;
  1659. }
  1660. /* Check for room in outstanding command list. */
  1661. handle = req->current_outstanding_cmd;
  1662. for (index = 1; index < req->num_outstanding_cmds; index++) {
  1663. handle++;
  1664. if (handle == req->num_outstanding_cmds)
  1665. handle = 1;
  1666. if (!req->outstanding_cmds[handle])
  1667. break;
  1668. }
  1669. if (index == req->num_outstanding_cmds)
  1670. goto queuing_error;
  1671. /* Compute number of required data segments */
  1672. /* Map the sg table so we have an accurate count of sg entries needed */
  1673. if (scsi_sg_count(cmd)) {
  1674. nseg = dma_map_sg(&ha->pdev->dev, scsi_sglist(cmd),
  1675. scsi_sg_count(cmd), cmd->sc_data_direction);
  1676. if (unlikely(!nseg))
  1677. goto queuing_error;
  1678. else
  1679. sp->flags |= SRB_DMA_VALID;
  1680. if ((scsi_get_prot_op(cmd) == SCSI_PROT_READ_INSERT) ||
  1681. (scsi_get_prot_op(cmd) == SCSI_PROT_WRITE_STRIP)) {
  1682. struct qla2_sgx sgx;
  1683. uint32_t partial;
  1684. memset(&sgx, 0, sizeof(struct qla2_sgx));
  1685. sgx.tot_bytes = scsi_bufflen(cmd);
  1686. sgx.cur_sg = scsi_sglist(cmd);
  1687. sgx.sp = sp;
  1688. nseg = 0;
  1689. while (qla24xx_get_one_block_sg(
  1690. cmd->device->sector_size, &sgx, &partial))
  1691. nseg++;
  1692. }
  1693. } else
  1694. nseg = 0;
  1695. /* number of required data segments */
  1696. tot_dsds = nseg;
  1697. /* Compute number of required protection segments */
  1698. if (qla24xx_configure_prot_mode(sp, &fw_prot_opts)) {
  1699. nseg = dma_map_sg(&ha->pdev->dev, scsi_prot_sglist(cmd),
  1700. scsi_prot_sg_count(cmd), cmd->sc_data_direction);
  1701. if (unlikely(!nseg))
  1702. goto queuing_error;
  1703. else
  1704. sp->flags |= SRB_CRC_PROT_DMA_VALID;
  1705. if ((scsi_get_prot_op(cmd) == SCSI_PROT_READ_INSERT) ||
  1706. (scsi_get_prot_op(cmd) == SCSI_PROT_WRITE_STRIP)) {
  1707. nseg = scsi_bufflen(cmd) / cmd->device->sector_size;
  1708. }
  1709. } else {
  1710. nseg = 0;
  1711. }
  1712. req_cnt = 1;
  1713. /* Total Data and protection sg segment(s) */
  1714. tot_prot_dsds = nseg;
  1715. tot_dsds += nseg;
  1716. if (req->cnt < (req_cnt + 2)) {
  1717. cnt = IS_SHADOW_REG_CAPABLE(ha) ? *req->out_ptr :
  1718. RD_REG_DWORD_RELAXED(req->req_q_out);
  1719. if (req->ring_index < cnt)
  1720. req->cnt = cnt - req->ring_index;
  1721. else
  1722. req->cnt = req->length -
  1723. (req->ring_index - cnt);
  1724. if (req->cnt < (req_cnt + 2))
  1725. goto queuing_error;
  1726. }
  1727. status |= QDSS_GOT_Q_SPACE;
  1728. /* Build header part of command packet (excluding the OPCODE). */
  1729. req->current_outstanding_cmd = handle;
  1730. req->outstanding_cmds[handle] = sp;
  1731. sp->handle = handle;
  1732. cmd->host_scribble = (unsigned char *)(unsigned long)handle;
  1733. req->cnt -= req_cnt;
  1734. /* Fill-in common area */
  1735. cmd_pkt = (struct cmd_type_crc_2 *)req->ring_ptr;
  1736. cmd_pkt->handle = MAKE_HANDLE(req->id, handle);
  1737. clr_ptr = (uint32_t *)cmd_pkt + 2;
  1738. memset(clr_ptr, 0, REQUEST_ENTRY_SIZE - 8);
  1739. /* Set NPORT-ID and LUN number*/
  1740. cmd_pkt->nport_handle = cpu_to_le16(sp->fcport->loop_id);
  1741. cmd_pkt->port_id[0] = sp->fcport->d_id.b.al_pa;
  1742. cmd_pkt->port_id[1] = sp->fcport->d_id.b.area;
  1743. cmd_pkt->port_id[2] = sp->fcport->d_id.b.domain;
  1744. int_to_scsilun(cmd->device->lun, &cmd_pkt->lun);
  1745. host_to_fcp_swap((uint8_t *)&cmd_pkt->lun, sizeof(cmd_pkt->lun));
  1746. /* Total Data and protection segment(s) */
  1747. cmd_pkt->dseg_count = cpu_to_le16(tot_dsds);
  1748. /* Build IOCB segments and adjust for data protection segments */
  1749. if (qla24xx_build_scsi_crc_2_iocbs(sp, (struct cmd_type_crc_2 *)
  1750. req->ring_ptr, tot_dsds, tot_prot_dsds, fw_prot_opts) !=
  1751. QLA_SUCCESS)
  1752. goto queuing_error;
  1753. cmd_pkt->entry_count = (uint8_t)req_cnt;
  1754. cmd_pkt->timeout = cpu_to_le16(0);
  1755. wmb();
  1756. /* Adjust ring index. */
  1757. req->ring_index++;
  1758. if (req->ring_index == req->length) {
  1759. req->ring_index = 0;
  1760. req->ring_ptr = req->ring;
  1761. } else
  1762. req->ring_ptr++;
  1763. /* Set chip new ring index. */
  1764. WRT_REG_DWORD(req->req_q_in, req->ring_index);
  1765. /* Manage unprocessed RIO/ZIO commands in response queue. */
  1766. if (vha->flags.process_response_queue &&
  1767. rsp->ring_ptr->signature != RESPONSE_PROCESSED)
  1768. qla24xx_process_response_queue(vha, rsp);
  1769. spin_unlock_irqrestore(&qpair->qp_lock, flags);
  1770. return QLA_SUCCESS;
  1771. queuing_error:
  1772. if (status & QDSS_GOT_Q_SPACE) {
  1773. req->outstanding_cmds[handle] = NULL;
  1774. req->cnt += req_cnt;
  1775. }
  1776. /* Cleanup will be performed by the caller (queuecommand) */
  1777. spin_unlock_irqrestore(&qpair->qp_lock, flags);
  1778. return QLA_FUNCTION_FAILED;
  1779. }
  1780. /* Generic Control-SRB manipulation functions. */
  1781. /* hardware_lock assumed to be held. */
  1782. void *
  1783. __qla2x00_alloc_iocbs(struct qla_qpair *qpair, srb_t *sp)
  1784. {
  1785. scsi_qla_host_t *vha = qpair->vha;
  1786. struct qla_hw_data *ha = vha->hw;
  1787. struct req_que *req = qpair->req;
  1788. device_reg_t *reg = ISP_QUE_REG(ha, req->id);
  1789. uint32_t index, handle;
  1790. request_t *pkt;
  1791. uint16_t cnt, req_cnt;
  1792. pkt = NULL;
  1793. req_cnt = 1;
  1794. handle = 0;
  1795. if (sp && (sp->type != SRB_SCSI_CMD)) {
  1796. /* Adjust entry-counts as needed. */
  1797. req_cnt = sp->iocbs;
  1798. }
  1799. /* Check for room on request queue. */
  1800. if (req->cnt < req_cnt + 2) {
  1801. if (qpair->use_shadow_reg)
  1802. cnt = *req->out_ptr;
  1803. else if (ha->mqenable || IS_QLA83XX(ha) || IS_QLA27XX(ha))
  1804. cnt = RD_REG_DWORD(&reg->isp25mq.req_q_out);
  1805. else if (IS_P3P_TYPE(ha))
  1806. cnt = RD_REG_DWORD(&reg->isp82.req_q_out);
  1807. else if (IS_FWI2_CAPABLE(ha))
  1808. cnt = RD_REG_DWORD(&reg->isp24.req_q_out);
  1809. else if (IS_QLAFX00(ha))
  1810. cnt = RD_REG_DWORD(&reg->ispfx00.req_q_out);
  1811. else
  1812. cnt = qla2x00_debounce_register(
  1813. ISP_REQ_Q_OUT(ha, &reg->isp));
  1814. if (req->ring_index < cnt)
  1815. req->cnt = cnt - req->ring_index;
  1816. else
  1817. req->cnt = req->length -
  1818. (req->ring_index - cnt);
  1819. }
  1820. if (req->cnt < req_cnt + 2)
  1821. goto queuing_error;
  1822. if (sp) {
  1823. /* Check for room in outstanding command list. */
  1824. handle = req->current_outstanding_cmd;
  1825. for (index = 1; index < req->num_outstanding_cmds; index++) {
  1826. handle++;
  1827. if (handle == req->num_outstanding_cmds)
  1828. handle = 1;
  1829. if (!req->outstanding_cmds[handle])
  1830. break;
  1831. }
  1832. if (index == req->num_outstanding_cmds) {
  1833. ql_log(ql_log_warn, vha, 0x700b,
  1834. "No room on outstanding cmd array.\n");
  1835. goto queuing_error;
  1836. }
  1837. /* Prep command array. */
  1838. req->current_outstanding_cmd = handle;
  1839. req->outstanding_cmds[handle] = sp;
  1840. sp->handle = handle;
  1841. }
  1842. /* Prep packet */
  1843. req->cnt -= req_cnt;
  1844. pkt = req->ring_ptr;
  1845. memset(pkt, 0, REQUEST_ENTRY_SIZE);
  1846. if (IS_QLAFX00(ha)) {
  1847. WRT_REG_BYTE((void __iomem *)&pkt->entry_count, req_cnt);
  1848. WRT_REG_WORD((void __iomem *)&pkt->handle, handle);
  1849. } else {
  1850. pkt->entry_count = req_cnt;
  1851. pkt->handle = handle;
  1852. }
  1853. return pkt;
  1854. queuing_error:
  1855. qpair->tgt_counters.num_alloc_iocb_failed++;
  1856. return pkt;
  1857. }
  1858. void *
  1859. qla2x00_alloc_iocbs_ready(struct qla_qpair *qpair, srb_t *sp)
  1860. {
  1861. scsi_qla_host_t *vha = qpair->vha;
  1862. if (qla2x00_reset_active(vha))
  1863. return NULL;
  1864. return __qla2x00_alloc_iocbs(qpair, sp);
  1865. }
  1866. void *
  1867. qla2x00_alloc_iocbs(struct scsi_qla_host *vha, srb_t *sp)
  1868. {
  1869. return __qla2x00_alloc_iocbs(vha->hw->base_qpair, sp);
  1870. }
  1871. static void
  1872. qla24xx_prli_iocb(srb_t *sp, struct logio_entry_24xx *logio)
  1873. {
  1874. struct srb_iocb *lio = &sp->u.iocb_cmd;
  1875. logio->entry_type = LOGINOUT_PORT_IOCB_TYPE;
  1876. logio->control_flags = cpu_to_le16(LCF_COMMAND_PRLI);
  1877. if (lio->u.logio.flags & SRB_LOGIN_NVME_PRLI)
  1878. logio->control_flags |= LCF_NVME_PRLI;
  1879. logio->nport_handle = cpu_to_le16(sp->fcport->loop_id);
  1880. logio->port_id[0] = sp->fcport->d_id.b.al_pa;
  1881. logio->port_id[1] = sp->fcport->d_id.b.area;
  1882. logio->port_id[2] = sp->fcport->d_id.b.domain;
  1883. logio->vp_index = sp->vha->vp_idx;
  1884. }
  1885. static void
  1886. qla24xx_login_iocb(srb_t *sp, struct logio_entry_24xx *logio)
  1887. {
  1888. struct srb_iocb *lio = &sp->u.iocb_cmd;
  1889. logio->entry_type = LOGINOUT_PORT_IOCB_TYPE;
  1890. if (lio->u.logio.flags & SRB_LOGIN_PRLI_ONLY) {
  1891. logio->control_flags = cpu_to_le16(LCF_COMMAND_PRLI);
  1892. } else {
  1893. logio->control_flags = cpu_to_le16(LCF_COMMAND_PLOGI);
  1894. if (lio->u.logio.flags & SRB_LOGIN_COND_PLOGI)
  1895. logio->control_flags |= cpu_to_le16(LCF_COND_PLOGI);
  1896. if (lio->u.logio.flags & SRB_LOGIN_SKIP_PRLI)
  1897. logio->control_flags |= cpu_to_le16(LCF_SKIP_PRLI);
  1898. }
  1899. logio->nport_handle = cpu_to_le16(sp->fcport->loop_id);
  1900. logio->port_id[0] = sp->fcport->d_id.b.al_pa;
  1901. logio->port_id[1] = sp->fcport->d_id.b.area;
  1902. logio->port_id[2] = sp->fcport->d_id.b.domain;
  1903. logio->vp_index = sp->vha->vp_idx;
  1904. }
  1905. static void
  1906. qla2x00_login_iocb(srb_t *sp, struct mbx_entry *mbx)
  1907. {
  1908. struct qla_hw_data *ha = sp->vha->hw;
  1909. struct srb_iocb *lio = &sp->u.iocb_cmd;
  1910. uint16_t opts;
  1911. mbx->entry_type = MBX_IOCB_TYPE;
  1912. SET_TARGET_ID(ha, mbx->loop_id, sp->fcport->loop_id);
  1913. mbx->mb0 = cpu_to_le16(MBC_LOGIN_FABRIC_PORT);
  1914. opts = lio->u.logio.flags & SRB_LOGIN_COND_PLOGI ? BIT_0 : 0;
  1915. opts |= lio->u.logio.flags & SRB_LOGIN_SKIP_PRLI ? BIT_1 : 0;
  1916. if (HAS_EXTENDED_IDS(ha)) {
  1917. mbx->mb1 = cpu_to_le16(sp->fcport->loop_id);
  1918. mbx->mb10 = cpu_to_le16(opts);
  1919. } else {
  1920. mbx->mb1 = cpu_to_le16((sp->fcport->loop_id << 8) | opts);
  1921. }
  1922. mbx->mb2 = cpu_to_le16(sp->fcport->d_id.b.domain);
  1923. mbx->mb3 = cpu_to_le16(sp->fcport->d_id.b.area << 8 |
  1924. sp->fcport->d_id.b.al_pa);
  1925. mbx->mb9 = cpu_to_le16(sp->vha->vp_idx);
  1926. }
  1927. static void
  1928. qla24xx_logout_iocb(srb_t *sp, struct logio_entry_24xx *logio)
  1929. {
  1930. logio->entry_type = LOGINOUT_PORT_IOCB_TYPE;
  1931. logio->control_flags =
  1932. cpu_to_le16(LCF_COMMAND_LOGO|LCF_IMPL_LOGO);
  1933. if (!sp->fcport->se_sess ||
  1934. !sp->fcport->keep_nport_handle)
  1935. logio->control_flags |= cpu_to_le16(LCF_FREE_NPORT);
  1936. logio->nport_handle = cpu_to_le16(sp->fcport->loop_id);
  1937. logio->port_id[0] = sp->fcport->d_id.b.al_pa;
  1938. logio->port_id[1] = sp->fcport->d_id.b.area;
  1939. logio->port_id[2] = sp->fcport->d_id.b.domain;
  1940. logio->vp_index = sp->vha->vp_idx;
  1941. }
  1942. static void
  1943. qla2x00_logout_iocb(srb_t *sp, struct mbx_entry *mbx)
  1944. {
  1945. struct qla_hw_data *ha = sp->vha->hw;
  1946. mbx->entry_type = MBX_IOCB_TYPE;
  1947. SET_TARGET_ID(ha, mbx->loop_id, sp->fcport->loop_id);
  1948. mbx->mb0 = cpu_to_le16(MBC_LOGOUT_FABRIC_PORT);
  1949. mbx->mb1 = HAS_EXTENDED_IDS(ha) ?
  1950. cpu_to_le16(sp->fcport->loop_id):
  1951. cpu_to_le16(sp->fcport->loop_id << 8);
  1952. mbx->mb2 = cpu_to_le16(sp->fcport->d_id.b.domain);
  1953. mbx->mb3 = cpu_to_le16(sp->fcport->d_id.b.area << 8 |
  1954. sp->fcport->d_id.b.al_pa);
  1955. mbx->mb9 = cpu_to_le16(sp->vha->vp_idx);
  1956. /* Implicit: mbx->mbx10 = 0. */
  1957. }
  1958. static void
  1959. qla24xx_adisc_iocb(srb_t *sp, struct logio_entry_24xx *logio)
  1960. {
  1961. logio->entry_type = LOGINOUT_PORT_IOCB_TYPE;
  1962. logio->control_flags = cpu_to_le16(LCF_COMMAND_ADISC);
  1963. logio->nport_handle = cpu_to_le16(sp->fcport->loop_id);
  1964. logio->vp_index = sp->vha->vp_idx;
  1965. }
  1966. static void
  1967. qla2x00_adisc_iocb(srb_t *sp, struct mbx_entry *mbx)
  1968. {
  1969. struct qla_hw_data *ha = sp->vha->hw;
  1970. mbx->entry_type = MBX_IOCB_TYPE;
  1971. SET_TARGET_ID(ha, mbx->loop_id, sp->fcport->loop_id);
  1972. mbx->mb0 = cpu_to_le16(MBC_GET_PORT_DATABASE);
  1973. if (HAS_EXTENDED_IDS(ha)) {
  1974. mbx->mb1 = cpu_to_le16(sp->fcport->loop_id);
  1975. mbx->mb10 = cpu_to_le16(BIT_0);
  1976. } else {
  1977. mbx->mb1 = cpu_to_le16((sp->fcport->loop_id << 8) | BIT_0);
  1978. }
  1979. mbx->mb2 = cpu_to_le16(MSW(ha->async_pd_dma));
  1980. mbx->mb3 = cpu_to_le16(LSW(ha->async_pd_dma));
  1981. mbx->mb6 = cpu_to_le16(MSW(MSD(ha->async_pd_dma)));
  1982. mbx->mb7 = cpu_to_le16(LSW(MSD(ha->async_pd_dma)));
  1983. mbx->mb9 = cpu_to_le16(sp->vha->vp_idx);
  1984. }
  1985. static void
  1986. qla24xx_tm_iocb(srb_t *sp, struct tsk_mgmt_entry *tsk)
  1987. {
  1988. uint32_t flags;
  1989. uint64_t lun;
  1990. struct fc_port *fcport = sp->fcport;
  1991. scsi_qla_host_t *vha = fcport->vha;
  1992. struct qla_hw_data *ha = vha->hw;
  1993. struct srb_iocb *iocb = &sp->u.iocb_cmd;
  1994. struct req_que *req = vha->req;
  1995. flags = iocb->u.tmf.flags;
  1996. lun = iocb->u.tmf.lun;
  1997. tsk->entry_type = TSK_MGMT_IOCB_TYPE;
  1998. tsk->entry_count = 1;
  1999. tsk->handle = MAKE_HANDLE(req->id, tsk->handle);
  2000. tsk->nport_handle = cpu_to_le16(fcport->loop_id);
  2001. tsk->timeout = cpu_to_le16(ha->r_a_tov / 10 * 2);
  2002. tsk->control_flags = cpu_to_le32(flags);
  2003. tsk->port_id[0] = fcport->d_id.b.al_pa;
  2004. tsk->port_id[1] = fcport->d_id.b.area;
  2005. tsk->port_id[2] = fcport->d_id.b.domain;
  2006. tsk->vp_index = fcport->vha->vp_idx;
  2007. if (flags == TCF_LUN_RESET) {
  2008. int_to_scsilun(lun, &tsk->lun);
  2009. host_to_fcp_swap((uint8_t *)&tsk->lun,
  2010. sizeof(tsk->lun));
  2011. }
  2012. }
  2013. static void
  2014. qla2x00_els_dcmd_sp_free(void *data)
  2015. {
  2016. srb_t *sp = data;
  2017. struct srb_iocb *elsio = &sp->u.iocb_cmd;
  2018. kfree(sp->fcport);
  2019. if (elsio->u.els_logo.els_logo_pyld)
  2020. dma_free_coherent(&sp->vha->hw->pdev->dev, DMA_POOL_SIZE,
  2021. elsio->u.els_logo.els_logo_pyld,
  2022. elsio->u.els_logo.els_logo_pyld_dma);
  2023. del_timer(&elsio->timer);
  2024. qla2x00_rel_sp(sp);
  2025. }
  2026. static void
  2027. qla2x00_els_dcmd_iocb_timeout(void *data)
  2028. {
  2029. srb_t *sp = data;
  2030. fc_port_t *fcport = sp->fcport;
  2031. struct scsi_qla_host *vha = sp->vha;
  2032. struct srb_iocb *lio = &sp->u.iocb_cmd;
  2033. ql_dbg(ql_dbg_io, vha, 0x3069,
  2034. "%s Timeout, hdl=%x, portid=%02x%02x%02x\n",
  2035. sp->name, sp->handle, fcport->d_id.b.domain, fcport->d_id.b.area,
  2036. fcport->d_id.b.al_pa);
  2037. complete(&lio->u.els_logo.comp);
  2038. }
  2039. static void
  2040. qla2x00_els_dcmd_sp_done(void *ptr, int res)
  2041. {
  2042. srb_t *sp = ptr;
  2043. fc_port_t *fcport = sp->fcport;
  2044. struct srb_iocb *lio = &sp->u.iocb_cmd;
  2045. struct scsi_qla_host *vha = sp->vha;
  2046. ql_dbg(ql_dbg_io, vha, 0x3072,
  2047. "%s hdl=%x, portid=%02x%02x%02x done\n",
  2048. sp->name, sp->handle, fcport->d_id.b.domain,
  2049. fcport->d_id.b.area, fcport->d_id.b.al_pa);
  2050. complete(&lio->u.els_logo.comp);
  2051. }
  2052. int
  2053. qla24xx_els_dcmd_iocb(scsi_qla_host_t *vha, int els_opcode,
  2054. port_id_t remote_did)
  2055. {
  2056. srb_t *sp;
  2057. fc_port_t *fcport = NULL;
  2058. struct srb_iocb *elsio = NULL;
  2059. struct qla_hw_data *ha = vha->hw;
  2060. struct els_logo_payload logo_pyld;
  2061. int rval = QLA_SUCCESS;
  2062. fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
  2063. if (!fcport) {
  2064. ql_log(ql_log_info, vha, 0x70e5, "fcport allocation failed\n");
  2065. return -ENOMEM;
  2066. }
  2067. /* Alloc SRB structure */
  2068. sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
  2069. if (!sp) {
  2070. kfree(fcport);
  2071. ql_log(ql_log_info, vha, 0x70e6,
  2072. "SRB allocation failed\n");
  2073. return -ENOMEM;
  2074. }
  2075. elsio = &sp->u.iocb_cmd;
  2076. fcport->loop_id = 0xFFFF;
  2077. fcport->d_id.b.domain = remote_did.b.domain;
  2078. fcport->d_id.b.area = remote_did.b.area;
  2079. fcport->d_id.b.al_pa = remote_did.b.al_pa;
  2080. ql_dbg(ql_dbg_io, vha, 0x3073, "portid=%02x%02x%02x done\n",
  2081. fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa);
  2082. sp->type = SRB_ELS_DCMD;
  2083. sp->name = "ELS_DCMD";
  2084. sp->fcport = fcport;
  2085. elsio->timeout = qla2x00_els_dcmd_iocb_timeout;
  2086. qla2x00_init_timer(sp, ELS_DCMD_TIMEOUT);
  2087. init_completion(&sp->u.iocb_cmd.u.els_logo.comp);
  2088. sp->done = qla2x00_els_dcmd_sp_done;
  2089. sp->free = qla2x00_els_dcmd_sp_free;
  2090. elsio->u.els_logo.els_logo_pyld = dma_alloc_coherent(&ha->pdev->dev,
  2091. DMA_POOL_SIZE, &elsio->u.els_logo.els_logo_pyld_dma,
  2092. GFP_KERNEL);
  2093. if (!elsio->u.els_logo.els_logo_pyld) {
  2094. sp->free(sp);
  2095. return QLA_FUNCTION_FAILED;
  2096. }
  2097. memset(&logo_pyld, 0, sizeof(struct els_logo_payload));
  2098. elsio->u.els_logo.els_cmd = els_opcode;
  2099. logo_pyld.opcode = els_opcode;
  2100. logo_pyld.s_id[0] = vha->d_id.b.al_pa;
  2101. logo_pyld.s_id[1] = vha->d_id.b.area;
  2102. logo_pyld.s_id[2] = vha->d_id.b.domain;
  2103. host_to_fcp_swap(logo_pyld.s_id, sizeof(uint32_t));
  2104. memcpy(&logo_pyld.wwpn, vha->port_name, WWN_SIZE);
  2105. memcpy(elsio->u.els_logo.els_logo_pyld, &logo_pyld,
  2106. sizeof(struct els_logo_payload));
  2107. rval = qla2x00_start_sp(sp);
  2108. if (rval != QLA_SUCCESS) {
  2109. sp->free(sp);
  2110. return QLA_FUNCTION_FAILED;
  2111. }
  2112. ql_dbg(ql_dbg_io, vha, 0x3074,
  2113. "%s LOGO sent, hdl=%x, loopid=%x, portid=%02x%02x%02x.\n",
  2114. sp->name, sp->handle, fcport->loop_id, fcport->d_id.b.domain,
  2115. fcport->d_id.b.area, fcport->d_id.b.al_pa);
  2116. wait_for_completion(&elsio->u.els_logo.comp);
  2117. sp->free(sp);
  2118. return rval;
  2119. }
  2120. static void
  2121. qla24xx_els_logo_iocb(srb_t *sp, struct els_entry_24xx *els_iocb)
  2122. {
  2123. scsi_qla_host_t *vha = sp->vha;
  2124. struct srb_iocb *elsio = &sp->u.iocb_cmd;
  2125. els_iocb->entry_type = ELS_IOCB_TYPE;
  2126. els_iocb->entry_count = 1;
  2127. els_iocb->sys_define = 0;
  2128. els_iocb->entry_status = 0;
  2129. els_iocb->handle = sp->handle;
  2130. els_iocb->nport_handle = cpu_to_le16(sp->fcport->loop_id);
  2131. els_iocb->tx_dsd_count = 1;
  2132. els_iocb->vp_index = vha->vp_idx;
  2133. els_iocb->sof_type = EST_SOFI3;
  2134. els_iocb->rx_dsd_count = 0;
  2135. els_iocb->opcode = elsio->u.els_logo.els_cmd;
  2136. els_iocb->port_id[0] = sp->fcport->d_id.b.al_pa;
  2137. els_iocb->port_id[1] = sp->fcport->d_id.b.area;
  2138. els_iocb->port_id[2] = sp->fcport->d_id.b.domain;
  2139. els_iocb->s_id[0] = vha->d_id.b.al_pa;
  2140. els_iocb->s_id[1] = vha->d_id.b.area;
  2141. els_iocb->s_id[2] = vha->d_id.b.domain;
  2142. els_iocb->control_flags = 0;
  2143. if (elsio->u.els_logo.els_cmd == ELS_DCMD_PLOGI) {
  2144. els_iocb->tx_byte_count = els_iocb->tx_len =
  2145. sizeof(struct els_plogi_payload);
  2146. els_iocb->tx_address[0] =
  2147. cpu_to_le32(LSD(elsio->u.els_plogi.els_plogi_pyld_dma));
  2148. els_iocb->tx_address[1] =
  2149. cpu_to_le32(MSD(elsio->u.els_plogi.els_plogi_pyld_dma));
  2150. els_iocb->rx_dsd_count = 1;
  2151. els_iocb->rx_byte_count = els_iocb->rx_len =
  2152. sizeof(struct els_plogi_payload);
  2153. els_iocb->rx_address[0] =
  2154. cpu_to_le32(LSD(elsio->u.els_plogi.els_resp_pyld_dma));
  2155. els_iocb->rx_address[1] =
  2156. cpu_to_le32(MSD(elsio->u.els_plogi.els_resp_pyld_dma));
  2157. ql_dbg(ql_dbg_io + ql_dbg_buffer, vha, 0x3073,
  2158. "PLOGI ELS IOCB:\n");
  2159. ql_dump_buffer(ql_log_info, vha, 0x0109,
  2160. (uint8_t *)els_iocb,
  2161. sizeof(*els_iocb));
  2162. } else {
  2163. els_iocb->tx_byte_count = sizeof(struct els_logo_payload);
  2164. els_iocb->tx_address[0] =
  2165. cpu_to_le32(LSD(elsio->u.els_logo.els_logo_pyld_dma));
  2166. els_iocb->tx_address[1] =
  2167. cpu_to_le32(MSD(elsio->u.els_logo.els_logo_pyld_dma));
  2168. els_iocb->tx_len = cpu_to_le32(sizeof(struct els_logo_payload));
  2169. els_iocb->rx_byte_count = 0;
  2170. els_iocb->rx_address[0] = 0;
  2171. els_iocb->rx_address[1] = 0;
  2172. els_iocb->rx_len = 0;
  2173. }
  2174. sp->vha->qla_stats.control_requests++;
  2175. }
  2176. static void
  2177. qla2x00_els_dcmd2_iocb_timeout(void *data)
  2178. {
  2179. srb_t *sp = data;
  2180. fc_port_t *fcport = sp->fcport;
  2181. struct scsi_qla_host *vha = sp->vha;
  2182. struct qla_hw_data *ha = vha->hw;
  2183. unsigned long flags = 0;
  2184. int res;
  2185. ql_dbg(ql_dbg_io + ql_dbg_disc, vha, 0x3069,
  2186. "%s hdl=%x ELS Timeout, %8phC portid=%06x\n",
  2187. sp->name, sp->handle, fcport->port_name, fcport->d_id.b24);
  2188. /* Abort the exchange */
  2189. spin_lock_irqsave(&ha->hardware_lock, flags);
  2190. res = ha->isp_ops->abort_command(sp);
  2191. ql_dbg(ql_dbg_io, vha, 0x3070,
  2192. "mbx abort_command %s\n",
  2193. (res == QLA_SUCCESS) ? "successful" : "failed");
  2194. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  2195. sp->done(sp, QLA_FUNCTION_TIMEOUT);
  2196. }
  2197. static void
  2198. qla2x00_els_dcmd2_sp_done(void *ptr, int res)
  2199. {
  2200. srb_t *sp = ptr;
  2201. fc_port_t *fcport = sp->fcport;
  2202. struct srb_iocb *lio = &sp->u.iocb_cmd;
  2203. struct scsi_qla_host *vha = sp->vha;
  2204. struct event_arg ea;
  2205. struct qla_work_evt *e;
  2206. ql_dbg(ql_dbg_disc, vha, 0x3072,
  2207. "%s ELS done rc %d hdl=%x, portid=%06x %8phC\n",
  2208. sp->name, res, sp->handle, fcport->d_id.b24, fcport->port_name);
  2209. fcport->flags &= ~(FCF_ASYNC_SENT|FCF_ASYNC_ACTIVE);
  2210. del_timer(&sp->u.iocb_cmd.timer);
  2211. if (sp->flags & SRB_WAKEUP_ON_COMP)
  2212. complete(&lio->u.els_plogi.comp);
  2213. else {
  2214. if (res) {
  2215. set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
  2216. } else {
  2217. memset(&ea, 0, sizeof(ea));
  2218. ea.fcport = fcport;
  2219. ea.rc = res;
  2220. ea.event = FCME_ELS_PLOGI_DONE;
  2221. qla2x00_fcport_event_handler(vha, &ea);
  2222. }
  2223. e = qla2x00_alloc_work(vha, QLA_EVT_UNMAP);
  2224. if (!e) {
  2225. struct srb_iocb *elsio = &sp->u.iocb_cmd;
  2226. if (elsio->u.els_plogi.els_plogi_pyld)
  2227. dma_free_coherent(&sp->vha->hw->pdev->dev,
  2228. elsio->u.els_plogi.tx_size,
  2229. elsio->u.els_plogi.els_plogi_pyld,
  2230. elsio->u.els_plogi.els_plogi_pyld_dma);
  2231. if (elsio->u.els_plogi.els_resp_pyld)
  2232. dma_free_coherent(&sp->vha->hw->pdev->dev,
  2233. elsio->u.els_plogi.rx_size,
  2234. elsio->u.els_plogi.els_resp_pyld,
  2235. elsio->u.els_plogi.els_resp_pyld_dma);
  2236. sp->free(sp);
  2237. return;
  2238. }
  2239. e->u.iosb.sp = sp;
  2240. qla2x00_post_work(vha, e);
  2241. }
  2242. }
  2243. int
  2244. qla24xx_els_dcmd2_iocb(scsi_qla_host_t *vha, int els_opcode,
  2245. fc_port_t *fcport, bool wait)
  2246. {
  2247. srb_t *sp;
  2248. struct srb_iocb *elsio = NULL;
  2249. struct qla_hw_data *ha = vha->hw;
  2250. int rval = QLA_SUCCESS;
  2251. void *ptr, *resp_ptr;
  2252. dma_addr_t ptr_dma;
  2253. /* Alloc SRB structure */
  2254. sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
  2255. if (!sp) {
  2256. ql_log(ql_log_info, vha, 0x70e6,
  2257. "SRB allocation failed\n");
  2258. return -ENOMEM;
  2259. }
  2260. elsio = &sp->u.iocb_cmd;
  2261. ql_dbg(ql_dbg_io, vha, 0x3073,
  2262. "Enter: PLOGI portid=%06x\n", fcport->d_id.b24);
  2263. fcport->flags |= FCF_ASYNC_SENT;
  2264. sp->type = SRB_ELS_DCMD;
  2265. sp->name = "ELS_DCMD";
  2266. sp->fcport = fcport;
  2267. elsio->timeout = qla2x00_els_dcmd2_iocb_timeout;
  2268. init_completion(&elsio->u.els_plogi.comp);
  2269. if (wait)
  2270. sp->flags = SRB_WAKEUP_ON_COMP;
  2271. qla2x00_init_timer(sp, ELS_DCMD_TIMEOUT + 2);
  2272. sp->done = qla2x00_els_dcmd2_sp_done;
  2273. elsio->u.els_plogi.tx_size = elsio->u.els_plogi.rx_size = DMA_POOL_SIZE;
  2274. ptr = elsio->u.els_plogi.els_plogi_pyld =
  2275. dma_alloc_coherent(&ha->pdev->dev, DMA_POOL_SIZE,
  2276. &elsio->u.els_plogi.els_plogi_pyld_dma, GFP_KERNEL);
  2277. ptr_dma = elsio->u.els_plogi.els_plogi_pyld_dma;
  2278. if (!elsio->u.els_plogi.els_plogi_pyld) {
  2279. rval = QLA_FUNCTION_FAILED;
  2280. goto out;
  2281. }
  2282. resp_ptr = elsio->u.els_plogi.els_resp_pyld =
  2283. dma_alloc_coherent(&ha->pdev->dev, DMA_POOL_SIZE,
  2284. &elsio->u.els_plogi.els_resp_pyld_dma, GFP_KERNEL);
  2285. if (!elsio->u.els_plogi.els_resp_pyld) {
  2286. rval = QLA_FUNCTION_FAILED;
  2287. goto out;
  2288. }
  2289. ql_dbg(ql_dbg_io, vha, 0x3073, "PLOGI %p %p\n", ptr, resp_ptr);
  2290. memset(ptr, 0, sizeof(struct els_plogi_payload));
  2291. memset(resp_ptr, 0, sizeof(struct els_plogi_payload));
  2292. memcpy(elsio->u.els_plogi.els_plogi_pyld->data,
  2293. &ha->plogi_els_payld.data,
  2294. sizeof(elsio->u.els_plogi.els_plogi_pyld->data));
  2295. elsio->u.els_plogi.els_cmd = els_opcode;
  2296. elsio->u.els_plogi.els_plogi_pyld->opcode = els_opcode;
  2297. ql_dbg(ql_dbg_disc + ql_dbg_buffer, vha, 0x3073, "PLOGI buffer:\n");
  2298. ql_dump_buffer(ql_dbg_disc + ql_dbg_buffer, vha, 0x0109,
  2299. (uint8_t *)elsio->u.els_plogi.els_plogi_pyld,
  2300. sizeof(*elsio->u.els_plogi.els_plogi_pyld));
  2301. rval = qla2x00_start_sp(sp);
  2302. if (rval != QLA_SUCCESS) {
  2303. rval = QLA_FUNCTION_FAILED;
  2304. } else {
  2305. ql_dbg(ql_dbg_disc, vha, 0x3074,
  2306. "%s PLOGI sent, hdl=%x, loopid=%x, to port_id %06x from port_id %06x\n",
  2307. sp->name, sp->handle, fcport->loop_id,
  2308. fcport->d_id.b24, vha->d_id.b24);
  2309. }
  2310. if (wait) {
  2311. wait_for_completion(&elsio->u.els_plogi.comp);
  2312. if (elsio->u.els_plogi.comp_status != CS_COMPLETE)
  2313. rval = QLA_FUNCTION_FAILED;
  2314. } else {
  2315. goto done;
  2316. }
  2317. out:
  2318. fcport->flags &= ~(FCF_ASYNC_SENT);
  2319. if (elsio->u.els_plogi.els_plogi_pyld)
  2320. dma_free_coherent(&sp->vha->hw->pdev->dev,
  2321. elsio->u.els_plogi.tx_size,
  2322. elsio->u.els_plogi.els_plogi_pyld,
  2323. elsio->u.els_plogi.els_plogi_pyld_dma);
  2324. if (elsio->u.els_plogi.els_resp_pyld)
  2325. dma_free_coherent(&sp->vha->hw->pdev->dev,
  2326. elsio->u.els_plogi.rx_size,
  2327. elsio->u.els_plogi.els_resp_pyld,
  2328. elsio->u.els_plogi.els_resp_pyld_dma);
  2329. sp->free(sp);
  2330. done:
  2331. return rval;
  2332. }
  2333. static void
  2334. qla24xx_els_iocb(srb_t *sp, struct els_entry_24xx *els_iocb)
  2335. {
  2336. struct bsg_job *bsg_job = sp->u.bsg_job;
  2337. struct fc_bsg_request *bsg_request = bsg_job->request;
  2338. els_iocb->entry_type = ELS_IOCB_TYPE;
  2339. els_iocb->entry_count = 1;
  2340. els_iocb->sys_define = 0;
  2341. els_iocb->entry_status = 0;
  2342. els_iocb->handle = sp->handle;
  2343. els_iocb->nport_handle = cpu_to_le16(sp->fcport->loop_id);
  2344. els_iocb->tx_dsd_count = cpu_to_le16(bsg_job->request_payload.sg_cnt);
  2345. els_iocb->vp_index = sp->vha->vp_idx;
  2346. els_iocb->sof_type = EST_SOFI3;
  2347. els_iocb->rx_dsd_count = cpu_to_le16(bsg_job->reply_payload.sg_cnt);
  2348. els_iocb->opcode =
  2349. sp->type == SRB_ELS_CMD_RPT ?
  2350. bsg_request->rqst_data.r_els.els_code :
  2351. bsg_request->rqst_data.h_els.command_code;
  2352. els_iocb->port_id[0] = sp->fcport->d_id.b.al_pa;
  2353. els_iocb->port_id[1] = sp->fcport->d_id.b.area;
  2354. els_iocb->port_id[2] = sp->fcport->d_id.b.domain;
  2355. els_iocb->control_flags = 0;
  2356. els_iocb->rx_byte_count =
  2357. cpu_to_le32(bsg_job->reply_payload.payload_len);
  2358. els_iocb->tx_byte_count =
  2359. cpu_to_le32(bsg_job->request_payload.payload_len);
  2360. els_iocb->tx_address[0] = cpu_to_le32(LSD(sg_dma_address
  2361. (bsg_job->request_payload.sg_list)));
  2362. els_iocb->tx_address[1] = cpu_to_le32(MSD(sg_dma_address
  2363. (bsg_job->request_payload.sg_list)));
  2364. els_iocb->tx_len = cpu_to_le32(sg_dma_len
  2365. (bsg_job->request_payload.sg_list));
  2366. els_iocb->rx_address[0] = cpu_to_le32(LSD(sg_dma_address
  2367. (bsg_job->reply_payload.sg_list)));
  2368. els_iocb->rx_address[1] = cpu_to_le32(MSD(sg_dma_address
  2369. (bsg_job->reply_payload.sg_list)));
  2370. els_iocb->rx_len = cpu_to_le32(sg_dma_len
  2371. (bsg_job->reply_payload.sg_list));
  2372. sp->vha->qla_stats.control_requests++;
  2373. }
  2374. static void
  2375. qla2x00_ct_iocb(srb_t *sp, ms_iocb_entry_t *ct_iocb)
  2376. {
  2377. uint16_t avail_dsds;
  2378. uint32_t *cur_dsd;
  2379. struct scatterlist *sg;
  2380. int index;
  2381. uint16_t tot_dsds;
  2382. scsi_qla_host_t *vha = sp->vha;
  2383. struct qla_hw_data *ha = vha->hw;
  2384. struct bsg_job *bsg_job = sp->u.bsg_job;
  2385. int loop_iterartion = 0;
  2386. int entry_count = 1;
  2387. memset(ct_iocb, 0, sizeof(ms_iocb_entry_t));
  2388. ct_iocb->entry_type = CT_IOCB_TYPE;
  2389. ct_iocb->entry_status = 0;
  2390. ct_iocb->handle1 = sp->handle;
  2391. SET_TARGET_ID(ha, ct_iocb->loop_id, sp->fcport->loop_id);
  2392. ct_iocb->status = cpu_to_le16(0);
  2393. ct_iocb->control_flags = cpu_to_le16(0);
  2394. ct_iocb->timeout = 0;
  2395. ct_iocb->cmd_dsd_count =
  2396. cpu_to_le16(bsg_job->request_payload.sg_cnt);
  2397. ct_iocb->total_dsd_count =
  2398. cpu_to_le16(bsg_job->request_payload.sg_cnt + 1);
  2399. ct_iocb->req_bytecount =
  2400. cpu_to_le32(bsg_job->request_payload.payload_len);
  2401. ct_iocb->rsp_bytecount =
  2402. cpu_to_le32(bsg_job->reply_payload.payload_len);
  2403. ct_iocb->dseg_req_address[0] = cpu_to_le32(LSD(sg_dma_address
  2404. (bsg_job->request_payload.sg_list)));
  2405. ct_iocb->dseg_req_address[1] = cpu_to_le32(MSD(sg_dma_address
  2406. (bsg_job->request_payload.sg_list)));
  2407. ct_iocb->dseg_req_length = ct_iocb->req_bytecount;
  2408. ct_iocb->dseg_rsp_address[0] = cpu_to_le32(LSD(sg_dma_address
  2409. (bsg_job->reply_payload.sg_list)));
  2410. ct_iocb->dseg_rsp_address[1] = cpu_to_le32(MSD(sg_dma_address
  2411. (bsg_job->reply_payload.sg_list)));
  2412. ct_iocb->dseg_rsp_length = ct_iocb->rsp_bytecount;
  2413. avail_dsds = 1;
  2414. cur_dsd = (uint32_t *)ct_iocb->dseg_rsp_address;
  2415. index = 0;
  2416. tot_dsds = bsg_job->reply_payload.sg_cnt;
  2417. for_each_sg(bsg_job->reply_payload.sg_list, sg, tot_dsds, index) {
  2418. dma_addr_t sle_dma;
  2419. cont_a64_entry_t *cont_pkt;
  2420. /* Allocate additional continuation packets? */
  2421. if (avail_dsds == 0) {
  2422. /*
  2423. * Five DSDs are available in the Cont.
  2424. * Type 1 IOCB.
  2425. */
  2426. cont_pkt = qla2x00_prep_cont_type1_iocb(vha,
  2427. vha->hw->req_q_map[0]);
  2428. cur_dsd = (uint32_t *) cont_pkt->dseg_0_address;
  2429. avail_dsds = 5;
  2430. entry_count++;
  2431. }
  2432. sle_dma = sg_dma_address(sg);
  2433. *cur_dsd++ = cpu_to_le32(LSD(sle_dma));
  2434. *cur_dsd++ = cpu_to_le32(MSD(sle_dma));
  2435. *cur_dsd++ = cpu_to_le32(sg_dma_len(sg));
  2436. loop_iterartion++;
  2437. avail_dsds--;
  2438. }
  2439. ct_iocb->entry_count = entry_count;
  2440. sp->vha->qla_stats.control_requests++;
  2441. }
  2442. static void
  2443. qla24xx_ct_iocb(srb_t *sp, struct ct_entry_24xx *ct_iocb)
  2444. {
  2445. uint16_t avail_dsds;
  2446. uint32_t *cur_dsd;
  2447. struct scatterlist *sg;
  2448. int index;
  2449. uint16_t cmd_dsds, rsp_dsds;
  2450. scsi_qla_host_t *vha = sp->vha;
  2451. struct qla_hw_data *ha = vha->hw;
  2452. struct bsg_job *bsg_job = sp->u.bsg_job;
  2453. int entry_count = 1;
  2454. cont_a64_entry_t *cont_pkt = NULL;
  2455. ct_iocb->entry_type = CT_IOCB_TYPE;
  2456. ct_iocb->entry_status = 0;
  2457. ct_iocb->sys_define = 0;
  2458. ct_iocb->handle = sp->handle;
  2459. ct_iocb->nport_handle = cpu_to_le16(sp->fcport->loop_id);
  2460. ct_iocb->vp_index = sp->vha->vp_idx;
  2461. ct_iocb->comp_status = cpu_to_le16(0);
  2462. cmd_dsds = bsg_job->request_payload.sg_cnt;
  2463. rsp_dsds = bsg_job->reply_payload.sg_cnt;
  2464. ct_iocb->cmd_dsd_count = cpu_to_le16(cmd_dsds);
  2465. ct_iocb->timeout = 0;
  2466. ct_iocb->rsp_dsd_count = cpu_to_le16(rsp_dsds);
  2467. ct_iocb->cmd_byte_count =
  2468. cpu_to_le32(bsg_job->request_payload.payload_len);
  2469. avail_dsds = 2;
  2470. cur_dsd = (uint32_t *)ct_iocb->dseg_0_address;
  2471. index = 0;
  2472. for_each_sg(bsg_job->request_payload.sg_list, sg, cmd_dsds, index) {
  2473. dma_addr_t sle_dma;
  2474. /* Allocate additional continuation packets? */
  2475. if (avail_dsds == 0) {
  2476. /*
  2477. * Five DSDs are available in the Cont.
  2478. * Type 1 IOCB.
  2479. */
  2480. cont_pkt = qla2x00_prep_cont_type1_iocb(
  2481. vha, ha->req_q_map[0]);
  2482. cur_dsd = (uint32_t *) cont_pkt->dseg_0_address;
  2483. avail_dsds = 5;
  2484. entry_count++;
  2485. }
  2486. sle_dma = sg_dma_address(sg);
  2487. *cur_dsd++ = cpu_to_le32(LSD(sle_dma));
  2488. *cur_dsd++ = cpu_to_le32(MSD(sle_dma));
  2489. *cur_dsd++ = cpu_to_le32(sg_dma_len(sg));
  2490. avail_dsds--;
  2491. }
  2492. index = 0;
  2493. for_each_sg(bsg_job->reply_payload.sg_list, sg, rsp_dsds, index) {
  2494. dma_addr_t sle_dma;
  2495. /* Allocate additional continuation packets? */
  2496. if (avail_dsds == 0) {
  2497. /*
  2498. * Five DSDs are available in the Cont.
  2499. * Type 1 IOCB.
  2500. */
  2501. cont_pkt = qla2x00_prep_cont_type1_iocb(vha,
  2502. ha->req_q_map[0]);
  2503. cur_dsd = (uint32_t *) cont_pkt->dseg_0_address;
  2504. avail_dsds = 5;
  2505. entry_count++;
  2506. }
  2507. sle_dma = sg_dma_address(sg);
  2508. *cur_dsd++ = cpu_to_le32(LSD(sle_dma));
  2509. *cur_dsd++ = cpu_to_le32(MSD(sle_dma));
  2510. *cur_dsd++ = cpu_to_le32(sg_dma_len(sg));
  2511. avail_dsds--;
  2512. }
  2513. ct_iocb->entry_count = entry_count;
  2514. }
  2515. /*
  2516. * qla82xx_start_scsi() - Send a SCSI command to the ISP
  2517. * @sp: command to send to the ISP
  2518. *
  2519. * Returns non-zero if a failure occurred, else zero.
  2520. */
  2521. int
  2522. qla82xx_start_scsi(srb_t *sp)
  2523. {
  2524. int nseg;
  2525. unsigned long flags;
  2526. struct scsi_cmnd *cmd;
  2527. uint32_t *clr_ptr;
  2528. uint32_t index;
  2529. uint32_t handle;
  2530. uint16_t cnt;
  2531. uint16_t req_cnt;
  2532. uint16_t tot_dsds;
  2533. struct device_reg_82xx __iomem *reg;
  2534. uint32_t dbval;
  2535. uint32_t *fcp_dl;
  2536. uint8_t additional_cdb_len;
  2537. struct ct6_dsd *ctx;
  2538. struct scsi_qla_host *vha = sp->vha;
  2539. struct qla_hw_data *ha = vha->hw;
  2540. struct req_que *req = NULL;
  2541. struct rsp_que *rsp = NULL;
  2542. /* Setup device pointers. */
  2543. reg = &ha->iobase->isp82;
  2544. cmd = GET_CMD_SP(sp);
  2545. req = vha->req;
  2546. rsp = ha->rsp_q_map[0];
  2547. /* So we know we haven't pci_map'ed anything yet */
  2548. tot_dsds = 0;
  2549. dbval = 0x04 | (ha->portnum << 5);
  2550. /* Send marker if required */
  2551. if (vha->marker_needed != 0) {
  2552. if (qla2x00_marker(vha, req,
  2553. rsp, 0, 0, MK_SYNC_ALL) != QLA_SUCCESS) {
  2554. ql_log(ql_log_warn, vha, 0x300c,
  2555. "qla2x00_marker failed for cmd=%p.\n", cmd);
  2556. return QLA_FUNCTION_FAILED;
  2557. }
  2558. vha->marker_needed = 0;
  2559. }
  2560. /* Acquire ring specific lock */
  2561. spin_lock_irqsave(&ha->hardware_lock, flags);
  2562. /* Check for room in outstanding command list. */
  2563. handle = req->current_outstanding_cmd;
  2564. for (index = 1; index < req->num_outstanding_cmds; index++) {
  2565. handle++;
  2566. if (handle == req->num_outstanding_cmds)
  2567. handle = 1;
  2568. if (!req->outstanding_cmds[handle])
  2569. break;
  2570. }
  2571. if (index == req->num_outstanding_cmds)
  2572. goto queuing_error;
  2573. /* Map the sg table so we have an accurate count of sg entries needed */
  2574. if (scsi_sg_count(cmd)) {
  2575. nseg = dma_map_sg(&ha->pdev->dev, scsi_sglist(cmd),
  2576. scsi_sg_count(cmd), cmd->sc_data_direction);
  2577. if (unlikely(!nseg))
  2578. goto queuing_error;
  2579. } else
  2580. nseg = 0;
  2581. tot_dsds = nseg;
  2582. if (tot_dsds > ql2xshiftctondsd) {
  2583. struct cmd_type_6 *cmd_pkt;
  2584. uint16_t more_dsd_lists = 0;
  2585. struct dsd_dma *dsd_ptr;
  2586. uint16_t i;
  2587. more_dsd_lists = qla24xx_calc_dsd_lists(tot_dsds);
  2588. if ((more_dsd_lists + ha->gbl_dsd_inuse) >= NUM_DSD_CHAIN) {
  2589. ql_dbg(ql_dbg_io, vha, 0x300d,
  2590. "Num of DSD list %d is than %d for cmd=%p.\n",
  2591. more_dsd_lists + ha->gbl_dsd_inuse, NUM_DSD_CHAIN,
  2592. cmd);
  2593. goto queuing_error;
  2594. }
  2595. if (more_dsd_lists <= ha->gbl_dsd_avail)
  2596. goto sufficient_dsds;
  2597. else
  2598. more_dsd_lists -= ha->gbl_dsd_avail;
  2599. for (i = 0; i < more_dsd_lists; i++) {
  2600. dsd_ptr = kzalloc(sizeof(struct dsd_dma), GFP_ATOMIC);
  2601. if (!dsd_ptr) {
  2602. ql_log(ql_log_fatal, vha, 0x300e,
  2603. "Failed to allocate memory for dsd_dma "
  2604. "for cmd=%p.\n", cmd);
  2605. goto queuing_error;
  2606. }
  2607. dsd_ptr->dsd_addr = dma_pool_alloc(ha->dl_dma_pool,
  2608. GFP_ATOMIC, &dsd_ptr->dsd_list_dma);
  2609. if (!dsd_ptr->dsd_addr) {
  2610. kfree(dsd_ptr);
  2611. ql_log(ql_log_fatal, vha, 0x300f,
  2612. "Failed to allocate memory for dsd_addr "
  2613. "for cmd=%p.\n", cmd);
  2614. goto queuing_error;
  2615. }
  2616. list_add_tail(&dsd_ptr->list, &ha->gbl_dsd_list);
  2617. ha->gbl_dsd_avail++;
  2618. }
  2619. sufficient_dsds:
  2620. req_cnt = 1;
  2621. if (req->cnt < (req_cnt + 2)) {
  2622. cnt = (uint16_t)RD_REG_DWORD_RELAXED(
  2623. &reg->req_q_out[0]);
  2624. if (req->ring_index < cnt)
  2625. req->cnt = cnt - req->ring_index;
  2626. else
  2627. req->cnt = req->length -
  2628. (req->ring_index - cnt);
  2629. if (req->cnt < (req_cnt + 2))
  2630. goto queuing_error;
  2631. }
  2632. ctx = sp->u.scmd.ctx =
  2633. mempool_alloc(ha->ctx_mempool, GFP_ATOMIC);
  2634. if (!ctx) {
  2635. ql_log(ql_log_fatal, vha, 0x3010,
  2636. "Failed to allocate ctx for cmd=%p.\n", cmd);
  2637. goto queuing_error;
  2638. }
  2639. memset(ctx, 0, sizeof(struct ct6_dsd));
  2640. ctx->fcp_cmnd = dma_pool_zalloc(ha->fcp_cmnd_dma_pool,
  2641. GFP_ATOMIC, &ctx->fcp_cmnd_dma);
  2642. if (!ctx->fcp_cmnd) {
  2643. ql_log(ql_log_fatal, vha, 0x3011,
  2644. "Failed to allocate fcp_cmnd for cmd=%p.\n", cmd);
  2645. goto queuing_error;
  2646. }
  2647. /* Initialize the DSD list and dma handle */
  2648. INIT_LIST_HEAD(&ctx->dsd_list);
  2649. ctx->dsd_use_cnt = 0;
  2650. if (cmd->cmd_len > 16) {
  2651. additional_cdb_len = cmd->cmd_len - 16;
  2652. if ((cmd->cmd_len % 4) != 0) {
  2653. /* SCSI command bigger than 16 bytes must be
  2654. * multiple of 4
  2655. */
  2656. ql_log(ql_log_warn, vha, 0x3012,
  2657. "scsi cmd len %d not multiple of 4 "
  2658. "for cmd=%p.\n", cmd->cmd_len, cmd);
  2659. goto queuing_error_fcp_cmnd;
  2660. }
  2661. ctx->fcp_cmnd_len = 12 + cmd->cmd_len + 4;
  2662. } else {
  2663. additional_cdb_len = 0;
  2664. ctx->fcp_cmnd_len = 12 + 16 + 4;
  2665. }
  2666. cmd_pkt = (struct cmd_type_6 *)req->ring_ptr;
  2667. cmd_pkt->handle = MAKE_HANDLE(req->id, handle);
  2668. /* Zero out remaining portion of packet. */
  2669. /* tagged queuing modifier -- default is TSK_SIMPLE (0). */
  2670. clr_ptr = (uint32_t *)cmd_pkt + 2;
  2671. memset(clr_ptr, 0, REQUEST_ENTRY_SIZE - 8);
  2672. cmd_pkt->dseg_count = cpu_to_le16(tot_dsds);
  2673. /* Set NPORT-ID and LUN number*/
  2674. cmd_pkt->nport_handle = cpu_to_le16(sp->fcport->loop_id);
  2675. cmd_pkt->port_id[0] = sp->fcport->d_id.b.al_pa;
  2676. cmd_pkt->port_id[1] = sp->fcport->d_id.b.area;
  2677. cmd_pkt->port_id[2] = sp->fcport->d_id.b.domain;
  2678. cmd_pkt->vp_index = sp->vha->vp_idx;
  2679. /* Build IOCB segments */
  2680. if (qla24xx_build_scsi_type_6_iocbs(sp, cmd_pkt, tot_dsds))
  2681. goto queuing_error_fcp_cmnd;
  2682. int_to_scsilun(cmd->device->lun, &cmd_pkt->lun);
  2683. host_to_fcp_swap((uint8_t *)&cmd_pkt->lun, sizeof(cmd_pkt->lun));
  2684. /* build FCP_CMND IU */
  2685. int_to_scsilun(cmd->device->lun, &ctx->fcp_cmnd->lun);
  2686. ctx->fcp_cmnd->additional_cdb_len = additional_cdb_len;
  2687. if (cmd->sc_data_direction == DMA_TO_DEVICE)
  2688. ctx->fcp_cmnd->additional_cdb_len |= 1;
  2689. else if (cmd->sc_data_direction == DMA_FROM_DEVICE)
  2690. ctx->fcp_cmnd->additional_cdb_len |= 2;
  2691. /* Populate the FCP_PRIO. */
  2692. if (ha->flags.fcp_prio_enabled)
  2693. ctx->fcp_cmnd->task_attribute |=
  2694. sp->fcport->fcp_prio << 3;
  2695. memcpy(ctx->fcp_cmnd->cdb, cmd->cmnd, cmd->cmd_len);
  2696. fcp_dl = (uint32_t *)(ctx->fcp_cmnd->cdb + 16 +
  2697. additional_cdb_len);
  2698. *fcp_dl = htonl((uint32_t)scsi_bufflen(cmd));
  2699. cmd_pkt->fcp_cmnd_dseg_len = cpu_to_le16(ctx->fcp_cmnd_len);
  2700. cmd_pkt->fcp_cmnd_dseg_address[0] =
  2701. cpu_to_le32(LSD(ctx->fcp_cmnd_dma));
  2702. cmd_pkt->fcp_cmnd_dseg_address[1] =
  2703. cpu_to_le32(MSD(ctx->fcp_cmnd_dma));
  2704. sp->flags |= SRB_FCP_CMND_DMA_VALID;
  2705. cmd_pkt->byte_count = cpu_to_le32((uint32_t)scsi_bufflen(cmd));
  2706. /* Set total data segment count. */
  2707. cmd_pkt->entry_count = (uint8_t)req_cnt;
  2708. /* Specify response queue number where
  2709. * completion should happen
  2710. */
  2711. cmd_pkt->entry_status = (uint8_t) rsp->id;
  2712. } else {
  2713. struct cmd_type_7 *cmd_pkt;
  2714. req_cnt = qla24xx_calc_iocbs(vha, tot_dsds);
  2715. if (req->cnt < (req_cnt + 2)) {
  2716. cnt = (uint16_t)RD_REG_DWORD_RELAXED(
  2717. &reg->req_q_out[0]);
  2718. if (req->ring_index < cnt)
  2719. req->cnt = cnt - req->ring_index;
  2720. else
  2721. req->cnt = req->length -
  2722. (req->ring_index - cnt);
  2723. }
  2724. if (req->cnt < (req_cnt + 2))
  2725. goto queuing_error;
  2726. cmd_pkt = (struct cmd_type_7 *)req->ring_ptr;
  2727. cmd_pkt->handle = MAKE_HANDLE(req->id, handle);
  2728. /* Zero out remaining portion of packet. */
  2729. /* tagged queuing modifier -- default is TSK_SIMPLE (0).*/
  2730. clr_ptr = (uint32_t *)cmd_pkt + 2;
  2731. memset(clr_ptr, 0, REQUEST_ENTRY_SIZE - 8);
  2732. cmd_pkt->dseg_count = cpu_to_le16(tot_dsds);
  2733. /* Set NPORT-ID and LUN number*/
  2734. cmd_pkt->nport_handle = cpu_to_le16(sp->fcport->loop_id);
  2735. cmd_pkt->port_id[0] = sp->fcport->d_id.b.al_pa;
  2736. cmd_pkt->port_id[1] = sp->fcport->d_id.b.area;
  2737. cmd_pkt->port_id[2] = sp->fcport->d_id.b.domain;
  2738. cmd_pkt->vp_index = sp->vha->vp_idx;
  2739. int_to_scsilun(cmd->device->lun, &cmd_pkt->lun);
  2740. host_to_fcp_swap((uint8_t *)&cmd_pkt->lun,
  2741. sizeof(cmd_pkt->lun));
  2742. /* Populate the FCP_PRIO. */
  2743. if (ha->flags.fcp_prio_enabled)
  2744. cmd_pkt->task |= sp->fcport->fcp_prio << 3;
  2745. /* Load SCSI command packet. */
  2746. memcpy(cmd_pkt->fcp_cdb, cmd->cmnd, cmd->cmd_len);
  2747. host_to_fcp_swap(cmd_pkt->fcp_cdb, sizeof(cmd_pkt->fcp_cdb));
  2748. cmd_pkt->byte_count = cpu_to_le32((uint32_t)scsi_bufflen(cmd));
  2749. /* Build IOCB segments */
  2750. qla24xx_build_scsi_iocbs(sp, cmd_pkt, tot_dsds, req);
  2751. /* Set total data segment count. */
  2752. cmd_pkt->entry_count = (uint8_t)req_cnt;
  2753. /* Specify response queue number where
  2754. * completion should happen.
  2755. */
  2756. cmd_pkt->entry_status = (uint8_t) rsp->id;
  2757. }
  2758. /* Build command packet. */
  2759. req->current_outstanding_cmd = handle;
  2760. req->outstanding_cmds[handle] = sp;
  2761. sp->handle = handle;
  2762. cmd->host_scribble = (unsigned char *)(unsigned long)handle;
  2763. req->cnt -= req_cnt;
  2764. wmb();
  2765. /* Adjust ring index. */
  2766. req->ring_index++;
  2767. if (req->ring_index == req->length) {
  2768. req->ring_index = 0;
  2769. req->ring_ptr = req->ring;
  2770. } else
  2771. req->ring_ptr++;
  2772. sp->flags |= SRB_DMA_VALID;
  2773. /* Set chip new ring index. */
  2774. /* write, read and verify logic */
  2775. dbval = dbval | (req->id << 8) | (req->ring_index << 16);
  2776. if (ql2xdbwr)
  2777. qla82xx_wr_32(ha, (uintptr_t __force)ha->nxdb_wr_ptr, dbval);
  2778. else {
  2779. WRT_REG_DWORD(ha->nxdb_wr_ptr, dbval);
  2780. wmb();
  2781. while (RD_REG_DWORD(ha->nxdb_rd_ptr) != dbval) {
  2782. WRT_REG_DWORD(ha->nxdb_wr_ptr, dbval);
  2783. wmb();
  2784. }
  2785. }
  2786. /* Manage unprocessed RIO/ZIO commands in response queue. */
  2787. if (vha->flags.process_response_queue &&
  2788. rsp->ring_ptr->signature != RESPONSE_PROCESSED)
  2789. qla24xx_process_response_queue(vha, rsp);
  2790. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  2791. return QLA_SUCCESS;
  2792. queuing_error_fcp_cmnd:
  2793. dma_pool_free(ha->fcp_cmnd_dma_pool, ctx->fcp_cmnd, ctx->fcp_cmnd_dma);
  2794. queuing_error:
  2795. if (tot_dsds)
  2796. scsi_dma_unmap(cmd);
  2797. if (sp->u.scmd.ctx) {
  2798. mempool_free(sp->u.scmd.ctx, ha->ctx_mempool);
  2799. sp->u.scmd.ctx = NULL;
  2800. }
  2801. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  2802. return QLA_FUNCTION_FAILED;
  2803. }
  2804. static void
  2805. qla24xx_abort_iocb(srb_t *sp, struct abort_entry_24xx *abt_iocb)
  2806. {
  2807. struct srb_iocb *aio = &sp->u.iocb_cmd;
  2808. scsi_qla_host_t *vha = sp->vha;
  2809. struct req_que *req = sp->qpair->req;
  2810. memset(abt_iocb, 0, sizeof(struct abort_entry_24xx));
  2811. abt_iocb->entry_type = ABORT_IOCB_TYPE;
  2812. abt_iocb->entry_count = 1;
  2813. abt_iocb->handle = cpu_to_le32(MAKE_HANDLE(req->id, sp->handle));
  2814. if (sp->fcport) {
  2815. abt_iocb->nport_handle = cpu_to_le16(sp->fcport->loop_id);
  2816. abt_iocb->port_id[0] = sp->fcport->d_id.b.al_pa;
  2817. abt_iocb->port_id[1] = sp->fcport->d_id.b.area;
  2818. abt_iocb->port_id[2] = sp->fcport->d_id.b.domain;
  2819. }
  2820. abt_iocb->handle_to_abort =
  2821. cpu_to_le32(MAKE_HANDLE(aio->u.abt.req_que_no,
  2822. aio->u.abt.cmd_hndl));
  2823. abt_iocb->vp_index = vha->vp_idx;
  2824. abt_iocb->req_que_no = cpu_to_le16(aio->u.abt.req_que_no);
  2825. /* Send the command to the firmware */
  2826. wmb();
  2827. }
  2828. static void
  2829. qla2x00_mb_iocb(srb_t *sp, struct mbx_24xx_entry *mbx)
  2830. {
  2831. int i, sz;
  2832. mbx->entry_type = MBX_IOCB_TYPE;
  2833. mbx->handle = sp->handle;
  2834. sz = min(ARRAY_SIZE(mbx->mb), ARRAY_SIZE(sp->u.iocb_cmd.u.mbx.out_mb));
  2835. for (i = 0; i < sz; i++)
  2836. mbx->mb[i] = cpu_to_le16(sp->u.iocb_cmd.u.mbx.out_mb[i]);
  2837. }
  2838. static void
  2839. qla2x00_ctpthru_cmd_iocb(srb_t *sp, struct ct_entry_24xx *ct_pkt)
  2840. {
  2841. sp->u.iocb_cmd.u.ctarg.iocb = ct_pkt;
  2842. qla24xx_prep_ms_iocb(sp->vha, &sp->u.iocb_cmd.u.ctarg);
  2843. ct_pkt->handle = sp->handle;
  2844. }
  2845. static void qla2x00_send_notify_ack_iocb(srb_t *sp,
  2846. struct nack_to_isp *nack)
  2847. {
  2848. struct imm_ntfy_from_isp *ntfy = sp->u.iocb_cmd.u.nack.ntfy;
  2849. nack->entry_type = NOTIFY_ACK_TYPE;
  2850. nack->entry_count = 1;
  2851. nack->ox_id = ntfy->ox_id;
  2852. nack->u.isp24.handle = sp->handle;
  2853. nack->u.isp24.nport_handle = ntfy->u.isp24.nport_handle;
  2854. if (le16_to_cpu(ntfy->u.isp24.status) == IMM_NTFY_ELS) {
  2855. nack->u.isp24.flags = ntfy->u.isp24.flags &
  2856. cpu_to_le32(NOTIFY24XX_FLAGS_PUREX_IOCB);
  2857. }
  2858. nack->u.isp24.srr_rx_id = ntfy->u.isp24.srr_rx_id;
  2859. nack->u.isp24.status = ntfy->u.isp24.status;
  2860. nack->u.isp24.status_subcode = ntfy->u.isp24.status_subcode;
  2861. nack->u.isp24.fw_handle = ntfy->u.isp24.fw_handle;
  2862. nack->u.isp24.exchange_address = ntfy->u.isp24.exchange_address;
  2863. nack->u.isp24.srr_rel_offs = ntfy->u.isp24.srr_rel_offs;
  2864. nack->u.isp24.srr_ui = ntfy->u.isp24.srr_ui;
  2865. nack->u.isp24.srr_flags = 0;
  2866. nack->u.isp24.srr_reject_code = 0;
  2867. nack->u.isp24.srr_reject_code_expl = 0;
  2868. nack->u.isp24.vp_index = ntfy->u.isp24.vp_index;
  2869. }
  2870. /*
  2871. * Build NVME LS request
  2872. */
  2873. static int
  2874. qla_nvme_ls(srb_t *sp, struct pt_ls4_request *cmd_pkt)
  2875. {
  2876. struct srb_iocb *nvme;
  2877. int rval = QLA_SUCCESS;
  2878. nvme = &sp->u.iocb_cmd;
  2879. cmd_pkt->entry_type = PT_LS4_REQUEST;
  2880. cmd_pkt->entry_count = 1;
  2881. cmd_pkt->control_flags = CF_LS4_ORIGINATOR << CF_LS4_SHIFT;
  2882. cmd_pkt->timeout = cpu_to_le16(nvme->u.nvme.timeout_sec);
  2883. cmd_pkt->nport_handle = cpu_to_le16(sp->fcport->loop_id);
  2884. cmd_pkt->vp_index = sp->fcport->vha->vp_idx;
  2885. cmd_pkt->tx_dseg_count = 1;
  2886. cmd_pkt->tx_byte_count = nvme->u.nvme.cmd_len;
  2887. cmd_pkt->dseg0_len = nvme->u.nvme.cmd_len;
  2888. cmd_pkt->dseg0_address[0] = cpu_to_le32(LSD(nvme->u.nvme.cmd_dma));
  2889. cmd_pkt->dseg0_address[1] = cpu_to_le32(MSD(nvme->u.nvme.cmd_dma));
  2890. cmd_pkt->rx_dseg_count = 1;
  2891. cmd_pkt->rx_byte_count = nvme->u.nvme.rsp_len;
  2892. cmd_pkt->dseg1_len = nvme->u.nvme.rsp_len;
  2893. cmd_pkt->dseg1_address[0] = cpu_to_le32(LSD(nvme->u.nvme.rsp_dma));
  2894. cmd_pkt->dseg1_address[1] = cpu_to_le32(MSD(nvme->u.nvme.rsp_dma));
  2895. return rval;
  2896. }
  2897. static void
  2898. qla25xx_ctrlvp_iocb(srb_t *sp, struct vp_ctrl_entry_24xx *vce)
  2899. {
  2900. int map, pos;
  2901. vce->entry_type = VP_CTRL_IOCB_TYPE;
  2902. vce->handle = sp->handle;
  2903. vce->entry_count = 1;
  2904. vce->command = cpu_to_le16(sp->u.iocb_cmd.u.ctrlvp.cmd);
  2905. vce->vp_count = cpu_to_le16(1);
  2906. /*
  2907. * index map in firmware starts with 1; decrement index
  2908. * this is ok as we never use index 0
  2909. */
  2910. map = (sp->u.iocb_cmd.u.ctrlvp.vp_index - 1) / 8;
  2911. pos = (sp->u.iocb_cmd.u.ctrlvp.vp_index - 1) & 7;
  2912. vce->vp_idx_map[map] |= 1 << pos;
  2913. }
  2914. static void
  2915. qla24xx_prlo_iocb(srb_t *sp, struct logio_entry_24xx *logio)
  2916. {
  2917. logio->entry_type = LOGINOUT_PORT_IOCB_TYPE;
  2918. logio->control_flags =
  2919. cpu_to_le16(LCF_COMMAND_PRLO|LCF_IMPL_PRLO);
  2920. logio->nport_handle = cpu_to_le16(sp->fcport->loop_id);
  2921. logio->port_id[0] = sp->fcport->d_id.b.al_pa;
  2922. logio->port_id[1] = sp->fcport->d_id.b.area;
  2923. logio->port_id[2] = sp->fcport->d_id.b.domain;
  2924. logio->vp_index = sp->fcport->vha->vp_idx;
  2925. }
  2926. int
  2927. qla2x00_start_sp(srb_t *sp)
  2928. {
  2929. int rval;
  2930. scsi_qla_host_t *vha = sp->vha;
  2931. struct qla_hw_data *ha = vha->hw;
  2932. void *pkt;
  2933. unsigned long flags;
  2934. rval = QLA_FUNCTION_FAILED;
  2935. spin_lock_irqsave(&ha->hardware_lock, flags);
  2936. pkt = qla2x00_alloc_iocbs(vha, sp);
  2937. if (!pkt) {
  2938. ql_log(ql_log_warn, vha, 0x700c,
  2939. "qla2x00_alloc_iocbs failed.\n");
  2940. goto done;
  2941. }
  2942. rval = QLA_SUCCESS;
  2943. switch (sp->type) {
  2944. case SRB_LOGIN_CMD:
  2945. IS_FWI2_CAPABLE(ha) ?
  2946. qla24xx_login_iocb(sp, pkt) :
  2947. qla2x00_login_iocb(sp, pkt);
  2948. break;
  2949. case SRB_PRLI_CMD:
  2950. qla24xx_prli_iocb(sp, pkt);
  2951. break;
  2952. case SRB_LOGOUT_CMD:
  2953. IS_FWI2_CAPABLE(ha) ?
  2954. qla24xx_logout_iocb(sp, pkt) :
  2955. qla2x00_logout_iocb(sp, pkt);
  2956. break;
  2957. case SRB_ELS_CMD_RPT:
  2958. case SRB_ELS_CMD_HST:
  2959. qla24xx_els_iocb(sp, pkt);
  2960. break;
  2961. case SRB_CT_CMD:
  2962. IS_FWI2_CAPABLE(ha) ?
  2963. qla24xx_ct_iocb(sp, pkt) :
  2964. qla2x00_ct_iocb(sp, pkt);
  2965. break;
  2966. case SRB_ADISC_CMD:
  2967. IS_FWI2_CAPABLE(ha) ?
  2968. qla24xx_adisc_iocb(sp, pkt) :
  2969. qla2x00_adisc_iocb(sp, pkt);
  2970. break;
  2971. case SRB_TM_CMD:
  2972. IS_QLAFX00(ha) ?
  2973. qlafx00_tm_iocb(sp, pkt) :
  2974. qla24xx_tm_iocb(sp, pkt);
  2975. break;
  2976. case SRB_FXIOCB_DCMD:
  2977. case SRB_FXIOCB_BCMD:
  2978. qlafx00_fxdisc_iocb(sp, pkt);
  2979. break;
  2980. case SRB_NVME_LS:
  2981. qla_nvme_ls(sp, pkt);
  2982. break;
  2983. case SRB_ABT_CMD:
  2984. IS_QLAFX00(ha) ?
  2985. qlafx00_abort_iocb(sp, pkt) :
  2986. qla24xx_abort_iocb(sp, pkt);
  2987. break;
  2988. case SRB_ELS_DCMD:
  2989. qla24xx_els_logo_iocb(sp, pkt);
  2990. break;
  2991. case SRB_CT_PTHRU_CMD:
  2992. qla2x00_ctpthru_cmd_iocb(sp, pkt);
  2993. break;
  2994. case SRB_MB_IOCB:
  2995. qla2x00_mb_iocb(sp, pkt);
  2996. break;
  2997. case SRB_NACK_PLOGI:
  2998. case SRB_NACK_PRLI:
  2999. case SRB_NACK_LOGO:
  3000. qla2x00_send_notify_ack_iocb(sp, pkt);
  3001. break;
  3002. case SRB_CTRL_VP:
  3003. qla25xx_ctrlvp_iocb(sp, pkt);
  3004. break;
  3005. case SRB_PRLO_CMD:
  3006. qla24xx_prlo_iocb(sp, pkt);
  3007. break;
  3008. default:
  3009. break;
  3010. }
  3011. wmb();
  3012. qla2x00_start_iocbs(vha, ha->req_q_map[0]);
  3013. done:
  3014. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  3015. return rval;
  3016. }
  3017. static void
  3018. qla25xx_build_bidir_iocb(srb_t *sp, struct scsi_qla_host *vha,
  3019. struct cmd_bidir *cmd_pkt, uint32_t tot_dsds)
  3020. {
  3021. uint16_t avail_dsds;
  3022. uint32_t *cur_dsd;
  3023. uint32_t req_data_len = 0;
  3024. uint32_t rsp_data_len = 0;
  3025. struct scatterlist *sg;
  3026. int index;
  3027. int entry_count = 1;
  3028. struct bsg_job *bsg_job = sp->u.bsg_job;
  3029. /*Update entry type to indicate bidir command */
  3030. *((uint32_t *)(&cmd_pkt->entry_type)) =
  3031. cpu_to_le32(COMMAND_BIDIRECTIONAL);
  3032. /* Set the transfer direction, in this set both flags
  3033. * Also set the BD_WRAP_BACK flag, firmware will take care
  3034. * assigning DID=SID for outgoing pkts.
  3035. */
  3036. cmd_pkt->wr_dseg_count = cpu_to_le16(bsg_job->request_payload.sg_cnt);
  3037. cmd_pkt->rd_dseg_count = cpu_to_le16(bsg_job->reply_payload.sg_cnt);
  3038. cmd_pkt->control_flags = cpu_to_le16(BD_WRITE_DATA | BD_READ_DATA |
  3039. BD_WRAP_BACK);
  3040. req_data_len = rsp_data_len = bsg_job->request_payload.payload_len;
  3041. cmd_pkt->wr_byte_count = cpu_to_le32(req_data_len);
  3042. cmd_pkt->rd_byte_count = cpu_to_le32(rsp_data_len);
  3043. cmd_pkt->timeout = cpu_to_le16(qla2x00_get_async_timeout(vha) + 2);
  3044. vha->bidi_stats.transfer_bytes += req_data_len;
  3045. vha->bidi_stats.io_count++;
  3046. vha->qla_stats.output_bytes += req_data_len;
  3047. vha->qla_stats.output_requests++;
  3048. /* Only one dsd is available for bidirectional IOCB, remaining dsds
  3049. * are bundled in continuation iocb
  3050. */
  3051. avail_dsds = 1;
  3052. cur_dsd = (uint32_t *)&cmd_pkt->fcp_data_dseg_address;
  3053. index = 0;
  3054. for_each_sg(bsg_job->request_payload.sg_list, sg,
  3055. bsg_job->request_payload.sg_cnt, index) {
  3056. dma_addr_t sle_dma;
  3057. cont_a64_entry_t *cont_pkt;
  3058. /* Allocate additional continuation packets */
  3059. if (avail_dsds == 0) {
  3060. /* Continuation type 1 IOCB can accomodate
  3061. * 5 DSDS
  3062. */
  3063. cont_pkt = qla2x00_prep_cont_type1_iocb(vha, vha->req);
  3064. cur_dsd = (uint32_t *) cont_pkt->dseg_0_address;
  3065. avail_dsds = 5;
  3066. entry_count++;
  3067. }
  3068. sle_dma = sg_dma_address(sg);
  3069. *cur_dsd++ = cpu_to_le32(LSD(sle_dma));
  3070. *cur_dsd++ = cpu_to_le32(MSD(sle_dma));
  3071. *cur_dsd++ = cpu_to_le32(sg_dma_len(sg));
  3072. avail_dsds--;
  3073. }
  3074. /* For read request DSD will always goes to continuation IOCB
  3075. * and follow the write DSD. If there is room on the current IOCB
  3076. * then it is added to that IOCB else new continuation IOCB is
  3077. * allocated.
  3078. */
  3079. for_each_sg(bsg_job->reply_payload.sg_list, sg,
  3080. bsg_job->reply_payload.sg_cnt, index) {
  3081. dma_addr_t sle_dma;
  3082. cont_a64_entry_t *cont_pkt;
  3083. /* Allocate additional continuation packets */
  3084. if (avail_dsds == 0) {
  3085. /* Continuation type 1 IOCB can accomodate
  3086. * 5 DSDS
  3087. */
  3088. cont_pkt = qla2x00_prep_cont_type1_iocb(vha, vha->req);
  3089. cur_dsd = (uint32_t *) cont_pkt->dseg_0_address;
  3090. avail_dsds = 5;
  3091. entry_count++;
  3092. }
  3093. sle_dma = sg_dma_address(sg);
  3094. *cur_dsd++ = cpu_to_le32(LSD(sle_dma));
  3095. *cur_dsd++ = cpu_to_le32(MSD(sle_dma));
  3096. *cur_dsd++ = cpu_to_le32(sg_dma_len(sg));
  3097. avail_dsds--;
  3098. }
  3099. /* This value should be same as number of IOCB required for this cmd */
  3100. cmd_pkt->entry_count = entry_count;
  3101. }
  3102. int
  3103. qla2x00_start_bidir(srb_t *sp, struct scsi_qla_host *vha, uint32_t tot_dsds)
  3104. {
  3105. struct qla_hw_data *ha = vha->hw;
  3106. unsigned long flags;
  3107. uint32_t handle;
  3108. uint32_t index;
  3109. uint16_t req_cnt;
  3110. uint16_t cnt;
  3111. uint32_t *clr_ptr;
  3112. struct cmd_bidir *cmd_pkt = NULL;
  3113. struct rsp_que *rsp;
  3114. struct req_que *req;
  3115. int rval = EXT_STATUS_OK;
  3116. rval = QLA_SUCCESS;
  3117. rsp = ha->rsp_q_map[0];
  3118. req = vha->req;
  3119. /* Send marker if required */
  3120. if (vha->marker_needed != 0) {
  3121. if (qla2x00_marker(vha, req,
  3122. rsp, 0, 0, MK_SYNC_ALL) != QLA_SUCCESS)
  3123. return EXT_STATUS_MAILBOX;
  3124. vha->marker_needed = 0;
  3125. }
  3126. /* Acquire ring specific lock */
  3127. spin_lock_irqsave(&ha->hardware_lock, flags);
  3128. /* Check for room in outstanding command list. */
  3129. handle = req->current_outstanding_cmd;
  3130. for (index = 1; index < req->num_outstanding_cmds; index++) {
  3131. handle++;
  3132. if (handle == req->num_outstanding_cmds)
  3133. handle = 1;
  3134. if (!req->outstanding_cmds[handle])
  3135. break;
  3136. }
  3137. if (index == req->num_outstanding_cmds) {
  3138. rval = EXT_STATUS_BUSY;
  3139. goto queuing_error;
  3140. }
  3141. /* Calculate number of IOCB required */
  3142. req_cnt = qla24xx_calc_iocbs(vha, tot_dsds);
  3143. /* Check for room on request queue. */
  3144. if (req->cnt < req_cnt + 2) {
  3145. cnt = IS_SHADOW_REG_CAPABLE(ha) ? *req->out_ptr :
  3146. RD_REG_DWORD_RELAXED(req->req_q_out);
  3147. if (req->ring_index < cnt)
  3148. req->cnt = cnt - req->ring_index;
  3149. else
  3150. req->cnt = req->length -
  3151. (req->ring_index - cnt);
  3152. }
  3153. if (req->cnt < req_cnt + 2) {
  3154. rval = EXT_STATUS_BUSY;
  3155. goto queuing_error;
  3156. }
  3157. cmd_pkt = (struct cmd_bidir *)req->ring_ptr;
  3158. cmd_pkt->handle = MAKE_HANDLE(req->id, handle);
  3159. /* Zero out remaining portion of packet. */
  3160. /* tagged queuing modifier -- default is TSK_SIMPLE (0).*/
  3161. clr_ptr = (uint32_t *)cmd_pkt + 2;
  3162. memset(clr_ptr, 0, REQUEST_ENTRY_SIZE - 8);
  3163. /* Set NPORT-ID (of vha)*/
  3164. cmd_pkt->nport_handle = cpu_to_le16(vha->self_login_loop_id);
  3165. cmd_pkt->port_id[0] = vha->d_id.b.al_pa;
  3166. cmd_pkt->port_id[1] = vha->d_id.b.area;
  3167. cmd_pkt->port_id[2] = vha->d_id.b.domain;
  3168. qla25xx_build_bidir_iocb(sp, vha, cmd_pkt, tot_dsds);
  3169. cmd_pkt->entry_status = (uint8_t) rsp->id;
  3170. /* Build command packet. */
  3171. req->current_outstanding_cmd = handle;
  3172. req->outstanding_cmds[handle] = sp;
  3173. sp->handle = handle;
  3174. req->cnt -= req_cnt;
  3175. /* Send the command to the firmware */
  3176. wmb();
  3177. qla2x00_start_iocbs(vha, req);
  3178. queuing_error:
  3179. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  3180. return rval;
  3181. }