megaraid_sas_fp.c 40 KB

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  1. /*
  2. * Linux MegaRAID driver for SAS based RAID controllers
  3. *
  4. * Copyright (c) 2009-2013 LSI Corporation
  5. * Copyright (c) 2013-2014 Avago Technologies
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License
  9. * as published by the Free Software Foundation; either version 2
  10. * of the License, or (at your option) any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program. If not, see <http://www.gnu.org/licenses/>.
  19. *
  20. * FILE: megaraid_sas_fp.c
  21. *
  22. * Authors: Avago Technologies
  23. * Sumant Patro
  24. * Varad Talamacki
  25. * Manoj Jose
  26. * Kashyap Desai <kashyap.desai@avagotech.com>
  27. * Sumit Saxena <sumit.saxena@avagotech.com>
  28. *
  29. * Send feedback to: megaraidlinux.pdl@avagotech.com
  30. *
  31. * Mail to: Avago Technologies, 350 West Trimble Road, Building 90,
  32. * San Jose, California 95131
  33. */
  34. #include <linux/kernel.h>
  35. #include <linux/types.h>
  36. #include <linux/pci.h>
  37. #include <linux/list.h>
  38. #include <linux/moduleparam.h>
  39. #include <linux/module.h>
  40. #include <linux/spinlock.h>
  41. #include <linux/interrupt.h>
  42. #include <linux/delay.h>
  43. #include <linux/uio.h>
  44. #include <linux/uaccess.h>
  45. #include <linux/fs.h>
  46. #include <linux/compat.h>
  47. #include <linux/blkdev.h>
  48. #include <linux/poll.h>
  49. #include <scsi/scsi.h>
  50. #include <scsi/scsi_cmnd.h>
  51. #include <scsi/scsi_device.h>
  52. #include <scsi/scsi_host.h>
  53. #include "megaraid_sas_fusion.h"
  54. #include "megaraid_sas.h"
  55. #include <asm/div64.h>
  56. #define LB_PENDING_CMDS_DEFAULT 4
  57. static unsigned int lb_pending_cmds = LB_PENDING_CMDS_DEFAULT;
  58. module_param(lb_pending_cmds, int, S_IRUGO);
  59. MODULE_PARM_DESC(lb_pending_cmds, "Change raid-1 load balancing outstanding "
  60. "threshold. Valid Values are 1-128. Default: 4");
  61. #define ABS_DIFF(a, b) (((a) > (b)) ? ((a) - (b)) : ((b) - (a)))
  62. #define MR_LD_STATE_OPTIMAL 3
  63. #define SPAN_ROW_SIZE(map, ld, index_) (MR_LdSpanPtrGet(ld, index_, map)->spanRowSize)
  64. #define SPAN_ROW_DATA_SIZE(map_, ld, index_) (MR_LdSpanPtrGet(ld, index_, map)->spanRowDataSize)
  65. #define SPAN_INVALID 0xff
  66. /* Prototypes */
  67. static void mr_update_span_set(struct MR_DRV_RAID_MAP_ALL *map,
  68. PLD_SPAN_INFO ldSpanInfo);
  69. static u8 mr_spanset_get_phy_params(struct megasas_instance *instance, u32 ld,
  70. u64 stripRow, u16 stripRef, struct IO_REQUEST_INFO *io_info,
  71. struct RAID_CONTEXT *pRAID_Context, struct MR_DRV_RAID_MAP_ALL *map);
  72. static u64 get_row_from_strip(struct megasas_instance *instance, u32 ld,
  73. u64 strip, struct MR_DRV_RAID_MAP_ALL *map);
  74. u32 mega_mod64(u64 dividend, u32 divisor)
  75. {
  76. u64 d;
  77. u32 remainder;
  78. if (!divisor)
  79. printk(KERN_ERR "megasas : DIVISOR is zero, in div fn\n");
  80. d = dividend;
  81. remainder = do_div(d, divisor);
  82. return remainder;
  83. }
  84. /**
  85. * @param dividend : Dividend
  86. * @param divisor : Divisor
  87. *
  88. * @return quotient
  89. **/
  90. u64 mega_div64_32(uint64_t dividend, uint32_t divisor)
  91. {
  92. u32 remainder;
  93. u64 d;
  94. if (!divisor)
  95. printk(KERN_ERR "megasas : DIVISOR is zero in mod fn\n");
  96. d = dividend;
  97. remainder = do_div(d, divisor);
  98. return d;
  99. }
  100. struct MR_LD_RAID *MR_LdRaidGet(u32 ld, struct MR_DRV_RAID_MAP_ALL *map)
  101. {
  102. return &map->raidMap.ldSpanMap[ld].ldRaid;
  103. }
  104. static struct MR_SPAN_BLOCK_INFO *MR_LdSpanInfoGet(u32 ld,
  105. struct MR_DRV_RAID_MAP_ALL
  106. *map)
  107. {
  108. return &map->raidMap.ldSpanMap[ld].spanBlock[0];
  109. }
  110. static u8 MR_LdDataArmGet(u32 ld, u32 armIdx, struct MR_DRV_RAID_MAP_ALL *map)
  111. {
  112. return map->raidMap.ldSpanMap[ld].dataArmMap[armIdx];
  113. }
  114. u16 MR_ArPdGet(u32 ar, u32 arm, struct MR_DRV_RAID_MAP_ALL *map)
  115. {
  116. return le16_to_cpu(map->raidMap.arMapInfo[ar].pd[arm]);
  117. }
  118. u16 MR_LdSpanArrayGet(u32 ld, u32 span, struct MR_DRV_RAID_MAP_ALL *map)
  119. {
  120. return le16_to_cpu(map->raidMap.ldSpanMap[ld].spanBlock[span].span.arrayRef);
  121. }
  122. __le16 MR_PdDevHandleGet(u32 pd, struct MR_DRV_RAID_MAP_ALL *map)
  123. {
  124. return map->raidMap.devHndlInfo[pd].curDevHdl;
  125. }
  126. static u8 MR_PdInterfaceTypeGet(u32 pd, struct MR_DRV_RAID_MAP_ALL *map)
  127. {
  128. return map->raidMap.devHndlInfo[pd].interfaceType;
  129. }
  130. u16 MR_GetLDTgtId(u32 ld, struct MR_DRV_RAID_MAP_ALL *map)
  131. {
  132. return le16_to_cpu(map->raidMap.ldSpanMap[ld].ldRaid.targetId);
  133. }
  134. u16 MR_TargetIdToLdGet(u32 ldTgtId, struct MR_DRV_RAID_MAP_ALL *map)
  135. {
  136. return map->raidMap.ldTgtIdToLd[ldTgtId];
  137. }
  138. static struct MR_LD_SPAN *MR_LdSpanPtrGet(u32 ld, u32 span,
  139. struct MR_DRV_RAID_MAP_ALL *map)
  140. {
  141. return &map->raidMap.ldSpanMap[ld].spanBlock[span].span;
  142. }
  143. /*
  144. * This function will Populate Driver Map using firmware raid map
  145. */
  146. static int MR_PopulateDrvRaidMap(struct megasas_instance *instance, u64 map_id)
  147. {
  148. struct fusion_context *fusion = instance->ctrl_context;
  149. struct MR_FW_RAID_MAP_ALL *fw_map_old = NULL;
  150. struct MR_FW_RAID_MAP *pFwRaidMap = NULL;
  151. int i, j;
  152. u16 ld_count;
  153. struct MR_FW_RAID_MAP_DYNAMIC *fw_map_dyn;
  154. struct MR_FW_RAID_MAP_EXT *fw_map_ext;
  155. struct MR_RAID_MAP_DESC_TABLE *desc_table;
  156. struct MR_DRV_RAID_MAP_ALL *drv_map =
  157. fusion->ld_drv_map[(map_id & 1)];
  158. struct MR_DRV_RAID_MAP *pDrvRaidMap = &drv_map->raidMap;
  159. void *raid_map_data = NULL;
  160. memset(drv_map, 0, fusion->drv_map_sz);
  161. memset(pDrvRaidMap->ldTgtIdToLd,
  162. 0xff, (sizeof(u16) * MAX_LOGICAL_DRIVES_DYN));
  163. if (instance->max_raid_mapsize) {
  164. fw_map_dyn = fusion->ld_map[(map_id & 1)];
  165. desc_table =
  166. (struct MR_RAID_MAP_DESC_TABLE *)((void *)fw_map_dyn + le32_to_cpu(fw_map_dyn->desc_table_offset));
  167. if (desc_table != fw_map_dyn->raid_map_desc_table)
  168. dev_dbg(&instance->pdev->dev, "offsets of desc table are not matching desc %p original %p\n",
  169. desc_table, fw_map_dyn->raid_map_desc_table);
  170. ld_count = (u16)le16_to_cpu(fw_map_dyn->ld_count);
  171. pDrvRaidMap->ldCount = (__le16)cpu_to_le16(ld_count);
  172. pDrvRaidMap->fpPdIoTimeoutSec =
  173. fw_map_dyn->fp_pd_io_timeout_sec;
  174. pDrvRaidMap->totalSize =
  175. cpu_to_le32(sizeof(struct MR_DRV_RAID_MAP_ALL));
  176. /* point to actual data starting point*/
  177. raid_map_data = (void *)fw_map_dyn +
  178. le32_to_cpu(fw_map_dyn->desc_table_offset) +
  179. le32_to_cpu(fw_map_dyn->desc_table_size);
  180. for (i = 0; i < le32_to_cpu(fw_map_dyn->desc_table_num_elements); ++i) {
  181. switch (le32_to_cpu(desc_table->raid_map_desc_type)) {
  182. case RAID_MAP_DESC_TYPE_DEVHDL_INFO:
  183. fw_map_dyn->dev_hndl_info =
  184. (struct MR_DEV_HANDLE_INFO *)(raid_map_data + le32_to_cpu(desc_table->raid_map_desc_offset));
  185. memcpy(pDrvRaidMap->devHndlInfo,
  186. fw_map_dyn->dev_hndl_info,
  187. sizeof(struct MR_DEV_HANDLE_INFO) *
  188. le32_to_cpu(desc_table->raid_map_desc_elements));
  189. break;
  190. case RAID_MAP_DESC_TYPE_TGTID_INFO:
  191. fw_map_dyn->ld_tgt_id_to_ld =
  192. (u16 *)(raid_map_data +
  193. le32_to_cpu(desc_table->raid_map_desc_offset));
  194. for (j = 0; j < le32_to_cpu(desc_table->raid_map_desc_elements); j++) {
  195. pDrvRaidMap->ldTgtIdToLd[j] =
  196. le16_to_cpu(fw_map_dyn->ld_tgt_id_to_ld[j]);
  197. }
  198. break;
  199. case RAID_MAP_DESC_TYPE_ARRAY_INFO:
  200. fw_map_dyn->ar_map_info =
  201. (struct MR_ARRAY_INFO *)
  202. (raid_map_data + le32_to_cpu(desc_table->raid_map_desc_offset));
  203. memcpy(pDrvRaidMap->arMapInfo,
  204. fw_map_dyn->ar_map_info,
  205. sizeof(struct MR_ARRAY_INFO) *
  206. le32_to_cpu(desc_table->raid_map_desc_elements));
  207. break;
  208. case RAID_MAP_DESC_TYPE_SPAN_INFO:
  209. fw_map_dyn->ld_span_map =
  210. (struct MR_LD_SPAN_MAP *)
  211. (raid_map_data +
  212. le32_to_cpu(desc_table->raid_map_desc_offset));
  213. memcpy(pDrvRaidMap->ldSpanMap,
  214. fw_map_dyn->ld_span_map,
  215. sizeof(struct MR_LD_SPAN_MAP) *
  216. le32_to_cpu(desc_table->raid_map_desc_elements));
  217. break;
  218. default:
  219. dev_dbg(&instance->pdev->dev, "wrong number of desctableElements %d\n",
  220. fw_map_dyn->desc_table_num_elements);
  221. }
  222. ++desc_table;
  223. }
  224. } else if (instance->supportmax256vd) {
  225. fw_map_ext =
  226. (struct MR_FW_RAID_MAP_EXT *)fusion->ld_map[(map_id & 1)];
  227. ld_count = (u16)le16_to_cpu(fw_map_ext->ldCount);
  228. if (ld_count > MAX_LOGICAL_DRIVES_EXT) {
  229. dev_dbg(&instance->pdev->dev, "megaraid_sas: LD count exposed in RAID map in not valid\n");
  230. return 1;
  231. }
  232. pDrvRaidMap->ldCount = (__le16)cpu_to_le16(ld_count);
  233. pDrvRaidMap->fpPdIoTimeoutSec = fw_map_ext->fpPdIoTimeoutSec;
  234. for (i = 0; i < (MAX_LOGICAL_DRIVES_EXT); i++)
  235. pDrvRaidMap->ldTgtIdToLd[i] =
  236. (u16)fw_map_ext->ldTgtIdToLd[i];
  237. memcpy(pDrvRaidMap->ldSpanMap, fw_map_ext->ldSpanMap,
  238. sizeof(struct MR_LD_SPAN_MAP) * ld_count);
  239. memcpy(pDrvRaidMap->arMapInfo, fw_map_ext->arMapInfo,
  240. sizeof(struct MR_ARRAY_INFO) * MAX_API_ARRAYS_EXT);
  241. memcpy(pDrvRaidMap->devHndlInfo, fw_map_ext->devHndlInfo,
  242. sizeof(struct MR_DEV_HANDLE_INFO) *
  243. MAX_RAIDMAP_PHYSICAL_DEVICES);
  244. /* New Raid map will not set totalSize, so keep expected value
  245. * for legacy code in ValidateMapInfo
  246. */
  247. pDrvRaidMap->totalSize =
  248. cpu_to_le32(sizeof(struct MR_FW_RAID_MAP_EXT));
  249. } else {
  250. fw_map_old = (struct MR_FW_RAID_MAP_ALL *)
  251. fusion->ld_map[(map_id & 1)];
  252. pFwRaidMap = &fw_map_old->raidMap;
  253. ld_count = (u16)le32_to_cpu(pFwRaidMap->ldCount);
  254. if (ld_count > MAX_LOGICAL_DRIVES) {
  255. dev_dbg(&instance->pdev->dev,
  256. "LD count exposed in RAID map in not valid\n");
  257. return 1;
  258. }
  259. pDrvRaidMap->totalSize = pFwRaidMap->totalSize;
  260. pDrvRaidMap->ldCount = (__le16)cpu_to_le16(ld_count);
  261. pDrvRaidMap->fpPdIoTimeoutSec = pFwRaidMap->fpPdIoTimeoutSec;
  262. for (i = 0; i < MAX_RAIDMAP_LOGICAL_DRIVES + MAX_RAIDMAP_VIEWS; i++)
  263. pDrvRaidMap->ldTgtIdToLd[i] =
  264. (u8)pFwRaidMap->ldTgtIdToLd[i];
  265. for (i = 0; i < ld_count; i++) {
  266. pDrvRaidMap->ldSpanMap[i] = pFwRaidMap->ldSpanMap[i];
  267. }
  268. memcpy(pDrvRaidMap->arMapInfo, pFwRaidMap->arMapInfo,
  269. sizeof(struct MR_ARRAY_INFO) * MAX_RAIDMAP_ARRAYS);
  270. memcpy(pDrvRaidMap->devHndlInfo, pFwRaidMap->devHndlInfo,
  271. sizeof(struct MR_DEV_HANDLE_INFO) *
  272. MAX_RAIDMAP_PHYSICAL_DEVICES);
  273. }
  274. return 0;
  275. }
  276. /*
  277. * This function will validate Map info data provided by FW
  278. */
  279. u8 MR_ValidateMapInfo(struct megasas_instance *instance, u64 map_id)
  280. {
  281. struct fusion_context *fusion;
  282. struct MR_DRV_RAID_MAP_ALL *drv_map;
  283. struct MR_DRV_RAID_MAP *pDrvRaidMap;
  284. struct LD_LOAD_BALANCE_INFO *lbInfo;
  285. PLD_SPAN_INFO ldSpanInfo;
  286. struct MR_LD_RAID *raid;
  287. u16 num_lds, i;
  288. u16 ld;
  289. u32 expected_size;
  290. if (MR_PopulateDrvRaidMap(instance, map_id))
  291. return 0;
  292. fusion = instance->ctrl_context;
  293. drv_map = fusion->ld_drv_map[(map_id & 1)];
  294. pDrvRaidMap = &drv_map->raidMap;
  295. lbInfo = fusion->load_balance_info;
  296. ldSpanInfo = fusion->log_to_span;
  297. if (instance->max_raid_mapsize)
  298. expected_size = sizeof(struct MR_DRV_RAID_MAP_ALL);
  299. else if (instance->supportmax256vd)
  300. expected_size = sizeof(struct MR_FW_RAID_MAP_EXT);
  301. else
  302. expected_size =
  303. (sizeof(struct MR_FW_RAID_MAP) - sizeof(struct MR_LD_SPAN_MAP) +
  304. (sizeof(struct MR_LD_SPAN_MAP) * le16_to_cpu(pDrvRaidMap->ldCount)));
  305. if (le32_to_cpu(pDrvRaidMap->totalSize) != expected_size) {
  306. dev_dbg(&instance->pdev->dev, "megasas: map info structure size 0x%x",
  307. le32_to_cpu(pDrvRaidMap->totalSize));
  308. dev_dbg(&instance->pdev->dev, "is not matching expected size 0x%x\n",
  309. (unsigned int)expected_size);
  310. dev_err(&instance->pdev->dev, "megasas: span map %x, pDrvRaidMap->totalSize : %x\n",
  311. (unsigned int)sizeof(struct MR_LD_SPAN_MAP),
  312. le32_to_cpu(pDrvRaidMap->totalSize));
  313. return 0;
  314. }
  315. if (instance->UnevenSpanSupport)
  316. mr_update_span_set(drv_map, ldSpanInfo);
  317. if (lbInfo)
  318. mr_update_load_balance_params(drv_map, lbInfo);
  319. num_lds = le16_to_cpu(drv_map->raidMap.ldCount);
  320. /*Convert Raid capability values to CPU arch */
  321. for (i = 0; (num_lds > 0) && (i < MAX_LOGICAL_DRIVES_EXT); i++) {
  322. ld = MR_TargetIdToLdGet(i, drv_map);
  323. /* For non existing VDs, iterate to next VD*/
  324. if (ld >= (MAX_LOGICAL_DRIVES_EXT - 1))
  325. continue;
  326. raid = MR_LdRaidGet(ld, drv_map);
  327. le32_to_cpus((u32 *)&raid->capability);
  328. num_lds--;
  329. }
  330. return 1;
  331. }
  332. u32 MR_GetSpanBlock(u32 ld, u64 row, u64 *span_blk,
  333. struct MR_DRV_RAID_MAP_ALL *map)
  334. {
  335. struct MR_SPAN_BLOCK_INFO *pSpanBlock = MR_LdSpanInfoGet(ld, map);
  336. struct MR_QUAD_ELEMENT *quad;
  337. struct MR_LD_RAID *raid = MR_LdRaidGet(ld, map);
  338. u32 span, j;
  339. for (span = 0; span < raid->spanDepth; span++, pSpanBlock++) {
  340. for (j = 0; j < le32_to_cpu(pSpanBlock->block_span_info.noElements); j++) {
  341. quad = &pSpanBlock->block_span_info.quad[j];
  342. if (le32_to_cpu(quad->diff) == 0)
  343. return SPAN_INVALID;
  344. if (le64_to_cpu(quad->logStart) <= row && row <=
  345. le64_to_cpu(quad->logEnd) && (mega_mod64(row - le64_to_cpu(quad->logStart),
  346. le32_to_cpu(quad->diff))) == 0) {
  347. if (span_blk != NULL) {
  348. u64 blk, debugBlk;
  349. blk = mega_div64_32((row-le64_to_cpu(quad->logStart)), le32_to_cpu(quad->diff));
  350. debugBlk = blk;
  351. blk = (blk + le64_to_cpu(quad->offsetInSpan)) << raid->stripeShift;
  352. *span_blk = blk;
  353. }
  354. return span;
  355. }
  356. }
  357. }
  358. return SPAN_INVALID;
  359. }
  360. /*
  361. ******************************************************************************
  362. *
  363. * This routine calculates the Span block for given row using spanset.
  364. *
  365. * Inputs :
  366. * instance - HBA instance
  367. * ld - Logical drive number
  368. * row - Row number
  369. * map - LD map
  370. *
  371. * Outputs :
  372. *
  373. * span - Span number
  374. * block - Absolute Block number in the physical disk
  375. * div_error - Devide error code.
  376. */
  377. u32 mr_spanset_get_span_block(struct megasas_instance *instance,
  378. u32 ld, u64 row, u64 *span_blk, struct MR_DRV_RAID_MAP_ALL *map)
  379. {
  380. struct fusion_context *fusion = instance->ctrl_context;
  381. struct MR_LD_RAID *raid = MR_LdRaidGet(ld, map);
  382. LD_SPAN_SET *span_set;
  383. struct MR_QUAD_ELEMENT *quad;
  384. u32 span, info;
  385. PLD_SPAN_INFO ldSpanInfo = fusion->log_to_span;
  386. for (info = 0; info < MAX_QUAD_DEPTH; info++) {
  387. span_set = &(ldSpanInfo[ld].span_set[info]);
  388. if (span_set->span_row_data_width == 0)
  389. break;
  390. if (row > span_set->data_row_end)
  391. continue;
  392. for (span = 0; span < raid->spanDepth; span++)
  393. if (le32_to_cpu(map->raidMap.ldSpanMap[ld].spanBlock[span].
  394. block_span_info.noElements) >= info+1) {
  395. quad = &map->raidMap.ldSpanMap[ld].
  396. spanBlock[span].
  397. block_span_info.quad[info];
  398. if (le32_to_cpu(quad->diff) == 0)
  399. return SPAN_INVALID;
  400. if (le64_to_cpu(quad->logStart) <= row &&
  401. row <= le64_to_cpu(quad->logEnd) &&
  402. (mega_mod64(row - le64_to_cpu(quad->logStart),
  403. le32_to_cpu(quad->diff))) == 0) {
  404. if (span_blk != NULL) {
  405. u64 blk;
  406. blk = mega_div64_32
  407. ((row - le64_to_cpu(quad->logStart)),
  408. le32_to_cpu(quad->diff));
  409. blk = (blk + le64_to_cpu(quad->offsetInSpan))
  410. << raid->stripeShift;
  411. *span_blk = blk;
  412. }
  413. return span;
  414. }
  415. }
  416. }
  417. return SPAN_INVALID;
  418. }
  419. /*
  420. ******************************************************************************
  421. *
  422. * This routine calculates the row for given strip using spanset.
  423. *
  424. * Inputs :
  425. * instance - HBA instance
  426. * ld - Logical drive number
  427. * Strip - Strip
  428. * map - LD map
  429. *
  430. * Outputs :
  431. *
  432. * row - row associated with strip
  433. */
  434. static u64 get_row_from_strip(struct megasas_instance *instance,
  435. u32 ld, u64 strip, struct MR_DRV_RAID_MAP_ALL *map)
  436. {
  437. struct fusion_context *fusion = instance->ctrl_context;
  438. struct MR_LD_RAID *raid = MR_LdRaidGet(ld, map);
  439. LD_SPAN_SET *span_set;
  440. PLD_SPAN_INFO ldSpanInfo = fusion->log_to_span;
  441. u32 info, strip_offset, span, span_offset;
  442. u64 span_set_Strip, span_set_Row, retval;
  443. for (info = 0; info < MAX_QUAD_DEPTH; info++) {
  444. span_set = &(ldSpanInfo[ld].span_set[info]);
  445. if (span_set->span_row_data_width == 0)
  446. break;
  447. if (strip > span_set->data_strip_end)
  448. continue;
  449. span_set_Strip = strip - span_set->data_strip_start;
  450. strip_offset = mega_mod64(span_set_Strip,
  451. span_set->span_row_data_width);
  452. span_set_Row = mega_div64_32(span_set_Strip,
  453. span_set->span_row_data_width) * span_set->diff;
  454. for (span = 0, span_offset = 0; span < raid->spanDepth; span++)
  455. if (le32_to_cpu(map->raidMap.ldSpanMap[ld].spanBlock[span].
  456. block_span_info.noElements) >= info+1) {
  457. if (strip_offset >=
  458. span_set->strip_offset[span])
  459. span_offset++;
  460. else
  461. break;
  462. }
  463. retval = (span_set->data_row_start + span_set_Row +
  464. (span_offset - 1));
  465. return retval;
  466. }
  467. return -1LLU;
  468. }
  469. /*
  470. ******************************************************************************
  471. *
  472. * This routine calculates the Start Strip for given row using spanset.
  473. *
  474. * Inputs :
  475. * instance - HBA instance
  476. * ld - Logical drive number
  477. * row - Row number
  478. * map - LD map
  479. *
  480. * Outputs :
  481. *
  482. * Strip - Start strip associated with row
  483. */
  484. static u64 get_strip_from_row(struct megasas_instance *instance,
  485. u32 ld, u64 row, struct MR_DRV_RAID_MAP_ALL *map)
  486. {
  487. struct fusion_context *fusion = instance->ctrl_context;
  488. struct MR_LD_RAID *raid = MR_LdRaidGet(ld, map);
  489. LD_SPAN_SET *span_set;
  490. struct MR_QUAD_ELEMENT *quad;
  491. PLD_SPAN_INFO ldSpanInfo = fusion->log_to_span;
  492. u32 span, info;
  493. u64 strip;
  494. for (info = 0; info < MAX_QUAD_DEPTH; info++) {
  495. span_set = &(ldSpanInfo[ld].span_set[info]);
  496. if (span_set->span_row_data_width == 0)
  497. break;
  498. if (row > span_set->data_row_end)
  499. continue;
  500. for (span = 0; span < raid->spanDepth; span++)
  501. if (le32_to_cpu(map->raidMap.ldSpanMap[ld].spanBlock[span].
  502. block_span_info.noElements) >= info+1) {
  503. quad = &map->raidMap.ldSpanMap[ld].
  504. spanBlock[span].block_span_info.quad[info];
  505. if (le64_to_cpu(quad->logStart) <= row &&
  506. row <= le64_to_cpu(quad->logEnd) &&
  507. mega_mod64((row - le64_to_cpu(quad->logStart)),
  508. le32_to_cpu(quad->diff)) == 0) {
  509. strip = mega_div64_32
  510. (((row - span_set->data_row_start)
  511. - le64_to_cpu(quad->logStart)),
  512. le32_to_cpu(quad->diff));
  513. strip *= span_set->span_row_data_width;
  514. strip += span_set->data_strip_start;
  515. strip += span_set->strip_offset[span];
  516. return strip;
  517. }
  518. }
  519. }
  520. dev_err(&instance->pdev->dev, "get_strip_from_row"
  521. "returns invalid strip for ld=%x, row=%lx\n",
  522. ld, (long unsigned int)row);
  523. return -1;
  524. }
  525. /*
  526. ******************************************************************************
  527. *
  528. * This routine calculates the Physical Arm for given strip using spanset.
  529. *
  530. * Inputs :
  531. * instance - HBA instance
  532. * ld - Logical drive number
  533. * strip - Strip
  534. * map - LD map
  535. *
  536. * Outputs :
  537. *
  538. * Phys Arm - Phys Arm associated with strip
  539. */
  540. static u32 get_arm_from_strip(struct megasas_instance *instance,
  541. u32 ld, u64 strip, struct MR_DRV_RAID_MAP_ALL *map)
  542. {
  543. struct fusion_context *fusion = instance->ctrl_context;
  544. struct MR_LD_RAID *raid = MR_LdRaidGet(ld, map);
  545. LD_SPAN_SET *span_set;
  546. PLD_SPAN_INFO ldSpanInfo = fusion->log_to_span;
  547. u32 info, strip_offset, span, span_offset, retval;
  548. for (info = 0 ; info < MAX_QUAD_DEPTH; info++) {
  549. span_set = &(ldSpanInfo[ld].span_set[info]);
  550. if (span_set->span_row_data_width == 0)
  551. break;
  552. if (strip > span_set->data_strip_end)
  553. continue;
  554. strip_offset = (uint)mega_mod64
  555. ((strip - span_set->data_strip_start),
  556. span_set->span_row_data_width);
  557. for (span = 0, span_offset = 0; span < raid->spanDepth; span++)
  558. if (le32_to_cpu(map->raidMap.ldSpanMap[ld].spanBlock[span].
  559. block_span_info.noElements) >= info+1) {
  560. if (strip_offset >=
  561. span_set->strip_offset[span])
  562. span_offset =
  563. span_set->strip_offset[span];
  564. else
  565. break;
  566. }
  567. retval = (strip_offset - span_offset);
  568. return retval;
  569. }
  570. dev_err(&instance->pdev->dev, "get_arm_from_strip"
  571. "returns invalid arm for ld=%x strip=%lx\n",
  572. ld, (long unsigned int)strip);
  573. return -1;
  574. }
  575. /* This Function will return Phys arm */
  576. u8 get_arm(struct megasas_instance *instance, u32 ld, u8 span, u64 stripe,
  577. struct MR_DRV_RAID_MAP_ALL *map)
  578. {
  579. struct MR_LD_RAID *raid = MR_LdRaidGet(ld, map);
  580. /* Need to check correct default value */
  581. u32 arm = 0;
  582. switch (raid->level) {
  583. case 0:
  584. case 5:
  585. case 6:
  586. arm = mega_mod64(stripe, SPAN_ROW_SIZE(map, ld, span));
  587. break;
  588. case 1:
  589. /* start with logical arm */
  590. arm = get_arm_from_strip(instance, ld, stripe, map);
  591. if (arm != -1U)
  592. arm *= 2;
  593. break;
  594. }
  595. return arm;
  596. }
  597. /*
  598. ******************************************************************************
  599. *
  600. * This routine calculates the arm, span and block for the specified stripe and
  601. * reference in stripe using spanset
  602. *
  603. * Inputs :
  604. *
  605. * ld - Logical drive number
  606. * stripRow - Stripe number
  607. * stripRef - Reference in stripe
  608. *
  609. * Outputs :
  610. *
  611. * span - Span number
  612. * block - Absolute Block number in the physical disk
  613. */
  614. static u8 mr_spanset_get_phy_params(struct megasas_instance *instance, u32 ld,
  615. u64 stripRow, u16 stripRef, struct IO_REQUEST_INFO *io_info,
  616. struct RAID_CONTEXT *pRAID_Context,
  617. struct MR_DRV_RAID_MAP_ALL *map)
  618. {
  619. struct MR_LD_RAID *raid = MR_LdRaidGet(ld, map);
  620. u32 pd, arRef, r1_alt_pd;
  621. u8 physArm, span;
  622. u64 row;
  623. u8 retval = true;
  624. u64 *pdBlock = &io_info->pdBlock;
  625. __le16 *pDevHandle = &io_info->devHandle;
  626. u8 *pPdInterface = &io_info->pd_interface;
  627. u32 logArm, rowMod, armQ, arm;
  628. struct fusion_context *fusion;
  629. fusion = instance->ctrl_context;
  630. *pDevHandle = cpu_to_le16(MR_DEVHANDLE_INVALID);
  631. /*Get row and span from io_info for Uneven Span IO.*/
  632. row = io_info->start_row;
  633. span = io_info->start_span;
  634. if (raid->level == 6) {
  635. logArm = get_arm_from_strip(instance, ld, stripRow, map);
  636. if (logArm == -1U)
  637. return false;
  638. rowMod = mega_mod64(row, SPAN_ROW_SIZE(map, ld, span));
  639. armQ = SPAN_ROW_SIZE(map, ld, span) - 1 - rowMod;
  640. arm = armQ + 1 + logArm;
  641. if (arm >= SPAN_ROW_SIZE(map, ld, span))
  642. arm -= SPAN_ROW_SIZE(map, ld, span);
  643. physArm = (u8)arm;
  644. } else
  645. /* Calculate the arm */
  646. physArm = get_arm(instance, ld, span, stripRow, map);
  647. if (physArm == 0xFF)
  648. return false;
  649. arRef = MR_LdSpanArrayGet(ld, span, map);
  650. pd = MR_ArPdGet(arRef, physArm, map);
  651. if (pd != MR_PD_INVALID) {
  652. *pDevHandle = MR_PdDevHandleGet(pd, map);
  653. *pPdInterface = MR_PdInterfaceTypeGet(pd, map);
  654. /* get second pd also for raid 1/10 fast path writes*/
  655. if ((instance->adapter_type == VENTURA_SERIES) &&
  656. (raid->level == 1) &&
  657. !io_info->isRead) {
  658. r1_alt_pd = MR_ArPdGet(arRef, physArm + 1, map);
  659. if (r1_alt_pd != MR_PD_INVALID)
  660. io_info->r1_alt_dev_handle =
  661. MR_PdDevHandleGet(r1_alt_pd, map);
  662. }
  663. } else {
  664. if ((raid->level >= 5) &&
  665. ((instance->adapter_type == THUNDERBOLT_SERIES) ||
  666. ((instance->adapter_type == INVADER_SERIES) &&
  667. (raid->regTypeReqOnRead != REGION_TYPE_UNUSED))))
  668. pRAID_Context->reg_lock_flags = REGION_TYPE_EXCLUSIVE;
  669. else if (raid->level == 1) {
  670. physArm = physArm + 1;
  671. pd = MR_ArPdGet(arRef, physArm, map);
  672. if (pd != MR_PD_INVALID) {
  673. *pDevHandle = MR_PdDevHandleGet(pd, map);
  674. *pPdInterface = MR_PdInterfaceTypeGet(pd, map);
  675. }
  676. }
  677. }
  678. *pdBlock += stripRef + le64_to_cpu(MR_LdSpanPtrGet(ld, span, map)->startBlk);
  679. if (instance->adapter_type == VENTURA_SERIES) {
  680. ((struct RAID_CONTEXT_G35 *)pRAID_Context)->span_arm =
  681. (span << RAID_CTX_SPANARM_SPAN_SHIFT) | physArm;
  682. io_info->span_arm =
  683. (span << RAID_CTX_SPANARM_SPAN_SHIFT) | physArm;
  684. } else {
  685. pRAID_Context->span_arm =
  686. (span << RAID_CTX_SPANARM_SPAN_SHIFT) | physArm;
  687. io_info->span_arm = pRAID_Context->span_arm;
  688. }
  689. io_info->pd_after_lb = pd;
  690. return retval;
  691. }
  692. /*
  693. ******************************************************************************
  694. *
  695. * This routine calculates the arm, span and block for the specified stripe and
  696. * reference in stripe.
  697. *
  698. * Inputs :
  699. *
  700. * ld - Logical drive number
  701. * stripRow - Stripe number
  702. * stripRef - Reference in stripe
  703. *
  704. * Outputs :
  705. *
  706. * span - Span number
  707. * block - Absolute Block number in the physical disk
  708. */
  709. u8 MR_GetPhyParams(struct megasas_instance *instance, u32 ld, u64 stripRow,
  710. u16 stripRef, struct IO_REQUEST_INFO *io_info,
  711. struct RAID_CONTEXT *pRAID_Context,
  712. struct MR_DRV_RAID_MAP_ALL *map)
  713. {
  714. struct MR_LD_RAID *raid = MR_LdRaidGet(ld, map);
  715. u32 pd, arRef, r1_alt_pd;
  716. u8 physArm, span;
  717. u64 row;
  718. u8 retval = true;
  719. u64 *pdBlock = &io_info->pdBlock;
  720. __le16 *pDevHandle = &io_info->devHandle;
  721. u8 *pPdInterface = &io_info->pd_interface;
  722. struct fusion_context *fusion;
  723. fusion = instance->ctrl_context;
  724. *pDevHandle = cpu_to_le16(MR_DEVHANDLE_INVALID);
  725. row = mega_div64_32(stripRow, raid->rowDataSize);
  726. if (raid->level == 6) {
  727. /* logical arm within row */
  728. u32 logArm = mega_mod64(stripRow, raid->rowDataSize);
  729. u32 rowMod, armQ, arm;
  730. if (raid->rowSize == 0)
  731. return false;
  732. /* get logical row mod */
  733. rowMod = mega_mod64(row, raid->rowSize);
  734. armQ = raid->rowSize-1-rowMod; /* index of Q drive */
  735. arm = armQ+1+logArm; /* data always logically follows Q */
  736. if (arm >= raid->rowSize) /* handle wrap condition */
  737. arm -= raid->rowSize;
  738. physArm = (u8)arm;
  739. } else {
  740. if (raid->modFactor == 0)
  741. return false;
  742. physArm = MR_LdDataArmGet(ld, mega_mod64(stripRow,
  743. raid->modFactor),
  744. map);
  745. }
  746. if (raid->spanDepth == 1) {
  747. span = 0;
  748. *pdBlock = row << raid->stripeShift;
  749. } else {
  750. span = (u8)MR_GetSpanBlock(ld, row, pdBlock, map);
  751. if (span == SPAN_INVALID)
  752. return false;
  753. }
  754. /* Get the array on which this span is present */
  755. arRef = MR_LdSpanArrayGet(ld, span, map);
  756. pd = MR_ArPdGet(arRef, physArm, map); /* Get the pd */
  757. if (pd != MR_PD_INVALID) {
  758. /* Get dev handle from Pd. */
  759. *pDevHandle = MR_PdDevHandleGet(pd, map);
  760. *pPdInterface = MR_PdInterfaceTypeGet(pd, map);
  761. /* get second pd also for raid 1/10 fast path writes*/
  762. if ((instance->adapter_type == VENTURA_SERIES) &&
  763. (raid->level == 1) &&
  764. !io_info->isRead) {
  765. r1_alt_pd = MR_ArPdGet(arRef, physArm + 1, map);
  766. if (r1_alt_pd != MR_PD_INVALID)
  767. io_info->r1_alt_dev_handle =
  768. MR_PdDevHandleGet(r1_alt_pd, map);
  769. }
  770. } else {
  771. if ((raid->level >= 5) &&
  772. ((instance->adapter_type == THUNDERBOLT_SERIES) ||
  773. ((instance->adapter_type == INVADER_SERIES) &&
  774. (raid->regTypeReqOnRead != REGION_TYPE_UNUSED))))
  775. pRAID_Context->reg_lock_flags = REGION_TYPE_EXCLUSIVE;
  776. else if (raid->level == 1) {
  777. /* Get alternate Pd. */
  778. physArm = physArm + 1;
  779. pd = MR_ArPdGet(arRef, physArm, map);
  780. if (pd != MR_PD_INVALID) {
  781. /* Get dev handle from Pd */
  782. *pDevHandle = MR_PdDevHandleGet(pd, map);
  783. *pPdInterface = MR_PdInterfaceTypeGet(pd, map);
  784. }
  785. }
  786. }
  787. *pdBlock += stripRef + le64_to_cpu(MR_LdSpanPtrGet(ld, span, map)->startBlk);
  788. if (instance->adapter_type == VENTURA_SERIES) {
  789. ((struct RAID_CONTEXT_G35 *)pRAID_Context)->span_arm =
  790. (span << RAID_CTX_SPANARM_SPAN_SHIFT) | physArm;
  791. io_info->span_arm =
  792. (span << RAID_CTX_SPANARM_SPAN_SHIFT) | physArm;
  793. } else {
  794. pRAID_Context->span_arm =
  795. (span << RAID_CTX_SPANARM_SPAN_SHIFT) | physArm;
  796. io_info->span_arm = pRAID_Context->span_arm;
  797. }
  798. io_info->pd_after_lb = pd;
  799. return retval;
  800. }
  801. /*
  802. ******************************************************************************
  803. *
  804. * MR_BuildRaidContext function
  805. *
  806. * This function will initiate command processing. The start/end row and strip
  807. * information is calculated then the lock is acquired.
  808. * This function will return 0 if region lock was acquired OR return num strips
  809. */
  810. u8
  811. MR_BuildRaidContext(struct megasas_instance *instance,
  812. struct IO_REQUEST_INFO *io_info,
  813. struct RAID_CONTEXT *pRAID_Context,
  814. struct MR_DRV_RAID_MAP_ALL *map, u8 **raidLUN)
  815. {
  816. struct fusion_context *fusion;
  817. struct MR_LD_RAID *raid;
  818. u32 stripSize, stripe_mask;
  819. u64 endLba, endStrip, endRow, start_row, start_strip;
  820. u64 regStart;
  821. u32 regSize;
  822. u8 num_strips, numRows;
  823. u16 ref_in_start_stripe, ref_in_end_stripe;
  824. u64 ldStartBlock;
  825. u32 numBlocks, ldTgtId;
  826. u8 isRead;
  827. u8 retval = 0;
  828. u8 startlba_span = SPAN_INVALID;
  829. u64 *pdBlock = &io_info->pdBlock;
  830. u16 ld;
  831. ldStartBlock = io_info->ldStartBlock;
  832. numBlocks = io_info->numBlocks;
  833. ldTgtId = io_info->ldTgtId;
  834. isRead = io_info->isRead;
  835. io_info->IoforUnevenSpan = 0;
  836. io_info->start_span = SPAN_INVALID;
  837. fusion = instance->ctrl_context;
  838. ld = MR_TargetIdToLdGet(ldTgtId, map);
  839. raid = MR_LdRaidGet(ld, map);
  840. /*check read ahead bit*/
  841. io_info->ra_capable = raid->capability.ra_capable;
  842. /*
  843. * if rowDataSize @RAID map and spanRowDataSize @SPAN INFO are zero
  844. * return FALSE
  845. */
  846. if (raid->rowDataSize == 0) {
  847. if (MR_LdSpanPtrGet(ld, 0, map)->spanRowDataSize == 0)
  848. return false;
  849. else if (instance->UnevenSpanSupport) {
  850. io_info->IoforUnevenSpan = 1;
  851. } else {
  852. dev_info(&instance->pdev->dev,
  853. "raid->rowDataSize is 0, but has SPAN[0]"
  854. "rowDataSize = 0x%0x,"
  855. "but there is _NO_ UnevenSpanSupport\n",
  856. MR_LdSpanPtrGet(ld, 0, map)->spanRowDataSize);
  857. return false;
  858. }
  859. }
  860. stripSize = 1 << raid->stripeShift;
  861. stripe_mask = stripSize-1;
  862. /*
  863. * calculate starting row and stripe, and number of strips and rows
  864. */
  865. start_strip = ldStartBlock >> raid->stripeShift;
  866. ref_in_start_stripe = (u16)(ldStartBlock & stripe_mask);
  867. endLba = ldStartBlock + numBlocks - 1;
  868. ref_in_end_stripe = (u16)(endLba & stripe_mask);
  869. endStrip = endLba >> raid->stripeShift;
  870. num_strips = (u8)(endStrip - start_strip + 1); /* End strip */
  871. if (io_info->IoforUnevenSpan) {
  872. start_row = get_row_from_strip(instance, ld, start_strip, map);
  873. endRow = get_row_from_strip(instance, ld, endStrip, map);
  874. if (start_row == -1ULL || endRow == -1ULL) {
  875. dev_info(&instance->pdev->dev, "return from %s %d."
  876. "Send IO w/o region lock.\n",
  877. __func__, __LINE__);
  878. return false;
  879. }
  880. if (raid->spanDepth == 1) {
  881. startlba_span = 0;
  882. *pdBlock = start_row << raid->stripeShift;
  883. } else
  884. startlba_span = (u8)mr_spanset_get_span_block(instance,
  885. ld, start_row, pdBlock, map);
  886. if (startlba_span == SPAN_INVALID) {
  887. dev_info(&instance->pdev->dev, "return from %s %d"
  888. "for row 0x%llx,start strip %llx"
  889. "endSrip %llx\n", __func__, __LINE__,
  890. (unsigned long long)start_row,
  891. (unsigned long long)start_strip,
  892. (unsigned long long)endStrip);
  893. return false;
  894. }
  895. io_info->start_span = startlba_span;
  896. io_info->start_row = start_row;
  897. } else {
  898. start_row = mega_div64_32(start_strip, raid->rowDataSize);
  899. endRow = mega_div64_32(endStrip, raid->rowDataSize);
  900. }
  901. numRows = (u8)(endRow - start_row + 1);
  902. /*
  903. * calculate region info.
  904. */
  905. /* assume region is at the start of the first row */
  906. regStart = start_row << raid->stripeShift;
  907. /* assume this IO needs the full row - we'll adjust if not true */
  908. regSize = stripSize;
  909. io_info->do_fp_rlbypass = raid->capability.fpBypassRegionLock;
  910. /* Check if we can send this I/O via FastPath */
  911. if (raid->capability.fpCapable) {
  912. if (isRead)
  913. io_info->fpOkForIo = (raid->capability.fpReadCapable &&
  914. ((num_strips == 1) ||
  915. raid->capability.
  916. fpReadAcrossStripe));
  917. else
  918. io_info->fpOkForIo = (raid->capability.fpWriteCapable &&
  919. ((num_strips == 1) ||
  920. raid->capability.
  921. fpWriteAcrossStripe));
  922. } else
  923. io_info->fpOkForIo = false;
  924. if (numRows == 1) {
  925. /* single-strip IOs can always lock only the data needed */
  926. if (num_strips == 1) {
  927. regStart += ref_in_start_stripe;
  928. regSize = numBlocks;
  929. }
  930. /* multi-strip IOs always need to full stripe locked */
  931. } else if (io_info->IoforUnevenSpan == 0) {
  932. /*
  933. * For Even span region lock optimization.
  934. * If the start strip is the last in the start row
  935. */
  936. if (start_strip == (start_row + 1) * raid->rowDataSize - 1) {
  937. regStart += ref_in_start_stripe;
  938. /* initialize count to sectors from startref to end
  939. of strip */
  940. regSize = stripSize - ref_in_start_stripe;
  941. }
  942. /* add complete rows in the middle of the transfer */
  943. if (numRows > 2)
  944. regSize += (numRows-2) << raid->stripeShift;
  945. /* if IO ends within first strip of last row*/
  946. if (endStrip == endRow*raid->rowDataSize)
  947. regSize += ref_in_end_stripe+1;
  948. else
  949. regSize += stripSize;
  950. } else {
  951. /*
  952. * For Uneven span region lock optimization.
  953. * If the start strip is the last in the start row
  954. */
  955. if (start_strip == (get_strip_from_row(instance, ld, start_row, map) +
  956. SPAN_ROW_DATA_SIZE(map, ld, startlba_span) - 1)) {
  957. regStart += ref_in_start_stripe;
  958. /* initialize count to sectors from
  959. * startRef to end of strip
  960. */
  961. regSize = stripSize - ref_in_start_stripe;
  962. }
  963. /* Add complete rows in the middle of the transfer*/
  964. if (numRows > 2)
  965. /* Add complete rows in the middle of the transfer*/
  966. regSize += (numRows-2) << raid->stripeShift;
  967. /* if IO ends within first strip of last row */
  968. if (endStrip == get_strip_from_row(instance, ld, endRow, map))
  969. regSize += ref_in_end_stripe + 1;
  970. else
  971. regSize += stripSize;
  972. }
  973. pRAID_Context->timeout_value =
  974. cpu_to_le16(raid->fpIoTimeoutForLd ?
  975. raid->fpIoTimeoutForLd :
  976. map->raidMap.fpPdIoTimeoutSec);
  977. if (instance->adapter_type == INVADER_SERIES)
  978. pRAID_Context->reg_lock_flags = (isRead) ?
  979. raid->regTypeReqOnRead : raid->regTypeReqOnWrite;
  980. else if (instance->adapter_type == THUNDERBOLT_SERIES)
  981. pRAID_Context->reg_lock_flags = (isRead) ?
  982. REGION_TYPE_SHARED_READ : raid->regTypeReqOnWrite;
  983. pRAID_Context->virtual_disk_tgt_id = raid->targetId;
  984. pRAID_Context->reg_lock_row_lba = cpu_to_le64(regStart);
  985. pRAID_Context->reg_lock_length = cpu_to_le32(regSize);
  986. pRAID_Context->config_seq_num = raid->seqNum;
  987. /* save pointer to raid->LUN array */
  988. *raidLUN = raid->LUN;
  989. /*Get Phy Params only if FP capable, or else leave it to MR firmware
  990. to do the calculation.*/
  991. if (io_info->fpOkForIo) {
  992. retval = io_info->IoforUnevenSpan ?
  993. mr_spanset_get_phy_params(instance, ld,
  994. start_strip, ref_in_start_stripe,
  995. io_info, pRAID_Context, map) :
  996. MR_GetPhyParams(instance, ld, start_strip,
  997. ref_in_start_stripe, io_info,
  998. pRAID_Context, map);
  999. /* If IO on an invalid Pd, then FP is not possible.*/
  1000. if (io_info->devHandle == MR_DEVHANDLE_INVALID)
  1001. io_info->fpOkForIo = false;
  1002. return retval;
  1003. } else if (isRead) {
  1004. uint stripIdx;
  1005. for (stripIdx = 0; stripIdx < num_strips; stripIdx++) {
  1006. retval = io_info->IoforUnevenSpan ?
  1007. mr_spanset_get_phy_params(instance, ld,
  1008. start_strip + stripIdx,
  1009. ref_in_start_stripe, io_info,
  1010. pRAID_Context, map) :
  1011. MR_GetPhyParams(instance, ld,
  1012. start_strip + stripIdx, ref_in_start_stripe,
  1013. io_info, pRAID_Context, map);
  1014. if (!retval)
  1015. return true;
  1016. }
  1017. }
  1018. return true;
  1019. }
  1020. /*
  1021. ******************************************************************************
  1022. *
  1023. * This routine pepare spanset info from Valid Raid map and store it into
  1024. * local copy of ldSpanInfo per instance data structure.
  1025. *
  1026. * Inputs :
  1027. * map - LD map
  1028. * ldSpanInfo - ldSpanInfo per HBA instance
  1029. *
  1030. */
  1031. void mr_update_span_set(struct MR_DRV_RAID_MAP_ALL *map,
  1032. PLD_SPAN_INFO ldSpanInfo)
  1033. {
  1034. u8 span, count;
  1035. u32 element, span_row_width;
  1036. u64 span_row;
  1037. struct MR_LD_RAID *raid;
  1038. LD_SPAN_SET *span_set, *span_set_prev;
  1039. struct MR_QUAD_ELEMENT *quad;
  1040. int ldCount;
  1041. u16 ld;
  1042. for (ldCount = 0; ldCount < MAX_LOGICAL_DRIVES_EXT; ldCount++) {
  1043. ld = MR_TargetIdToLdGet(ldCount, map);
  1044. if (ld >= (MAX_LOGICAL_DRIVES_EXT - 1))
  1045. continue;
  1046. raid = MR_LdRaidGet(ld, map);
  1047. for (element = 0; element < MAX_QUAD_DEPTH; element++) {
  1048. for (span = 0; span < raid->spanDepth; span++) {
  1049. if (le32_to_cpu(map->raidMap.ldSpanMap[ld].spanBlock[span].
  1050. block_span_info.noElements) <
  1051. element + 1)
  1052. continue;
  1053. span_set = &(ldSpanInfo[ld].span_set[element]);
  1054. quad = &map->raidMap.ldSpanMap[ld].
  1055. spanBlock[span].block_span_info.
  1056. quad[element];
  1057. span_set->diff = le32_to_cpu(quad->diff);
  1058. for (count = 0, span_row_width = 0;
  1059. count < raid->spanDepth; count++) {
  1060. if (le32_to_cpu(map->raidMap.ldSpanMap[ld].
  1061. spanBlock[count].
  1062. block_span_info.
  1063. noElements) >= element + 1) {
  1064. span_set->strip_offset[count] =
  1065. span_row_width;
  1066. span_row_width +=
  1067. MR_LdSpanPtrGet
  1068. (ld, count, map)->spanRowDataSize;
  1069. }
  1070. }
  1071. span_set->span_row_data_width = span_row_width;
  1072. span_row = mega_div64_32(((le64_to_cpu(quad->logEnd) -
  1073. le64_to_cpu(quad->logStart)) + le32_to_cpu(quad->diff)),
  1074. le32_to_cpu(quad->diff));
  1075. if (element == 0) {
  1076. span_set->log_start_lba = 0;
  1077. span_set->log_end_lba =
  1078. ((span_row << raid->stripeShift)
  1079. * span_row_width) - 1;
  1080. span_set->span_row_start = 0;
  1081. span_set->span_row_end = span_row - 1;
  1082. span_set->data_strip_start = 0;
  1083. span_set->data_strip_end =
  1084. (span_row * span_row_width) - 1;
  1085. span_set->data_row_start = 0;
  1086. span_set->data_row_end =
  1087. (span_row * le32_to_cpu(quad->diff)) - 1;
  1088. } else {
  1089. span_set_prev = &(ldSpanInfo[ld].
  1090. span_set[element - 1]);
  1091. span_set->log_start_lba =
  1092. span_set_prev->log_end_lba + 1;
  1093. span_set->log_end_lba =
  1094. span_set->log_start_lba +
  1095. ((span_row << raid->stripeShift)
  1096. * span_row_width) - 1;
  1097. span_set->span_row_start =
  1098. span_set_prev->span_row_end + 1;
  1099. span_set->span_row_end =
  1100. span_set->span_row_start + span_row - 1;
  1101. span_set->data_strip_start =
  1102. span_set_prev->data_strip_end + 1;
  1103. span_set->data_strip_end =
  1104. span_set->data_strip_start +
  1105. (span_row * span_row_width) - 1;
  1106. span_set->data_row_start =
  1107. span_set_prev->data_row_end + 1;
  1108. span_set->data_row_end =
  1109. span_set->data_row_start +
  1110. (span_row * le32_to_cpu(quad->diff)) - 1;
  1111. }
  1112. break;
  1113. }
  1114. if (span == raid->spanDepth)
  1115. break;
  1116. }
  1117. }
  1118. }
  1119. void mr_update_load_balance_params(struct MR_DRV_RAID_MAP_ALL *drv_map,
  1120. struct LD_LOAD_BALANCE_INFO *lbInfo)
  1121. {
  1122. int ldCount;
  1123. u16 ld;
  1124. struct MR_LD_RAID *raid;
  1125. if (lb_pending_cmds > 128 || lb_pending_cmds < 1)
  1126. lb_pending_cmds = LB_PENDING_CMDS_DEFAULT;
  1127. for (ldCount = 0; ldCount < MAX_LOGICAL_DRIVES_EXT; ldCount++) {
  1128. ld = MR_TargetIdToLdGet(ldCount, drv_map);
  1129. if (ld >= MAX_LOGICAL_DRIVES_EXT - 1) {
  1130. lbInfo[ldCount].loadBalanceFlag = 0;
  1131. continue;
  1132. }
  1133. raid = MR_LdRaidGet(ld, drv_map);
  1134. if ((raid->level != 1) ||
  1135. (raid->ldState != MR_LD_STATE_OPTIMAL)) {
  1136. lbInfo[ldCount].loadBalanceFlag = 0;
  1137. continue;
  1138. }
  1139. lbInfo[ldCount].loadBalanceFlag = 1;
  1140. }
  1141. }
  1142. u8 megasas_get_best_arm_pd(struct megasas_instance *instance,
  1143. struct LD_LOAD_BALANCE_INFO *lbInfo,
  1144. struct IO_REQUEST_INFO *io_info,
  1145. struct MR_DRV_RAID_MAP_ALL *drv_map)
  1146. {
  1147. struct MR_LD_RAID *raid;
  1148. u16 pd1_dev_handle;
  1149. u16 pend0, pend1, ld;
  1150. u64 diff0, diff1;
  1151. u8 bestArm, pd0, pd1, span, arm;
  1152. u32 arRef, span_row_size;
  1153. u64 block = io_info->ldStartBlock;
  1154. u32 count = io_info->numBlocks;
  1155. span = ((io_info->span_arm & RAID_CTX_SPANARM_SPAN_MASK)
  1156. >> RAID_CTX_SPANARM_SPAN_SHIFT);
  1157. arm = (io_info->span_arm & RAID_CTX_SPANARM_ARM_MASK);
  1158. ld = MR_TargetIdToLdGet(io_info->ldTgtId, drv_map);
  1159. raid = MR_LdRaidGet(ld, drv_map);
  1160. span_row_size = instance->UnevenSpanSupport ?
  1161. SPAN_ROW_SIZE(drv_map, ld, span) : raid->rowSize;
  1162. arRef = MR_LdSpanArrayGet(ld, span, drv_map);
  1163. pd0 = MR_ArPdGet(arRef, arm, drv_map);
  1164. pd1 = MR_ArPdGet(arRef, (arm + 1) >= span_row_size ?
  1165. (arm + 1 - span_row_size) : arm + 1, drv_map);
  1166. /* Get PD1 Dev Handle */
  1167. pd1_dev_handle = MR_PdDevHandleGet(pd1, drv_map);
  1168. if (pd1_dev_handle == MR_DEVHANDLE_INVALID) {
  1169. bestArm = arm;
  1170. } else {
  1171. /* get the pending cmds for the data and mirror arms */
  1172. pend0 = atomic_read(&lbInfo->scsi_pending_cmds[pd0]);
  1173. pend1 = atomic_read(&lbInfo->scsi_pending_cmds[pd1]);
  1174. /* Determine the disk whose head is nearer to the req. block */
  1175. diff0 = ABS_DIFF(block, lbInfo->last_accessed_block[pd0]);
  1176. diff1 = ABS_DIFF(block, lbInfo->last_accessed_block[pd1]);
  1177. bestArm = (diff0 <= diff1 ? arm : arm ^ 1);
  1178. /* Make balance count from 16 to 4 to
  1179. * keep driver in sync with Firmware
  1180. */
  1181. if ((bestArm == arm && pend0 > pend1 + lb_pending_cmds) ||
  1182. (bestArm != arm && pend1 > pend0 + lb_pending_cmds))
  1183. bestArm ^= 1;
  1184. /* Update the last accessed block on the correct pd */
  1185. io_info->span_arm =
  1186. (span << RAID_CTX_SPANARM_SPAN_SHIFT) | bestArm;
  1187. io_info->pd_after_lb = (bestArm == arm) ? pd0 : pd1;
  1188. }
  1189. lbInfo->last_accessed_block[io_info->pd_after_lb] = block + count - 1;
  1190. return io_info->pd_after_lb;
  1191. }
  1192. __le16 get_updated_dev_handle(struct megasas_instance *instance,
  1193. struct LD_LOAD_BALANCE_INFO *lbInfo,
  1194. struct IO_REQUEST_INFO *io_info,
  1195. struct MR_DRV_RAID_MAP_ALL *drv_map)
  1196. {
  1197. u8 arm_pd;
  1198. __le16 devHandle;
  1199. /* get best new arm (PD ID) */
  1200. arm_pd = megasas_get_best_arm_pd(instance, lbInfo, io_info, drv_map);
  1201. devHandle = MR_PdDevHandleGet(arm_pd, drv_map);
  1202. io_info->pd_interface = MR_PdInterfaceTypeGet(arm_pd, drv_map);
  1203. atomic_inc(&lbInfo->scsi_pending_cmds[arm_pd]);
  1204. return devHandle;
  1205. }