rtc-rs5c372.c 17 KB

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  1. /*
  2. * An I2C driver for Ricoh RS5C372, R2025S/D and RV5C38[67] RTCs
  3. *
  4. * Copyright (C) 2005 Pavel Mironchik <pmironchik@optifacio.net>
  5. * Copyright (C) 2006 Tower Technologies
  6. * Copyright (C) 2008 Paul Mundt
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. #include <linux/i2c.h>
  13. #include <linux/rtc.h>
  14. #include <linux/bcd.h>
  15. #include <linux/slab.h>
  16. #include <linux/module.h>
  17. #include <linux/of_device.h>
  18. /*
  19. * Ricoh has a family of I2C based RTCs, which differ only slightly from
  20. * each other. Differences center on pinout (e.g. how many interrupts,
  21. * output clock, etc) and how the control registers are used. The '372
  22. * is significant only because that's the one this driver first supported.
  23. */
  24. #define RS5C372_REG_SECS 0
  25. #define RS5C372_REG_MINS 1
  26. #define RS5C372_REG_HOURS 2
  27. #define RS5C372_REG_WDAY 3
  28. #define RS5C372_REG_DAY 4
  29. #define RS5C372_REG_MONTH 5
  30. #define RS5C372_REG_YEAR 6
  31. #define RS5C372_REG_TRIM 7
  32. # define RS5C372_TRIM_XSL 0x80
  33. # define RS5C372_TRIM_MASK 0x7F
  34. #define RS5C_REG_ALARM_A_MIN 8 /* or ALARM_W */
  35. #define RS5C_REG_ALARM_A_HOURS 9
  36. #define RS5C_REG_ALARM_A_WDAY 10
  37. #define RS5C_REG_ALARM_B_MIN 11 /* or ALARM_D */
  38. #define RS5C_REG_ALARM_B_HOURS 12
  39. #define RS5C_REG_ALARM_B_WDAY 13 /* (ALARM_B only) */
  40. #define RS5C_REG_CTRL1 14
  41. # define RS5C_CTRL1_AALE (1 << 7) /* or WALE */
  42. # define RS5C_CTRL1_BALE (1 << 6) /* or DALE */
  43. # define RV5C387_CTRL1_24 (1 << 5)
  44. # define RS5C372A_CTRL1_SL1 (1 << 5)
  45. # define RS5C_CTRL1_CT_MASK (7 << 0)
  46. # define RS5C_CTRL1_CT0 (0 << 0) /* no periodic irq */
  47. # define RS5C_CTRL1_CT4 (4 << 0) /* 1 Hz level irq */
  48. #define RS5C_REG_CTRL2 15
  49. # define RS5C372_CTRL2_24 (1 << 5)
  50. # define R2025_CTRL2_XST (1 << 5)
  51. # define RS5C_CTRL2_XSTP (1 << 4) /* only if !R2025S/D */
  52. # define RS5C_CTRL2_CTFG (1 << 2)
  53. # define RS5C_CTRL2_AAFG (1 << 1) /* or WAFG */
  54. # define RS5C_CTRL2_BAFG (1 << 0) /* or DAFG */
  55. /* to read (style 1) or write registers starting at R */
  56. #define RS5C_ADDR(R) (((R) << 4) | 0)
  57. enum rtc_type {
  58. rtc_undef = 0,
  59. rtc_r2025sd,
  60. rtc_r2221tl,
  61. rtc_rs5c372a,
  62. rtc_rs5c372b,
  63. rtc_rv5c386,
  64. rtc_rv5c387a,
  65. };
  66. static const struct i2c_device_id rs5c372_id[] = {
  67. { "r2025sd", rtc_r2025sd },
  68. { "r2221tl", rtc_r2221tl },
  69. { "rs5c372a", rtc_rs5c372a },
  70. { "rs5c372b", rtc_rs5c372b },
  71. { "rv5c386", rtc_rv5c386 },
  72. { "rv5c387a", rtc_rv5c387a },
  73. { }
  74. };
  75. MODULE_DEVICE_TABLE(i2c, rs5c372_id);
  76. static const struct of_device_id rs5c372_of_match[] = {
  77. {
  78. .compatible = "ricoh,r2025sd",
  79. .data = (void *)rtc_r2025sd
  80. },
  81. {
  82. .compatible = "ricoh,r2221tl",
  83. .data = (void *)rtc_r2221tl
  84. },
  85. {
  86. .compatible = "ricoh,rs5c372a",
  87. .data = (void *)rtc_rs5c372a
  88. },
  89. {
  90. .compatible = "ricoh,rs5c372b",
  91. .data = (void *)rtc_rs5c372b
  92. },
  93. {
  94. .compatible = "ricoh,rv5c386",
  95. .data = (void *)rtc_rv5c386
  96. },
  97. {
  98. .compatible = "ricoh,rv5c387a",
  99. .data = (void *)rtc_rv5c387a
  100. },
  101. { }
  102. };
  103. MODULE_DEVICE_TABLE(of, rs5c372_of_match);
  104. /* REVISIT: this assumes that:
  105. * - we're in the 21st century, so it's safe to ignore the century
  106. * bit for rv5c38[67] (REG_MONTH bit 7);
  107. * - we should use ALARM_A not ALARM_B (may be wrong on some boards)
  108. */
  109. struct rs5c372 {
  110. struct i2c_client *client;
  111. struct rtc_device *rtc;
  112. enum rtc_type type;
  113. unsigned time24:1;
  114. unsigned has_irq:1;
  115. unsigned smbus:1;
  116. char buf[17];
  117. char *regs;
  118. };
  119. static int rs5c_get_regs(struct rs5c372 *rs5c)
  120. {
  121. struct i2c_client *client = rs5c->client;
  122. struct i2c_msg msgs[] = {
  123. {
  124. .addr = client->addr,
  125. .flags = I2C_M_RD,
  126. .len = sizeof(rs5c->buf),
  127. .buf = rs5c->buf
  128. },
  129. };
  130. /* This implements the third reading method from the datasheet, using
  131. * an internal address that's reset after each transaction (by STOP)
  132. * to 0x0f ... so we read extra registers, and skip the first one.
  133. *
  134. * The first method doesn't work with the iop3xx adapter driver, on at
  135. * least 80219 chips; this works around that bug.
  136. *
  137. * The third method on the other hand doesn't work for the SMBus-only
  138. * configurations, so we use the the first method there, stripping off
  139. * the extra register in the process.
  140. */
  141. if (rs5c->smbus) {
  142. int addr = RS5C_ADDR(RS5C372_REG_SECS);
  143. int size = sizeof(rs5c->buf) - 1;
  144. if (i2c_smbus_read_i2c_block_data(client, addr, size,
  145. rs5c->buf + 1) != size) {
  146. dev_warn(&client->dev, "can't read registers\n");
  147. return -EIO;
  148. }
  149. } else {
  150. if ((i2c_transfer(client->adapter, msgs, 1)) != 1) {
  151. dev_warn(&client->dev, "can't read registers\n");
  152. return -EIO;
  153. }
  154. }
  155. dev_dbg(&client->dev,
  156. "%3ph (%02x) %3ph (%02x), %3ph, %3ph; %02x %02x\n",
  157. rs5c->regs + 0, rs5c->regs[3],
  158. rs5c->regs + 4, rs5c->regs[7],
  159. rs5c->regs + 8, rs5c->regs + 11,
  160. rs5c->regs[14], rs5c->regs[15]);
  161. return 0;
  162. }
  163. static unsigned rs5c_reg2hr(struct rs5c372 *rs5c, unsigned reg)
  164. {
  165. unsigned hour;
  166. if (rs5c->time24)
  167. return bcd2bin(reg & 0x3f);
  168. hour = bcd2bin(reg & 0x1f);
  169. if (hour == 12)
  170. hour = 0;
  171. if (reg & 0x20)
  172. hour += 12;
  173. return hour;
  174. }
  175. static unsigned rs5c_hr2reg(struct rs5c372 *rs5c, unsigned hour)
  176. {
  177. if (rs5c->time24)
  178. return bin2bcd(hour);
  179. if (hour > 12)
  180. return 0x20 | bin2bcd(hour - 12);
  181. if (hour == 12)
  182. return 0x20 | bin2bcd(12);
  183. if (hour == 0)
  184. return bin2bcd(12);
  185. return bin2bcd(hour);
  186. }
  187. static int rs5c372_rtc_read_time(struct device *dev, struct rtc_time *tm)
  188. {
  189. struct i2c_client *client = to_i2c_client(dev);
  190. struct rs5c372 *rs5c = i2c_get_clientdata(client);
  191. int status = rs5c_get_regs(rs5c);
  192. if (status < 0)
  193. return status;
  194. tm->tm_sec = bcd2bin(rs5c->regs[RS5C372_REG_SECS] & 0x7f);
  195. tm->tm_min = bcd2bin(rs5c->regs[RS5C372_REG_MINS] & 0x7f);
  196. tm->tm_hour = rs5c_reg2hr(rs5c, rs5c->regs[RS5C372_REG_HOURS]);
  197. tm->tm_wday = bcd2bin(rs5c->regs[RS5C372_REG_WDAY] & 0x07);
  198. tm->tm_mday = bcd2bin(rs5c->regs[RS5C372_REG_DAY] & 0x3f);
  199. /* tm->tm_mon is zero-based */
  200. tm->tm_mon = bcd2bin(rs5c->regs[RS5C372_REG_MONTH] & 0x1f) - 1;
  201. /* year is 1900 + tm->tm_year */
  202. tm->tm_year = bcd2bin(rs5c->regs[RS5C372_REG_YEAR]) + 100;
  203. dev_dbg(&client->dev, "%s: tm is secs=%d, mins=%d, hours=%d, "
  204. "mday=%d, mon=%d, year=%d, wday=%d\n",
  205. __func__,
  206. tm->tm_sec, tm->tm_min, tm->tm_hour,
  207. tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday);
  208. return 0;
  209. }
  210. static int rs5c372_rtc_set_time(struct device *dev, struct rtc_time *tm)
  211. {
  212. struct i2c_client *client = to_i2c_client(dev);
  213. struct rs5c372 *rs5c = i2c_get_clientdata(client);
  214. unsigned char buf[7];
  215. int addr;
  216. dev_dbg(&client->dev, "%s: tm is secs=%d, mins=%d, hours=%d "
  217. "mday=%d, mon=%d, year=%d, wday=%d\n",
  218. __func__,
  219. tm->tm_sec, tm->tm_min, tm->tm_hour,
  220. tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday);
  221. addr = RS5C_ADDR(RS5C372_REG_SECS);
  222. buf[0] = bin2bcd(tm->tm_sec);
  223. buf[1] = bin2bcd(tm->tm_min);
  224. buf[2] = rs5c_hr2reg(rs5c, tm->tm_hour);
  225. buf[3] = bin2bcd(tm->tm_wday);
  226. buf[4] = bin2bcd(tm->tm_mday);
  227. buf[5] = bin2bcd(tm->tm_mon + 1);
  228. buf[6] = bin2bcd(tm->tm_year - 100);
  229. if (i2c_smbus_write_i2c_block_data(client, addr, sizeof(buf), buf) < 0) {
  230. dev_err(&client->dev, "%s: write error\n", __func__);
  231. return -EIO;
  232. }
  233. return 0;
  234. }
  235. #if IS_ENABLED(CONFIG_RTC_INTF_PROC)
  236. #define NEED_TRIM
  237. #endif
  238. #if IS_ENABLED(CONFIG_RTC_INTF_SYSFS)
  239. #define NEED_TRIM
  240. #endif
  241. #ifdef NEED_TRIM
  242. static int rs5c372_get_trim(struct i2c_client *client, int *osc, int *trim)
  243. {
  244. struct rs5c372 *rs5c372 = i2c_get_clientdata(client);
  245. u8 tmp = rs5c372->regs[RS5C372_REG_TRIM];
  246. if (osc)
  247. *osc = (tmp & RS5C372_TRIM_XSL) ? 32000 : 32768;
  248. if (trim) {
  249. dev_dbg(&client->dev, "%s: raw trim=%x\n", __func__, tmp);
  250. tmp &= RS5C372_TRIM_MASK;
  251. if (tmp & 0x3e) {
  252. int t = tmp & 0x3f;
  253. if (tmp & 0x40)
  254. t = (~t | (s8)0xc0) + 1;
  255. else
  256. t = t - 1;
  257. tmp = t * 2;
  258. } else
  259. tmp = 0;
  260. *trim = tmp;
  261. }
  262. return 0;
  263. }
  264. #endif
  265. static int rs5c_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
  266. {
  267. struct i2c_client *client = to_i2c_client(dev);
  268. struct rs5c372 *rs5c = i2c_get_clientdata(client);
  269. unsigned char buf;
  270. int status, addr;
  271. buf = rs5c->regs[RS5C_REG_CTRL1];
  272. if (!rs5c->has_irq)
  273. return -EINVAL;
  274. status = rs5c_get_regs(rs5c);
  275. if (status < 0)
  276. return status;
  277. addr = RS5C_ADDR(RS5C_REG_CTRL1);
  278. if (enabled)
  279. buf |= RS5C_CTRL1_AALE;
  280. else
  281. buf &= ~RS5C_CTRL1_AALE;
  282. if (i2c_smbus_write_byte_data(client, addr, buf) < 0) {
  283. dev_warn(dev, "can't update alarm\n");
  284. status = -EIO;
  285. } else
  286. rs5c->regs[RS5C_REG_CTRL1] = buf;
  287. return status;
  288. }
  289. /* NOTE: Since RTC_WKALM_{RD,SET} were originally defined for EFI,
  290. * which only exposes a polled programming interface; and since
  291. * these calls map directly to those EFI requests; we don't demand
  292. * we have an IRQ for this chip when we go through this API.
  293. *
  294. * The older x86_pc derived RTC_ALM_{READ,SET} calls require irqs
  295. * though, managed through RTC_AIE_{ON,OFF} requests.
  296. */
  297. static int rs5c_read_alarm(struct device *dev, struct rtc_wkalrm *t)
  298. {
  299. struct i2c_client *client = to_i2c_client(dev);
  300. struct rs5c372 *rs5c = i2c_get_clientdata(client);
  301. int status;
  302. status = rs5c_get_regs(rs5c);
  303. if (status < 0)
  304. return status;
  305. /* report alarm time */
  306. t->time.tm_sec = 0;
  307. t->time.tm_min = bcd2bin(rs5c->regs[RS5C_REG_ALARM_A_MIN] & 0x7f);
  308. t->time.tm_hour = rs5c_reg2hr(rs5c, rs5c->regs[RS5C_REG_ALARM_A_HOURS]);
  309. /* ... and status */
  310. t->enabled = !!(rs5c->regs[RS5C_REG_CTRL1] & RS5C_CTRL1_AALE);
  311. t->pending = !!(rs5c->regs[RS5C_REG_CTRL2] & RS5C_CTRL2_AAFG);
  312. return 0;
  313. }
  314. static int rs5c_set_alarm(struct device *dev, struct rtc_wkalrm *t)
  315. {
  316. struct i2c_client *client = to_i2c_client(dev);
  317. struct rs5c372 *rs5c = i2c_get_clientdata(client);
  318. int status, addr, i;
  319. unsigned char buf[3];
  320. /* only handle up to 24 hours in the future, like RTC_ALM_SET */
  321. if (t->time.tm_mday != -1
  322. || t->time.tm_mon != -1
  323. || t->time.tm_year != -1)
  324. return -EINVAL;
  325. /* REVISIT: round up tm_sec */
  326. /* if needed, disable irq (clears pending status) */
  327. status = rs5c_get_regs(rs5c);
  328. if (status < 0)
  329. return status;
  330. if (rs5c->regs[RS5C_REG_CTRL1] & RS5C_CTRL1_AALE) {
  331. addr = RS5C_ADDR(RS5C_REG_CTRL1);
  332. buf[0] = rs5c->regs[RS5C_REG_CTRL1] & ~RS5C_CTRL1_AALE;
  333. if (i2c_smbus_write_byte_data(client, addr, buf[0]) < 0) {
  334. dev_dbg(dev, "can't disable alarm\n");
  335. return -EIO;
  336. }
  337. rs5c->regs[RS5C_REG_CTRL1] = buf[0];
  338. }
  339. /* set alarm */
  340. buf[0] = bin2bcd(t->time.tm_min);
  341. buf[1] = rs5c_hr2reg(rs5c, t->time.tm_hour);
  342. buf[2] = 0x7f; /* any/all days */
  343. for (i = 0; i < sizeof(buf); i++) {
  344. addr = RS5C_ADDR(RS5C_REG_ALARM_A_MIN + i);
  345. if (i2c_smbus_write_byte_data(client, addr, buf[i]) < 0) {
  346. dev_dbg(dev, "can't set alarm time\n");
  347. return -EIO;
  348. }
  349. }
  350. /* ... and maybe enable its irq */
  351. if (t->enabled) {
  352. addr = RS5C_ADDR(RS5C_REG_CTRL1);
  353. buf[0] = rs5c->regs[RS5C_REG_CTRL1] | RS5C_CTRL1_AALE;
  354. if (i2c_smbus_write_byte_data(client, addr, buf[0]) < 0)
  355. dev_warn(dev, "can't enable alarm\n");
  356. rs5c->regs[RS5C_REG_CTRL1] = buf[0];
  357. }
  358. return 0;
  359. }
  360. #if IS_ENABLED(CONFIG_RTC_INTF_PROC)
  361. static int rs5c372_rtc_proc(struct device *dev, struct seq_file *seq)
  362. {
  363. int err, osc, trim;
  364. err = rs5c372_get_trim(to_i2c_client(dev), &osc, &trim);
  365. if (err == 0) {
  366. seq_printf(seq, "crystal\t\t: %d.%03d KHz\n",
  367. osc / 1000, osc % 1000);
  368. seq_printf(seq, "trim\t\t: %d\n", trim);
  369. }
  370. return 0;
  371. }
  372. #else
  373. #define rs5c372_rtc_proc NULL
  374. #endif
  375. static const struct rtc_class_ops rs5c372_rtc_ops = {
  376. .proc = rs5c372_rtc_proc,
  377. .read_time = rs5c372_rtc_read_time,
  378. .set_time = rs5c372_rtc_set_time,
  379. .read_alarm = rs5c_read_alarm,
  380. .set_alarm = rs5c_set_alarm,
  381. .alarm_irq_enable = rs5c_rtc_alarm_irq_enable,
  382. };
  383. #if IS_ENABLED(CONFIG_RTC_INTF_SYSFS)
  384. static ssize_t rs5c372_sysfs_show_trim(struct device *dev,
  385. struct device_attribute *attr, char *buf)
  386. {
  387. int err, trim;
  388. err = rs5c372_get_trim(to_i2c_client(dev), NULL, &trim);
  389. if (err)
  390. return err;
  391. return sprintf(buf, "%d\n", trim);
  392. }
  393. static DEVICE_ATTR(trim, S_IRUGO, rs5c372_sysfs_show_trim, NULL);
  394. static ssize_t rs5c372_sysfs_show_osc(struct device *dev,
  395. struct device_attribute *attr, char *buf)
  396. {
  397. int err, osc;
  398. err = rs5c372_get_trim(to_i2c_client(dev), &osc, NULL);
  399. if (err)
  400. return err;
  401. return sprintf(buf, "%d.%03d KHz\n", osc / 1000, osc % 1000);
  402. }
  403. static DEVICE_ATTR(osc, S_IRUGO, rs5c372_sysfs_show_osc, NULL);
  404. static int rs5c_sysfs_register(struct device *dev)
  405. {
  406. int err;
  407. err = device_create_file(dev, &dev_attr_trim);
  408. if (err)
  409. return err;
  410. err = device_create_file(dev, &dev_attr_osc);
  411. if (err)
  412. device_remove_file(dev, &dev_attr_trim);
  413. return err;
  414. }
  415. static void rs5c_sysfs_unregister(struct device *dev)
  416. {
  417. device_remove_file(dev, &dev_attr_trim);
  418. device_remove_file(dev, &dev_attr_osc);
  419. }
  420. #else
  421. static int rs5c_sysfs_register(struct device *dev)
  422. {
  423. return 0;
  424. }
  425. static void rs5c_sysfs_unregister(struct device *dev)
  426. {
  427. /* nothing */
  428. }
  429. #endif /* SYSFS */
  430. static struct i2c_driver rs5c372_driver;
  431. static int rs5c_oscillator_setup(struct rs5c372 *rs5c372)
  432. {
  433. unsigned char buf[2];
  434. int addr, i, ret = 0;
  435. if (rs5c372->type == rtc_r2025sd) {
  436. if (rs5c372->regs[RS5C_REG_CTRL2] & R2025_CTRL2_XST)
  437. return ret;
  438. rs5c372->regs[RS5C_REG_CTRL2] |= R2025_CTRL2_XST;
  439. } else {
  440. if (!(rs5c372->regs[RS5C_REG_CTRL2] & RS5C_CTRL2_XSTP))
  441. return ret;
  442. rs5c372->regs[RS5C_REG_CTRL2] &= ~RS5C_CTRL2_XSTP;
  443. }
  444. addr = RS5C_ADDR(RS5C_REG_CTRL1);
  445. buf[0] = rs5c372->regs[RS5C_REG_CTRL1];
  446. buf[1] = rs5c372->regs[RS5C_REG_CTRL2];
  447. /* use 24hr mode */
  448. switch (rs5c372->type) {
  449. case rtc_rs5c372a:
  450. case rtc_rs5c372b:
  451. buf[1] |= RS5C372_CTRL2_24;
  452. rs5c372->time24 = 1;
  453. break;
  454. case rtc_r2025sd:
  455. case rtc_r2221tl:
  456. case rtc_rv5c386:
  457. case rtc_rv5c387a:
  458. buf[0] |= RV5C387_CTRL1_24;
  459. rs5c372->time24 = 1;
  460. break;
  461. default:
  462. /* impossible */
  463. break;
  464. }
  465. for (i = 0; i < sizeof(buf); i++) {
  466. addr = RS5C_ADDR(RS5C_REG_CTRL1 + i);
  467. ret = i2c_smbus_write_byte_data(rs5c372->client, addr, buf[i]);
  468. if (unlikely(ret < 0))
  469. return ret;
  470. }
  471. rs5c372->regs[RS5C_REG_CTRL1] = buf[0];
  472. rs5c372->regs[RS5C_REG_CTRL2] = buf[1];
  473. return 0;
  474. }
  475. static int rs5c372_probe(struct i2c_client *client,
  476. const struct i2c_device_id *id)
  477. {
  478. int err = 0;
  479. int smbus_mode = 0;
  480. struct rs5c372 *rs5c372;
  481. dev_dbg(&client->dev, "%s\n", __func__);
  482. if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C |
  483. I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_I2C_BLOCK)) {
  484. /*
  485. * If we don't have any master mode adapter, try breaking
  486. * it down in to the barest of capabilities.
  487. */
  488. if (i2c_check_functionality(client->adapter,
  489. I2C_FUNC_SMBUS_BYTE_DATA |
  490. I2C_FUNC_SMBUS_I2C_BLOCK))
  491. smbus_mode = 1;
  492. else {
  493. /* Still no good, give up */
  494. err = -ENODEV;
  495. goto exit;
  496. }
  497. }
  498. rs5c372 = devm_kzalloc(&client->dev, sizeof(struct rs5c372),
  499. GFP_KERNEL);
  500. if (!rs5c372) {
  501. err = -ENOMEM;
  502. goto exit;
  503. }
  504. rs5c372->client = client;
  505. i2c_set_clientdata(client, rs5c372);
  506. if (client->dev.of_node)
  507. rs5c372->type = (enum rtc_type)
  508. of_device_get_match_data(&client->dev);
  509. else
  510. rs5c372->type = id->driver_data;
  511. /* we read registers 0x0f then 0x00-0x0f; skip the first one */
  512. rs5c372->regs = &rs5c372->buf[1];
  513. rs5c372->smbus = smbus_mode;
  514. err = rs5c_get_regs(rs5c372);
  515. if (err < 0)
  516. goto exit;
  517. /* clock may be set for am/pm or 24 hr time */
  518. switch (rs5c372->type) {
  519. case rtc_rs5c372a:
  520. case rtc_rs5c372b:
  521. /* alarm uses ALARM_A; and nINTRA on 372a, nINTR on 372b.
  522. * so does periodic irq, except some 327a modes.
  523. */
  524. if (rs5c372->regs[RS5C_REG_CTRL2] & RS5C372_CTRL2_24)
  525. rs5c372->time24 = 1;
  526. break;
  527. case rtc_r2025sd:
  528. case rtc_r2221tl:
  529. case rtc_rv5c386:
  530. case rtc_rv5c387a:
  531. if (rs5c372->regs[RS5C_REG_CTRL1] & RV5C387_CTRL1_24)
  532. rs5c372->time24 = 1;
  533. /* alarm uses ALARM_W; and nINTRB for alarm and periodic
  534. * irq, on both 386 and 387
  535. */
  536. break;
  537. default:
  538. dev_err(&client->dev, "unknown RTC type\n");
  539. goto exit;
  540. }
  541. /* if the oscillator lost power and no other software (like
  542. * the bootloader) set it up, do it here.
  543. *
  544. * The R2025S/D does this a little differently than the other
  545. * parts, so we special case that..
  546. */
  547. err = rs5c_oscillator_setup(rs5c372);
  548. if (unlikely(err < 0)) {
  549. dev_err(&client->dev, "setup error\n");
  550. goto exit;
  551. }
  552. dev_info(&client->dev, "%s found, %s\n",
  553. ({ char *s; switch (rs5c372->type) {
  554. case rtc_r2025sd: s = "r2025sd"; break;
  555. case rtc_r2221tl: s = "r2221tl"; break;
  556. case rtc_rs5c372a: s = "rs5c372a"; break;
  557. case rtc_rs5c372b: s = "rs5c372b"; break;
  558. case rtc_rv5c386: s = "rv5c386"; break;
  559. case rtc_rv5c387a: s = "rv5c387a"; break;
  560. default: s = "chip"; break;
  561. }; s;}),
  562. rs5c372->time24 ? "24hr" : "am/pm"
  563. );
  564. /* REVISIT use client->irq to register alarm irq ... */
  565. rs5c372->rtc = devm_rtc_device_register(&client->dev,
  566. rs5c372_driver.driver.name,
  567. &rs5c372_rtc_ops, THIS_MODULE);
  568. if (IS_ERR(rs5c372->rtc)) {
  569. err = PTR_ERR(rs5c372->rtc);
  570. goto exit;
  571. }
  572. err = rs5c_sysfs_register(&client->dev);
  573. if (err)
  574. goto exit;
  575. return 0;
  576. exit:
  577. return err;
  578. }
  579. static int rs5c372_remove(struct i2c_client *client)
  580. {
  581. rs5c_sysfs_unregister(&client->dev);
  582. return 0;
  583. }
  584. static struct i2c_driver rs5c372_driver = {
  585. .driver = {
  586. .name = "rtc-rs5c372",
  587. .of_match_table = of_match_ptr(rs5c372_of_match),
  588. },
  589. .probe = rs5c372_probe,
  590. .remove = rs5c372_remove,
  591. .id_table = rs5c372_id,
  592. };
  593. module_i2c_driver(rs5c372_driver);
  594. MODULE_AUTHOR(
  595. "Pavel Mironchik <pmironchik@optifacio.net>, "
  596. "Alessandro Zummo <a.zummo@towertech.it>, "
  597. "Paul Mundt <lethal@linux-sh.org>");
  598. MODULE_DESCRIPTION("Ricoh RS5C372 RTC driver");
  599. MODULE_LICENSE("GPL");