rtc-m41t80.c 26 KB

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  1. /*
  2. * I2C client/driver for the ST M41T80 family of i2c rtc chips.
  3. *
  4. * Author: Alexander Bigga <ab@mycable.de>
  5. *
  6. * Based on m41t00.c by Mark A. Greer <mgreer@mvista.com>
  7. *
  8. * 2006 (c) mycable GmbH
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License version 2 as
  12. * published by the Free Software Foundation.
  13. *
  14. */
  15. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  16. #include <linux/bcd.h>
  17. #include <linux/clk-provider.h>
  18. #include <linux/i2c.h>
  19. #include <linux/init.h>
  20. #include <linux/kernel.h>
  21. #include <linux/module.h>
  22. #include <linux/of_device.h>
  23. #include <linux/rtc.h>
  24. #include <linux/slab.h>
  25. #include <linux/mutex.h>
  26. #include <linux/string.h>
  27. #ifdef CONFIG_RTC_DRV_M41T80_WDT
  28. #include <linux/fs.h>
  29. #include <linux/ioctl.h>
  30. #include <linux/miscdevice.h>
  31. #include <linux/reboot.h>
  32. #include <linux/watchdog.h>
  33. #endif
  34. #define M41T80_REG_SSEC 0x00
  35. #define M41T80_REG_SEC 0x01
  36. #define M41T80_REG_MIN 0x02
  37. #define M41T80_REG_HOUR 0x03
  38. #define M41T80_REG_WDAY 0x04
  39. #define M41T80_REG_DAY 0x05
  40. #define M41T80_REG_MON 0x06
  41. #define M41T80_REG_YEAR 0x07
  42. #define M41T80_REG_ALARM_MON 0x0a
  43. #define M41T80_REG_ALARM_DAY 0x0b
  44. #define M41T80_REG_ALARM_HOUR 0x0c
  45. #define M41T80_REG_ALARM_MIN 0x0d
  46. #define M41T80_REG_ALARM_SEC 0x0e
  47. #define M41T80_REG_FLAGS 0x0f
  48. #define M41T80_REG_SQW 0x13
  49. #define M41T80_DATETIME_REG_SIZE (M41T80_REG_YEAR + 1)
  50. #define M41T80_ALARM_REG_SIZE \
  51. (M41T80_REG_ALARM_SEC + 1 - M41T80_REG_ALARM_MON)
  52. #define M41T80_SQW_MAX_FREQ 32768
  53. #define M41T80_SEC_ST BIT(7) /* ST: Stop Bit */
  54. #define M41T80_ALMON_AFE BIT(7) /* AFE: AF Enable Bit */
  55. #define M41T80_ALMON_SQWE BIT(6) /* SQWE: SQW Enable Bit */
  56. #define M41T80_ALHOUR_HT BIT(6) /* HT: Halt Update Bit */
  57. #define M41T80_FLAGS_OF BIT(2) /* OF: Oscillator Failure Bit */
  58. #define M41T80_FLAGS_AF BIT(6) /* AF: Alarm Flag Bit */
  59. #define M41T80_FLAGS_BATT_LOW BIT(4) /* BL: Battery Low Bit */
  60. #define M41T80_WATCHDOG_RB2 BIT(7) /* RB: Watchdog resolution */
  61. #define M41T80_WATCHDOG_RB1 BIT(1) /* RB: Watchdog resolution */
  62. #define M41T80_WATCHDOG_RB0 BIT(0) /* RB: Watchdog resolution */
  63. #define M41T80_FEATURE_HT BIT(0) /* Halt feature */
  64. #define M41T80_FEATURE_BL BIT(1) /* Battery low indicator */
  65. #define M41T80_FEATURE_SQ BIT(2) /* Squarewave feature */
  66. #define M41T80_FEATURE_WD BIT(3) /* Extra watchdog resolution */
  67. #define M41T80_FEATURE_SQ_ALT BIT(4) /* RSx bits are in reg 4 */
  68. static const struct i2c_device_id m41t80_id[] = {
  69. { "m41t62", M41T80_FEATURE_SQ | M41T80_FEATURE_SQ_ALT },
  70. { "m41t65", M41T80_FEATURE_HT | M41T80_FEATURE_WD },
  71. { "m41t80", M41T80_FEATURE_SQ },
  72. { "m41t81", M41T80_FEATURE_HT | M41T80_FEATURE_SQ},
  73. { "m41t81s", M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ },
  74. { "m41t82", M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ },
  75. { "m41t83", M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ },
  76. { "m41st84", M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ },
  77. { "m41st85", M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ },
  78. { "m41st87", M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ },
  79. { "rv4162", M41T80_FEATURE_SQ | M41T80_FEATURE_WD | M41T80_FEATURE_SQ_ALT },
  80. { }
  81. };
  82. MODULE_DEVICE_TABLE(i2c, m41t80_id);
  83. static const struct of_device_id m41t80_of_match[] = {
  84. {
  85. .compatible = "st,m41t62",
  86. .data = (void *)(M41T80_FEATURE_SQ | M41T80_FEATURE_SQ_ALT)
  87. },
  88. {
  89. .compatible = "st,m41t65",
  90. .data = (void *)(M41T80_FEATURE_HT | M41T80_FEATURE_WD)
  91. },
  92. {
  93. .compatible = "st,m41t80",
  94. .data = (void *)(M41T80_FEATURE_SQ)
  95. },
  96. {
  97. .compatible = "st,m41t81",
  98. .data = (void *)(M41T80_FEATURE_HT | M41T80_FEATURE_SQ)
  99. },
  100. {
  101. .compatible = "st,m41t81s",
  102. .data = (void *)(M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ)
  103. },
  104. {
  105. .compatible = "st,m41t82",
  106. .data = (void *)(M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ)
  107. },
  108. {
  109. .compatible = "st,m41t83",
  110. .data = (void *)(M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ)
  111. },
  112. {
  113. .compatible = "st,m41t84",
  114. .data = (void *)(M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ)
  115. },
  116. {
  117. .compatible = "st,m41t85",
  118. .data = (void *)(M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ)
  119. },
  120. {
  121. .compatible = "st,m41t87",
  122. .data = (void *)(M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ)
  123. },
  124. {
  125. .compatible = "microcrystal,rv4162",
  126. .data = (void *)(M41T80_FEATURE_SQ | M41T80_FEATURE_WD | M41T80_FEATURE_SQ_ALT)
  127. },
  128. /* DT compatibility only, do not use compatibles below: */
  129. {
  130. .compatible = "st,rv4162",
  131. .data = (void *)(M41T80_FEATURE_SQ | M41T80_FEATURE_WD | M41T80_FEATURE_SQ_ALT)
  132. },
  133. {
  134. .compatible = "rv4162",
  135. .data = (void *)(M41T80_FEATURE_SQ | M41T80_FEATURE_WD | M41T80_FEATURE_SQ_ALT)
  136. },
  137. { }
  138. };
  139. MODULE_DEVICE_TABLE(of, m41t80_of_match);
  140. struct m41t80_data {
  141. unsigned long features;
  142. struct i2c_client *client;
  143. struct rtc_device *rtc;
  144. #ifdef CONFIG_COMMON_CLK
  145. struct clk_hw sqw;
  146. unsigned long freq;
  147. unsigned int sqwe;
  148. #endif
  149. };
  150. static irqreturn_t m41t80_handle_irq(int irq, void *dev_id)
  151. {
  152. struct i2c_client *client = dev_id;
  153. struct m41t80_data *m41t80 = i2c_get_clientdata(client);
  154. struct mutex *lock = &m41t80->rtc->ops_lock;
  155. unsigned long events = 0;
  156. int flags, flags_afe;
  157. mutex_lock(lock);
  158. flags_afe = i2c_smbus_read_byte_data(client, M41T80_REG_ALARM_MON);
  159. if (flags_afe < 0) {
  160. mutex_unlock(lock);
  161. return IRQ_NONE;
  162. }
  163. flags = i2c_smbus_read_byte_data(client, M41T80_REG_FLAGS);
  164. if (flags <= 0) {
  165. mutex_unlock(lock);
  166. return IRQ_NONE;
  167. }
  168. if (flags & M41T80_FLAGS_AF) {
  169. flags &= ~M41T80_FLAGS_AF;
  170. flags_afe &= ~M41T80_ALMON_AFE;
  171. events |= RTC_AF;
  172. }
  173. if (events) {
  174. rtc_update_irq(m41t80->rtc, 1, events);
  175. i2c_smbus_write_byte_data(client, M41T80_REG_FLAGS, flags);
  176. i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_MON,
  177. flags_afe);
  178. }
  179. mutex_unlock(lock);
  180. return IRQ_HANDLED;
  181. }
  182. static int m41t80_rtc_read_time(struct device *dev, struct rtc_time *tm)
  183. {
  184. struct i2c_client *client = to_i2c_client(dev);
  185. unsigned char buf[8];
  186. int err, flags;
  187. flags = i2c_smbus_read_byte_data(client, M41T80_REG_FLAGS);
  188. if (flags < 0)
  189. return flags;
  190. if (flags & M41T80_FLAGS_OF) {
  191. dev_err(&client->dev, "Oscillator failure, data is invalid.\n");
  192. return -EINVAL;
  193. }
  194. err = i2c_smbus_read_i2c_block_data(client, M41T80_REG_SSEC,
  195. sizeof(buf), buf);
  196. if (err < 0) {
  197. dev_err(&client->dev, "Unable to read date\n");
  198. return -EIO;
  199. }
  200. tm->tm_sec = bcd2bin(buf[M41T80_REG_SEC] & 0x7f);
  201. tm->tm_min = bcd2bin(buf[M41T80_REG_MIN] & 0x7f);
  202. tm->tm_hour = bcd2bin(buf[M41T80_REG_HOUR] & 0x3f);
  203. tm->tm_mday = bcd2bin(buf[M41T80_REG_DAY] & 0x3f);
  204. tm->tm_wday = buf[M41T80_REG_WDAY] & 0x07;
  205. tm->tm_mon = bcd2bin(buf[M41T80_REG_MON] & 0x1f) - 1;
  206. /* assume 20YY not 19YY, and ignore the Century Bit */
  207. tm->tm_year = bcd2bin(buf[M41T80_REG_YEAR]) + 100;
  208. return 0;
  209. }
  210. static int m41t80_rtc_set_time(struct device *dev, struct rtc_time *tm)
  211. {
  212. struct i2c_client *client = to_i2c_client(dev);
  213. struct m41t80_data *clientdata = i2c_get_clientdata(client);
  214. unsigned char buf[8];
  215. int err, flags;
  216. if (tm->tm_year < 100 || tm->tm_year > 199)
  217. return -EINVAL;
  218. buf[M41T80_REG_SSEC] = 0;
  219. buf[M41T80_REG_SEC] = bin2bcd(tm->tm_sec);
  220. buf[M41T80_REG_MIN] = bin2bcd(tm->tm_min);
  221. buf[M41T80_REG_HOUR] = bin2bcd(tm->tm_hour);
  222. buf[M41T80_REG_DAY] = bin2bcd(tm->tm_mday);
  223. buf[M41T80_REG_MON] = bin2bcd(tm->tm_mon + 1);
  224. buf[M41T80_REG_YEAR] = bin2bcd(tm->tm_year - 100);
  225. buf[M41T80_REG_WDAY] = tm->tm_wday;
  226. /* If the square wave output is controlled in the weekday register */
  227. if (clientdata->features & M41T80_FEATURE_SQ_ALT) {
  228. int val;
  229. val = i2c_smbus_read_byte_data(client, M41T80_REG_WDAY);
  230. if (val < 0)
  231. return val;
  232. buf[M41T80_REG_WDAY] |= (val & 0xf0);
  233. }
  234. err = i2c_smbus_write_i2c_block_data(client, M41T80_REG_SSEC,
  235. sizeof(buf), buf);
  236. if (err < 0) {
  237. dev_err(&client->dev, "Unable to write to date registers\n");
  238. return err;
  239. }
  240. /* Clear the OF bit of Flags Register */
  241. flags = i2c_smbus_read_byte_data(client, M41T80_REG_FLAGS);
  242. if (flags < 0)
  243. return flags;
  244. if (i2c_smbus_write_byte_data(client, M41T80_REG_FLAGS,
  245. flags & ~M41T80_FLAGS_OF)) {
  246. dev_err(&client->dev, "Unable to write flags register\n");
  247. return -EIO;
  248. }
  249. return err;
  250. }
  251. static int m41t80_rtc_proc(struct device *dev, struct seq_file *seq)
  252. {
  253. struct i2c_client *client = to_i2c_client(dev);
  254. struct m41t80_data *clientdata = i2c_get_clientdata(client);
  255. u8 reg;
  256. if (clientdata->features & M41T80_FEATURE_BL) {
  257. reg = i2c_smbus_read_byte_data(client, M41T80_REG_FLAGS);
  258. seq_printf(seq, "battery\t\t: %s\n",
  259. (reg & M41T80_FLAGS_BATT_LOW) ? "exhausted" : "ok");
  260. }
  261. return 0;
  262. }
  263. static int m41t80_alarm_irq_enable(struct device *dev, unsigned int enabled)
  264. {
  265. struct i2c_client *client = to_i2c_client(dev);
  266. int flags, retval;
  267. flags = i2c_smbus_read_byte_data(client, M41T80_REG_ALARM_MON);
  268. if (flags < 0)
  269. return flags;
  270. if (enabled)
  271. flags |= M41T80_ALMON_AFE;
  272. else
  273. flags &= ~M41T80_ALMON_AFE;
  274. retval = i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_MON, flags);
  275. if (retval < 0) {
  276. dev_err(dev, "Unable to enable alarm IRQ %d\n", retval);
  277. return retval;
  278. }
  279. return 0;
  280. }
  281. static int m41t80_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
  282. {
  283. struct i2c_client *client = to_i2c_client(dev);
  284. u8 alarmvals[5];
  285. int ret, err;
  286. alarmvals[0] = bin2bcd(alrm->time.tm_mon + 1);
  287. alarmvals[1] = bin2bcd(alrm->time.tm_mday);
  288. alarmvals[2] = bin2bcd(alrm->time.tm_hour);
  289. alarmvals[3] = bin2bcd(alrm->time.tm_min);
  290. alarmvals[4] = bin2bcd(alrm->time.tm_sec);
  291. /* Clear AF and AFE flags */
  292. ret = i2c_smbus_read_byte_data(client, M41T80_REG_ALARM_MON);
  293. if (ret < 0)
  294. return ret;
  295. err = i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_MON,
  296. ret & ~(M41T80_ALMON_AFE));
  297. if (err < 0) {
  298. dev_err(dev, "Unable to clear AFE bit\n");
  299. return err;
  300. }
  301. /* Keep SQWE bit value */
  302. alarmvals[0] |= (ret & M41T80_ALMON_SQWE);
  303. ret = i2c_smbus_read_byte_data(client, M41T80_REG_FLAGS);
  304. if (ret < 0)
  305. return ret;
  306. err = i2c_smbus_write_byte_data(client, M41T80_REG_FLAGS,
  307. ret & ~(M41T80_FLAGS_AF));
  308. if (err < 0) {
  309. dev_err(dev, "Unable to clear AF bit\n");
  310. return err;
  311. }
  312. /* Write the alarm */
  313. err = i2c_smbus_write_i2c_block_data(client, M41T80_REG_ALARM_MON,
  314. 5, alarmvals);
  315. if (err)
  316. return err;
  317. /* Enable the alarm interrupt */
  318. if (alrm->enabled) {
  319. alarmvals[0] |= M41T80_ALMON_AFE;
  320. err = i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_MON,
  321. alarmvals[0]);
  322. if (err)
  323. return err;
  324. }
  325. return 0;
  326. }
  327. static int m41t80_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
  328. {
  329. struct i2c_client *client = to_i2c_client(dev);
  330. u8 alarmvals[5];
  331. int flags, ret;
  332. ret = i2c_smbus_read_i2c_block_data(client, M41T80_REG_ALARM_MON,
  333. 5, alarmvals);
  334. if (ret != 5)
  335. return ret < 0 ? ret : -EIO;
  336. flags = i2c_smbus_read_byte_data(client, M41T80_REG_FLAGS);
  337. if (flags < 0)
  338. return flags;
  339. alrm->time.tm_sec = bcd2bin(alarmvals[4] & 0x7f);
  340. alrm->time.tm_min = bcd2bin(alarmvals[3] & 0x7f);
  341. alrm->time.tm_hour = bcd2bin(alarmvals[2] & 0x3f);
  342. alrm->time.tm_mday = bcd2bin(alarmvals[1] & 0x3f);
  343. alrm->time.tm_mon = bcd2bin(alarmvals[0] & 0x3f) - 1;
  344. alrm->enabled = !!(alarmvals[0] & M41T80_ALMON_AFE);
  345. alrm->pending = (flags & M41T80_FLAGS_AF) && alrm->enabled;
  346. return 0;
  347. }
  348. static struct rtc_class_ops m41t80_rtc_ops = {
  349. .read_time = m41t80_rtc_read_time,
  350. .set_time = m41t80_rtc_set_time,
  351. .proc = m41t80_rtc_proc,
  352. };
  353. #ifdef CONFIG_PM_SLEEP
  354. static int m41t80_suspend(struct device *dev)
  355. {
  356. struct i2c_client *client = to_i2c_client(dev);
  357. if (client->irq >= 0 && device_may_wakeup(dev))
  358. enable_irq_wake(client->irq);
  359. return 0;
  360. }
  361. static int m41t80_resume(struct device *dev)
  362. {
  363. struct i2c_client *client = to_i2c_client(dev);
  364. if (client->irq >= 0 && device_may_wakeup(dev))
  365. disable_irq_wake(client->irq);
  366. return 0;
  367. }
  368. #endif
  369. static SIMPLE_DEV_PM_OPS(m41t80_pm, m41t80_suspend, m41t80_resume);
  370. #ifdef CONFIG_COMMON_CLK
  371. #define sqw_to_m41t80_data(_hw) container_of(_hw, struct m41t80_data, sqw)
  372. static unsigned long m41t80_decode_freq(int setting)
  373. {
  374. return (setting == 0) ? 0 : (setting == 1) ? M41T80_SQW_MAX_FREQ :
  375. M41T80_SQW_MAX_FREQ >> setting;
  376. }
  377. static unsigned long m41t80_get_freq(struct m41t80_data *m41t80)
  378. {
  379. struct i2c_client *client = m41t80->client;
  380. int reg_sqw = (m41t80->features & M41T80_FEATURE_SQ_ALT) ?
  381. M41T80_REG_WDAY : M41T80_REG_SQW;
  382. int ret = i2c_smbus_read_byte_data(client, reg_sqw);
  383. if (ret < 0)
  384. return 0;
  385. return m41t80_decode_freq(ret >> 4);
  386. }
  387. static unsigned long m41t80_sqw_recalc_rate(struct clk_hw *hw,
  388. unsigned long parent_rate)
  389. {
  390. return sqw_to_m41t80_data(hw)->freq;
  391. }
  392. static long m41t80_sqw_round_rate(struct clk_hw *hw, unsigned long rate,
  393. unsigned long *prate)
  394. {
  395. if (rate >= M41T80_SQW_MAX_FREQ)
  396. return M41T80_SQW_MAX_FREQ;
  397. if (rate >= M41T80_SQW_MAX_FREQ / 4)
  398. return M41T80_SQW_MAX_FREQ / 4;
  399. if (!rate)
  400. return 0;
  401. return 1 << ilog2(rate);
  402. }
  403. static int m41t80_sqw_set_rate(struct clk_hw *hw, unsigned long rate,
  404. unsigned long parent_rate)
  405. {
  406. struct m41t80_data *m41t80 = sqw_to_m41t80_data(hw);
  407. struct i2c_client *client = m41t80->client;
  408. int reg_sqw = (m41t80->features & M41T80_FEATURE_SQ_ALT) ?
  409. M41T80_REG_WDAY : M41T80_REG_SQW;
  410. int reg, ret, val = 0;
  411. if (rate >= M41T80_SQW_MAX_FREQ)
  412. val = 1;
  413. else if (rate >= M41T80_SQW_MAX_FREQ / 4)
  414. val = 2;
  415. else if (rate)
  416. val = 15 - ilog2(rate);
  417. reg = i2c_smbus_read_byte_data(client, reg_sqw);
  418. if (reg < 0)
  419. return reg;
  420. reg = (reg & 0x0f) | (val << 4);
  421. ret = i2c_smbus_write_byte_data(client, reg_sqw, reg);
  422. if (!ret)
  423. m41t80->freq = m41t80_decode_freq(val);
  424. return ret;
  425. }
  426. static int m41t80_sqw_control(struct clk_hw *hw, bool enable)
  427. {
  428. struct m41t80_data *m41t80 = sqw_to_m41t80_data(hw);
  429. struct i2c_client *client = m41t80->client;
  430. int ret = i2c_smbus_read_byte_data(client, M41T80_REG_ALARM_MON);
  431. if (ret < 0)
  432. return ret;
  433. if (enable)
  434. ret |= M41T80_ALMON_SQWE;
  435. else
  436. ret &= ~M41T80_ALMON_SQWE;
  437. ret = i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_MON, ret);
  438. if (!ret)
  439. m41t80->sqwe = enable;
  440. return ret;
  441. }
  442. static int m41t80_sqw_prepare(struct clk_hw *hw)
  443. {
  444. return m41t80_sqw_control(hw, 1);
  445. }
  446. static void m41t80_sqw_unprepare(struct clk_hw *hw)
  447. {
  448. m41t80_sqw_control(hw, 0);
  449. }
  450. static int m41t80_sqw_is_prepared(struct clk_hw *hw)
  451. {
  452. return sqw_to_m41t80_data(hw)->sqwe;
  453. }
  454. static const struct clk_ops m41t80_sqw_ops = {
  455. .prepare = m41t80_sqw_prepare,
  456. .unprepare = m41t80_sqw_unprepare,
  457. .is_prepared = m41t80_sqw_is_prepared,
  458. .recalc_rate = m41t80_sqw_recalc_rate,
  459. .round_rate = m41t80_sqw_round_rate,
  460. .set_rate = m41t80_sqw_set_rate,
  461. };
  462. static struct clk *m41t80_sqw_register_clk(struct m41t80_data *m41t80)
  463. {
  464. struct i2c_client *client = m41t80->client;
  465. struct device_node *node = client->dev.of_node;
  466. struct clk *clk;
  467. struct clk_init_data init;
  468. int ret;
  469. /* First disable the clock */
  470. ret = i2c_smbus_read_byte_data(client, M41T80_REG_ALARM_MON);
  471. if (ret < 0)
  472. return ERR_PTR(ret);
  473. ret = i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_MON,
  474. ret & ~(M41T80_ALMON_SQWE));
  475. if (ret < 0)
  476. return ERR_PTR(ret);
  477. init.name = "m41t80-sqw";
  478. init.ops = &m41t80_sqw_ops;
  479. init.flags = 0;
  480. init.parent_names = NULL;
  481. init.num_parents = 0;
  482. m41t80->sqw.init = &init;
  483. m41t80->freq = m41t80_get_freq(m41t80);
  484. /* optional override of the clockname */
  485. of_property_read_string(node, "clock-output-names", &init.name);
  486. /* register the clock */
  487. clk = clk_register(&client->dev, &m41t80->sqw);
  488. if (!IS_ERR(clk))
  489. of_clk_add_provider(node, of_clk_src_simple_get, clk);
  490. return clk;
  491. }
  492. #endif
  493. #ifdef CONFIG_RTC_DRV_M41T80_WDT
  494. /*
  495. *****************************************************************************
  496. *
  497. * Watchdog Driver
  498. *
  499. *****************************************************************************
  500. */
  501. static DEFINE_MUTEX(m41t80_rtc_mutex);
  502. static struct i2c_client *save_client;
  503. /* Default margin */
  504. #define WD_TIMO 60 /* 1..31 seconds */
  505. static int wdt_margin = WD_TIMO;
  506. module_param(wdt_margin, int, 0);
  507. MODULE_PARM_DESC(wdt_margin, "Watchdog timeout in seconds (default 60s)");
  508. static unsigned long wdt_is_open;
  509. static int boot_flag;
  510. /**
  511. * wdt_ping:
  512. *
  513. * Reload counter one with the watchdog timeout. We don't bother reloading
  514. * the cascade counter.
  515. */
  516. static void wdt_ping(void)
  517. {
  518. unsigned char i2c_data[2];
  519. struct i2c_msg msgs1[1] = {
  520. {
  521. .addr = save_client->addr,
  522. .flags = 0,
  523. .len = 2,
  524. .buf = i2c_data,
  525. },
  526. };
  527. struct m41t80_data *clientdata = i2c_get_clientdata(save_client);
  528. i2c_data[0] = 0x09; /* watchdog register */
  529. if (wdt_margin > 31)
  530. i2c_data[1] = (wdt_margin & 0xFC) | 0x83; /* resolution = 4s */
  531. else
  532. /*
  533. * WDS = 1 (0x80), mulitplier = WD_TIMO, resolution = 1s (0x02)
  534. */
  535. i2c_data[1] = wdt_margin << 2 | 0x82;
  536. /*
  537. * M41T65 has three bits for watchdog resolution. Don't set bit 7, as
  538. * that would be an invalid resolution.
  539. */
  540. if (clientdata->features & M41T80_FEATURE_WD)
  541. i2c_data[1] &= ~M41T80_WATCHDOG_RB2;
  542. i2c_transfer(save_client->adapter, msgs1, 1);
  543. }
  544. /**
  545. * wdt_disable:
  546. *
  547. * disables watchdog.
  548. */
  549. static void wdt_disable(void)
  550. {
  551. unsigned char i2c_data[2], i2c_buf[0x10];
  552. struct i2c_msg msgs0[2] = {
  553. {
  554. .addr = save_client->addr,
  555. .flags = 0,
  556. .len = 1,
  557. .buf = i2c_data,
  558. },
  559. {
  560. .addr = save_client->addr,
  561. .flags = I2C_M_RD,
  562. .len = 1,
  563. .buf = i2c_buf,
  564. },
  565. };
  566. struct i2c_msg msgs1[1] = {
  567. {
  568. .addr = save_client->addr,
  569. .flags = 0,
  570. .len = 2,
  571. .buf = i2c_data,
  572. },
  573. };
  574. i2c_data[0] = 0x09;
  575. i2c_transfer(save_client->adapter, msgs0, 2);
  576. i2c_data[0] = 0x09;
  577. i2c_data[1] = 0x00;
  578. i2c_transfer(save_client->adapter, msgs1, 1);
  579. }
  580. /**
  581. * wdt_write:
  582. * @file: file handle to the watchdog
  583. * @buf: buffer to write (unused as data does not matter here
  584. * @count: count of bytes
  585. * @ppos: pointer to the position to write. No seeks allowed
  586. *
  587. * A write to a watchdog device is defined as a keepalive signal. Any
  588. * write of data will do, as we we don't define content meaning.
  589. */
  590. static ssize_t wdt_write(struct file *file, const char __user *buf,
  591. size_t count, loff_t *ppos)
  592. {
  593. if (count) {
  594. wdt_ping();
  595. return 1;
  596. }
  597. return 0;
  598. }
  599. static ssize_t wdt_read(struct file *file, char __user *buf,
  600. size_t count, loff_t *ppos)
  601. {
  602. return 0;
  603. }
  604. /**
  605. * wdt_ioctl:
  606. * @inode: inode of the device
  607. * @file: file handle to the device
  608. * @cmd: watchdog command
  609. * @arg: argument pointer
  610. *
  611. * The watchdog API defines a common set of functions for all watchdogs
  612. * according to their available features. We only actually usefully support
  613. * querying capabilities and current status.
  614. */
  615. static int wdt_ioctl(struct file *file, unsigned int cmd,
  616. unsigned long arg)
  617. {
  618. int new_margin, rv;
  619. static struct watchdog_info ident = {
  620. .options = WDIOF_POWERUNDER | WDIOF_KEEPALIVEPING |
  621. WDIOF_SETTIMEOUT,
  622. .firmware_version = 1,
  623. .identity = "M41T80 WTD"
  624. };
  625. switch (cmd) {
  626. case WDIOC_GETSUPPORT:
  627. return copy_to_user((struct watchdog_info __user *)arg, &ident,
  628. sizeof(ident)) ? -EFAULT : 0;
  629. case WDIOC_GETSTATUS:
  630. case WDIOC_GETBOOTSTATUS:
  631. return put_user(boot_flag, (int __user *)arg);
  632. case WDIOC_KEEPALIVE:
  633. wdt_ping();
  634. return 0;
  635. case WDIOC_SETTIMEOUT:
  636. if (get_user(new_margin, (int __user *)arg))
  637. return -EFAULT;
  638. /* Arbitrary, can't find the card's limits */
  639. if (new_margin < 1 || new_margin > 124)
  640. return -EINVAL;
  641. wdt_margin = new_margin;
  642. wdt_ping();
  643. /* Fall */
  644. case WDIOC_GETTIMEOUT:
  645. return put_user(wdt_margin, (int __user *)arg);
  646. case WDIOC_SETOPTIONS:
  647. if (copy_from_user(&rv, (int __user *)arg, sizeof(int)))
  648. return -EFAULT;
  649. if (rv & WDIOS_DISABLECARD) {
  650. pr_info("disable watchdog\n");
  651. wdt_disable();
  652. }
  653. if (rv & WDIOS_ENABLECARD) {
  654. pr_info("enable watchdog\n");
  655. wdt_ping();
  656. }
  657. return -EINVAL;
  658. }
  659. return -ENOTTY;
  660. }
  661. static long wdt_unlocked_ioctl(struct file *file, unsigned int cmd,
  662. unsigned long arg)
  663. {
  664. int ret;
  665. mutex_lock(&m41t80_rtc_mutex);
  666. ret = wdt_ioctl(file, cmd, arg);
  667. mutex_unlock(&m41t80_rtc_mutex);
  668. return ret;
  669. }
  670. /**
  671. * wdt_open:
  672. * @inode: inode of device
  673. * @file: file handle to device
  674. *
  675. */
  676. static int wdt_open(struct inode *inode, struct file *file)
  677. {
  678. if (MINOR(inode->i_rdev) == WATCHDOG_MINOR) {
  679. mutex_lock(&m41t80_rtc_mutex);
  680. if (test_and_set_bit(0, &wdt_is_open)) {
  681. mutex_unlock(&m41t80_rtc_mutex);
  682. return -EBUSY;
  683. }
  684. /*
  685. * Activate
  686. */
  687. wdt_is_open = 1;
  688. mutex_unlock(&m41t80_rtc_mutex);
  689. return nonseekable_open(inode, file);
  690. }
  691. return -ENODEV;
  692. }
  693. /**
  694. * wdt_close:
  695. * @inode: inode to board
  696. * @file: file handle to board
  697. *
  698. */
  699. static int wdt_release(struct inode *inode, struct file *file)
  700. {
  701. if (MINOR(inode->i_rdev) == WATCHDOG_MINOR)
  702. clear_bit(0, &wdt_is_open);
  703. return 0;
  704. }
  705. /**
  706. * notify_sys:
  707. * @this: our notifier block
  708. * @code: the event being reported
  709. * @unused: unused
  710. *
  711. * Our notifier is called on system shutdowns. We want to turn the card
  712. * off at reboot otherwise the machine will reboot again during memory
  713. * test or worse yet during the following fsck. This would suck, in fact
  714. * trust me - if it happens it does suck.
  715. */
  716. static int wdt_notify_sys(struct notifier_block *this, unsigned long code,
  717. void *unused)
  718. {
  719. if (code == SYS_DOWN || code == SYS_HALT)
  720. /* Disable Watchdog */
  721. wdt_disable();
  722. return NOTIFY_DONE;
  723. }
  724. static const struct file_operations wdt_fops = {
  725. .owner = THIS_MODULE,
  726. .read = wdt_read,
  727. .unlocked_ioctl = wdt_unlocked_ioctl,
  728. .write = wdt_write,
  729. .open = wdt_open,
  730. .release = wdt_release,
  731. .llseek = no_llseek,
  732. };
  733. static struct miscdevice wdt_dev = {
  734. .minor = WATCHDOG_MINOR,
  735. .name = "watchdog",
  736. .fops = &wdt_fops,
  737. };
  738. /*
  739. * The WDT card needs to learn about soft shutdowns in order to
  740. * turn the timebomb registers off.
  741. */
  742. static struct notifier_block wdt_notifier = {
  743. .notifier_call = wdt_notify_sys,
  744. };
  745. #endif /* CONFIG_RTC_DRV_M41T80_WDT */
  746. /*
  747. *****************************************************************************
  748. *
  749. * Driver Interface
  750. *
  751. *****************************************************************************
  752. */
  753. static int m41t80_probe(struct i2c_client *client,
  754. const struct i2c_device_id *id)
  755. {
  756. struct i2c_adapter *adapter = to_i2c_adapter(client->dev.parent);
  757. int rc = 0;
  758. struct rtc_time tm;
  759. struct m41t80_data *m41t80_data = NULL;
  760. bool wakeup_source = false;
  761. if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_I2C_BLOCK |
  762. I2C_FUNC_SMBUS_BYTE_DATA)) {
  763. dev_err(&adapter->dev, "doesn't support I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_I2C_BLOCK\n");
  764. return -ENODEV;
  765. }
  766. m41t80_data = devm_kzalloc(&client->dev, sizeof(*m41t80_data),
  767. GFP_KERNEL);
  768. if (!m41t80_data)
  769. return -ENOMEM;
  770. m41t80_data->client = client;
  771. if (client->dev.of_node)
  772. m41t80_data->features = (unsigned long)
  773. of_device_get_match_data(&client->dev);
  774. else
  775. m41t80_data->features = id->driver_data;
  776. i2c_set_clientdata(client, m41t80_data);
  777. m41t80_data->rtc = devm_rtc_allocate_device(&client->dev);
  778. if (IS_ERR(m41t80_data->rtc))
  779. return PTR_ERR(m41t80_data->rtc);
  780. #ifdef CONFIG_OF
  781. wakeup_source = of_property_read_bool(client->dev.of_node,
  782. "wakeup-source");
  783. #endif
  784. if (client->irq > 0) {
  785. rc = devm_request_threaded_irq(&client->dev, client->irq,
  786. NULL, m41t80_handle_irq,
  787. IRQF_TRIGGER_LOW | IRQF_ONESHOT,
  788. "m41t80", client);
  789. if (rc) {
  790. dev_warn(&client->dev, "unable to request IRQ, alarms disabled\n");
  791. client->irq = 0;
  792. wakeup_source = false;
  793. }
  794. }
  795. if (client->irq > 0 || wakeup_source) {
  796. m41t80_rtc_ops.read_alarm = m41t80_read_alarm;
  797. m41t80_rtc_ops.set_alarm = m41t80_set_alarm;
  798. m41t80_rtc_ops.alarm_irq_enable = m41t80_alarm_irq_enable;
  799. /* Enable the wakealarm */
  800. device_init_wakeup(&client->dev, true);
  801. }
  802. m41t80_data->rtc->ops = &m41t80_rtc_ops;
  803. if (client->irq <= 0) {
  804. /* We cannot support UIE mode if we do not have an IRQ line */
  805. m41t80_data->rtc->uie_unsupported = 1;
  806. }
  807. /* Make sure HT (Halt Update) bit is cleared */
  808. rc = i2c_smbus_read_byte_data(client, M41T80_REG_ALARM_HOUR);
  809. if (rc >= 0 && rc & M41T80_ALHOUR_HT) {
  810. if (m41t80_data->features & M41T80_FEATURE_HT) {
  811. m41t80_rtc_read_time(&client->dev, &tm);
  812. dev_info(&client->dev, "HT bit was set!\n");
  813. dev_info(&client->dev,
  814. "Power Down at %04i-%02i-%02i %02i:%02i:%02i\n",
  815. tm.tm_year + 1900,
  816. tm.tm_mon + 1, tm.tm_mday, tm.tm_hour,
  817. tm.tm_min, tm.tm_sec);
  818. }
  819. rc = i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_HOUR,
  820. rc & ~M41T80_ALHOUR_HT);
  821. }
  822. if (rc < 0) {
  823. dev_err(&client->dev, "Can't clear HT bit\n");
  824. return rc;
  825. }
  826. /* Make sure ST (stop) bit is cleared */
  827. rc = i2c_smbus_read_byte_data(client, M41T80_REG_SEC);
  828. if (rc >= 0 && rc & M41T80_SEC_ST)
  829. rc = i2c_smbus_write_byte_data(client, M41T80_REG_SEC,
  830. rc & ~M41T80_SEC_ST);
  831. if (rc < 0) {
  832. dev_err(&client->dev, "Can't clear ST bit\n");
  833. return rc;
  834. }
  835. #ifdef CONFIG_RTC_DRV_M41T80_WDT
  836. if (m41t80_data->features & M41T80_FEATURE_HT) {
  837. save_client = client;
  838. rc = misc_register(&wdt_dev);
  839. if (rc)
  840. return rc;
  841. rc = register_reboot_notifier(&wdt_notifier);
  842. if (rc) {
  843. misc_deregister(&wdt_dev);
  844. return rc;
  845. }
  846. }
  847. #endif
  848. #ifdef CONFIG_COMMON_CLK
  849. if (m41t80_data->features & M41T80_FEATURE_SQ)
  850. m41t80_sqw_register_clk(m41t80_data);
  851. #endif
  852. rc = rtc_register_device(m41t80_data->rtc);
  853. if (rc)
  854. return rc;
  855. return 0;
  856. }
  857. static int m41t80_remove(struct i2c_client *client)
  858. {
  859. #ifdef CONFIG_RTC_DRV_M41T80_WDT
  860. struct m41t80_data *clientdata = i2c_get_clientdata(client);
  861. if (clientdata->features & M41T80_FEATURE_HT) {
  862. misc_deregister(&wdt_dev);
  863. unregister_reboot_notifier(&wdt_notifier);
  864. }
  865. #endif
  866. return 0;
  867. }
  868. static struct i2c_driver m41t80_driver = {
  869. .driver = {
  870. .name = "rtc-m41t80",
  871. .of_match_table = of_match_ptr(m41t80_of_match),
  872. .pm = &m41t80_pm,
  873. },
  874. .probe = m41t80_probe,
  875. .remove = m41t80_remove,
  876. .id_table = m41t80_id,
  877. };
  878. module_i2c_driver(m41t80_driver);
  879. MODULE_AUTHOR("Alexander Bigga <ab@mycable.de>");
  880. MODULE_DESCRIPTION("ST Microelectronics M41T80 series RTC I2C Client Driver");
  881. MODULE_LICENSE("GPL");