rtc-lpc24xx.c 8.3 KB

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  1. /*
  2. * RTC driver for NXP LPC178x/18xx/43xx Real-Time Clock (RTC)
  3. *
  4. * Copyright (C) 2011 NXP Semiconductors
  5. * Copyright (C) 2015 Joachim Eastwood <manabian@gmail.com>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; either version 2 of the License, or
  10. * (at your option) any later version.
  11. *
  12. */
  13. #include <linux/clk.h>
  14. #include <linux/io.h>
  15. #include <linux/kernel.h>
  16. #include <linux/module.h>
  17. #include <linux/of.h>
  18. #include <linux/of_device.h>
  19. #include <linux/platform_device.h>
  20. #include <linux/rtc.h>
  21. /* LPC24xx RTC register offsets and bits */
  22. #define LPC24XX_ILR 0x00
  23. #define LPC24XX_RTCCIF BIT(0)
  24. #define LPC24XX_RTCALF BIT(1)
  25. #define LPC24XX_CTC 0x04
  26. #define LPC24XX_CCR 0x08
  27. #define LPC24XX_CLKEN BIT(0)
  28. #define LPC178X_CCALEN BIT(4)
  29. #define LPC24XX_CIIR 0x0c
  30. #define LPC24XX_AMR 0x10
  31. #define LPC24XX_ALARM_DISABLE 0xff
  32. #define LPC24XX_CTIME0 0x14
  33. #define LPC24XX_CTIME1 0x18
  34. #define LPC24XX_CTIME2 0x1c
  35. #define LPC24XX_SEC 0x20
  36. #define LPC24XX_MIN 0x24
  37. #define LPC24XX_HOUR 0x28
  38. #define LPC24XX_DOM 0x2c
  39. #define LPC24XX_DOW 0x30
  40. #define LPC24XX_DOY 0x34
  41. #define LPC24XX_MONTH 0x38
  42. #define LPC24XX_YEAR 0x3c
  43. #define LPC24XX_ALSEC 0x60
  44. #define LPC24XX_ALMIN 0x64
  45. #define LPC24XX_ALHOUR 0x68
  46. #define LPC24XX_ALDOM 0x6c
  47. #define LPC24XX_ALDOW 0x70
  48. #define LPC24XX_ALDOY 0x74
  49. #define LPC24XX_ALMON 0x78
  50. #define LPC24XX_ALYEAR 0x7c
  51. /* Macros to read fields in consolidated time (CT) registers */
  52. #define CT0_SECS(x) (((x) >> 0) & 0x3f)
  53. #define CT0_MINS(x) (((x) >> 8) & 0x3f)
  54. #define CT0_HOURS(x) (((x) >> 16) & 0x1f)
  55. #define CT0_DOW(x) (((x) >> 24) & 0x07)
  56. #define CT1_DOM(x) (((x) >> 0) & 0x1f)
  57. #define CT1_MONTH(x) (((x) >> 8) & 0x0f)
  58. #define CT1_YEAR(x) (((x) >> 16) & 0xfff)
  59. #define CT2_DOY(x) (((x) >> 0) & 0xfff)
  60. #define rtc_readl(dev, reg) readl((dev)->rtc_base + (reg))
  61. #define rtc_writel(dev, reg, val) writel((val), (dev)->rtc_base + (reg))
  62. struct lpc24xx_rtc {
  63. void __iomem *rtc_base;
  64. struct rtc_device *rtc;
  65. struct clk *clk_rtc;
  66. struct clk *clk_reg;
  67. };
  68. static int lpc24xx_rtc_set_time(struct device *dev, struct rtc_time *tm)
  69. {
  70. struct lpc24xx_rtc *rtc = dev_get_drvdata(dev);
  71. /* Disable RTC during update */
  72. rtc_writel(rtc, LPC24XX_CCR, LPC178X_CCALEN);
  73. rtc_writel(rtc, LPC24XX_SEC, tm->tm_sec);
  74. rtc_writel(rtc, LPC24XX_MIN, tm->tm_min);
  75. rtc_writel(rtc, LPC24XX_HOUR, tm->tm_hour);
  76. rtc_writel(rtc, LPC24XX_DOW, tm->tm_wday);
  77. rtc_writel(rtc, LPC24XX_DOM, tm->tm_mday);
  78. rtc_writel(rtc, LPC24XX_DOY, tm->tm_yday);
  79. rtc_writel(rtc, LPC24XX_MONTH, tm->tm_mon);
  80. rtc_writel(rtc, LPC24XX_YEAR, tm->tm_year);
  81. rtc_writel(rtc, LPC24XX_CCR, LPC24XX_CLKEN | LPC178X_CCALEN);
  82. return 0;
  83. }
  84. static int lpc24xx_rtc_read_time(struct device *dev, struct rtc_time *tm)
  85. {
  86. struct lpc24xx_rtc *rtc = dev_get_drvdata(dev);
  87. u32 ct0, ct1, ct2;
  88. ct0 = rtc_readl(rtc, LPC24XX_CTIME0);
  89. ct1 = rtc_readl(rtc, LPC24XX_CTIME1);
  90. ct2 = rtc_readl(rtc, LPC24XX_CTIME2);
  91. tm->tm_sec = CT0_SECS(ct0);
  92. tm->tm_min = CT0_MINS(ct0);
  93. tm->tm_hour = CT0_HOURS(ct0);
  94. tm->tm_wday = CT0_DOW(ct0);
  95. tm->tm_mon = CT1_MONTH(ct1);
  96. tm->tm_mday = CT1_DOM(ct1);
  97. tm->tm_year = CT1_YEAR(ct1);
  98. tm->tm_yday = CT2_DOY(ct2);
  99. return 0;
  100. }
  101. static int lpc24xx_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *wkalrm)
  102. {
  103. struct lpc24xx_rtc *rtc = dev_get_drvdata(dev);
  104. struct rtc_time *tm = &wkalrm->time;
  105. tm->tm_sec = rtc_readl(rtc, LPC24XX_ALSEC);
  106. tm->tm_min = rtc_readl(rtc, LPC24XX_ALMIN);
  107. tm->tm_hour = rtc_readl(rtc, LPC24XX_ALHOUR);
  108. tm->tm_mday = rtc_readl(rtc, LPC24XX_ALDOM);
  109. tm->tm_wday = rtc_readl(rtc, LPC24XX_ALDOW);
  110. tm->tm_yday = rtc_readl(rtc, LPC24XX_ALDOY);
  111. tm->tm_mon = rtc_readl(rtc, LPC24XX_ALMON);
  112. tm->tm_year = rtc_readl(rtc, LPC24XX_ALYEAR);
  113. wkalrm->enabled = rtc_readl(rtc, LPC24XX_AMR) == 0;
  114. wkalrm->pending = !!(rtc_readl(rtc, LPC24XX_ILR) & LPC24XX_RTCCIF);
  115. return rtc_valid_tm(&wkalrm->time);
  116. }
  117. static int lpc24xx_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *wkalrm)
  118. {
  119. struct lpc24xx_rtc *rtc = dev_get_drvdata(dev);
  120. struct rtc_time *tm = &wkalrm->time;
  121. /* Disable alarm irq during update */
  122. rtc_writel(rtc, LPC24XX_AMR, LPC24XX_ALARM_DISABLE);
  123. rtc_writel(rtc, LPC24XX_ALSEC, tm->tm_sec);
  124. rtc_writel(rtc, LPC24XX_ALMIN, tm->tm_min);
  125. rtc_writel(rtc, LPC24XX_ALHOUR, tm->tm_hour);
  126. rtc_writel(rtc, LPC24XX_ALDOM, tm->tm_mday);
  127. rtc_writel(rtc, LPC24XX_ALDOW, tm->tm_wday);
  128. rtc_writel(rtc, LPC24XX_ALDOY, tm->tm_yday);
  129. rtc_writel(rtc, LPC24XX_ALMON, tm->tm_mon);
  130. rtc_writel(rtc, LPC24XX_ALYEAR, tm->tm_year);
  131. if (wkalrm->enabled)
  132. rtc_writel(rtc, LPC24XX_AMR, 0);
  133. return 0;
  134. }
  135. static int lpc24xx_rtc_alarm_irq_enable(struct device *dev, unsigned int enable)
  136. {
  137. struct lpc24xx_rtc *rtc = dev_get_drvdata(dev);
  138. if (enable)
  139. rtc_writel(rtc, LPC24XX_AMR, 0);
  140. else
  141. rtc_writel(rtc, LPC24XX_AMR, LPC24XX_ALARM_DISABLE);
  142. return 0;
  143. }
  144. static irqreturn_t lpc24xx_rtc_interrupt(int irq, void *data)
  145. {
  146. unsigned long events = RTC_IRQF;
  147. struct lpc24xx_rtc *rtc = data;
  148. u32 rtc_iir;
  149. /* Check interrupt cause */
  150. rtc_iir = rtc_readl(rtc, LPC24XX_ILR);
  151. if (rtc_iir & LPC24XX_RTCALF) {
  152. events |= RTC_AF;
  153. rtc_writel(rtc, LPC24XX_AMR, LPC24XX_ALARM_DISABLE);
  154. }
  155. /* Clear interrupt status and report event */
  156. rtc_writel(rtc, LPC24XX_ILR, rtc_iir);
  157. rtc_update_irq(rtc->rtc, 1, events);
  158. return IRQ_HANDLED;
  159. }
  160. static const struct rtc_class_ops lpc24xx_rtc_ops = {
  161. .read_time = lpc24xx_rtc_read_time,
  162. .set_time = lpc24xx_rtc_set_time,
  163. .read_alarm = lpc24xx_rtc_read_alarm,
  164. .set_alarm = lpc24xx_rtc_set_alarm,
  165. .alarm_irq_enable = lpc24xx_rtc_alarm_irq_enable,
  166. };
  167. static int lpc24xx_rtc_probe(struct platform_device *pdev)
  168. {
  169. struct lpc24xx_rtc *rtc;
  170. struct resource *res;
  171. int irq, ret;
  172. rtc = devm_kzalloc(&pdev->dev, sizeof(*rtc), GFP_KERNEL);
  173. if (!rtc)
  174. return -ENOMEM;
  175. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  176. rtc->rtc_base = devm_ioremap_resource(&pdev->dev, res);
  177. if (IS_ERR(rtc->rtc_base))
  178. return PTR_ERR(rtc->rtc_base);
  179. irq = platform_get_irq(pdev, 0);
  180. if (irq < 0) {
  181. dev_warn(&pdev->dev, "can't get interrupt resource\n");
  182. return irq;
  183. }
  184. rtc->clk_rtc = devm_clk_get(&pdev->dev, "rtc");
  185. if (IS_ERR(rtc->clk_rtc)) {
  186. dev_err(&pdev->dev, "error getting rtc clock\n");
  187. return PTR_ERR(rtc->clk_rtc);
  188. }
  189. rtc->clk_reg = devm_clk_get(&pdev->dev, "reg");
  190. if (IS_ERR(rtc->clk_reg)) {
  191. dev_err(&pdev->dev, "error getting reg clock\n");
  192. return PTR_ERR(rtc->clk_reg);
  193. }
  194. ret = clk_prepare_enable(rtc->clk_rtc);
  195. if (ret) {
  196. dev_err(&pdev->dev, "unable to enable rtc clock\n");
  197. return ret;
  198. }
  199. ret = clk_prepare_enable(rtc->clk_reg);
  200. if (ret) {
  201. dev_err(&pdev->dev, "unable to enable reg clock\n");
  202. goto disable_rtc_clk;
  203. }
  204. platform_set_drvdata(pdev, rtc);
  205. /* Clear any pending interrupts */
  206. rtc_writel(rtc, LPC24XX_ILR, LPC24XX_RTCCIF | LPC24XX_RTCALF);
  207. /* Enable RTC count */
  208. rtc_writel(rtc, LPC24XX_CCR, LPC24XX_CLKEN | LPC178X_CCALEN);
  209. ret = devm_request_irq(&pdev->dev, irq, lpc24xx_rtc_interrupt, 0,
  210. pdev->name, rtc);
  211. if (ret < 0) {
  212. dev_warn(&pdev->dev, "can't request interrupt\n");
  213. goto disable_clks;
  214. }
  215. rtc->rtc = devm_rtc_device_register(&pdev->dev, "lpc24xx-rtc",
  216. &lpc24xx_rtc_ops, THIS_MODULE);
  217. if (IS_ERR(rtc->rtc)) {
  218. dev_err(&pdev->dev, "can't register rtc device\n");
  219. ret = PTR_ERR(rtc->rtc);
  220. goto disable_clks;
  221. }
  222. return 0;
  223. disable_clks:
  224. clk_disable_unprepare(rtc->clk_reg);
  225. disable_rtc_clk:
  226. clk_disable_unprepare(rtc->clk_rtc);
  227. return ret;
  228. }
  229. static int lpc24xx_rtc_remove(struct platform_device *pdev)
  230. {
  231. struct lpc24xx_rtc *rtc = platform_get_drvdata(pdev);
  232. /* Ensure all interrupt sources are masked */
  233. rtc_writel(rtc, LPC24XX_AMR, LPC24XX_ALARM_DISABLE);
  234. rtc_writel(rtc, LPC24XX_CIIR, 0);
  235. rtc_writel(rtc, LPC24XX_CCR, LPC178X_CCALEN);
  236. clk_disable_unprepare(rtc->clk_rtc);
  237. clk_disable_unprepare(rtc->clk_reg);
  238. return 0;
  239. }
  240. static const struct of_device_id lpc24xx_rtc_match[] = {
  241. { .compatible = "nxp,lpc1788-rtc" },
  242. { }
  243. };
  244. MODULE_DEVICE_TABLE(of, lpc24xx_rtc_match);
  245. static struct platform_driver lpc24xx_rtc_driver = {
  246. .probe = lpc24xx_rtc_probe,
  247. .remove = lpc24xx_rtc_remove,
  248. .driver = {
  249. .name = "lpc24xx-rtc",
  250. .of_match_table = lpc24xx_rtc_match,
  251. },
  252. };
  253. module_platform_driver(lpc24xx_rtc_driver);
  254. MODULE_AUTHOR("Kevin Wells <wellsk40@gmail.com>");
  255. MODULE_DESCRIPTION("RTC driver for the LPC178x/18xx/408x/43xx SoCs");
  256. MODULE_LICENSE("GPL");