da8xx_remoteproc.c 10 KB

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  1. /*
  2. * Remote processor machine-specific module for DA8XX
  3. *
  4. * Copyright (C) 2013 Texas Instruments, Inc.
  5. *
  6. * This program is free software; you can redistribute it and/or
  7. * modify it under the terms of the GNU General Public License
  8. * version 2 as published by the Free Software Foundation.
  9. */
  10. #include <linux/bitops.h>
  11. #include <linux/clk.h>
  12. #include <linux/reset.h>
  13. #include <linux/err.h>
  14. #include <linux/interrupt.h>
  15. #include <linux/io.h>
  16. #include <linux/irq.h>
  17. #include <linux/kernel.h>
  18. #include <linux/module.h>
  19. #include <linux/of_reserved_mem.h>
  20. #include <linux/platform_device.h>
  21. #include <linux/remoteproc.h>
  22. #include "remoteproc_internal.h"
  23. static char *da8xx_fw_name;
  24. module_param(da8xx_fw_name, charp, 0444);
  25. MODULE_PARM_DESC(da8xx_fw_name,
  26. "Name of DSP firmware file in /lib/firmware (if not specified defaults to 'rproc-dsp-fw')");
  27. /*
  28. * OMAP-L138 Technical References:
  29. * http://www.ti.com/product/omap-l138
  30. */
  31. #define SYSCFG_CHIPSIG0 BIT(0)
  32. #define SYSCFG_CHIPSIG1 BIT(1)
  33. #define SYSCFG_CHIPSIG2 BIT(2)
  34. #define SYSCFG_CHIPSIG3 BIT(3)
  35. #define SYSCFG_CHIPSIG4 BIT(4)
  36. #define DA8XX_RPROC_LOCAL_ADDRESS_MASK (SZ_16M - 1)
  37. /**
  38. * struct da8xx_rproc_mem - internal memory structure
  39. * @cpu_addr: MPU virtual address of the memory region
  40. * @bus_addr: Bus address used to access the memory region
  41. * @dev_addr: Device address of the memory region from DSP view
  42. * @size: Size of the memory region
  43. */
  44. struct da8xx_rproc_mem {
  45. void __iomem *cpu_addr;
  46. phys_addr_t bus_addr;
  47. u32 dev_addr;
  48. size_t size;
  49. };
  50. /**
  51. * struct da8xx_rproc - da8xx remote processor instance state
  52. * @rproc: rproc handle
  53. * @mem: internal memory regions data
  54. * @num_mems: number of internal memory regions
  55. * @dsp_clk: placeholder for platform's DSP clk
  56. * @ack_fxn: chip-specific ack function for ack'ing irq
  57. * @irq_data: ack_fxn function parameter
  58. * @chipsig: virt ptr to DSP interrupt registers (CHIPSIG & CHIPSIG_CLR)
  59. * @bootreg: virt ptr to DSP boot address register (HOST1CFG)
  60. * @irq: irq # used by this instance
  61. */
  62. struct da8xx_rproc {
  63. struct rproc *rproc;
  64. struct da8xx_rproc_mem *mem;
  65. int num_mems;
  66. struct clk *dsp_clk;
  67. struct reset_control *dsp_reset;
  68. void (*ack_fxn)(struct irq_data *data);
  69. struct irq_data *irq_data;
  70. void __iomem *chipsig;
  71. void __iomem *bootreg;
  72. int irq;
  73. };
  74. /**
  75. * handle_event() - inbound virtqueue message workqueue function
  76. *
  77. * This function is registered as a kernel thread and is scheduled by the
  78. * kernel handler.
  79. */
  80. static irqreturn_t handle_event(int irq, void *p)
  81. {
  82. struct rproc *rproc = (struct rproc *)p;
  83. /* Process incoming buffers on all our vrings */
  84. rproc_vq_interrupt(rproc, 0);
  85. rproc_vq_interrupt(rproc, 1);
  86. return IRQ_HANDLED;
  87. }
  88. /**
  89. * da8xx_rproc_callback() - inbound virtqueue message handler
  90. *
  91. * This handler is invoked directly by the kernel whenever the remote
  92. * core (DSP) has modified the state of a virtqueue. There is no
  93. * "payload" message indicating the virtqueue index as is the case with
  94. * mailbox-based implementations on OMAP4. As such, this handler "polls"
  95. * each known virtqueue index for every invocation.
  96. */
  97. static irqreturn_t da8xx_rproc_callback(int irq, void *p)
  98. {
  99. struct rproc *rproc = (struct rproc *)p;
  100. struct da8xx_rproc *drproc = (struct da8xx_rproc *)rproc->priv;
  101. u32 chipsig;
  102. chipsig = readl(drproc->chipsig);
  103. if (chipsig & SYSCFG_CHIPSIG0) {
  104. /* Clear interrupt level source */
  105. writel(SYSCFG_CHIPSIG0, drproc->chipsig + 4);
  106. /*
  107. * ACK intr to AINTC.
  108. *
  109. * It has already been ack'ed by the kernel before calling
  110. * this function, but since the ARM<->DSP interrupts in the
  111. * CHIPSIG register are "level" instead of "pulse" variety,
  112. * we need to ack it after taking down the level else we'll
  113. * be called again immediately after returning.
  114. */
  115. drproc->ack_fxn(drproc->irq_data);
  116. return IRQ_WAKE_THREAD;
  117. }
  118. return IRQ_HANDLED;
  119. }
  120. static int da8xx_rproc_start(struct rproc *rproc)
  121. {
  122. struct device *dev = rproc->dev.parent;
  123. struct da8xx_rproc *drproc = (struct da8xx_rproc *)rproc->priv;
  124. struct clk *dsp_clk = drproc->dsp_clk;
  125. struct reset_control *dsp_reset = drproc->dsp_reset;
  126. int ret;
  127. /* hw requires the start (boot) address be on 1KB boundary */
  128. if (rproc->bootaddr & 0x3ff) {
  129. dev_err(dev, "invalid boot address: must be aligned to 1KB\n");
  130. return -EINVAL;
  131. }
  132. writel(rproc->bootaddr, drproc->bootreg);
  133. ret = clk_prepare_enable(dsp_clk);
  134. if (ret) {
  135. dev_err(dev, "clk_prepare_enable() failed: %d\n", ret);
  136. return ret;
  137. }
  138. ret = reset_control_deassert(dsp_reset);
  139. if (ret) {
  140. dev_err(dev, "reset_control_deassert() failed: %d\n", ret);
  141. clk_disable_unprepare(dsp_clk);
  142. return ret;
  143. }
  144. return 0;
  145. }
  146. static int da8xx_rproc_stop(struct rproc *rproc)
  147. {
  148. struct da8xx_rproc *drproc = rproc->priv;
  149. struct device *dev = rproc->dev.parent;
  150. int ret;
  151. ret = reset_control_assert(drproc->dsp_reset);
  152. if (ret) {
  153. dev_err(dev, "reset_control_assert() failed: %d\n", ret);
  154. return ret;
  155. }
  156. clk_disable_unprepare(drproc->dsp_clk);
  157. return 0;
  158. }
  159. /* kick a virtqueue */
  160. static void da8xx_rproc_kick(struct rproc *rproc, int vqid)
  161. {
  162. struct da8xx_rproc *drproc = (struct da8xx_rproc *)rproc->priv;
  163. /* Interrupt remote proc */
  164. writel(SYSCFG_CHIPSIG2, drproc->chipsig);
  165. }
  166. static const struct rproc_ops da8xx_rproc_ops = {
  167. .start = da8xx_rproc_start,
  168. .stop = da8xx_rproc_stop,
  169. .kick = da8xx_rproc_kick,
  170. };
  171. static int da8xx_rproc_get_internal_memories(struct platform_device *pdev,
  172. struct da8xx_rproc *drproc)
  173. {
  174. static const char * const mem_names[] = {"l2sram", "l1pram", "l1dram"};
  175. int num_mems = ARRAY_SIZE(mem_names);
  176. struct device *dev = &pdev->dev;
  177. struct resource *res;
  178. int i;
  179. drproc->mem = devm_kcalloc(dev, num_mems, sizeof(*drproc->mem),
  180. GFP_KERNEL);
  181. if (!drproc->mem)
  182. return -ENOMEM;
  183. for (i = 0; i < num_mems; i++) {
  184. res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
  185. mem_names[i]);
  186. drproc->mem[i].cpu_addr = devm_ioremap_resource(dev, res);
  187. if (IS_ERR(drproc->mem[i].cpu_addr)) {
  188. dev_err(dev, "failed to parse and map %s memory\n",
  189. mem_names[i]);
  190. return PTR_ERR(drproc->mem[i].cpu_addr);
  191. }
  192. drproc->mem[i].bus_addr = res->start;
  193. drproc->mem[i].dev_addr =
  194. res->start & DA8XX_RPROC_LOCAL_ADDRESS_MASK;
  195. drproc->mem[i].size = resource_size(res);
  196. dev_dbg(dev, "memory %8s: bus addr %pa size 0x%zx va %p da 0x%x\n",
  197. mem_names[i], &drproc->mem[i].bus_addr,
  198. drproc->mem[i].size, drproc->mem[i].cpu_addr,
  199. drproc->mem[i].dev_addr);
  200. }
  201. drproc->num_mems = num_mems;
  202. return 0;
  203. }
  204. static int da8xx_rproc_probe(struct platform_device *pdev)
  205. {
  206. struct device *dev = &pdev->dev;
  207. struct da8xx_rproc *drproc;
  208. struct rproc *rproc;
  209. struct irq_data *irq_data;
  210. struct resource *bootreg_res;
  211. struct resource *chipsig_res;
  212. struct clk *dsp_clk;
  213. struct reset_control *dsp_reset;
  214. void __iomem *chipsig;
  215. void __iomem *bootreg;
  216. int irq;
  217. int ret;
  218. irq = platform_get_irq(pdev, 0);
  219. if (irq < 0) {
  220. dev_err(dev, "platform_get_irq(pdev, 0) error: %d\n", irq);
  221. return irq;
  222. }
  223. irq_data = irq_get_irq_data(irq);
  224. if (!irq_data) {
  225. dev_err(dev, "irq_get_irq_data(%d): NULL\n", irq);
  226. return -EINVAL;
  227. }
  228. bootreg_res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
  229. "host1cfg");
  230. bootreg = devm_ioremap_resource(dev, bootreg_res);
  231. if (IS_ERR(bootreg))
  232. return PTR_ERR(bootreg);
  233. chipsig_res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
  234. "chipsig");
  235. chipsig = devm_ioremap_resource(dev, chipsig_res);
  236. if (IS_ERR(chipsig))
  237. return PTR_ERR(chipsig);
  238. dsp_clk = devm_clk_get(dev, NULL);
  239. if (IS_ERR(dsp_clk)) {
  240. dev_err(dev, "clk_get error: %ld\n", PTR_ERR(dsp_clk));
  241. return PTR_ERR(dsp_clk);
  242. }
  243. dsp_reset = devm_reset_control_get_exclusive(dev, NULL);
  244. if (IS_ERR(dsp_reset)) {
  245. if (PTR_ERR(dsp_reset) != -EPROBE_DEFER)
  246. dev_err(dev, "unable to get reset control: %ld\n",
  247. PTR_ERR(dsp_reset));
  248. return PTR_ERR(dsp_reset);
  249. }
  250. if (dev->of_node) {
  251. ret = of_reserved_mem_device_init(dev);
  252. if (ret) {
  253. dev_err(dev, "device does not have specific CMA pool: %d\n",
  254. ret);
  255. return ret;
  256. }
  257. }
  258. rproc = rproc_alloc(dev, "dsp", &da8xx_rproc_ops, da8xx_fw_name,
  259. sizeof(*drproc));
  260. if (!rproc) {
  261. ret = -ENOMEM;
  262. goto free_mem;
  263. }
  264. /* error recovery is not supported at present */
  265. rproc->recovery_disabled = true;
  266. drproc = rproc->priv;
  267. drproc->rproc = rproc;
  268. drproc->dsp_clk = dsp_clk;
  269. drproc->dsp_reset = dsp_reset;
  270. rproc->has_iommu = false;
  271. ret = da8xx_rproc_get_internal_memories(pdev, drproc);
  272. if (ret)
  273. goto free_rproc;
  274. platform_set_drvdata(pdev, rproc);
  275. /* everything the ISR needs is now setup, so hook it up */
  276. ret = devm_request_threaded_irq(dev, irq, da8xx_rproc_callback,
  277. handle_event, 0, "da8xx-remoteproc",
  278. rproc);
  279. if (ret) {
  280. dev_err(dev, "devm_request_threaded_irq error: %d\n", ret);
  281. goto free_rproc;
  282. }
  283. /*
  284. * rproc_add() can end up enabling the DSP's clk with the DSP
  285. * *not* in reset, but da8xx_rproc_start() needs the DSP to be
  286. * held in reset at the time it is called.
  287. */
  288. ret = reset_control_assert(dsp_reset);
  289. if (ret)
  290. goto free_rproc;
  291. drproc->chipsig = chipsig;
  292. drproc->bootreg = bootreg;
  293. drproc->ack_fxn = irq_data->chip->irq_ack;
  294. drproc->irq_data = irq_data;
  295. drproc->irq = irq;
  296. ret = rproc_add(rproc);
  297. if (ret) {
  298. dev_err(dev, "rproc_add failed: %d\n", ret);
  299. goto free_rproc;
  300. }
  301. return 0;
  302. free_rproc:
  303. rproc_free(rproc);
  304. free_mem:
  305. if (dev->of_node)
  306. of_reserved_mem_device_release(dev);
  307. return ret;
  308. }
  309. static int da8xx_rproc_remove(struct platform_device *pdev)
  310. {
  311. struct rproc *rproc = platform_get_drvdata(pdev);
  312. struct da8xx_rproc *drproc = (struct da8xx_rproc *)rproc->priv;
  313. struct device *dev = &pdev->dev;
  314. /*
  315. * The devm subsystem might end up releasing things before
  316. * freeing the irq, thus allowing an interrupt to sneak in while
  317. * the device is being removed. This should prevent that.
  318. */
  319. disable_irq(drproc->irq);
  320. rproc_del(rproc);
  321. rproc_free(rproc);
  322. if (dev->of_node)
  323. of_reserved_mem_device_release(dev);
  324. return 0;
  325. }
  326. static const struct of_device_id davinci_rproc_of_match[] __maybe_unused = {
  327. { .compatible = "ti,da850-dsp", },
  328. { /* sentinel */ },
  329. };
  330. MODULE_DEVICE_TABLE(of, davinci_rproc_of_match);
  331. static struct platform_driver da8xx_rproc_driver = {
  332. .probe = da8xx_rproc_probe,
  333. .remove = da8xx_rproc_remove,
  334. .driver = {
  335. .name = "davinci-rproc",
  336. .of_match_table = of_match_ptr(davinci_rproc_of_match),
  337. },
  338. };
  339. module_platform_driver(da8xx_rproc_driver);
  340. MODULE_LICENSE("GPL v2");
  341. MODULE_DESCRIPTION("DA8XX Remote Processor control driver");