goldfish_pipe.c 27 KB

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  1. /*
  2. * Copyright (C) 2012 Intel, Inc.
  3. * Copyright (C) 2013 Intel, Inc.
  4. * Copyright (C) 2014 Linaro Limited
  5. * Copyright (C) 2011-2016 Google, Inc.
  6. *
  7. * This software is licensed under the terms of the GNU General Public
  8. * License version 2, as published by the Free Software Foundation, and
  9. * may be copied, distributed, and modified under those terms.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. */
  17. /* This source file contains the implementation of a special device driver
  18. * that intends to provide a *very* fast communication channel between the
  19. * guest system and the QEMU emulator.
  20. *
  21. * Usage from the guest is simply the following (error handling simplified):
  22. *
  23. * int fd = open("/dev/qemu_pipe",O_RDWR);
  24. * .... write() or read() through the pipe.
  25. *
  26. * This driver doesn't deal with the exact protocol used during the session.
  27. * It is intended to be as simple as something like:
  28. *
  29. * // do this _just_ after opening the fd to connect to a specific
  30. * // emulator service.
  31. * const char* msg = "<pipename>";
  32. * if (write(fd, msg, strlen(msg)+1) < 0) {
  33. * ... could not connect to <pipename> service
  34. * close(fd);
  35. * }
  36. *
  37. * // after this, simply read() and write() to communicate with the
  38. * // service. Exact protocol details left as an exercise to the reader.
  39. *
  40. * This driver is very fast because it doesn't copy any data through
  41. * intermediate buffers, since the emulator is capable of translating
  42. * guest user addresses into host ones.
  43. *
  44. * Note that we must however ensure that each user page involved in the
  45. * exchange is properly mapped during a transfer.
  46. */
  47. #include <linux/module.h>
  48. #include <linux/mod_devicetable.h>
  49. #include <linux/interrupt.h>
  50. #include <linux/kernel.h>
  51. #include <linux/spinlock.h>
  52. #include <linux/miscdevice.h>
  53. #include <linux/platform_device.h>
  54. #include <linux/poll.h>
  55. #include <linux/sched.h>
  56. #include <linux/bitops.h>
  57. #include <linux/slab.h>
  58. #include <linux/io.h>
  59. #include <linux/goldfish.h>
  60. #include <linux/dma-mapping.h>
  61. #include <linux/mm.h>
  62. #include <linux/acpi.h>
  63. /*
  64. * Update this when something changes in the driver's behavior so the host
  65. * can benefit from knowing it
  66. */
  67. enum {
  68. PIPE_DRIVER_VERSION = 2,
  69. PIPE_CURRENT_DEVICE_VERSION = 2
  70. };
  71. /*
  72. * IMPORTANT: The following constants must match the ones used and defined
  73. * in external/qemu/hw/goldfish_pipe.c in the Android source tree.
  74. */
  75. /* List of bitflags returned in status of CMD_POLL command */
  76. enum PipePollFlags {
  77. PIPE_POLL_IN = 1 << 0,
  78. PIPE_POLL_OUT = 1 << 1,
  79. PIPE_POLL_HUP = 1 << 2
  80. };
  81. /* Possible status values used to signal errors - see goldfish_pipe_error_convert */
  82. enum PipeErrors {
  83. PIPE_ERROR_INVAL = -1,
  84. PIPE_ERROR_AGAIN = -2,
  85. PIPE_ERROR_NOMEM = -3,
  86. PIPE_ERROR_IO = -4
  87. };
  88. /* Bit-flags used to signal events from the emulator */
  89. enum PipeWakeFlags {
  90. PIPE_WAKE_CLOSED = 1 << 0, /* emulator closed pipe */
  91. PIPE_WAKE_READ = 1 << 1, /* pipe can now be read from */
  92. PIPE_WAKE_WRITE = 1 << 2 /* pipe can now be written to */
  93. };
  94. /* Bit flags for the 'flags' field */
  95. enum PipeFlagsBits {
  96. BIT_CLOSED_ON_HOST = 0, /* pipe closed by host */
  97. BIT_WAKE_ON_WRITE = 1, /* want to be woken on writes */
  98. BIT_WAKE_ON_READ = 2, /* want to be woken on reads */
  99. };
  100. enum PipeRegs {
  101. PIPE_REG_CMD = 0,
  102. PIPE_REG_SIGNAL_BUFFER_HIGH = 4,
  103. PIPE_REG_SIGNAL_BUFFER = 8,
  104. PIPE_REG_SIGNAL_BUFFER_COUNT = 12,
  105. PIPE_REG_OPEN_BUFFER_HIGH = 20,
  106. PIPE_REG_OPEN_BUFFER = 24,
  107. PIPE_REG_VERSION = 36,
  108. PIPE_REG_GET_SIGNALLED = 48,
  109. };
  110. enum PipeCmdCode {
  111. PIPE_CMD_OPEN = 1, /* to be used by the pipe device itself */
  112. PIPE_CMD_CLOSE,
  113. PIPE_CMD_POLL,
  114. PIPE_CMD_WRITE,
  115. PIPE_CMD_WAKE_ON_WRITE,
  116. PIPE_CMD_READ,
  117. PIPE_CMD_WAKE_ON_READ,
  118. /*
  119. * TODO(zyy): implement a deferred read/write execution to allow
  120. * parallel processing of pipe operations on the host.
  121. */
  122. PIPE_CMD_WAKE_ON_DONE_IO,
  123. };
  124. enum {
  125. MAX_BUFFERS_PER_COMMAND = 336,
  126. MAX_SIGNALLED_PIPES = 64,
  127. INITIAL_PIPES_CAPACITY = 64
  128. };
  129. struct goldfish_pipe_dev;
  130. struct goldfish_pipe;
  131. struct goldfish_pipe_command;
  132. /* A per-pipe command structure, shared with the host */
  133. struct goldfish_pipe_command {
  134. s32 cmd; /* PipeCmdCode, guest -> host */
  135. s32 id; /* pipe id, guest -> host */
  136. s32 status; /* command execution status, host -> guest */
  137. s32 reserved; /* to pad to 64-bit boundary */
  138. union {
  139. /* Parameters for PIPE_CMD_{READ,WRITE} */
  140. struct {
  141. /* number of buffers, guest -> host */
  142. u32 buffers_count;
  143. /* number of consumed bytes, host -> guest */
  144. s32 consumed_size;
  145. /* buffer pointers, guest -> host */
  146. u64 ptrs[MAX_BUFFERS_PER_COMMAND];
  147. /* buffer sizes, guest -> host */
  148. u32 sizes[MAX_BUFFERS_PER_COMMAND];
  149. } rw_params;
  150. };
  151. };
  152. /* A single signalled pipe information */
  153. struct signalled_pipe_buffer {
  154. u32 id;
  155. u32 flags;
  156. };
  157. /* Parameters for the PIPE_CMD_OPEN command */
  158. struct open_command_param {
  159. u64 command_buffer_ptr;
  160. u32 rw_params_max_count;
  161. };
  162. /* Device-level set of buffers shared with the host */
  163. struct goldfish_pipe_dev_buffers {
  164. struct open_command_param open_command_params;
  165. struct signalled_pipe_buffer signalled_pipe_buffers[
  166. MAX_SIGNALLED_PIPES];
  167. };
  168. /* This data type models a given pipe instance */
  169. struct goldfish_pipe {
  170. /* pipe ID - index into goldfish_pipe_dev::pipes array */
  171. u32 id;
  172. /* The wake flags pipe is waiting for
  173. * Note: not protected with any lock, uses atomic operations
  174. * and barriers to make it thread-safe.
  175. */
  176. unsigned long flags;
  177. /* wake flags host have signalled,
  178. * - protected by goldfish_pipe_dev::lock
  179. */
  180. unsigned long signalled_flags;
  181. /* A pointer to command buffer */
  182. struct goldfish_pipe_command *command_buffer;
  183. /* doubly linked list of signalled pipes, protected by
  184. * goldfish_pipe_dev::lock
  185. */
  186. struct goldfish_pipe *prev_signalled;
  187. struct goldfish_pipe *next_signalled;
  188. /*
  189. * A pipe's own lock. Protects the following:
  190. * - *command_buffer - makes sure a command can safely write its
  191. * parameters to the host and read the results back.
  192. */
  193. struct mutex lock;
  194. /* A wake queue for sleeping until host signals an event */
  195. wait_queue_head_t wake_queue;
  196. /* Pointer to the parent goldfish_pipe_dev instance */
  197. struct goldfish_pipe_dev *dev;
  198. };
  199. /* The global driver data. Holds a reference to the i/o page used to
  200. * communicate with the emulator, and a wake queue for blocked tasks
  201. * waiting to be awoken.
  202. */
  203. struct goldfish_pipe_dev {
  204. /*
  205. * Global device spinlock. Protects the following members:
  206. * - pipes, pipes_capacity
  207. * - [*pipes, *pipes + pipes_capacity) - array data
  208. * - first_signalled_pipe,
  209. * goldfish_pipe::prev_signalled,
  210. * goldfish_pipe::next_signalled,
  211. * goldfish_pipe::signalled_flags - all singnalled-related fields,
  212. * in all allocated pipes
  213. * - open_command_params - PIPE_CMD_OPEN-related buffers
  214. *
  215. * It looks like a lot of different fields, but the trick is that
  216. * the only operation that happens often is the signalled pipes array
  217. * manipulation. That's why it's OK for now to keep the rest of the
  218. * fields under the same lock. If we notice too much contention because
  219. * of PIPE_CMD_OPEN, then we should add a separate lock there.
  220. */
  221. spinlock_t lock;
  222. /*
  223. * Array of the pipes of |pipes_capacity| elements,
  224. * indexed by goldfish_pipe::id
  225. */
  226. struct goldfish_pipe **pipes;
  227. u32 pipes_capacity;
  228. /* Pointers to the buffers host uses for interaction with this driver */
  229. struct goldfish_pipe_dev_buffers *buffers;
  230. /* Head of a doubly linked list of signalled pipes */
  231. struct goldfish_pipe *first_signalled_pipe;
  232. /* Some device-specific data */
  233. int irq;
  234. int version;
  235. unsigned char __iomem *base;
  236. };
  237. static struct goldfish_pipe_dev pipe_dev[1] = {};
  238. static int goldfish_cmd_locked(struct goldfish_pipe *pipe, enum PipeCmdCode cmd)
  239. {
  240. pipe->command_buffer->cmd = cmd;
  241. /* failure by default */
  242. pipe->command_buffer->status = PIPE_ERROR_INVAL;
  243. writel(pipe->id, pipe->dev->base + PIPE_REG_CMD);
  244. return pipe->command_buffer->status;
  245. }
  246. static int goldfish_cmd(struct goldfish_pipe *pipe, enum PipeCmdCode cmd)
  247. {
  248. int status;
  249. if (mutex_lock_interruptible(&pipe->lock))
  250. return PIPE_ERROR_IO;
  251. status = goldfish_cmd_locked(pipe, cmd);
  252. mutex_unlock(&pipe->lock);
  253. return status;
  254. }
  255. /*
  256. * This function converts an error code returned by the emulator through
  257. * the PIPE_REG_STATUS i/o register into a valid negative errno value.
  258. */
  259. static int goldfish_pipe_error_convert(int status)
  260. {
  261. switch (status) {
  262. case PIPE_ERROR_AGAIN:
  263. return -EAGAIN;
  264. case PIPE_ERROR_NOMEM:
  265. return -ENOMEM;
  266. case PIPE_ERROR_IO:
  267. return -EIO;
  268. default:
  269. return -EINVAL;
  270. }
  271. }
  272. static int pin_user_pages(unsigned long first_page, unsigned long last_page,
  273. unsigned int last_page_size, int is_write,
  274. struct page *pages[MAX_BUFFERS_PER_COMMAND],
  275. unsigned int *iter_last_page_size)
  276. {
  277. int ret;
  278. int requested_pages = ((last_page - first_page) >> PAGE_SHIFT) + 1;
  279. if (requested_pages > MAX_BUFFERS_PER_COMMAND) {
  280. requested_pages = MAX_BUFFERS_PER_COMMAND;
  281. *iter_last_page_size = PAGE_SIZE;
  282. } else {
  283. *iter_last_page_size = last_page_size;
  284. }
  285. ret = get_user_pages_fast(
  286. first_page, requested_pages, !is_write, pages);
  287. if (ret <= 0)
  288. return -EFAULT;
  289. if (ret < requested_pages)
  290. *iter_last_page_size = PAGE_SIZE;
  291. return ret;
  292. }
  293. static void release_user_pages(struct page **pages, int pages_count,
  294. int is_write, s32 consumed_size)
  295. {
  296. int i;
  297. for (i = 0; i < pages_count; i++) {
  298. if (!is_write && consumed_size > 0)
  299. set_page_dirty(pages[i]);
  300. put_page(pages[i]);
  301. }
  302. }
  303. /* Populate the call parameters, merging adjacent pages together */
  304. static void populate_rw_params(
  305. struct page **pages, int pages_count,
  306. unsigned long address, unsigned long address_end,
  307. unsigned long first_page, unsigned long last_page,
  308. unsigned int iter_last_page_size, int is_write,
  309. struct goldfish_pipe_command *command)
  310. {
  311. /*
  312. * Process the first page separately - it's the only page that
  313. * needs special handling for its start address.
  314. */
  315. unsigned long xaddr = page_to_phys(pages[0]);
  316. unsigned long xaddr_prev = xaddr;
  317. int buffer_idx = 0;
  318. int i = 1;
  319. int size_on_page = first_page == last_page
  320. ? (int)(address_end - address)
  321. : (PAGE_SIZE - (address & ~PAGE_MASK));
  322. command->rw_params.ptrs[0] = (u64)(xaddr | (address & ~PAGE_MASK));
  323. command->rw_params.sizes[0] = size_on_page;
  324. for (; i < pages_count; ++i) {
  325. xaddr = page_to_phys(pages[i]);
  326. size_on_page = (i == pages_count - 1) ?
  327. iter_last_page_size : PAGE_SIZE;
  328. if (xaddr == xaddr_prev + PAGE_SIZE) {
  329. command->rw_params.sizes[buffer_idx] += size_on_page;
  330. } else {
  331. ++buffer_idx;
  332. command->rw_params.ptrs[buffer_idx] = (u64)xaddr;
  333. command->rw_params.sizes[buffer_idx] = size_on_page;
  334. }
  335. xaddr_prev = xaddr;
  336. }
  337. command->rw_params.buffers_count = buffer_idx + 1;
  338. }
  339. static int transfer_max_buffers(struct goldfish_pipe *pipe,
  340. unsigned long address, unsigned long address_end, int is_write,
  341. unsigned long last_page, unsigned int last_page_size,
  342. s32 *consumed_size, int *status)
  343. {
  344. static struct page *pages[MAX_BUFFERS_PER_COMMAND];
  345. unsigned long first_page = address & PAGE_MASK;
  346. unsigned int iter_last_page_size;
  347. int pages_count = pin_user_pages(first_page, last_page,
  348. last_page_size, is_write,
  349. pages, &iter_last_page_size);
  350. if (pages_count < 0)
  351. return pages_count;
  352. /* Serialize access to the pipe command buffers */
  353. if (mutex_lock_interruptible(&pipe->lock))
  354. return -ERESTARTSYS;
  355. populate_rw_params(pages, pages_count, address, address_end,
  356. first_page, last_page, iter_last_page_size, is_write,
  357. pipe->command_buffer);
  358. /* Transfer the data */
  359. *status = goldfish_cmd_locked(pipe,
  360. is_write ? PIPE_CMD_WRITE : PIPE_CMD_READ);
  361. *consumed_size = pipe->command_buffer->rw_params.consumed_size;
  362. release_user_pages(pages, pages_count, is_write, *consumed_size);
  363. mutex_unlock(&pipe->lock);
  364. return 0;
  365. }
  366. static int wait_for_host_signal(struct goldfish_pipe *pipe, int is_write)
  367. {
  368. u32 wakeBit = is_write ? BIT_WAKE_ON_WRITE : BIT_WAKE_ON_READ;
  369. set_bit(wakeBit, &pipe->flags);
  370. /* Tell the emulator we're going to wait for a wake event */
  371. (void)goldfish_cmd(pipe,
  372. is_write ? PIPE_CMD_WAKE_ON_WRITE : PIPE_CMD_WAKE_ON_READ);
  373. while (test_bit(wakeBit, &pipe->flags)) {
  374. if (wait_event_interruptible(
  375. pipe->wake_queue,
  376. !test_bit(wakeBit, &pipe->flags)))
  377. return -ERESTARTSYS;
  378. if (test_bit(BIT_CLOSED_ON_HOST, &pipe->flags))
  379. return -EIO;
  380. }
  381. return 0;
  382. }
  383. static ssize_t goldfish_pipe_read_write(struct file *filp,
  384. char __user *buffer, size_t bufflen, int is_write)
  385. {
  386. struct goldfish_pipe *pipe = filp->private_data;
  387. int count = 0, ret = -EINVAL;
  388. unsigned long address, address_end, last_page;
  389. unsigned int last_page_size;
  390. /* If the emulator already closed the pipe, no need to go further */
  391. if (unlikely(test_bit(BIT_CLOSED_ON_HOST, &pipe->flags)))
  392. return -EIO;
  393. /* Null reads or writes succeeds */
  394. if (unlikely(bufflen == 0))
  395. return 0;
  396. /* Check the buffer range for access */
  397. if (unlikely(!access_ok(is_write ? VERIFY_WRITE : VERIFY_READ,
  398. buffer, bufflen)))
  399. return -EFAULT;
  400. address = (unsigned long)buffer;
  401. address_end = address + bufflen;
  402. last_page = (address_end - 1) & PAGE_MASK;
  403. last_page_size = ((address_end - 1) & ~PAGE_MASK) + 1;
  404. while (address < address_end) {
  405. s32 consumed_size;
  406. int status;
  407. ret = transfer_max_buffers(pipe, address, address_end, is_write,
  408. last_page, last_page_size, &consumed_size,
  409. &status);
  410. if (ret < 0)
  411. break;
  412. if (consumed_size > 0) {
  413. /* No matter what's the status, we've transferred
  414. * something.
  415. */
  416. count += consumed_size;
  417. address += consumed_size;
  418. }
  419. if (status > 0)
  420. continue;
  421. if (status == 0) {
  422. /* EOF */
  423. ret = 0;
  424. break;
  425. }
  426. if (count > 0) {
  427. /*
  428. * An error occurred, but we already transferred
  429. * something on one of the previous iterations.
  430. * Just return what we already copied and log this
  431. * err.
  432. */
  433. if (status != PIPE_ERROR_AGAIN)
  434. pr_info_ratelimited("goldfish_pipe: backend error %d on %s\n",
  435. status, is_write ? "write" : "read");
  436. break;
  437. }
  438. /*
  439. * If the error is not PIPE_ERROR_AGAIN, or if we are in
  440. * non-blocking mode, just return the error code.
  441. */
  442. if (status != PIPE_ERROR_AGAIN ||
  443. (filp->f_flags & O_NONBLOCK) != 0) {
  444. ret = goldfish_pipe_error_convert(status);
  445. break;
  446. }
  447. status = wait_for_host_signal(pipe, is_write);
  448. if (status < 0)
  449. return status;
  450. }
  451. if (count > 0)
  452. return count;
  453. return ret;
  454. }
  455. static ssize_t goldfish_pipe_read(struct file *filp, char __user *buffer,
  456. size_t bufflen, loff_t *ppos)
  457. {
  458. return goldfish_pipe_read_write(filp, buffer, bufflen,
  459. /* is_write */ 0);
  460. }
  461. static ssize_t goldfish_pipe_write(struct file *filp,
  462. const char __user *buffer, size_t bufflen,
  463. loff_t *ppos)
  464. {
  465. return goldfish_pipe_read_write(filp,
  466. /* cast away the const */(char __user *)buffer, bufflen,
  467. /* is_write */ 1);
  468. }
  469. static __poll_t goldfish_pipe_poll(struct file *filp, poll_table *wait)
  470. {
  471. struct goldfish_pipe *pipe = filp->private_data;
  472. __poll_t mask = 0;
  473. int status;
  474. poll_wait(filp, &pipe->wake_queue, wait);
  475. status = goldfish_cmd(pipe, PIPE_CMD_POLL);
  476. if (status < 0)
  477. return -ERESTARTSYS;
  478. if (status & PIPE_POLL_IN)
  479. mask |= EPOLLIN | EPOLLRDNORM;
  480. if (status & PIPE_POLL_OUT)
  481. mask |= EPOLLOUT | EPOLLWRNORM;
  482. if (status & PIPE_POLL_HUP)
  483. mask |= EPOLLHUP;
  484. if (test_bit(BIT_CLOSED_ON_HOST, &pipe->flags))
  485. mask |= EPOLLERR;
  486. return mask;
  487. }
  488. static void signalled_pipes_add_locked(struct goldfish_pipe_dev *dev,
  489. u32 id, u32 flags)
  490. {
  491. struct goldfish_pipe *pipe;
  492. if (WARN_ON(id >= dev->pipes_capacity))
  493. return;
  494. pipe = dev->pipes[id];
  495. if (!pipe)
  496. return;
  497. pipe->signalled_flags |= flags;
  498. if (pipe->prev_signalled || pipe->next_signalled
  499. || dev->first_signalled_pipe == pipe)
  500. return; /* already in the list */
  501. pipe->next_signalled = dev->first_signalled_pipe;
  502. if (dev->first_signalled_pipe)
  503. dev->first_signalled_pipe->prev_signalled = pipe;
  504. dev->first_signalled_pipe = pipe;
  505. }
  506. static void signalled_pipes_remove_locked(struct goldfish_pipe_dev *dev,
  507. struct goldfish_pipe *pipe) {
  508. if (pipe->prev_signalled)
  509. pipe->prev_signalled->next_signalled = pipe->next_signalled;
  510. if (pipe->next_signalled)
  511. pipe->next_signalled->prev_signalled = pipe->prev_signalled;
  512. if (pipe == dev->first_signalled_pipe)
  513. dev->first_signalled_pipe = pipe->next_signalled;
  514. pipe->prev_signalled = NULL;
  515. pipe->next_signalled = NULL;
  516. }
  517. static struct goldfish_pipe *signalled_pipes_pop_front(
  518. struct goldfish_pipe_dev *dev, int *wakes)
  519. {
  520. struct goldfish_pipe *pipe;
  521. unsigned long flags;
  522. spin_lock_irqsave(&dev->lock, flags);
  523. pipe = dev->first_signalled_pipe;
  524. if (pipe) {
  525. *wakes = pipe->signalled_flags;
  526. pipe->signalled_flags = 0;
  527. /*
  528. * This is an optimized version of
  529. * signalled_pipes_remove_locked()
  530. * - We want to make it as fast as possible to
  531. * wake the sleeping pipe operations faster.
  532. */
  533. dev->first_signalled_pipe = pipe->next_signalled;
  534. if (dev->first_signalled_pipe)
  535. dev->first_signalled_pipe->prev_signalled = NULL;
  536. pipe->next_signalled = NULL;
  537. }
  538. spin_unlock_irqrestore(&dev->lock, flags);
  539. return pipe;
  540. }
  541. static void goldfish_interrupt_task(unsigned long unused)
  542. {
  543. struct goldfish_pipe_dev *dev = pipe_dev;
  544. /* Iterate over the signalled pipes and wake them one by one */
  545. struct goldfish_pipe *pipe;
  546. int wakes;
  547. while ((pipe = signalled_pipes_pop_front(dev, &wakes)) != NULL) {
  548. if (wakes & PIPE_WAKE_CLOSED) {
  549. pipe->flags = 1 << BIT_CLOSED_ON_HOST;
  550. } else {
  551. if (wakes & PIPE_WAKE_READ)
  552. clear_bit(BIT_WAKE_ON_READ, &pipe->flags);
  553. if (wakes & PIPE_WAKE_WRITE)
  554. clear_bit(BIT_WAKE_ON_WRITE, &pipe->flags);
  555. }
  556. /*
  557. * wake_up_interruptible() implies a write barrier, so don't
  558. * explicitly add another one here.
  559. */
  560. wake_up_interruptible(&pipe->wake_queue);
  561. }
  562. }
  563. static DECLARE_TASKLET(goldfish_interrupt_tasklet, goldfish_interrupt_task, 0);
  564. /*
  565. * The general idea of the interrupt handling:
  566. *
  567. * 1. device raises an interrupt if there's at least one signalled pipe
  568. * 2. IRQ handler reads the signalled pipes and their count from the device
  569. * 3. device writes them into a shared buffer and returns the count
  570. * it only resets the IRQ if it has returned all signalled pipes,
  571. * otherwise it leaves it raised, so IRQ handler will be called
  572. * again for the next chunk
  573. * 4. IRQ handler adds all returned pipes to the device's signalled pipes list
  574. * 5. IRQ handler launches a tasklet to process the signalled pipes from the
  575. * list in a separate context
  576. */
  577. static irqreturn_t goldfish_pipe_interrupt(int irq, void *dev_id)
  578. {
  579. u32 count;
  580. u32 i;
  581. unsigned long flags;
  582. struct goldfish_pipe_dev *dev = dev_id;
  583. if (dev != pipe_dev)
  584. return IRQ_NONE;
  585. /* Request the signalled pipes from the device */
  586. spin_lock_irqsave(&dev->lock, flags);
  587. count = readl(dev->base + PIPE_REG_GET_SIGNALLED);
  588. if (count == 0) {
  589. spin_unlock_irqrestore(&dev->lock, flags);
  590. return IRQ_NONE;
  591. }
  592. if (count > MAX_SIGNALLED_PIPES)
  593. count = MAX_SIGNALLED_PIPES;
  594. for (i = 0; i < count; ++i)
  595. signalled_pipes_add_locked(dev,
  596. dev->buffers->signalled_pipe_buffers[i].id,
  597. dev->buffers->signalled_pipe_buffers[i].flags);
  598. spin_unlock_irqrestore(&dev->lock, flags);
  599. tasklet_schedule(&goldfish_interrupt_tasklet);
  600. return IRQ_HANDLED;
  601. }
  602. static int get_free_pipe_id_locked(struct goldfish_pipe_dev *dev)
  603. {
  604. int id;
  605. for (id = 0; id < dev->pipes_capacity; ++id)
  606. if (!dev->pipes[id])
  607. return id;
  608. {
  609. /* Reallocate the array */
  610. u32 new_capacity = 2 * dev->pipes_capacity;
  611. struct goldfish_pipe **pipes =
  612. kcalloc(new_capacity, sizeof(*pipes), GFP_ATOMIC);
  613. if (!pipes)
  614. return -ENOMEM;
  615. memcpy(pipes, dev->pipes, sizeof(*pipes) * dev->pipes_capacity);
  616. kfree(dev->pipes);
  617. dev->pipes = pipes;
  618. id = dev->pipes_capacity;
  619. dev->pipes_capacity = new_capacity;
  620. }
  621. return id;
  622. }
  623. /**
  624. * goldfish_pipe_open - open a channel to the AVD
  625. * @inode: inode of device
  626. * @file: file struct of opener
  627. *
  628. * Create a new pipe link between the emulator and the use application.
  629. * Each new request produces a new pipe.
  630. *
  631. * Note: we use the pipe ID as a mux. All goldfish emulations are 32bit
  632. * right now so this is fine. A move to 64bit will need this addressing
  633. */
  634. static int goldfish_pipe_open(struct inode *inode, struct file *file)
  635. {
  636. struct goldfish_pipe_dev *dev = pipe_dev;
  637. unsigned long flags;
  638. int id;
  639. int status;
  640. /* Allocate new pipe kernel object */
  641. struct goldfish_pipe *pipe = kzalloc(sizeof(*pipe), GFP_KERNEL);
  642. if (pipe == NULL)
  643. return -ENOMEM;
  644. pipe->dev = dev;
  645. mutex_init(&pipe->lock);
  646. init_waitqueue_head(&pipe->wake_queue);
  647. /*
  648. * Command buffer needs to be allocated on its own page to make sure
  649. * it is physically contiguous in host's address space.
  650. */
  651. pipe->command_buffer =
  652. (struct goldfish_pipe_command *)__get_free_page(GFP_KERNEL);
  653. if (!pipe->command_buffer) {
  654. status = -ENOMEM;
  655. goto err_pipe;
  656. }
  657. spin_lock_irqsave(&dev->lock, flags);
  658. id = get_free_pipe_id_locked(dev);
  659. if (id < 0) {
  660. status = id;
  661. goto err_id_locked;
  662. }
  663. dev->pipes[id] = pipe;
  664. pipe->id = id;
  665. pipe->command_buffer->id = id;
  666. /* Now tell the emulator we're opening a new pipe. */
  667. dev->buffers->open_command_params.rw_params_max_count =
  668. MAX_BUFFERS_PER_COMMAND;
  669. dev->buffers->open_command_params.command_buffer_ptr =
  670. (u64)(unsigned long)__pa(pipe->command_buffer);
  671. status = goldfish_cmd_locked(pipe, PIPE_CMD_OPEN);
  672. spin_unlock_irqrestore(&dev->lock, flags);
  673. if (status < 0)
  674. goto err_cmd;
  675. /* All is done, save the pipe into the file's private data field */
  676. file->private_data = pipe;
  677. return 0;
  678. err_cmd:
  679. spin_lock_irqsave(&dev->lock, flags);
  680. dev->pipes[id] = NULL;
  681. err_id_locked:
  682. spin_unlock_irqrestore(&dev->lock, flags);
  683. free_page((unsigned long)pipe->command_buffer);
  684. err_pipe:
  685. kfree(pipe);
  686. return status;
  687. }
  688. static int goldfish_pipe_release(struct inode *inode, struct file *filp)
  689. {
  690. unsigned long flags;
  691. struct goldfish_pipe *pipe = filp->private_data;
  692. struct goldfish_pipe_dev *dev = pipe->dev;
  693. /* The guest is closing the channel, so tell the emulator right now */
  694. (void)goldfish_cmd(pipe, PIPE_CMD_CLOSE);
  695. spin_lock_irqsave(&dev->lock, flags);
  696. dev->pipes[pipe->id] = NULL;
  697. signalled_pipes_remove_locked(dev, pipe);
  698. spin_unlock_irqrestore(&dev->lock, flags);
  699. filp->private_data = NULL;
  700. free_page((unsigned long)pipe->command_buffer);
  701. kfree(pipe);
  702. return 0;
  703. }
  704. static const struct file_operations goldfish_pipe_fops = {
  705. .owner = THIS_MODULE,
  706. .read = goldfish_pipe_read,
  707. .write = goldfish_pipe_write,
  708. .poll = goldfish_pipe_poll,
  709. .open = goldfish_pipe_open,
  710. .release = goldfish_pipe_release,
  711. };
  712. static struct miscdevice goldfish_pipe_dev = {
  713. .minor = MISC_DYNAMIC_MINOR,
  714. .name = "goldfish_pipe",
  715. .fops = &goldfish_pipe_fops,
  716. };
  717. static int goldfish_pipe_device_init(struct platform_device *pdev)
  718. {
  719. char *page;
  720. struct goldfish_pipe_dev *dev = pipe_dev;
  721. int err = devm_request_irq(&pdev->dev, dev->irq,
  722. goldfish_pipe_interrupt,
  723. IRQF_SHARED, "goldfish_pipe", dev);
  724. if (err) {
  725. dev_err(&pdev->dev, "unable to allocate IRQ for v2\n");
  726. return err;
  727. }
  728. err = misc_register(&goldfish_pipe_dev);
  729. if (err) {
  730. dev_err(&pdev->dev, "unable to register v2 device\n");
  731. return err;
  732. }
  733. dev->first_signalled_pipe = NULL;
  734. dev->pipes_capacity = INITIAL_PIPES_CAPACITY;
  735. dev->pipes = kcalloc(dev->pipes_capacity, sizeof(*dev->pipes),
  736. GFP_KERNEL);
  737. if (!dev->pipes)
  738. return -ENOMEM;
  739. /*
  740. * We're going to pass two buffers, open_command_params and
  741. * signalled_pipe_buffers, to the host. This means each of those buffers
  742. * needs to be contained in a single physical page. The easiest choice
  743. * is to just allocate a page and place the buffers in it.
  744. */
  745. if (WARN_ON(sizeof(*dev->buffers) > PAGE_SIZE))
  746. return -ENOMEM;
  747. page = (char *)__get_free_page(GFP_KERNEL);
  748. if (!page) {
  749. kfree(dev->pipes);
  750. return -ENOMEM;
  751. }
  752. dev->buffers = (struct goldfish_pipe_dev_buffers *)page;
  753. /* Send the buffer addresses to the host */
  754. {
  755. u64 paddr = __pa(&dev->buffers->signalled_pipe_buffers);
  756. writel((u32)(unsigned long)(paddr >> 32),
  757. dev->base + PIPE_REG_SIGNAL_BUFFER_HIGH);
  758. writel((u32)(unsigned long)paddr,
  759. dev->base + PIPE_REG_SIGNAL_BUFFER);
  760. writel((u32)MAX_SIGNALLED_PIPES,
  761. dev->base + PIPE_REG_SIGNAL_BUFFER_COUNT);
  762. paddr = __pa(&dev->buffers->open_command_params);
  763. writel((u32)(unsigned long)(paddr >> 32),
  764. dev->base + PIPE_REG_OPEN_BUFFER_HIGH);
  765. writel((u32)(unsigned long)paddr,
  766. dev->base + PIPE_REG_OPEN_BUFFER);
  767. }
  768. return 0;
  769. }
  770. static void goldfish_pipe_device_deinit(struct platform_device *pdev)
  771. {
  772. struct goldfish_pipe_dev *dev = pipe_dev;
  773. misc_deregister(&goldfish_pipe_dev);
  774. kfree(dev->pipes);
  775. free_page((unsigned long)dev->buffers);
  776. }
  777. static int goldfish_pipe_probe(struct platform_device *pdev)
  778. {
  779. int err;
  780. struct resource *r;
  781. struct goldfish_pipe_dev *dev = pipe_dev;
  782. if (WARN_ON(sizeof(struct goldfish_pipe_command) > PAGE_SIZE))
  783. return -ENOMEM;
  784. /* not thread safe, but this should not happen */
  785. WARN_ON(dev->base != NULL);
  786. spin_lock_init(&dev->lock);
  787. r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  788. if (r == NULL || resource_size(r) < PAGE_SIZE) {
  789. dev_err(&pdev->dev, "can't allocate i/o page\n");
  790. return -EINVAL;
  791. }
  792. dev->base = devm_ioremap(&pdev->dev, r->start, PAGE_SIZE);
  793. if (dev->base == NULL) {
  794. dev_err(&pdev->dev, "ioremap failed\n");
  795. return -EINVAL;
  796. }
  797. r = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
  798. if (r == NULL) {
  799. err = -EINVAL;
  800. goto error;
  801. }
  802. dev->irq = r->start;
  803. /*
  804. * Exchange the versions with the host device
  805. *
  806. * Note: v1 driver used to not report its version, so we write it before
  807. * reading device version back: this allows the host implementation to
  808. * detect the old driver (if there was no version write before read).
  809. */
  810. writel((u32)PIPE_DRIVER_VERSION, dev->base + PIPE_REG_VERSION);
  811. dev->version = readl(dev->base + PIPE_REG_VERSION);
  812. if (WARN_ON(dev->version < PIPE_CURRENT_DEVICE_VERSION))
  813. return -EINVAL;
  814. err = goldfish_pipe_device_init(pdev);
  815. if (!err)
  816. return 0;
  817. error:
  818. dev->base = NULL;
  819. return err;
  820. }
  821. static int goldfish_pipe_remove(struct platform_device *pdev)
  822. {
  823. struct goldfish_pipe_dev *dev = pipe_dev;
  824. goldfish_pipe_device_deinit(pdev);
  825. dev->base = NULL;
  826. return 0;
  827. }
  828. static const struct acpi_device_id goldfish_pipe_acpi_match[] = {
  829. { "GFSH0003", 0 },
  830. { },
  831. };
  832. MODULE_DEVICE_TABLE(acpi, goldfish_pipe_acpi_match);
  833. static const struct of_device_id goldfish_pipe_of_match[] = {
  834. { .compatible = "google,android-pipe", },
  835. {},
  836. };
  837. MODULE_DEVICE_TABLE(of, goldfish_pipe_of_match);
  838. static struct platform_driver goldfish_pipe_driver = {
  839. .probe = goldfish_pipe_probe,
  840. .remove = goldfish_pipe_remove,
  841. .driver = {
  842. .name = "goldfish_pipe",
  843. .of_match_table = goldfish_pipe_of_match,
  844. .acpi_match_table = ACPI_PTR(goldfish_pipe_acpi_match),
  845. }
  846. };
  847. module_platform_driver(goldfish_pipe_driver);
  848. MODULE_AUTHOR("David Turner <digit@google.com>");
  849. MODULE_LICENSE("GPL");