arm_pmu_platform.c 5.5 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * platform_device probing code for ARM performance counters.
  4. *
  5. * Copyright (C) 2009 picoChip Designs, Ltd., Jamie Iles
  6. * Copyright (C) 2010 ARM Ltd., Will Deacon <will.deacon@arm.com>
  7. */
  8. #define pr_fmt(fmt) "hw perfevents: " fmt
  9. #include <linux/bug.h>
  10. #include <linux/cpumask.h>
  11. #include <linux/device.h>
  12. #include <linux/errno.h>
  13. #include <linux/irq.h>
  14. #include <linux/irqdesc.h>
  15. #include <linux/kconfig.h>
  16. #include <linux/of.h>
  17. #include <linux/of_device.h>
  18. #include <linux/percpu.h>
  19. #include <linux/perf/arm_pmu.h>
  20. #include <linux/platform_device.h>
  21. #include <linux/printk.h>
  22. #include <linux/smp.h>
  23. static int probe_current_pmu(struct arm_pmu *pmu,
  24. const struct pmu_probe_info *info)
  25. {
  26. int cpu = get_cpu();
  27. unsigned int cpuid = read_cpuid_id();
  28. int ret = -ENODEV;
  29. pr_info("probing PMU on CPU %d\n", cpu);
  30. for (; info->init != NULL; info++) {
  31. if ((cpuid & info->mask) != info->cpuid)
  32. continue;
  33. ret = info->init(pmu);
  34. break;
  35. }
  36. put_cpu();
  37. return ret;
  38. }
  39. static int pmu_parse_percpu_irq(struct arm_pmu *pmu, int irq)
  40. {
  41. int cpu, ret;
  42. struct pmu_hw_events __percpu *hw_events = pmu->hw_events;
  43. ret = irq_get_percpu_devid_partition(irq, &pmu->supported_cpus);
  44. if (ret)
  45. return ret;
  46. for_each_cpu(cpu, &pmu->supported_cpus)
  47. per_cpu(hw_events->irq, cpu) = irq;
  48. return 0;
  49. }
  50. static bool pmu_has_irq_affinity(struct device_node *node)
  51. {
  52. return !!of_find_property(node, "interrupt-affinity", NULL);
  53. }
  54. static int pmu_parse_irq_affinity(struct device_node *node, int i)
  55. {
  56. struct device_node *dn;
  57. int cpu;
  58. /*
  59. * If we don't have an interrupt-affinity property, we guess irq
  60. * affinity matches our logical CPU order, as we used to assume.
  61. * This is fragile, so we'll warn in pmu_parse_irqs().
  62. */
  63. if (!pmu_has_irq_affinity(node))
  64. return i;
  65. dn = of_parse_phandle(node, "interrupt-affinity", i);
  66. if (!dn) {
  67. pr_warn("failed to parse interrupt-affinity[%d] for %s\n",
  68. i, node->name);
  69. return -EINVAL;
  70. }
  71. cpu = of_cpu_node_to_id(dn);
  72. if (cpu < 0) {
  73. pr_warn("failed to find logical CPU for %s\n", dn->name);
  74. cpu = nr_cpu_ids;
  75. }
  76. of_node_put(dn);
  77. return cpu;
  78. }
  79. static int pmu_parse_irqs(struct arm_pmu *pmu)
  80. {
  81. int i = 0, num_irqs;
  82. struct platform_device *pdev = pmu->plat_device;
  83. struct pmu_hw_events __percpu *hw_events = pmu->hw_events;
  84. num_irqs = platform_irq_count(pdev);
  85. if (num_irqs < 0) {
  86. pr_err("unable to count PMU IRQs\n");
  87. return num_irqs;
  88. }
  89. /*
  90. * In this case we have no idea which CPUs are covered by the PMU.
  91. * To match our prior behaviour, we assume all CPUs in this case.
  92. */
  93. if (num_irqs == 0) {
  94. pr_warn("no irqs for PMU, sampling events not supported\n");
  95. pmu->pmu.capabilities |= PERF_PMU_CAP_NO_INTERRUPT;
  96. cpumask_setall(&pmu->supported_cpus);
  97. return 0;
  98. }
  99. if (num_irqs == 1) {
  100. int irq = platform_get_irq(pdev, 0);
  101. if (irq && irq_is_percpu_devid(irq))
  102. return pmu_parse_percpu_irq(pmu, irq);
  103. }
  104. if (nr_cpu_ids != 1 && !pmu_has_irq_affinity(pdev->dev.of_node)) {
  105. pr_warn("no interrupt-affinity property for %pOF, guessing.\n",
  106. pdev->dev.of_node);
  107. }
  108. for (i = 0; i < num_irqs; i++) {
  109. int cpu, irq;
  110. irq = platform_get_irq(pdev, i);
  111. if (WARN_ON(irq <= 0))
  112. continue;
  113. if (irq_is_percpu_devid(irq)) {
  114. pr_warn("multiple PPIs or mismatched SPI/PPI detected\n");
  115. return -EINVAL;
  116. }
  117. cpu = pmu_parse_irq_affinity(pdev->dev.of_node, i);
  118. if (cpu < 0)
  119. return cpu;
  120. if (cpu >= nr_cpu_ids)
  121. continue;
  122. if (per_cpu(hw_events->irq, cpu)) {
  123. pr_warn("multiple PMU IRQs for the same CPU detected\n");
  124. return -EINVAL;
  125. }
  126. per_cpu(hw_events->irq, cpu) = irq;
  127. cpumask_set_cpu(cpu, &pmu->supported_cpus);
  128. }
  129. return 0;
  130. }
  131. static int armpmu_request_irqs(struct arm_pmu *armpmu)
  132. {
  133. struct pmu_hw_events __percpu *hw_events = armpmu->hw_events;
  134. int cpu, err = 0;
  135. for_each_cpu(cpu, &armpmu->supported_cpus) {
  136. int irq = per_cpu(hw_events->irq, cpu);
  137. if (!irq)
  138. continue;
  139. err = armpmu_request_irq(irq, cpu);
  140. if (err)
  141. break;
  142. }
  143. return err;
  144. }
  145. static void armpmu_free_irqs(struct arm_pmu *armpmu)
  146. {
  147. int cpu;
  148. struct pmu_hw_events __percpu *hw_events = armpmu->hw_events;
  149. for_each_cpu(cpu, &armpmu->supported_cpus) {
  150. int irq = per_cpu(hw_events->irq, cpu);
  151. armpmu_free_irq(irq, cpu);
  152. }
  153. }
  154. int arm_pmu_device_probe(struct platform_device *pdev,
  155. const struct of_device_id *of_table,
  156. const struct pmu_probe_info *probe_table)
  157. {
  158. const struct of_device_id *of_id;
  159. armpmu_init_fn init_fn;
  160. struct device_node *node = pdev->dev.of_node;
  161. struct arm_pmu *pmu;
  162. int ret = -ENODEV;
  163. pmu = armpmu_alloc();
  164. if (!pmu)
  165. return -ENOMEM;
  166. pmu->plat_device = pdev;
  167. ret = pmu_parse_irqs(pmu);
  168. if (ret)
  169. goto out_free;
  170. if (node && (of_id = of_match_node(of_table, pdev->dev.of_node))) {
  171. init_fn = of_id->data;
  172. pmu->secure_access = of_property_read_bool(pdev->dev.of_node,
  173. "secure-reg-access");
  174. /* arm64 systems boot only as non-secure */
  175. if (IS_ENABLED(CONFIG_ARM64) && pmu->secure_access) {
  176. pr_warn("ignoring \"secure-reg-access\" property for arm64\n");
  177. pmu->secure_access = false;
  178. }
  179. ret = init_fn(pmu);
  180. } else if (probe_table) {
  181. cpumask_setall(&pmu->supported_cpus);
  182. ret = probe_current_pmu(pmu, probe_table);
  183. }
  184. if (ret) {
  185. pr_info("%pOF: failed to probe PMU!\n", node);
  186. goto out_free;
  187. }
  188. ret = armpmu_request_irqs(pmu);
  189. if (ret)
  190. goto out_free_irqs;
  191. ret = armpmu_register(pmu);
  192. if (ret)
  193. goto out_free;
  194. return 0;
  195. out_free_irqs:
  196. armpmu_free_irqs(pmu);
  197. out_free:
  198. pr_info("%pOF: failed to register PMU devices!\n", node);
  199. armpmu_free(pmu);
  200. return ret;
  201. }