fdt_address.c 6.2 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * FDT Address translation based on u-boot fdt_support.c which in turn was
  4. * based on the kernel unflattened DT address translation code.
  5. *
  6. * (C) Copyright 2007
  7. * Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com
  8. *
  9. * Copyright 2010-2011 Freescale Semiconductor, Inc.
  10. */
  11. #define pr_fmt(fmt) "OF: fdt: " fmt
  12. #include <linux/kernel.h>
  13. #include <linux/libfdt.h>
  14. #include <linux/of.h>
  15. #include <linux/of_fdt.h>
  16. #include <linux/sizes.h>
  17. /* Max address size we deal with */
  18. #define OF_MAX_ADDR_CELLS 4
  19. #define OF_CHECK_COUNTS(na, ns) ((na) > 0 && (na) <= OF_MAX_ADDR_CELLS && \
  20. (ns) > 0)
  21. /* Debug utility */
  22. #ifdef DEBUG
  23. static void __init of_dump_addr(const char *s, const __be32 *addr, int na)
  24. {
  25. pr_debug("%s", s);
  26. while(na--)
  27. pr_cont(" %08x", *(addr++));
  28. pr_cont("\n");
  29. }
  30. #else
  31. static void __init of_dump_addr(const char *s, const __be32 *addr, int na) { }
  32. #endif
  33. /* Callbacks for bus specific translators */
  34. struct of_bus {
  35. void (*count_cells)(const void *blob, int parentoffset,
  36. int *addrc, int *sizec);
  37. u64 (*map)(__be32 *addr, const __be32 *range,
  38. int na, int ns, int pna);
  39. int (*translate)(__be32 *addr, u64 offset, int na);
  40. };
  41. /* Default translator (generic bus) */
  42. static void __init fdt_bus_default_count_cells(const void *blob, int parentoffset,
  43. int *addrc, int *sizec)
  44. {
  45. const __be32 *prop;
  46. if (addrc) {
  47. prop = fdt_getprop(blob, parentoffset, "#address-cells", NULL);
  48. if (prop)
  49. *addrc = be32_to_cpup(prop);
  50. else
  51. *addrc = dt_root_addr_cells;
  52. }
  53. if (sizec) {
  54. prop = fdt_getprop(blob, parentoffset, "#size-cells", NULL);
  55. if (prop)
  56. *sizec = be32_to_cpup(prop);
  57. else
  58. *sizec = dt_root_size_cells;
  59. }
  60. }
  61. static u64 __init fdt_bus_default_map(__be32 *addr, const __be32 *range,
  62. int na, int ns, int pna)
  63. {
  64. u64 cp, s, da;
  65. cp = of_read_number(range, na);
  66. s = of_read_number(range + na + pna, ns);
  67. da = of_read_number(addr, na);
  68. pr_debug("default map, cp=%llx, s=%llx, da=%llx\n",
  69. cp, s, da);
  70. if (da < cp || da >= (cp + s))
  71. return OF_BAD_ADDR;
  72. return da - cp;
  73. }
  74. static int __init fdt_bus_default_translate(__be32 *addr, u64 offset, int na)
  75. {
  76. u64 a = of_read_number(addr, na);
  77. memset(addr, 0, na * 4);
  78. a += offset;
  79. if (na > 1)
  80. addr[na - 2] = cpu_to_fdt32(a >> 32);
  81. addr[na - 1] = cpu_to_fdt32(a & 0xffffffffu);
  82. return 0;
  83. }
  84. /* Array of bus specific translators */
  85. static const struct of_bus of_busses[] __initconst = {
  86. /* Default */
  87. {
  88. .count_cells = fdt_bus_default_count_cells,
  89. .map = fdt_bus_default_map,
  90. .translate = fdt_bus_default_translate,
  91. },
  92. };
  93. static int __init fdt_translate_one(const void *blob, int parent,
  94. const struct of_bus *bus,
  95. const struct of_bus *pbus, __be32 *addr,
  96. int na, int ns, int pna, const char *rprop)
  97. {
  98. const __be32 *ranges;
  99. int rlen;
  100. int rone;
  101. u64 offset = OF_BAD_ADDR;
  102. ranges = fdt_getprop(blob, parent, rprop, &rlen);
  103. if (!ranges)
  104. return 1;
  105. if (rlen == 0) {
  106. offset = of_read_number(addr, na);
  107. memset(addr, 0, pna * 4);
  108. pr_debug("empty ranges, 1:1 translation\n");
  109. goto finish;
  110. }
  111. pr_debug("walking ranges...\n");
  112. /* Now walk through the ranges */
  113. rlen /= 4;
  114. rone = na + pna + ns;
  115. for (; rlen >= rone; rlen -= rone, ranges += rone) {
  116. offset = bus->map(addr, ranges, na, ns, pna);
  117. if (offset != OF_BAD_ADDR)
  118. break;
  119. }
  120. if (offset == OF_BAD_ADDR) {
  121. pr_debug("not found !\n");
  122. return 1;
  123. }
  124. memcpy(addr, ranges + na, 4 * pna);
  125. finish:
  126. of_dump_addr("parent translation for:", addr, pna);
  127. pr_debug("with offset: %llx\n", offset);
  128. /* Translate it into parent bus space */
  129. return pbus->translate(addr, offset, pna);
  130. }
  131. /*
  132. * Translate an address from the device-tree into a CPU physical address,
  133. * this walks up the tree and applies the various bus mappings on the
  134. * way.
  135. *
  136. * Note: We consider that crossing any level with #size-cells == 0 to mean
  137. * that translation is impossible (that is we are not dealing with a value
  138. * that can be mapped to a cpu physical address). This is not really specified
  139. * that way, but this is traditionally the way IBM at least do things
  140. */
  141. static u64 __init fdt_translate_address(const void *blob, int node_offset)
  142. {
  143. int parent, len;
  144. const struct of_bus *bus, *pbus;
  145. const __be32 *reg;
  146. __be32 addr[OF_MAX_ADDR_CELLS];
  147. int na, ns, pna, pns;
  148. u64 result = OF_BAD_ADDR;
  149. pr_debug("** translation for device %s **\n",
  150. fdt_get_name(blob, node_offset, NULL));
  151. reg = fdt_getprop(blob, node_offset, "reg", &len);
  152. if (!reg) {
  153. pr_err("warning: device tree node '%s' has no address.\n",
  154. fdt_get_name(blob, node_offset, NULL));
  155. goto bail;
  156. }
  157. /* Get parent & match bus type */
  158. parent = fdt_parent_offset(blob, node_offset);
  159. if (parent < 0)
  160. goto bail;
  161. bus = &of_busses[0];
  162. /* Cound address cells & copy address locally */
  163. bus->count_cells(blob, parent, &na, &ns);
  164. if (!OF_CHECK_COUNTS(na, ns)) {
  165. pr_err("Bad cell count for %s\n",
  166. fdt_get_name(blob, node_offset, NULL));
  167. goto bail;
  168. }
  169. memcpy(addr, reg, na * 4);
  170. pr_debug("bus (na=%d, ns=%d) on %s\n",
  171. na, ns, fdt_get_name(blob, parent, NULL));
  172. of_dump_addr("translating address:", addr, na);
  173. /* Translate */
  174. for (;;) {
  175. /* Switch to parent bus */
  176. node_offset = parent;
  177. parent = fdt_parent_offset(blob, node_offset);
  178. /* If root, we have finished */
  179. if (parent < 0) {
  180. pr_debug("reached root node\n");
  181. result = of_read_number(addr, na);
  182. break;
  183. }
  184. /* Get new parent bus and counts */
  185. pbus = &of_busses[0];
  186. pbus->count_cells(blob, parent, &pna, &pns);
  187. if (!OF_CHECK_COUNTS(pna, pns)) {
  188. pr_err("Bad cell count for %s\n",
  189. fdt_get_name(blob, node_offset, NULL));
  190. break;
  191. }
  192. pr_debug("parent bus (na=%d, ns=%d) on %s\n",
  193. pna, pns, fdt_get_name(blob, parent, NULL));
  194. /* Apply bus translation */
  195. if (fdt_translate_one(blob, node_offset, bus, pbus,
  196. addr, na, ns, pna, "ranges"))
  197. break;
  198. /* Complete the move up one level */
  199. na = pna;
  200. ns = pns;
  201. bus = pbus;
  202. of_dump_addr("one level translation:", addr, na);
  203. }
  204. bail:
  205. return result;
  206. }
  207. /**
  208. * of_flat_dt_translate_address - translate DT addr into CPU phys addr
  209. * @node: node in the flat blob
  210. */
  211. u64 __init of_flat_dt_translate_address(unsigned long node)
  212. {
  213. return fdt_translate_address(initial_boot_params, node);
  214. }