wl3501.h 14 KB

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  1. /* SPDX-License-Identifier: GPL-2.0 */
  2. #ifndef __WL3501_H__
  3. #define __WL3501_H__
  4. #include <linux/spinlock.h>
  5. #include <linux/ieee80211.h>
  6. /* define for WLA 2.0 */
  7. #define WL3501_BLKSZ 256
  8. /*
  9. * ID for input Signals of DRIVER block
  10. * bit[7-5] is block ID: 000
  11. * bit[4-0] is signal ID
  12. */
  13. enum wl3501_signals {
  14. WL3501_SIG_ALARM,
  15. WL3501_SIG_MD_CONFIRM,
  16. WL3501_SIG_MD_IND,
  17. WL3501_SIG_ASSOC_CONFIRM,
  18. WL3501_SIG_ASSOC_IND,
  19. WL3501_SIG_AUTH_CONFIRM,
  20. WL3501_SIG_AUTH_IND,
  21. WL3501_SIG_DEAUTH_CONFIRM,
  22. WL3501_SIG_DEAUTH_IND,
  23. WL3501_SIG_DISASSOC_CONFIRM,
  24. WL3501_SIG_DISASSOC_IND,
  25. WL3501_SIG_GET_CONFIRM,
  26. WL3501_SIG_JOIN_CONFIRM,
  27. WL3501_SIG_PWR_MGMT_CONFIRM,
  28. WL3501_SIG_REASSOC_CONFIRM,
  29. WL3501_SIG_REASSOC_IND,
  30. WL3501_SIG_SCAN_CONFIRM,
  31. WL3501_SIG_SET_CONFIRM,
  32. WL3501_SIG_START_CONFIRM,
  33. WL3501_SIG_RESYNC_CONFIRM,
  34. WL3501_SIG_SITE_CONFIRM,
  35. WL3501_SIG_SAVE_CONFIRM,
  36. WL3501_SIG_RFTEST_CONFIRM,
  37. /*
  38. * ID for input Signals of MLME block
  39. * bit[7-5] is block ID: 010
  40. * bit[4-0] is signal ID
  41. */
  42. WL3501_SIG_ASSOC_REQ = 0x20,
  43. WL3501_SIG_AUTH_REQ,
  44. WL3501_SIG_DEAUTH_REQ,
  45. WL3501_SIG_DISASSOC_REQ,
  46. WL3501_SIG_GET_REQ,
  47. WL3501_SIG_JOIN_REQ,
  48. WL3501_SIG_PWR_MGMT_REQ,
  49. WL3501_SIG_REASSOC_REQ,
  50. WL3501_SIG_SCAN_REQ,
  51. WL3501_SIG_SET_REQ,
  52. WL3501_SIG_START_REQ,
  53. WL3501_SIG_MD_REQ,
  54. WL3501_SIG_RESYNC_REQ,
  55. WL3501_SIG_SITE_REQ,
  56. WL3501_SIG_SAVE_REQ,
  57. WL3501_SIG_RF_TEST_REQ,
  58. WL3501_SIG_MM_CONFIRM = 0x60,
  59. WL3501_SIG_MM_IND,
  60. };
  61. enum wl3501_mib_attribs {
  62. WL3501_MIB_ATTR_STATION_ID,
  63. WL3501_MIB_ATTR_AUTH_ALGORITHMS,
  64. WL3501_MIB_ATTR_AUTH_TYPE,
  65. WL3501_MIB_ATTR_MEDIUM_OCCUPANCY_LIMIT,
  66. WL3501_MIB_ATTR_CF_POLLABLE,
  67. WL3501_MIB_ATTR_CFP_PERIOD,
  68. WL3501_MIB_ATTR_CFPMAX_DURATION,
  69. WL3501_MIB_ATTR_AUTH_RESP_TMOUT,
  70. WL3501_MIB_ATTR_RX_DTIMS,
  71. WL3501_MIB_ATTR_PRIV_OPT_IMPLEMENTED,
  72. WL3501_MIB_ATTR_PRIV_INVOKED,
  73. WL3501_MIB_ATTR_WEP_DEFAULT_KEYS,
  74. WL3501_MIB_ATTR_WEP_DEFAULT_KEY_ID,
  75. WL3501_MIB_ATTR_WEP_KEY_MAPPINGS,
  76. WL3501_MIB_ATTR_WEP_KEY_MAPPINGS_LEN,
  77. WL3501_MIB_ATTR_EXCLUDE_UNENCRYPTED,
  78. WL3501_MIB_ATTR_WEP_ICV_ERROR_COUNT,
  79. WL3501_MIB_ATTR_WEP_UNDECRYPTABLE_COUNT,
  80. WL3501_MIB_ATTR_WEP_EXCLUDED_COUNT,
  81. WL3501_MIB_ATTR_MAC_ADDR,
  82. WL3501_MIB_ATTR_GROUP_ADDRS,
  83. WL3501_MIB_ATTR_RTS_THRESHOLD,
  84. WL3501_MIB_ATTR_SHORT_RETRY_LIMIT,
  85. WL3501_MIB_ATTR_LONG_RETRY_LIMIT,
  86. WL3501_MIB_ATTR_FRAG_THRESHOLD,
  87. WL3501_MIB_ATTR_MAX_TX_MSDU_LIFETIME,
  88. WL3501_MIB_ATTR_MAX_RX_LIFETIME,
  89. WL3501_MIB_ATTR_MANUFACTURER_ID,
  90. WL3501_MIB_ATTR_PRODUCT_ID,
  91. WL3501_MIB_ATTR_TX_FRAG_COUNT,
  92. WL3501_MIB_ATTR_MULTICAST_TX_FRAME_COUNT,
  93. WL3501_MIB_ATTR_FAILED_COUNT,
  94. WL3501_MIB_ATTR_RX_FRAG_COUNT,
  95. WL3501_MIB_ATTR_MULTICAST_RX_COUNT,
  96. WL3501_MIB_ATTR_FCS_ERROR_COUNT,
  97. WL3501_MIB_ATTR_RETRY_COUNT,
  98. WL3501_MIB_ATTR_MULTIPLE_RETRY_COUNT,
  99. WL3501_MIB_ATTR_RTS_SUCCESS_COUNT,
  100. WL3501_MIB_ATTR_RTS_FAILURE_COUNT,
  101. WL3501_MIB_ATTR_ACK_FAILURE_COUNT,
  102. WL3501_MIB_ATTR_FRAME_DUPLICATE_COUNT,
  103. WL3501_MIB_ATTR_PHY_TYPE,
  104. WL3501_MIB_ATTR_REG_DOMAINS_SUPPORT,
  105. WL3501_MIB_ATTR_CURRENT_REG_DOMAIN,
  106. WL3501_MIB_ATTR_SLOT_TIME,
  107. WL3501_MIB_ATTR_CCA_TIME,
  108. WL3501_MIB_ATTR_RX_TX_TURNAROUND_TIME,
  109. WL3501_MIB_ATTR_TX_PLCP_DELAY,
  110. WL3501_MIB_ATTR_RX_TX_SWITCH_TIME,
  111. WL3501_MIB_ATTR_TX_RAMP_ON_TIME,
  112. WL3501_MIB_ATTR_TX_RF_DELAY,
  113. WL3501_MIB_ATTR_SIFS_TIME,
  114. WL3501_MIB_ATTR_RX_RF_DELAY,
  115. WL3501_MIB_ATTR_RX_PLCP_DELAY,
  116. WL3501_MIB_ATTR_MAC_PROCESSING_DELAY,
  117. WL3501_MIB_ATTR_TX_RAMP_OFF_TIME,
  118. WL3501_MIB_ATTR_PREAMBLE_LEN,
  119. WL3501_MIB_ATTR_PLCP_HEADER_LEN,
  120. WL3501_MIB_ATTR_MPDU_DURATION_FACTOR,
  121. WL3501_MIB_ATTR_AIR_PROPAGATION_TIME,
  122. WL3501_MIB_ATTR_TEMP_TYPE,
  123. WL3501_MIB_ATTR_CW_MIN,
  124. WL3501_MIB_ATTR_CW_MAX,
  125. WL3501_MIB_ATTR_SUPPORT_DATA_RATES_TX,
  126. WL3501_MIB_ATTR_SUPPORT_DATA_RATES_RX,
  127. WL3501_MIB_ATTR_MPDU_MAX_LEN,
  128. WL3501_MIB_ATTR_SUPPORT_TX_ANTENNAS,
  129. WL3501_MIB_ATTR_CURRENT_TX_ANTENNA,
  130. WL3501_MIB_ATTR_SUPPORT_RX_ANTENNAS,
  131. WL3501_MIB_ATTR_DIVERSITY_SUPPORT,
  132. WL3501_MIB_ATTR_DIVERSITY_SELECTION_RS,
  133. WL3501_MIB_ATTR_NR_SUPPORTED_PWR_LEVELS,
  134. WL3501_MIB_ATTR_TX_PWR_LEVEL1,
  135. WL3501_MIB_ATTR_TX_PWR_LEVEL2,
  136. WL3501_MIB_ATTR_TX_PWR_LEVEL3,
  137. WL3501_MIB_ATTR_TX_PWR_LEVEL4,
  138. WL3501_MIB_ATTR_TX_PWR_LEVEL5,
  139. WL3501_MIB_ATTR_TX_PWR_LEVEL6,
  140. WL3501_MIB_ATTR_TX_PWR_LEVEL7,
  141. WL3501_MIB_ATTR_TX_PWR_LEVEL8,
  142. WL3501_MIB_ATTR_CURRENT_TX_PWR_LEVEL,
  143. WL3501_MIB_ATTR_CURRENT_CHAN,
  144. WL3501_MIB_ATTR_CCA_MODE_SUPPORTED,
  145. WL3501_MIB_ATTR_CURRENT_CCA_MODE,
  146. WL3501_MIB_ATTR_ED_THRESHOLD,
  147. WL3501_MIB_ATTR_SINTHESIZER_LOCKED,
  148. WL3501_MIB_ATTR_CURRENT_PWR_STATE,
  149. WL3501_MIB_ATTR_DOZE_TURNON_TIME,
  150. WL3501_MIB_ATTR_RCR33,
  151. WL3501_MIB_ATTR_DEFAULT_CHAN,
  152. WL3501_MIB_ATTR_SSID,
  153. WL3501_MIB_ATTR_PWR_MGMT_ENABLE,
  154. WL3501_MIB_ATTR_NET_CAPABILITY,
  155. WL3501_MIB_ATTR_ROUTING,
  156. };
  157. enum wl3501_net_type {
  158. WL3501_NET_TYPE_INFRA,
  159. WL3501_NET_TYPE_ADHOC,
  160. WL3501_NET_TYPE_ANY_BSS,
  161. };
  162. enum wl3501_scan_type {
  163. WL3501_SCAN_TYPE_ACTIVE,
  164. WL3501_SCAN_TYPE_PASSIVE,
  165. };
  166. enum wl3501_tx_result {
  167. WL3501_TX_RESULT_SUCCESS,
  168. WL3501_TX_RESULT_NO_BSS,
  169. WL3501_TX_RESULT_RETRY_LIMIT,
  170. };
  171. enum wl3501_sys_type {
  172. WL3501_SYS_TYPE_OPEN,
  173. WL3501_SYS_TYPE_SHARE_KEY,
  174. };
  175. enum wl3501_status {
  176. WL3501_STATUS_SUCCESS,
  177. WL3501_STATUS_INVALID,
  178. WL3501_STATUS_TIMEOUT,
  179. WL3501_STATUS_REFUSED,
  180. WL3501_STATUS_MANY_REQ,
  181. WL3501_STATUS_ALREADY_BSS,
  182. };
  183. #define WL3501_MGMT_CAPABILITY_ESS 0x0001 /* see 802.11 p.58 */
  184. #define WL3501_MGMT_CAPABILITY_IBSS 0x0002 /* - " - */
  185. #define WL3501_MGMT_CAPABILITY_CF_POLLABLE 0x0004 /* - " - */
  186. #define WL3501_MGMT_CAPABILITY_CF_POLL_REQUEST 0x0008 /* - " - */
  187. #define WL3501_MGMT_CAPABILITY_PRIVACY 0x0010 /* - " - */
  188. #define IW_REG_DOMAIN_FCC 0x10 /* Channel 1 to 11 USA */
  189. #define IW_REG_DOMAIN_DOC 0x20 /* Channel 1 to 11 Canada */
  190. #define IW_REG_DOMAIN_ETSI 0x30 /* Channel 1 to 13 Europe */
  191. #define IW_REG_DOMAIN_SPAIN 0x31 /* Channel 10 to 11 Spain */
  192. #define IW_REG_DOMAIN_FRANCE 0x32 /* Channel 10 to 13 France */
  193. #define IW_REG_DOMAIN_MKK 0x40 /* Channel 14 Japan */
  194. #define IW_REG_DOMAIN_MKK1 0x41 /* Channel 1-14 Japan */
  195. #define IW_REG_DOMAIN_ISRAEL 0x50 /* Channel 3 - 9 Israel */
  196. #define IW_MGMT_RATE_LABEL_MANDATORY 128 /* MSB */
  197. enum iw_mgmt_rate_labels {
  198. IW_MGMT_RATE_LABEL_1MBIT = 2,
  199. IW_MGMT_RATE_LABEL_2MBIT = 4,
  200. IW_MGMT_RATE_LABEL_5_5MBIT = 11,
  201. IW_MGMT_RATE_LABEL_11MBIT = 22,
  202. };
  203. enum iw_mgmt_info_element_ids {
  204. IW_MGMT_INFO_ELEMENT_SSID, /* Service Set Identity */
  205. IW_MGMT_INFO_ELEMENT_SUPPORTED_RATES,
  206. IW_MGMT_INFO_ELEMENT_FH_PARAMETER_SET,
  207. IW_MGMT_INFO_ELEMENT_DS_PARAMETER_SET,
  208. IW_MGMT_INFO_ELEMENT_CS_PARAMETER_SET,
  209. IW_MGMT_INFO_ELEMENT_CS_TIM, /* Traffic Information Map */
  210. IW_MGMT_INFO_ELEMENT_IBSS_PARAMETER_SET,
  211. /* 7-15: Reserved, unused */
  212. IW_MGMT_INFO_ELEMENT_CHALLENGE_TEXT = 16,
  213. /* 17-31 Reserved for challenge text extension */
  214. /* 32-255 Reserved, unused */
  215. };
  216. struct iw_mgmt_info_element {
  217. u8 id; /* one of enum iw_mgmt_info_element_ids,
  218. but sizeof(enum) > sizeof(u8) :-( */
  219. u8 len;
  220. u8 data[0];
  221. } __packed;
  222. struct iw_mgmt_essid_pset {
  223. struct iw_mgmt_info_element el;
  224. u8 essid[IW_ESSID_MAX_SIZE];
  225. } __packed;
  226. /*
  227. * According to 802.11 Wireless Netowors, the definitive guide - O'Reilly
  228. * Pg 75
  229. */
  230. #define IW_DATA_RATE_MAX_LABELS 8
  231. struct iw_mgmt_data_rset {
  232. struct iw_mgmt_info_element el;
  233. u8 data_rate_labels[IW_DATA_RATE_MAX_LABELS];
  234. } __packed;
  235. struct iw_mgmt_ds_pset {
  236. struct iw_mgmt_info_element el;
  237. u8 chan;
  238. } __packed;
  239. struct iw_mgmt_cf_pset {
  240. struct iw_mgmt_info_element el;
  241. u8 cfp_count;
  242. u8 cfp_period;
  243. u16 cfp_max_duration;
  244. u16 cfp_dur_remaining;
  245. } __packed;
  246. struct iw_mgmt_ibss_pset {
  247. struct iw_mgmt_info_element el;
  248. u16 atim_window;
  249. } __packed;
  250. struct wl3501_tx_hdr {
  251. u16 tx_cnt;
  252. u8 sync[16];
  253. u16 sfd;
  254. u8 signal;
  255. u8 service;
  256. u16 len;
  257. u16 crc16;
  258. u16 frame_ctrl;
  259. u16 duration_id;
  260. u8 addr1[ETH_ALEN];
  261. u8 addr2[ETH_ALEN];
  262. u8 addr3[ETH_ALEN];
  263. u16 seq_ctrl;
  264. u8 addr4[ETH_ALEN];
  265. };
  266. struct wl3501_rx_hdr {
  267. u16 rx_next_blk;
  268. u16 rc_next_frame_blk;
  269. u8 rx_blk_ctrl;
  270. u8 rx_next_frame;
  271. u8 rx_next_frame1;
  272. u8 rssi;
  273. char time[8];
  274. u8 signal;
  275. u8 service;
  276. u16 len;
  277. u16 crc16;
  278. u16 frame_ctrl;
  279. u16 duration;
  280. u8 addr1[ETH_ALEN];
  281. u8 addr2[ETH_ALEN];
  282. u8 addr3[ETH_ALEN];
  283. u16 seq;
  284. u8 addr4[ETH_ALEN];
  285. };
  286. struct wl3501_start_req {
  287. u16 next_blk;
  288. u8 sig_id;
  289. u8 bss_type;
  290. u16 beacon_period;
  291. u16 dtim_period;
  292. u16 probe_delay;
  293. u16 cap_info;
  294. struct iw_mgmt_essid_pset ssid;
  295. struct iw_mgmt_data_rset bss_basic_rset;
  296. struct iw_mgmt_data_rset operational_rset;
  297. struct iw_mgmt_cf_pset cf_pset;
  298. struct iw_mgmt_ds_pset ds_pset;
  299. struct iw_mgmt_ibss_pset ibss_pset;
  300. };
  301. struct wl3501_assoc_req {
  302. u16 next_blk;
  303. u8 sig_id;
  304. u8 reserved;
  305. u16 timeout;
  306. u16 cap_info;
  307. u16 listen_interval;
  308. u8 mac_addr[ETH_ALEN];
  309. };
  310. struct wl3501_assoc_confirm {
  311. u16 next_blk;
  312. u8 sig_id;
  313. u8 reserved;
  314. u16 status;
  315. };
  316. struct wl3501_assoc_ind {
  317. u16 next_blk;
  318. u8 sig_id;
  319. u8 mac_addr[ETH_ALEN];
  320. };
  321. struct wl3501_auth_req {
  322. u16 next_blk;
  323. u8 sig_id;
  324. u8 reserved;
  325. u16 type;
  326. u16 timeout;
  327. u8 mac_addr[ETH_ALEN];
  328. };
  329. struct wl3501_auth_confirm {
  330. u16 next_blk;
  331. u8 sig_id;
  332. u8 reserved;
  333. u16 type;
  334. u16 status;
  335. u8 mac_addr[ETH_ALEN];
  336. };
  337. struct wl3501_get_req {
  338. u16 next_blk;
  339. u8 sig_id;
  340. u8 reserved;
  341. u16 mib_attrib;
  342. };
  343. struct wl3501_get_confirm {
  344. u16 next_blk;
  345. u8 sig_id;
  346. u8 reserved;
  347. u16 mib_status;
  348. u16 mib_attrib;
  349. u8 mib_value[100];
  350. };
  351. struct wl3501_join_req {
  352. u16 next_blk;
  353. u8 sig_id;
  354. u8 reserved;
  355. struct iw_mgmt_data_rset operational_rset;
  356. u16 reserved2;
  357. u16 timeout;
  358. u16 probe_delay;
  359. u8 timestamp[8];
  360. u8 local_time[8];
  361. u16 beacon_period;
  362. u16 dtim_period;
  363. u16 cap_info;
  364. u8 bss_type;
  365. u8 bssid[ETH_ALEN];
  366. struct iw_mgmt_essid_pset ssid;
  367. struct iw_mgmt_ds_pset ds_pset;
  368. struct iw_mgmt_cf_pset cf_pset;
  369. struct iw_mgmt_ibss_pset ibss_pset;
  370. struct iw_mgmt_data_rset bss_basic_rset;
  371. };
  372. struct wl3501_join_confirm {
  373. u16 next_blk;
  374. u8 sig_id;
  375. u8 reserved;
  376. u16 status;
  377. };
  378. struct wl3501_pwr_mgmt_req {
  379. u16 next_blk;
  380. u8 sig_id;
  381. u8 pwr_save;
  382. u8 wake_up;
  383. u8 receive_dtims;
  384. };
  385. struct wl3501_pwr_mgmt_confirm {
  386. u16 next_blk;
  387. u8 sig_id;
  388. u8 reserved;
  389. u16 status;
  390. };
  391. struct wl3501_scan_req {
  392. u16 next_blk;
  393. u8 sig_id;
  394. u8 bss_type;
  395. u16 probe_delay;
  396. u16 min_chan_time;
  397. u16 max_chan_time;
  398. u8 chan_list[14];
  399. u8 bssid[ETH_ALEN];
  400. struct iw_mgmt_essid_pset ssid;
  401. enum wl3501_scan_type scan_type;
  402. };
  403. struct wl3501_scan_confirm {
  404. u16 next_blk;
  405. u8 sig_id;
  406. u8 reserved;
  407. u16 status;
  408. char timestamp[8];
  409. char localtime[8];
  410. u16 beacon_period;
  411. u16 dtim_period;
  412. u16 cap_info;
  413. u8 bss_type;
  414. u8 bssid[ETH_ALEN];
  415. struct iw_mgmt_essid_pset ssid;
  416. struct iw_mgmt_ds_pset ds_pset;
  417. struct iw_mgmt_cf_pset cf_pset;
  418. struct iw_mgmt_ibss_pset ibss_pset;
  419. struct iw_mgmt_data_rset bss_basic_rset;
  420. u8 rssi;
  421. };
  422. struct wl3501_start_confirm {
  423. u16 next_blk;
  424. u8 sig_id;
  425. u8 reserved;
  426. u16 status;
  427. };
  428. struct wl3501_md_req {
  429. u16 next_blk;
  430. u8 sig_id;
  431. u8 routing;
  432. u16 data;
  433. u16 size;
  434. u8 pri;
  435. u8 service_class;
  436. u8 daddr[ETH_ALEN];
  437. u8 saddr[ETH_ALEN];
  438. };
  439. struct wl3501_md_ind {
  440. u16 next_blk;
  441. u8 sig_id;
  442. u8 routing;
  443. u16 data;
  444. u16 size;
  445. u8 reception;
  446. u8 pri;
  447. u8 service_class;
  448. u8 daddr[ETH_ALEN];
  449. u8 saddr[ETH_ALEN];
  450. };
  451. struct wl3501_md_confirm {
  452. u16 next_blk;
  453. u8 sig_id;
  454. u8 reserved;
  455. u16 data;
  456. u8 status;
  457. u8 pri;
  458. u8 service_class;
  459. };
  460. struct wl3501_resync_req {
  461. u16 next_blk;
  462. u8 sig_id;
  463. };
  464. /* Definitions for supporting clone adapters. */
  465. /* System Interface Registers (SIR space) */
  466. #define WL3501_NIC_GCR ((u8)0x00) /* SIR0 - General Conf Register */
  467. #define WL3501_NIC_BSS ((u8)0x01) /* SIR1 - Bank Switching Select Reg */
  468. #define WL3501_NIC_LMAL ((u8)0x02) /* SIR2 - Local Mem addr Reg [7:0] */
  469. #define WL3501_NIC_LMAH ((u8)0x03) /* SIR3 - Local Mem addr Reg [14:8] */
  470. #define WL3501_NIC_IODPA ((u8)0x04) /* SIR4 - I/O Data Port A */
  471. #define WL3501_NIC_IODPB ((u8)0x05) /* SIR5 - I/O Data Port B */
  472. #define WL3501_NIC_IODPC ((u8)0x06) /* SIR6 - I/O Data Port C */
  473. #define WL3501_NIC_IODPD ((u8)0x07) /* SIR7 - I/O Data Port D */
  474. /* Bits in GCR */
  475. #define WL3501_GCR_SWRESET ((u8)0x80)
  476. #define WL3501_GCR_CORESET ((u8)0x40)
  477. #define WL3501_GCR_DISPWDN ((u8)0x20)
  478. #define WL3501_GCR_ECWAIT ((u8)0x10)
  479. #define WL3501_GCR_ECINT ((u8)0x08)
  480. #define WL3501_GCR_INT2EC ((u8)0x04)
  481. #define WL3501_GCR_ENECINT ((u8)0x02)
  482. #define WL3501_GCR_DAM ((u8)0x01)
  483. /* Bits in BSS (Bank Switching Select Register) */
  484. #define WL3501_BSS_FPAGE0 ((u8)0x20) /* Flash memory page0 */
  485. #define WL3501_BSS_FPAGE1 ((u8)0x28)
  486. #define WL3501_BSS_FPAGE2 ((u8)0x30)
  487. #define WL3501_BSS_FPAGE3 ((u8)0x38)
  488. #define WL3501_BSS_SPAGE0 ((u8)0x00) /* SRAM page0 */
  489. #define WL3501_BSS_SPAGE1 ((u8)0x08)
  490. #define WL3501_BSS_SPAGE2 ((u8)0x10)
  491. #define WL3501_BSS_SPAGE3 ((u8)0x18)
  492. /* Define Driver Interface */
  493. /* Refer IEEE 802.11 */
  494. /* Tx packet header, include PLCP and MPDU */
  495. /* Tx PLCP Header */
  496. struct wl3501_80211_tx_plcp_hdr {
  497. u8 sync[16];
  498. u16 sfd;
  499. u8 signal;
  500. u8 service;
  501. u16 len;
  502. u16 crc16;
  503. } __packed;
  504. struct wl3501_80211_tx_hdr {
  505. struct wl3501_80211_tx_plcp_hdr pclp_hdr;
  506. struct ieee80211_hdr mac_hdr;
  507. } __packed;
  508. /*
  509. Reserve the beginning Tx space for descriptor use.
  510. TxBlockOffset --> *----*----*----*----* \
  511. (TxFreeDesc) | 0 | 1 | 2 | 3 | \
  512. | 4 | 5 | 6 | 7 | |
  513. | 8 | 9 | 10 | 11 | TX_DESC * 20
  514. | 12 | 13 | 14 | 15 | |
  515. | 16 | 17 | 18 | 19 | /
  516. TxBufferBegin --> *----*----*----*----* /
  517. (TxBufferHead) | |
  518. (TxBufferTail) | |
  519. | Send Buffer |
  520. | |
  521. | |
  522. *-------------------*
  523. TxBufferEnd -------------------------/
  524. */
  525. struct wl3501_card {
  526. int base_addr;
  527. u8 mac_addr[ETH_ALEN];
  528. spinlock_t lock;
  529. wait_queue_head_t wait;
  530. struct wl3501_get_confirm sig_get_confirm;
  531. struct wl3501_pwr_mgmt_confirm sig_pwr_mgmt_confirm;
  532. u16 tx_buffer_size;
  533. u16 tx_buffer_head;
  534. u16 tx_buffer_tail;
  535. u16 tx_buffer_cnt;
  536. u16 esbq_req_start;
  537. u16 esbq_req_end;
  538. u16 esbq_req_head;
  539. u16 esbq_req_tail;
  540. u16 esbq_confirm_start;
  541. u16 esbq_confirm_end;
  542. u16 esbq_confirm;
  543. struct iw_mgmt_essid_pset essid;
  544. struct iw_mgmt_essid_pset keep_essid;
  545. u8 bssid[ETH_ALEN];
  546. int net_type;
  547. char nick[32];
  548. char card_name[32];
  549. char firmware_date[32];
  550. u8 chan;
  551. u8 cap_info;
  552. u16 start_seg;
  553. u16 bss_cnt;
  554. u16 join_sta_bss;
  555. u8 rssi;
  556. u8 adhoc_times;
  557. u8 reg_domain;
  558. u8 version[2];
  559. struct wl3501_scan_confirm bss_set[20];
  560. struct iw_statistics wstats;
  561. struct iw_spy_data spy_data;
  562. struct iw_public_data wireless_data;
  563. struct pcmcia_device *p_dev;
  564. };
  565. #endif