trx.c 21 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2009-2014 Realtek Corporation.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of version 2 of the GNU General Public License as
  7. * published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. * The full GNU General Public License is included in this distribution in the
  15. * file called LICENSE.
  16. *
  17. * Contact Information:
  18. * wlanfae <wlanfae@realtek.com>
  19. * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
  20. * Hsinchu 300, Taiwan.
  21. *
  22. * Larry Finger <Larry.Finger@lwfinger.net>
  23. *
  24. *****************************************************************************/
  25. #include "../wifi.h"
  26. #include "../pci.h"
  27. #include "../base.h"
  28. #include "../stats.h"
  29. #include "reg.h"
  30. #include "def.h"
  31. #include "phy.h"
  32. #include "trx.h"
  33. #include "led.h"
  34. #include "dm.h"
  35. #include "fw.h"
  36. static u8 _rtl8723be_map_hwqueue_to_fwqueue(struct sk_buff *skb, u8 hw_queue)
  37. {
  38. __le16 fc = rtl_get_fc(skb);
  39. if (unlikely(ieee80211_is_beacon(fc)))
  40. return QSLT_BEACON;
  41. if (ieee80211_is_mgmt(fc) || ieee80211_is_ctl(fc))
  42. return QSLT_MGNT;
  43. return skb->priority;
  44. }
  45. static void _rtl8723be_query_rxphystatus(struct ieee80211_hw *hw,
  46. struct rtl_stats *pstatus, u8 *pdesc,
  47. struct rx_fwinfo_8723be *p_drvinfo,
  48. bool bpacket_match_bssid,
  49. bool bpacket_toself,
  50. bool packet_beacon)
  51. {
  52. struct rtl_priv *rtlpriv = rtl_priv(hw);
  53. struct phy_status_rpt *p_phystrpt = (struct phy_status_rpt *)p_drvinfo;
  54. s8 rx_pwr_all = 0, rx_pwr[4];
  55. u8 rf_rx_num = 0, evm, pwdb_all, pwdb_all_bt = 0;
  56. u8 i, max_spatial_stream;
  57. u32 rssi, total_rssi = 0;
  58. bool is_cck = pstatus->is_cck;
  59. u8 lan_idx, vga_idx;
  60. /* Record it for next packet processing */
  61. pstatus->packet_matchbssid = bpacket_match_bssid;
  62. pstatus->packet_toself = bpacket_toself;
  63. pstatus->packet_beacon = packet_beacon;
  64. pstatus->rx_mimo_signalquality[0] = -1;
  65. pstatus->rx_mimo_signalquality[1] = -1;
  66. if (is_cck) {
  67. u8 cck_highpwr;
  68. u8 cck_agc_rpt;
  69. cck_agc_rpt = p_phystrpt->cck_agc_rpt_ofdm_cfosho_a;
  70. /* (1)Hardware does not provide RSSI for CCK */
  71. /* (2)PWDB, Average PWDB cacluated by
  72. * hardware (for rate adaptive)
  73. */
  74. cck_highpwr = (u8)rtl_get_bbreg(hw, RFPGA0_XA_HSSIPARAMETER2,
  75. BIT(9));
  76. lan_idx = ((cck_agc_rpt & 0xE0) >> 5);
  77. vga_idx = (cck_agc_rpt & 0x1f);
  78. switch (lan_idx) {
  79. /* 46 53 73 95 201301231630 */
  80. /* 46 53 77 99 201301241630 */
  81. case 6:
  82. rx_pwr_all = -34 - (2 * vga_idx);
  83. break;
  84. case 4:
  85. rx_pwr_all = -14 - (2 * vga_idx);
  86. break;
  87. case 1:
  88. rx_pwr_all = 6 - (2 * vga_idx);
  89. break;
  90. case 0:
  91. rx_pwr_all = 16 - (2 * vga_idx);
  92. break;
  93. default:
  94. break;
  95. }
  96. pwdb_all = rtl_query_rxpwrpercentage(rx_pwr_all);
  97. if (pwdb_all > 100)
  98. pwdb_all = 100;
  99. pstatus->rx_pwdb_all = pwdb_all;
  100. pstatus->bt_rx_rssi_percentage = pwdb_all;
  101. pstatus->recvsignalpower = rx_pwr_all;
  102. /* (3) Get Signal Quality (EVM) */
  103. if (bpacket_match_bssid) {
  104. u8 sq, sq_rpt;
  105. if (pstatus->rx_pwdb_all > 40) {
  106. sq = 100;
  107. } else {
  108. sq_rpt = p_phystrpt->cck_sig_qual_ofdm_pwdb_all;
  109. if (sq_rpt > 64)
  110. sq = 0;
  111. else if (sq_rpt < 20)
  112. sq = 100;
  113. else
  114. sq = ((64 - sq_rpt) * 100) / 44;
  115. }
  116. pstatus->signalquality = sq;
  117. pstatus->rx_mimo_signalquality[0] = sq;
  118. pstatus->rx_mimo_signalquality[1] = -1;
  119. }
  120. } else {
  121. /* (1)Get RSSI for HT rate */
  122. for (i = RF90_PATH_A; i < RF6052_MAX_PATH; i++) {
  123. /* we will judge RF RX path now. */
  124. if (rtlpriv->dm.rfpath_rxenable[i])
  125. rf_rx_num++;
  126. rx_pwr[i] = ((p_phystrpt->path_agc[i].gain & 0x3f) * 2)
  127. - 110;
  128. pstatus->rx_pwr[i] = rx_pwr[i];
  129. /* Translate DBM to percentage. */
  130. rssi = rtl_query_rxpwrpercentage(rx_pwr[i]);
  131. total_rssi += rssi;
  132. pstatus->rx_mimo_signalstrength[i] = (u8)rssi;
  133. }
  134. /* (2)PWDB, Average PWDB cacluated by
  135. * hardware (for rate adaptive)
  136. */
  137. rx_pwr_all = ((p_phystrpt->cck_sig_qual_ofdm_pwdb_all >> 1) &
  138. 0x7f) - 110;
  139. pwdb_all = rtl_query_rxpwrpercentage(rx_pwr_all);
  140. pwdb_all_bt = pwdb_all;
  141. pstatus->rx_pwdb_all = pwdb_all;
  142. pstatus->bt_rx_rssi_percentage = pwdb_all_bt;
  143. pstatus->rxpower = rx_pwr_all;
  144. pstatus->recvsignalpower = rx_pwr_all;
  145. /* (3)EVM of HT rate */
  146. if (pstatus->rate >= DESC92C_RATEMCS8 &&
  147. pstatus->rate <= DESC92C_RATEMCS15)
  148. max_spatial_stream = 2;
  149. else
  150. max_spatial_stream = 1;
  151. for (i = 0; i < max_spatial_stream; i++) {
  152. evm = rtl_evm_db_to_percentage(
  153. p_phystrpt->stream_rxevm[i]);
  154. if (bpacket_match_bssid) {
  155. /* Fill value in RFD, Get the first
  156. * spatial stream only
  157. */
  158. if (i == 0)
  159. pstatus->signalquality =
  160. (u8)(evm & 0xff);
  161. pstatus->rx_mimo_signalquality[i] =
  162. (u8)(evm & 0xff);
  163. }
  164. }
  165. if (bpacket_match_bssid) {
  166. for (i = RF90_PATH_A; i <= RF90_PATH_B; i++)
  167. rtl_priv(hw)->dm.cfo_tail[i] =
  168. (int)p_phystrpt->path_cfotail[i];
  169. if (rtl_priv(hw)->dm.packet_count == 0xffffffff)
  170. rtl_priv(hw)->dm.packet_count = 0;
  171. else
  172. rtl_priv(hw)->dm.packet_count++;
  173. }
  174. }
  175. /* UI BSS List signal strength(in percentage),
  176. * make it good looking, from 0~100.
  177. */
  178. if (is_cck)
  179. pstatus->signalstrength = (u8)(rtl_signal_scale_mapping(hw,
  180. pwdb_all));
  181. else if (rf_rx_num != 0)
  182. pstatus->signalstrength = (u8)(rtl_signal_scale_mapping(hw,
  183. total_rssi /= rf_rx_num));
  184. }
  185. static void _rtl8723be_translate_rx_signal_stuff(struct ieee80211_hw *hw,
  186. struct sk_buff *skb,
  187. struct rtl_stats *pstatus,
  188. u8 *pdesc,
  189. struct rx_fwinfo_8723be *p_drvinfo)
  190. {
  191. struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
  192. struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
  193. struct ieee80211_hdr *hdr;
  194. u8 *tmp_buf;
  195. u8 *praddr;
  196. u8 *psaddr;
  197. u16 fc, type;
  198. bool packet_matchbssid, packet_toself, packet_beacon;
  199. tmp_buf = skb->data + pstatus->rx_drvinfo_size + pstatus->rx_bufshift;
  200. hdr = (struct ieee80211_hdr *)tmp_buf;
  201. fc = le16_to_cpu(hdr->frame_control);
  202. type = WLAN_FC_GET_TYPE(hdr->frame_control);
  203. praddr = hdr->addr1;
  204. psaddr = ieee80211_get_SA(hdr);
  205. memcpy(pstatus->psaddr, psaddr, ETH_ALEN);
  206. packet_matchbssid = ((IEEE80211_FTYPE_CTL != type) &&
  207. (ether_addr_equal(mac->bssid, (fc & IEEE80211_FCTL_TODS) ?
  208. hdr->addr1 : (fc & IEEE80211_FCTL_FROMDS) ?
  209. hdr->addr2 : hdr->addr3)) &&
  210. (!pstatus->hwerror) &&
  211. (!pstatus->crc) && (!pstatus->icv));
  212. packet_toself = packet_matchbssid &&
  213. (ether_addr_equal(praddr, rtlefuse->dev_addr));
  214. /* YP: packet_beacon is not initialized,
  215. * this assignment is neccesary,
  216. * otherwise it counld be true in this case
  217. * the situation is much worse in Kernel 3.10
  218. */
  219. if (ieee80211_is_beacon(hdr->frame_control))
  220. packet_beacon = true;
  221. else
  222. packet_beacon = false;
  223. if (packet_beacon && packet_matchbssid)
  224. rtl_priv(hw)->dm.dbginfo.num_qry_beacon_pkt++;
  225. _rtl8723be_query_rxphystatus(hw, pstatus, pdesc, p_drvinfo,
  226. packet_matchbssid,
  227. packet_toself,
  228. packet_beacon);
  229. rtl_process_phyinfo(hw, tmp_buf, pstatus);
  230. }
  231. static void _rtl8723be_insert_emcontent(struct rtl_tcb_desc *ptcb_desc,
  232. u8 *virtualaddress)
  233. {
  234. u32 dwtmp = 0;
  235. memset(virtualaddress, 0, 8);
  236. SET_EARLYMODE_PKTNUM(virtualaddress, ptcb_desc->empkt_num);
  237. if (ptcb_desc->empkt_num == 1) {
  238. dwtmp = ptcb_desc->empkt_len[0];
  239. } else {
  240. dwtmp = ptcb_desc->empkt_len[0];
  241. dwtmp += ((dwtmp % 4) ? (4 - dwtmp % 4) : 0) + 4;
  242. dwtmp += ptcb_desc->empkt_len[1];
  243. }
  244. SET_EARLYMODE_LEN0(virtualaddress, dwtmp);
  245. if (ptcb_desc->empkt_num <= 3) {
  246. dwtmp = ptcb_desc->empkt_len[2];
  247. } else {
  248. dwtmp = ptcb_desc->empkt_len[2];
  249. dwtmp += ((dwtmp % 4) ? (4 - dwtmp % 4) : 0) + 4;
  250. dwtmp += ptcb_desc->empkt_len[3];
  251. }
  252. SET_EARLYMODE_LEN1(virtualaddress, dwtmp);
  253. if (ptcb_desc->empkt_num <= 5) {
  254. dwtmp = ptcb_desc->empkt_len[4];
  255. } else {
  256. dwtmp = ptcb_desc->empkt_len[4];
  257. dwtmp += ((dwtmp % 4) ? (4 - dwtmp % 4) : 0) + 4;
  258. dwtmp += ptcb_desc->empkt_len[5];
  259. }
  260. SET_EARLYMODE_LEN2_1(virtualaddress, dwtmp & 0xF);
  261. SET_EARLYMODE_LEN2_2(virtualaddress, dwtmp >> 4);
  262. if (ptcb_desc->empkt_num <= 7) {
  263. dwtmp = ptcb_desc->empkt_len[6];
  264. } else {
  265. dwtmp = ptcb_desc->empkt_len[6];
  266. dwtmp += ((dwtmp % 4) ? (4 - dwtmp % 4) : 0) + 4;
  267. dwtmp += ptcb_desc->empkt_len[7];
  268. }
  269. SET_EARLYMODE_LEN3(virtualaddress, dwtmp);
  270. if (ptcb_desc->empkt_num <= 9) {
  271. dwtmp = ptcb_desc->empkt_len[8];
  272. } else {
  273. dwtmp = ptcb_desc->empkt_len[8];
  274. dwtmp += ((dwtmp % 4) ? (4 - dwtmp % 4) : 0) + 4;
  275. dwtmp += ptcb_desc->empkt_len[9];
  276. }
  277. SET_EARLYMODE_LEN4(virtualaddress, dwtmp);
  278. }
  279. bool rtl8723be_rx_query_desc(struct ieee80211_hw *hw,
  280. struct rtl_stats *status,
  281. struct ieee80211_rx_status *rx_status,
  282. u8 *pdesc, struct sk_buff *skb)
  283. {
  284. struct rtl_priv *rtlpriv = rtl_priv(hw);
  285. struct rx_fwinfo_8723be *p_drvinfo;
  286. struct ieee80211_hdr *hdr;
  287. u32 phystatus = GET_RX_DESC_PHYST(pdesc);
  288. status->length = (u16)GET_RX_DESC_PKT_LEN(pdesc);
  289. status->rx_drvinfo_size = (u8)GET_RX_DESC_DRV_INFO_SIZE(pdesc) *
  290. RX_DRV_INFO_SIZE_UNIT;
  291. status->rx_bufshift = (u8)(GET_RX_DESC_SHIFT(pdesc) & 0x03);
  292. status->icv = (u16) GET_RX_DESC_ICV(pdesc);
  293. status->crc = (u16) GET_RX_DESC_CRC32(pdesc);
  294. status->hwerror = (status->crc | status->icv);
  295. status->decrypted = !GET_RX_DESC_SWDEC(pdesc);
  296. status->rate = (u8)GET_RX_DESC_RXMCS(pdesc);
  297. status->shortpreamble = (u16)GET_RX_DESC_SPLCP(pdesc);
  298. status->isampdu = (bool)(GET_RX_DESC_PAGGR(pdesc) == 1);
  299. status->isfirst_ampdu = (bool)(GET_RX_DESC_PAGGR(pdesc) == 1);
  300. status->timestamp_low = GET_RX_DESC_TSFL(pdesc);
  301. status->rx_is40Mhzpacket = (bool)GET_RX_DESC_BW(pdesc);
  302. status->bandwidth = (u8)GET_RX_DESC_BW(pdesc);
  303. status->macid = GET_RX_DESC_MACID(pdesc);
  304. status->is_ht = (bool)GET_RX_DESC_RXHT(pdesc);
  305. status->is_cck = RX_HAL_IS_CCK_RATE(status->rate);
  306. if (GET_RX_STATUS_DESC_RPT_SEL(pdesc))
  307. status->packet_report_type = C2H_PACKET;
  308. else
  309. status->packet_report_type = NORMAL_RX;
  310. if (GET_RX_STATUS_DESC_MAGIC_MATCH(pdesc))
  311. status->wake_match = BIT(2);
  312. else if (GET_RX_STATUS_DESC_MAGIC_MATCH(pdesc))
  313. status->wake_match = BIT(1);
  314. else if (GET_RX_STATUS_DESC_UNICAST_MATCH(pdesc))
  315. status->wake_match = BIT(0);
  316. else
  317. status->wake_match = 0;
  318. if (status->wake_match)
  319. RT_TRACE(rtlpriv, COMP_RXDESC, DBG_LOUD,
  320. "GGGGGGGGGGGGGet Wakeup Packet!! WakeMatch=%d\n",
  321. status->wake_match);
  322. rx_status->freq = hw->conf.chandef.chan->center_freq;
  323. rx_status->band = hw->conf.chandef.chan->band;
  324. hdr = (struct ieee80211_hdr *)(skb->data + status->rx_drvinfo_size +
  325. status->rx_bufshift);
  326. if (status->crc)
  327. rx_status->flag |= RX_FLAG_FAILED_FCS_CRC;
  328. if (status->rx_is40Mhzpacket)
  329. rx_status->bw = RATE_INFO_BW_40;
  330. if (status->is_ht)
  331. rx_status->encoding = RX_ENC_HT;
  332. rx_status->flag |= RX_FLAG_MACTIME_START;
  333. /* hw will set status->decrypted true, if it finds the
  334. * frame is open data frame or mgmt frame.
  335. * So hw will not decryption robust managment frame
  336. * for IEEE80211w but still set status->decrypted
  337. * true, so here we should set it back to undecrypted
  338. * for IEEE80211w frame, and mac80211 sw will help
  339. * to decrypt it
  340. */
  341. if (status->decrypted) {
  342. if ((!_ieee80211_is_robust_mgmt_frame(hdr)) &&
  343. (ieee80211_has_protected(hdr->frame_control)))
  344. rx_status->flag |= RX_FLAG_DECRYPTED;
  345. else
  346. rx_status->flag &= ~RX_FLAG_DECRYPTED;
  347. }
  348. /* rate_idx: index of data rate into band's
  349. * supported rates or MCS index if HT rates
  350. * are use (RX_FLAG_HT)
  351. */
  352. rx_status->rate_idx = rtlwifi_rate_mapping(hw, status->is_ht,
  353. false, status->rate);
  354. rx_status->mactime = status->timestamp_low;
  355. if (phystatus) {
  356. p_drvinfo = (struct rx_fwinfo_8723be *)(skb->data +
  357. status->rx_bufshift);
  358. _rtl8723be_translate_rx_signal_stuff(hw, skb, status,
  359. pdesc, p_drvinfo);
  360. }
  361. rx_status->signal = status->recvsignalpower + 10;
  362. if (status->packet_report_type == TX_REPORT2) {
  363. status->macid_valid_entry[0] =
  364. GET_RX_RPT2_DESC_MACID_VALID_1(pdesc);
  365. status->macid_valid_entry[1] =
  366. GET_RX_RPT2_DESC_MACID_VALID_2(pdesc);
  367. }
  368. return true;
  369. }
  370. void rtl8723be_tx_fill_desc(struct ieee80211_hw *hw,
  371. struct ieee80211_hdr *hdr, u8 *pdesc_tx,
  372. u8 *txbd, struct ieee80211_tx_info *info,
  373. struct ieee80211_sta *sta, struct sk_buff *skb,
  374. u8 hw_queue, struct rtl_tcb_desc *ptcb_desc)
  375. {
  376. struct rtl_priv *rtlpriv = rtl_priv(hw);
  377. struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
  378. struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
  379. struct rtl_hal *rtlhal = rtl_hal(rtlpriv);
  380. struct rtlwifi_tx_info *tx_info = rtl_tx_skb_cb_info(skb);
  381. u8 *pdesc = (u8 *)pdesc_tx;
  382. u16 seq_number;
  383. __le16 fc = hdr->frame_control;
  384. unsigned int buf_len = 0;
  385. unsigned int skb_len = skb->len;
  386. u8 fw_qsel = _rtl8723be_map_hwqueue_to_fwqueue(skb, hw_queue);
  387. bool firstseg = ((hdr->seq_ctrl &
  388. cpu_to_le16(IEEE80211_SCTL_FRAG)) == 0);
  389. bool lastseg = ((hdr->frame_control &
  390. cpu_to_le16(IEEE80211_FCTL_MOREFRAGS)) == 0);
  391. dma_addr_t mapping;
  392. u8 bw_40 = 0;
  393. u8 short_gi = 0;
  394. if (mac->opmode == NL80211_IFTYPE_STATION) {
  395. bw_40 = mac->bw_40;
  396. } else if (mac->opmode == NL80211_IFTYPE_AP ||
  397. mac->opmode == NL80211_IFTYPE_ADHOC) {
  398. if (sta)
  399. bw_40 = sta->ht_cap.cap &
  400. IEEE80211_HT_CAP_SUP_WIDTH_20_40;
  401. }
  402. seq_number = (le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_SEQ) >> 4;
  403. rtl_get_tcb_desc(hw, info, sta, skb, ptcb_desc);
  404. /* reserve 8 byte for AMPDU early mode */
  405. if (rtlhal->earlymode_enable) {
  406. skb_push(skb, EM_HDR_LEN);
  407. memset(skb->data, 0, EM_HDR_LEN);
  408. }
  409. buf_len = skb->len;
  410. mapping = pci_map_single(rtlpci->pdev, skb->data, skb->len,
  411. PCI_DMA_TODEVICE);
  412. if (pci_dma_mapping_error(rtlpci->pdev, mapping)) {
  413. RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE, "DMA mapping error\n");
  414. return;
  415. }
  416. CLEAR_PCI_TX_DESC_CONTENT(pdesc, sizeof(struct tx_desc_8723be));
  417. if (ieee80211_is_nullfunc(fc) || ieee80211_is_ctl(fc)) {
  418. firstseg = true;
  419. lastseg = true;
  420. }
  421. if (firstseg) {
  422. if (rtlhal->earlymode_enable) {
  423. SET_TX_DESC_PKT_OFFSET(pdesc, 1);
  424. SET_TX_DESC_OFFSET(pdesc, USB_HWDESC_HEADER_LEN +
  425. EM_HDR_LEN);
  426. if (ptcb_desc->empkt_num) {
  427. RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE,
  428. "Insert 8 byte.pTcb->EMPktNum:%d\n",
  429. ptcb_desc->empkt_num);
  430. _rtl8723be_insert_emcontent(ptcb_desc,
  431. (u8 *)(skb->data));
  432. }
  433. } else {
  434. SET_TX_DESC_OFFSET(pdesc, USB_HWDESC_HEADER_LEN);
  435. }
  436. /* ptcb_desc->use_driver_rate = true; */
  437. SET_TX_DESC_TX_RATE(pdesc, ptcb_desc->hw_rate);
  438. if (ptcb_desc->hw_rate > DESC92C_RATEMCS0)
  439. short_gi = (ptcb_desc->use_shortgi) ? 1 : 0;
  440. else
  441. short_gi = (ptcb_desc->use_shortpreamble) ? 1 : 0;
  442. SET_TX_DESC_DATA_SHORTGI(pdesc, short_gi);
  443. if (info->flags & IEEE80211_TX_CTL_AMPDU) {
  444. SET_TX_DESC_AGG_ENABLE(pdesc, 1);
  445. SET_TX_DESC_MAX_AGG_NUM(pdesc, 0x14);
  446. }
  447. SET_TX_DESC_SEQ(pdesc, seq_number);
  448. SET_TX_DESC_RTS_ENABLE(pdesc, ((ptcb_desc->rts_enable &&
  449. !ptcb_desc->cts_enable) ?
  450. 1 : 0));
  451. SET_TX_DESC_HW_RTS_ENABLE(pdesc, 0);
  452. SET_TX_DESC_CTS2SELF(pdesc, ((ptcb_desc->cts_enable) ?
  453. 1 : 0));
  454. SET_TX_DESC_RTS_RATE(pdesc, ptcb_desc->rts_rate);
  455. SET_TX_DESC_RTS_SC(pdesc, ptcb_desc->rts_sc);
  456. SET_TX_DESC_RTS_SHORT(pdesc,
  457. ((ptcb_desc->rts_rate <= DESC92C_RATE54M) ?
  458. (ptcb_desc->rts_use_shortpreamble ? 1 : 0) :
  459. (ptcb_desc->rts_use_shortgi ? 1 : 0)));
  460. if (ptcb_desc->tx_enable_sw_calc_duration)
  461. SET_TX_DESC_NAV_USE_HDR(pdesc, 1);
  462. if (bw_40) {
  463. if (ptcb_desc->packet_bw == HT_CHANNEL_WIDTH_20_40) {
  464. SET_TX_DESC_DATA_BW(pdesc, 1);
  465. SET_TX_DESC_TX_SUB_CARRIER(pdesc, 3);
  466. } else {
  467. SET_TX_DESC_DATA_BW(pdesc, 0);
  468. SET_TX_DESC_TX_SUB_CARRIER(pdesc, mac->cur_40_prime_sc);
  469. }
  470. } else {
  471. SET_TX_DESC_DATA_BW(pdesc, 0);
  472. SET_TX_DESC_TX_SUB_CARRIER(pdesc, 0);
  473. }
  474. SET_TX_DESC_LINIP(pdesc, 0);
  475. SET_TX_DESC_PKT_SIZE(pdesc, (u16) skb_len);
  476. if (sta) {
  477. u8 ampdu_density = sta->ht_cap.ampdu_density;
  478. SET_TX_DESC_AMPDU_DENSITY(pdesc, ampdu_density);
  479. }
  480. if (info->control.hw_key) {
  481. struct ieee80211_key_conf *keyconf =
  482. info->control.hw_key;
  483. switch (keyconf->cipher) {
  484. case WLAN_CIPHER_SUITE_WEP40:
  485. case WLAN_CIPHER_SUITE_WEP104:
  486. case WLAN_CIPHER_SUITE_TKIP:
  487. SET_TX_DESC_SEC_TYPE(pdesc, 0x1);
  488. break;
  489. case WLAN_CIPHER_SUITE_CCMP:
  490. SET_TX_DESC_SEC_TYPE(pdesc, 0x3);
  491. break;
  492. default:
  493. SET_TX_DESC_SEC_TYPE(pdesc, 0x0);
  494. break;
  495. }
  496. }
  497. SET_TX_DESC_QUEUE_SEL(pdesc, fw_qsel);
  498. SET_TX_DESC_DATA_RATE_FB_LIMIT(pdesc, 0x1F);
  499. SET_TX_DESC_RTS_RATE_FB_LIMIT(pdesc, 0xF);
  500. SET_TX_DESC_DISABLE_FB(pdesc, ptcb_desc->disable_ratefallback ?
  501. 1 : 0);
  502. SET_TX_DESC_USE_RATE(pdesc, ptcb_desc->use_driver_rate ? 1 : 0);
  503. /* Set TxRate and RTSRate in TxDesc */
  504. /* This prevent Tx initial rate of new-coming packets */
  505. /* from being overwritten by retried packet rate.*/
  506. if (ieee80211_is_data_qos(fc)) {
  507. if (mac->rdg_en) {
  508. RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE,
  509. "Enable RDG function.\n");
  510. SET_TX_DESC_RDG_ENABLE(pdesc, 1);
  511. SET_TX_DESC_HTC(pdesc, 1);
  512. }
  513. }
  514. /* tx report */
  515. rtl_set_tx_report(ptcb_desc, pdesc, hw, tx_info);
  516. }
  517. SET_TX_DESC_FIRST_SEG(pdesc, (firstseg ? 1 : 0));
  518. SET_TX_DESC_LAST_SEG(pdesc, (lastseg ? 1 : 0));
  519. SET_TX_DESC_TX_BUFFER_SIZE(pdesc, (u16) buf_len);
  520. SET_TX_DESC_TX_BUFFER_ADDRESS(pdesc, mapping);
  521. /* if (rtlpriv->dm.useramask) { */
  522. if (1) {
  523. SET_TX_DESC_RATE_ID(pdesc, ptcb_desc->ratr_index);
  524. SET_TX_DESC_MACID(pdesc, ptcb_desc->mac_id);
  525. } else {
  526. SET_TX_DESC_RATE_ID(pdesc, 0xC + ptcb_desc->ratr_index);
  527. SET_TX_DESC_MACID(pdesc, ptcb_desc->mac_id);
  528. }
  529. if (!ieee80211_is_data_qos(fc)) {
  530. SET_TX_DESC_HWSEQ_EN(pdesc, 1);
  531. SET_TX_DESC_HWSEQ_SEL(pdesc, 0);
  532. }
  533. SET_TX_DESC_MORE_FRAG(pdesc, (lastseg ? 0 : 1));
  534. if (is_multicast_ether_addr(ieee80211_get_DA(hdr)) ||
  535. is_broadcast_ether_addr(ieee80211_get_DA(hdr))) {
  536. SET_TX_DESC_BMC(pdesc, 1);
  537. }
  538. RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE, "\n");
  539. }
  540. void rtl8723be_tx_fill_cmddesc(struct ieee80211_hw *hw, u8 *pdesc,
  541. bool firstseg, bool lastseg,
  542. struct sk_buff *skb)
  543. {
  544. struct rtl_priv *rtlpriv = rtl_priv(hw);
  545. struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
  546. u8 fw_queue = QSLT_BEACON;
  547. dma_addr_t mapping = pci_map_single(rtlpci->pdev,
  548. skb->data, skb->len,
  549. PCI_DMA_TODEVICE);
  550. if (pci_dma_mapping_error(rtlpci->pdev, mapping)) {
  551. RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE,
  552. "DMA mapping error\n");
  553. return;
  554. }
  555. CLEAR_PCI_TX_DESC_CONTENT(pdesc, TX_DESC_SIZE);
  556. SET_TX_DESC_OFFSET(pdesc, USB_HWDESC_HEADER_LEN);
  557. SET_TX_DESC_TX_RATE(pdesc, DESC92C_RATE1M);
  558. SET_TX_DESC_SEQ(pdesc, 0);
  559. SET_TX_DESC_LINIP(pdesc, 0);
  560. SET_TX_DESC_QUEUE_SEL(pdesc, fw_queue);
  561. SET_TX_DESC_FIRST_SEG(pdesc, 1);
  562. SET_TX_DESC_LAST_SEG(pdesc, 1);
  563. SET_TX_DESC_TX_BUFFER_SIZE(pdesc, (u16)(skb->len));
  564. SET_TX_DESC_TX_BUFFER_ADDRESS(pdesc, mapping);
  565. SET_TX_DESC_RATE_ID(pdesc, 0);
  566. SET_TX_DESC_MACID(pdesc, 0);
  567. SET_TX_DESC_OWN(pdesc, 1);
  568. SET_TX_DESC_PKT_SIZE((u8 *)pdesc, (u16)(skb->len));
  569. SET_TX_DESC_FIRST_SEG(pdesc, 1);
  570. SET_TX_DESC_LAST_SEG(pdesc, 1);
  571. SET_TX_DESC_USE_RATE(pdesc, 1);
  572. RT_PRINT_DATA(rtlpriv, COMP_CMD, DBG_LOUD,
  573. "H2C Tx Cmd Content\n", pdesc, TX_DESC_SIZE);
  574. }
  575. void rtl8723be_set_desc(struct ieee80211_hw *hw, u8 *pdesc,
  576. bool istx, u8 desc_name, u8 *val)
  577. {
  578. if (istx) {
  579. switch (desc_name) {
  580. case HW_DESC_OWN:
  581. SET_TX_DESC_OWN(pdesc, 1);
  582. break;
  583. case HW_DESC_TX_NEXTDESC_ADDR:
  584. SET_TX_DESC_NEXT_DESC_ADDRESS(pdesc, *(u32 *)val);
  585. break;
  586. default:
  587. WARN_ONCE(true, "rtl8723be: ERR txdesc :%d not processed\n",
  588. desc_name);
  589. break;
  590. }
  591. } else {
  592. switch (desc_name) {
  593. case HW_DESC_RXOWN:
  594. SET_RX_DESC_OWN(pdesc, 1);
  595. break;
  596. case HW_DESC_RXBUFF_ADDR:
  597. SET_RX_DESC_BUFF_ADDR(pdesc, *(u32 *)val);
  598. break;
  599. case HW_DESC_RXPKT_LEN:
  600. SET_RX_DESC_PKT_LEN(pdesc, *(u32 *)val);
  601. break;
  602. case HW_DESC_RXERO:
  603. SET_RX_DESC_EOR(pdesc, 1);
  604. break;
  605. default:
  606. WARN_ONCE(true, "rtl8723be: ERR rxdesc :%d not process\n",
  607. desc_name);
  608. break;
  609. }
  610. }
  611. }
  612. u64 rtl8723be_get_desc(struct ieee80211_hw *hw,
  613. u8 *pdesc, bool istx, u8 desc_name)
  614. {
  615. u32 ret = 0;
  616. if (istx) {
  617. switch (desc_name) {
  618. case HW_DESC_OWN:
  619. ret = GET_TX_DESC_OWN(pdesc);
  620. break;
  621. case HW_DESC_TXBUFF_ADDR:
  622. ret = GET_TX_DESC_TX_BUFFER_ADDRESS(pdesc);
  623. break;
  624. default:
  625. WARN_ONCE(true, "rtl8723be: ERR txdesc :%d not process\n",
  626. desc_name);
  627. break;
  628. }
  629. } else {
  630. switch (desc_name) {
  631. case HW_DESC_OWN:
  632. ret = GET_RX_DESC_OWN(pdesc);
  633. break;
  634. case HW_DESC_RXPKT_LEN:
  635. ret = GET_RX_DESC_PKT_LEN(pdesc);
  636. break;
  637. case HW_DESC_RXBUFF_ADDR:
  638. ret = GET_RX_DESC_BUFF_ADDR(pdesc);
  639. break;
  640. default:
  641. WARN_ONCE(true, "rtl8723be: ERR rxdesc :%d not processed\n",
  642. desc_name);
  643. break;
  644. }
  645. }
  646. return ret;
  647. }
  648. bool rtl8723be_is_tx_desc_closed(struct ieee80211_hw *hw,
  649. u8 hw_queue, u16 index)
  650. {
  651. struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
  652. struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[hw_queue];
  653. u8 *entry = (u8 *)(&ring->desc[ring->idx]);
  654. u8 own = (u8)rtl8723be_get_desc(hw, entry, true, HW_DESC_OWN);
  655. /*beacon packet will only use the first
  656. *descriptor defautly,and the own may not
  657. *be cleared by the hardware
  658. */
  659. if (own)
  660. return false;
  661. return true;
  662. }
  663. void rtl8723be_tx_polling(struct ieee80211_hw *hw, u8 hw_queue)
  664. {
  665. struct rtl_priv *rtlpriv = rtl_priv(hw);
  666. if (hw_queue == BEACON_QUEUE) {
  667. rtl_write_word(rtlpriv, REG_PCIE_CTRL_REG, BIT(4));
  668. } else {
  669. rtl_write_word(rtlpriv, REG_PCIE_CTRL_REG,
  670. BIT(0) << (hw_queue));
  671. }
  672. }