phy.h 4.2 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2009-2014 Realtek Corporation.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of version 2 of the GNU General Public License as
  7. * published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. * The full GNU General Public License is included in this distribution in the
  15. * file called LICENSE.
  16. *
  17. * Contact Information:
  18. * wlanfae <wlanfae@realtek.com>
  19. * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
  20. * Hsinchu 300, Taiwan.
  21. *
  22. * Larry Finger <Larry.Finger@lwfinger.net>
  23. *
  24. *****************************************************************************/
  25. #ifndef __RTL8723BE_PHY_H__
  26. #define __RTL8723BE_PHY_H__
  27. /* MAX_TX_COUNT must always set to 4, otherwise read efuse table sequence
  28. * will be wrong.
  29. */
  30. #define MAX_TX_COUNT 4
  31. #define TX_1S 0
  32. #define TX_2S 1
  33. #define TX_3S 2
  34. #define TX_4S 3
  35. #define MAX_POWER_INDEX 0x3F
  36. #define MAX_PRECMD_CNT 16
  37. #define MAX_RFDEPENDCMD_CNT 16
  38. #define MAX_POSTCMD_CNT 16
  39. #define MAX_DOZE_WAITING_TIMES_9x 64
  40. #define RT_CANNOT_IO(hw) false
  41. #define HIGHPOWER_RADIOA_ARRAYLEN 22
  42. #define TARGET_CHNL_NUM_2G_5G 59
  43. #define IQK_ADDA_REG_NUM 16
  44. #define IQK_BB_REG_NUM 9
  45. #define MAX_TOLERANCE 5
  46. #define IQK_DELAY_TIME 10
  47. #define index_mapping_NUM 15
  48. #define APK_BB_REG_NUM 5
  49. #define APK_AFE_REG_NUM 16
  50. #define APK_CURVE_REG_NUM 4
  51. #define PATH_NUM 1
  52. #define LOOP_LIMIT 5
  53. #define MAX_STALL_TIME 50
  54. #define ANTENNADIVERSITYVALUE 0x80
  55. #define MAX_TXPWR_IDX_NMODE_92S 63
  56. #define RESET_CNT_LIMIT 3
  57. #define IQK_ADDA_REG_NUM 16
  58. #define IQK_MAC_REG_NUM 4
  59. #define RF6052_MAX_PATH 2
  60. #define CT_OFFSET_MAC_ADDR 0X16
  61. #define CT_OFFSET_CCK_TX_PWR_IDX 0x5A
  62. #define CT_OFFSET_HT401S_TX_PWR_IDX 0x60
  63. #define CT_OFFSET_HT402S_TX_PWR_IDX_DIFF 0x66
  64. #define CT_OFFSET_HT20_TX_PWR_IDX_DIFF 0x69
  65. #define CT_OFFSET_OFDM_TX_PWR_IDX_DIFF 0x6C
  66. #define CT_OFFSET_HT40_MAX_PWR_OFFSET 0x6F
  67. #define CT_OFFSET_HT20_MAX_PWR_OFFSET 0x72
  68. #define CT_OFFSET_CHANNEL_PLAH 0x75
  69. #define CT_OFFSET_THERMAL_METER 0x78
  70. #define CT_OFFSET_RF_OPTION 0x79
  71. #define CT_OFFSET_VERSION 0x7E
  72. #define CT_OFFSET_CUSTOMER_ID 0x7F
  73. #define RTL92C_MAX_PATH_NUM 2
  74. enum baseband_config_type {
  75. BASEBAND_CONFIG_PHY_REG = 0,
  76. BASEBAND_CONFIG_AGC_TAB = 1,
  77. };
  78. enum ant_div_type {
  79. NO_ANTDIV = 0xFF,
  80. CG_TRX_HW_ANTDIV = 0x01,
  81. CGCS_RX_HW_ANTDIV = 0x02,
  82. FIXED_HW_ANTDIV = 0x03,
  83. CG_TRX_SMART_ANTDIV = 0x04,
  84. CGCS_RX_SW_ANTDIV = 0x05,
  85. };
  86. u32 rtl8723be_phy_query_rf_reg(struct ieee80211_hw *hw,
  87. enum radio_path rfpath,
  88. u32 regaddr, u32 bitmask);
  89. void rtl8723be_phy_set_rf_reg(struct ieee80211_hw *hw,
  90. enum radio_path rfpath,
  91. u32 regaddr, u32 bitmask, u32 data);
  92. bool rtl8723be_phy_mac_config(struct ieee80211_hw *hw);
  93. bool rtl8723be_phy_bb_config(struct ieee80211_hw *hw);
  94. bool rtl8723be_phy_rf_config(struct ieee80211_hw *hw);
  95. void rtl8723be_phy_get_hw_reg_originalvalue(struct ieee80211_hw *hw);
  96. void rtl8723be_phy_set_txpower_level(struct ieee80211_hw *hw,
  97. u8 channel);
  98. void rtl8723be_phy_scan_operation_backup(struct ieee80211_hw *hw,
  99. u8 operation);
  100. void rtl8723be_phy_set_bw_mode_callback(struct ieee80211_hw *hw);
  101. void rtl8723be_phy_set_bw_mode(struct ieee80211_hw *hw,
  102. enum nl80211_channel_type ch_type);
  103. void rtl8723be_phy_sw_chnl_callback(struct ieee80211_hw *hw);
  104. u8 rtl8723be_phy_sw_chnl(struct ieee80211_hw *hw);
  105. void rtl8723be_phy_iq_calibrate(struct ieee80211_hw *hw,
  106. bool b_recovery);
  107. void rtl8723be_phy_lc_calibrate(struct ieee80211_hw *hw);
  108. void rtl8723be_phy_set_rfpath_switch(struct ieee80211_hw *hw, bool bmain);
  109. bool rtl8723be_phy_config_rf_with_headerfile(struct ieee80211_hw *hw,
  110. enum radio_path rfpath);
  111. bool rtl8723be_phy_set_io_cmd(struct ieee80211_hw *hw, enum io_type iotype);
  112. bool rtl8723be_phy_set_rf_power_state(struct ieee80211_hw *hw,
  113. enum rf_pwrstate rfpwr_state);
  114. #endif