dm.h 2.3 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2009-2012 Realtek Corporation.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of version 2 of the GNU General Public License as
  7. * published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. * The full GNU General Public License is included in this distribution in the
  15. * file called LICENSE.
  16. *
  17. * Contact Information:
  18. * wlanfae <wlanfae@realtek.com>
  19. * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
  20. * Hsinchu 300, Taiwan.
  21. *
  22. * Larry Finger <Larry.Finger@lwfinger.net>
  23. *
  24. *****************************************************************************/
  25. #ifndef __RTL_92S_DM_H__
  26. #define __RTL_92S_DM_H__
  27. enum dm_dig_alg {
  28. DIG_ALGO_BY_FALSE_ALARM = 0,
  29. DIG_ALGO_BY_RSSI = 1,
  30. DIG_ALGO_BEFORE_CONNECT_BY_RSSI_AND_ALARM = 2,
  31. DIG_ALGO_BY_TOW_PORT = 3,
  32. DIG_ALGO_MAX
  33. };
  34. enum dm_dig_two_port_alg {
  35. DIG_TWO_PORT_ALGO_RSSI = 0,
  36. DIG_TWO_PORT_ALGO_FALSE_ALARM = 1,
  37. };
  38. enum dm_dig_dbg {
  39. DM_DBG_OFF = 0,
  40. DM_DBG_ON = 1,
  41. DM_DBG_MAX
  42. };
  43. enum dm_dig_sta {
  44. DM_STA_DIG_OFF = 0,
  45. DM_STA_DIG_ON,
  46. DM_STA_DIG_MAX
  47. };
  48. enum dm_ratr_sta {
  49. DM_RATR_STA_HIGH = 0,
  50. DM_RATR_STA_MIDDLEHIGH = 1,
  51. DM_RATR_STA_MIDDLE = 2,
  52. DM_RATR_STA_MIDDLELOW = 3,
  53. DM_RATR_STA_LOW = 4,
  54. DM_RATR_STA_ULTRALOW = 5,
  55. DM_RATR_STA_MAX
  56. };
  57. #define DM_TYPE_BYFW 0
  58. #define DM_TYPE_BYDRIVER 1
  59. #define TX_HIGH_PWR_LEVEL_NORMAL 0
  60. #define TX_HIGH_PWR_LEVEL_LEVEL1 1
  61. #define TX_HIGH_PWR_LEVEL_LEVEL2 2
  62. #define HAL_DM_DIG_DISABLE BIT(0) /* Disable Dig */
  63. #define HAL_DM_HIPWR_DISABLE BIT(1) /* Disable High Power */
  64. #define TX_HIGHPWR_LEVEL_NORMAL 0
  65. #define TX_HIGHPWR_LEVEL_NORMAL1 1
  66. #define TX_HIGHPWR_LEVEL_NORMAL2 2
  67. #define TX_POWER_NEAR_FIELD_THRESH_LVL2 74
  68. #define TX_POWER_NEAR_FIELD_THRESH_LVL1 67
  69. #define DM_DIG_HIGH_PWR_THRESH_HIGH 75
  70. #define DM_DIG_HIGH_PWR_THRESH_LOW 70
  71. #define DM_DIG_MIN_Netcore 0x12
  72. void rtl92s_dm_watchdog(struct ieee80211_hw *hw);
  73. void rtl92s_dm_init(struct ieee80211_hw *hw);
  74. void rtl92s_dm_init_edca_turbo(struct ieee80211_hw *hw);
  75. #endif